sis900.c 72 KB

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  1. /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
  2. Copyright 1999 Silicon Integrated System Corporation
  3. Revision: 1.08.10 Apr. 2 2006
  4. Modified from the driver which is originally written by Donald Becker.
  5. This software may be used and distributed according to the terms
  6. of the GNU General Public License (GPL), incorporated herein by reference.
  7. Drivers based on this skeleton fall under the GPL and must retain
  8. the authorship (implicit copyright) notice.
  9. References:
  10. SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
  11. preliminary Rev. 1.0 Jan. 14, 1998
  12. SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
  13. preliminary Rev. 1.0 Nov. 10, 1998
  14. SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
  15. preliminary Rev. 1.0 Jan. 18, 1998
  16. Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support
  17. Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
  18. Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
  19. Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support
  20. Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
  21. Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
  22. Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
  23. Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
  24. Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
  25. Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
  26. Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
  27. Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
  28. Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
  29. Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
  30. Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
  31. Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
  32. Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
  33. Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
  34. Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
  35. Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E equalizer workaround rule
  36. Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
  37. Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
  38. Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
  39. Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
  40. Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
  41. Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
  42. Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
  43. Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
  44. Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
  45. Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
  46. */
  47. #include <linux/module.h>
  48. #include <linux/moduleparam.h>
  49. #include <linux/kernel.h>
  50. #include <linux/sched.h>
  51. #include <linux/string.h>
  52. #include <linux/timer.h>
  53. #include <linux/errno.h>
  54. #include <linux/ioport.h>
  55. #include <linux/slab.h>
  56. #include <linux/interrupt.h>
  57. #include <linux/pci.h>
  58. #include <linux/netdevice.h>
  59. #include <linux/init.h>
  60. #include <linux/mii.h>
  61. #include <linux/etherdevice.h>
  62. #include <linux/skbuff.h>
  63. #include <linux/delay.h>
  64. #include <linux/ethtool.h>
  65. #include <linux/crc32.h>
  66. #include <linux/bitops.h>
  67. #include <linux/dma-mapping.h>
  68. #include <asm/processor.h> /* Processor type for cache alignment. */
  69. #include <asm/io.h>
  70. #include <asm/irq.h>
  71. #include <asm/uaccess.h> /* User space memory access functions */
  72. #include "sis900.h"
  73. #define SIS900_MODULE_NAME "sis900"
  74. #define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006"
  75. static const char version[] =
  76. KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
  77. static int max_interrupt_work = 40;
  78. static int multicast_filter_limit = 128;
  79. static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
  80. #define SIS900_DEF_MSG \
  81. (NETIF_MSG_DRV | \
  82. NETIF_MSG_LINK | \
  83. NETIF_MSG_RX_ERR | \
  84. NETIF_MSG_TX_ERR)
  85. /* Time in jiffies before concluding the transmitter is hung. */
  86. #define TX_TIMEOUT (4*HZ)
  87. enum {
  88. SIS_900 = 0,
  89. SIS_7016
  90. };
  91. static const char * card_names[] = {
  92. "SiS 900 PCI Fast Ethernet",
  93. "SiS 7016 PCI Fast Ethernet"
  94. };
  95. static DEFINE_PCI_DEVICE_TABLE(sis900_pci_tbl) = {
  96. {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
  97. PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
  98. {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
  99. PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
  100. {0,}
  101. };
  102. MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
  103. static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
  104. static const struct mii_chip_info {
  105. const char * name;
  106. u16 phy_id0;
  107. u16 phy_id1;
  108. u8 phy_types;
  109. #define HOME 0x0001
  110. #define LAN 0x0002
  111. #define MIX 0x0003
  112. #define UNKNOWN 0x0
  113. } mii_chip_table[] = {
  114. { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
  115. { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
  116. { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN },
  117. { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
  118. { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN },
  119. { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
  120. { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
  121. { "ICS LAN PHY", 0x0015, 0xF440, LAN },
  122. { "ICS LAN PHY", 0x0143, 0xBC70, LAN },
  123. { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
  124. { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
  125. { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
  126. { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
  127. {NULL,},
  128. };
  129. struct mii_phy {
  130. struct mii_phy * next;
  131. int phy_addr;
  132. u16 phy_id0;
  133. u16 phy_id1;
  134. u16 status;
  135. u8 phy_types;
  136. };
  137. typedef struct _BufferDesc {
  138. u32 link;
  139. u32 cmdsts;
  140. u32 bufptr;
  141. } BufferDesc;
  142. struct sis900_private {
  143. struct pci_dev * pci_dev;
  144. spinlock_t lock;
  145. struct mii_phy * mii;
  146. struct mii_phy * first_mii; /* record the first mii structure */
  147. unsigned int cur_phy;
  148. struct mii_if_info mii_info;
  149. void __iomem *ioaddr;
  150. struct timer_list timer; /* Link status detection timer. */
  151. u8 autong_complete; /* 1: auto-negotiate complete */
  152. u32 msg_enable;
  153. unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
  154. unsigned int cur_tx, dirty_tx;
  155. /* The saved address of a sent/receive-in-place packet buffer */
  156. struct sk_buff *tx_skbuff[NUM_TX_DESC];
  157. struct sk_buff *rx_skbuff[NUM_RX_DESC];
  158. BufferDesc *tx_ring;
  159. BufferDesc *rx_ring;
  160. dma_addr_t tx_ring_dma;
  161. dma_addr_t rx_ring_dma;
  162. unsigned int tx_full; /* The Tx queue is full. */
  163. u8 host_bridge_rev;
  164. u8 chipset_rev;
  165. };
  166. MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
  167. MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
  168. MODULE_LICENSE("GPL");
  169. module_param(multicast_filter_limit, int, 0444);
  170. module_param(max_interrupt_work, int, 0444);
  171. module_param(sis900_debug, int, 0444);
  172. MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
  173. MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
  174. MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
  175. #define sw32(reg, val) iowrite32(val, ioaddr + (reg))
  176. #define sw8(reg, val) iowrite8(val, ioaddr + (reg))
  177. #define sr32(reg) ioread32(ioaddr + (reg))
  178. #define sr16(reg) ioread16(ioaddr + (reg))
  179. #ifdef CONFIG_NET_POLL_CONTROLLER
  180. static void sis900_poll(struct net_device *dev);
  181. #endif
  182. static int sis900_open(struct net_device *net_dev);
  183. static int sis900_mii_probe (struct net_device * net_dev);
  184. static void sis900_init_rxfilter (struct net_device * net_dev);
  185. static u16 read_eeprom(void __iomem *ioaddr, int location);
  186. static int mdio_read(struct net_device *net_dev, int phy_id, int location);
  187. static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
  188. static void sis900_timer(unsigned long data);
  189. static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
  190. static void sis900_tx_timeout(struct net_device *net_dev);
  191. static void sis900_init_tx_ring(struct net_device *net_dev);
  192. static void sis900_init_rx_ring(struct net_device *net_dev);
  193. static netdev_tx_t sis900_start_xmit(struct sk_buff *skb,
  194. struct net_device *net_dev);
  195. static int sis900_rx(struct net_device *net_dev);
  196. static void sis900_finish_xmit (struct net_device *net_dev);
  197. static irqreturn_t sis900_interrupt(int irq, void *dev_instance);
  198. static int sis900_close(struct net_device *net_dev);
  199. static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
  200. static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
  201. static void set_rx_mode(struct net_device *net_dev);
  202. static void sis900_reset(struct net_device *net_dev);
  203. static void sis630_set_eq(struct net_device *net_dev, u8 revision);
  204. static int sis900_set_config(struct net_device *dev, struct ifmap *map);
  205. static u16 sis900_default_phy(struct net_device * net_dev);
  206. static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
  207. static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
  208. static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
  209. static void sis900_set_mode(struct sis900_private *, int speed, int duplex);
  210. static const struct ethtool_ops sis900_ethtool_ops;
  211. /**
  212. * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
  213. * @pci_dev: the sis900 pci device
  214. * @net_dev: the net device to get address for
  215. *
  216. * Older SiS900 and friends, use EEPROM to store MAC address.
  217. * MAC address is read from read_eeprom() into @net_dev->dev_addr.
  218. */
  219. static int sis900_get_mac_addr(struct pci_dev *pci_dev,
  220. struct net_device *net_dev)
  221. {
  222. struct sis900_private *sis_priv = netdev_priv(net_dev);
  223. void __iomem *ioaddr = sis_priv->ioaddr;
  224. u16 signature;
  225. int i;
  226. /* check to see if we have sane EEPROM */
  227. signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
  228. if (signature == 0xffff || signature == 0x0000) {
  229. printk (KERN_WARNING "%s: Error EERPOM read %x\n",
  230. pci_name(pci_dev), signature);
  231. return 0;
  232. }
  233. /* get MAC address from EEPROM */
  234. for (i = 0; i < 3; i++)
  235. ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
  236. return 1;
  237. }
  238. /**
  239. * sis630e_get_mac_addr - Get MAC address for SiS630E model
  240. * @pci_dev: the sis900 pci device
  241. * @net_dev: the net device to get address for
  242. *
  243. * SiS630E model, use APC CMOS RAM to store MAC address.
  244. * APC CMOS RAM is accessed through ISA bridge.
  245. * MAC address is read into @net_dev->dev_addr.
  246. */
  247. static int sis630e_get_mac_addr(struct pci_dev *pci_dev,
  248. struct net_device *net_dev)
  249. {
  250. struct pci_dev *isa_bridge = NULL;
  251. u8 reg;
  252. int i;
  253. isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
  254. if (!isa_bridge)
  255. isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
  256. if (!isa_bridge) {
  257. printk(KERN_WARNING "%s: Can not find ISA bridge\n",
  258. pci_name(pci_dev));
  259. return 0;
  260. }
  261. pci_read_config_byte(isa_bridge, 0x48, &reg);
  262. pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
  263. for (i = 0; i < 6; i++) {
  264. outb(0x09 + i, 0x70);
  265. ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
  266. }
  267. pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
  268. pci_dev_put(isa_bridge);
  269. return 1;
  270. }
  271. /**
  272. * sis635_get_mac_addr - Get MAC address for SIS635 model
  273. * @pci_dev: the sis900 pci device
  274. * @net_dev: the net device to get address for
  275. *
  276. * SiS635 model, set MAC Reload Bit to load Mac address from APC
  277. * to rfdr. rfdr is accessed through rfcr. MAC address is read into
  278. * @net_dev->dev_addr.
  279. */
  280. static int sis635_get_mac_addr(struct pci_dev *pci_dev,
  281. struct net_device *net_dev)
  282. {
  283. struct sis900_private *sis_priv = netdev_priv(net_dev);
  284. void __iomem *ioaddr = sis_priv->ioaddr;
  285. u32 rfcrSave;
  286. u32 i;
  287. rfcrSave = sr32(rfcr);
  288. sw32(cr, rfcrSave | RELOAD);
  289. sw32(cr, 0);
  290. /* disable packet filtering before setting filter */
  291. sw32(rfcr, rfcrSave & ~RFEN);
  292. /* load MAC addr to filter data register */
  293. for (i = 0 ; i < 3 ; i++) {
  294. sw32(rfcr, (i << RFADDR_shift));
  295. *( ((u16 *)net_dev->dev_addr) + i) = sr16(rfdr);
  296. }
  297. /* enable packet filtering */
  298. sw32(rfcr, rfcrSave | RFEN);
  299. return 1;
  300. }
  301. /**
  302. * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
  303. * @pci_dev: the sis900 pci device
  304. * @net_dev: the net device to get address for
  305. *
  306. * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
  307. * is shared by
  308. * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
  309. * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
  310. * by LAN, otherwise is not. After MAC address is read from EEPROM, send
  311. * EEDONE signal to refuse EEPROM access by LAN.
  312. * The EEPROM map of SiS962 or SiS963 is different to SiS900.
  313. * The signature field in SiS962 or SiS963 spec is meaningless.
  314. * MAC address is read into @net_dev->dev_addr.
  315. */
  316. static int sis96x_get_mac_addr(struct pci_dev *pci_dev,
  317. struct net_device *net_dev)
  318. {
  319. struct sis900_private *sis_priv = netdev_priv(net_dev);
  320. void __iomem *ioaddr = sis_priv->ioaddr;
  321. int wait, rc = 0;
  322. sw32(mear, EEREQ);
  323. for (wait = 0; wait < 2000; wait++) {
  324. if (sr32(mear) & EEGNT) {
  325. u16 *mac = (u16 *)net_dev->dev_addr;
  326. int i;
  327. /* get MAC address from EEPROM */
  328. for (i = 0; i < 3; i++)
  329. mac[i] = read_eeprom(ioaddr, i + EEPROMMACAddr);
  330. rc = 1;
  331. break;
  332. }
  333. udelay(1);
  334. }
  335. sw32(mear, EEDONE);
  336. return rc;
  337. }
  338. static const struct net_device_ops sis900_netdev_ops = {
  339. .ndo_open = sis900_open,
  340. .ndo_stop = sis900_close,
  341. .ndo_start_xmit = sis900_start_xmit,
  342. .ndo_set_config = sis900_set_config,
  343. .ndo_set_rx_mode = set_rx_mode,
  344. .ndo_change_mtu = eth_change_mtu,
  345. .ndo_validate_addr = eth_validate_addr,
  346. .ndo_set_mac_address = eth_mac_addr,
  347. .ndo_do_ioctl = mii_ioctl,
  348. .ndo_tx_timeout = sis900_tx_timeout,
  349. #ifdef CONFIG_NET_POLL_CONTROLLER
  350. .ndo_poll_controller = sis900_poll,
  351. #endif
  352. };
  353. /**
  354. * sis900_probe - Probe for sis900 device
  355. * @pci_dev: the sis900 pci device
  356. * @pci_id: the pci device ID
  357. *
  358. * Check and probe sis900 net device for @pci_dev.
  359. * Get mac address according to the chip revision,
  360. * and assign SiS900-specific entries in the device structure.
  361. * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
  362. */
  363. static int sis900_probe(struct pci_dev *pci_dev,
  364. const struct pci_device_id *pci_id)
  365. {
  366. struct sis900_private *sis_priv;
  367. struct net_device *net_dev;
  368. struct pci_dev *dev;
  369. dma_addr_t ring_dma;
  370. void *ring_space;
  371. void __iomem *ioaddr;
  372. int i, ret;
  373. const char *card_name = card_names[pci_id->driver_data];
  374. const char *dev_name = pci_name(pci_dev);
  375. /* when built into the kernel, we only print version if device is found */
  376. #ifndef MODULE
  377. static int printed_version;
  378. if (!printed_version++)
  379. printk(version);
  380. #endif
  381. /* setup various bits in PCI command register */
  382. ret = pci_enable_device(pci_dev);
  383. if(ret) return ret;
  384. i = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
  385. if(i){
  386. printk(KERN_ERR "sis900.c: architecture does not support "
  387. "32bit PCI busmaster DMA\n");
  388. return i;
  389. }
  390. pci_set_master(pci_dev);
  391. net_dev = alloc_etherdev(sizeof(struct sis900_private));
  392. if (!net_dev)
  393. return -ENOMEM;
  394. SET_NETDEV_DEV(net_dev, &pci_dev->dev);
  395. /* We do a request_region() to register /proc/ioports info. */
  396. ret = pci_request_regions(pci_dev, "sis900");
  397. if (ret)
  398. goto err_out;
  399. /* IO region. */
  400. ioaddr = pci_iomap(pci_dev, 0, 0);
  401. if (!ioaddr) {
  402. ret = -ENOMEM;
  403. goto err_out_cleardev;
  404. }
  405. sis_priv = netdev_priv(net_dev);
  406. sis_priv->ioaddr = ioaddr;
  407. sis_priv->pci_dev = pci_dev;
  408. spin_lock_init(&sis_priv->lock);
  409. pci_set_drvdata(pci_dev, net_dev);
  410. ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
  411. if (!ring_space) {
  412. ret = -ENOMEM;
  413. goto err_out_unmap;
  414. }
  415. sis_priv->tx_ring = ring_space;
  416. sis_priv->tx_ring_dma = ring_dma;
  417. ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
  418. if (!ring_space) {
  419. ret = -ENOMEM;
  420. goto err_unmap_tx;
  421. }
  422. sis_priv->rx_ring = ring_space;
  423. sis_priv->rx_ring_dma = ring_dma;
  424. /* The SiS900-specific entries in the device structure. */
  425. net_dev->netdev_ops = &sis900_netdev_ops;
  426. net_dev->watchdog_timeo = TX_TIMEOUT;
  427. net_dev->ethtool_ops = &sis900_ethtool_ops;
  428. if (sis900_debug > 0)
  429. sis_priv->msg_enable = sis900_debug;
  430. else
  431. sis_priv->msg_enable = SIS900_DEF_MSG;
  432. sis_priv->mii_info.dev = net_dev;
  433. sis_priv->mii_info.mdio_read = mdio_read;
  434. sis_priv->mii_info.mdio_write = mdio_write;
  435. sis_priv->mii_info.phy_id_mask = 0x1f;
  436. sis_priv->mii_info.reg_num_mask = 0x1f;
  437. /* Get Mac address according to the chip revision */
  438. sis_priv->chipset_rev = pci_dev->revision;
  439. if(netif_msg_probe(sis_priv))
  440. printk(KERN_DEBUG "%s: detected revision %2.2x, "
  441. "trying to get MAC address...\n",
  442. dev_name, sis_priv->chipset_rev);
  443. ret = 0;
  444. if (sis_priv->chipset_rev == SIS630E_900_REV)
  445. ret = sis630e_get_mac_addr(pci_dev, net_dev);
  446. else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
  447. ret = sis635_get_mac_addr(pci_dev, net_dev);
  448. else if (sis_priv->chipset_rev == SIS96x_900_REV)
  449. ret = sis96x_get_mac_addr(pci_dev, net_dev);
  450. else
  451. ret = sis900_get_mac_addr(pci_dev, net_dev);
  452. if (!ret || !is_valid_ether_addr(net_dev->dev_addr)) {
  453. eth_hw_addr_random(net_dev);
  454. printk(KERN_WARNING "%s: Unreadable or invalid MAC address,"
  455. "using random generated one\n", dev_name);
  456. }
  457. /* 630ET : set the mii access mode as software-mode */
  458. if (sis_priv->chipset_rev == SIS630ET_900_REV)
  459. sw32(cr, ACCESSMODE | sr32(cr));
  460. /* probe for mii transceiver */
  461. if (sis900_mii_probe(net_dev) == 0) {
  462. printk(KERN_WARNING "%s: Error probing MII device.\n",
  463. dev_name);
  464. ret = -ENODEV;
  465. goto err_unmap_rx;
  466. }
  467. /* save our host bridge revision */
  468. dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
  469. if (dev) {
  470. sis_priv->host_bridge_rev = dev->revision;
  471. pci_dev_put(dev);
  472. }
  473. ret = register_netdev(net_dev);
  474. if (ret)
  475. goto err_unmap_rx;
  476. /* print some information about our NIC */
  477. printk(KERN_INFO "%s: %s at 0x%p, IRQ %d, %pM\n",
  478. net_dev->name, card_name, ioaddr, pci_dev->irq,
  479. net_dev->dev_addr);
  480. /* Detect Wake on Lan support */
  481. ret = (sr32(CFGPMC) & PMESP) >> 27;
  482. if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
  483. printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
  484. return 0;
  485. err_unmap_rx:
  486. pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
  487. sis_priv->rx_ring_dma);
  488. err_unmap_tx:
  489. pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
  490. sis_priv->tx_ring_dma);
  491. err_out_unmap:
  492. pci_iounmap(pci_dev, ioaddr);
  493. err_out_cleardev:
  494. pci_set_drvdata(pci_dev, NULL);
  495. pci_release_regions(pci_dev);
  496. err_out:
  497. free_netdev(net_dev);
  498. return ret;
  499. }
  500. /**
  501. * sis900_mii_probe - Probe MII PHY for sis900
  502. * @net_dev: the net device to probe for
  503. *
  504. * Search for total of 32 possible mii phy addresses.
  505. * Identify and set current phy if found one,
  506. * return error if it failed to found.
  507. */
  508. static int sis900_mii_probe(struct net_device *net_dev)
  509. {
  510. struct sis900_private *sis_priv = netdev_priv(net_dev);
  511. const char *dev_name = pci_name(sis_priv->pci_dev);
  512. u16 poll_bit = MII_STAT_LINK, status = 0;
  513. unsigned long timeout = jiffies + 5 * HZ;
  514. int phy_addr;
  515. sis_priv->mii = NULL;
  516. /* search for total of 32 possible mii phy addresses */
  517. for (phy_addr = 0; phy_addr < 32; phy_addr++) {
  518. struct mii_phy * mii_phy = NULL;
  519. u16 mii_status;
  520. int i;
  521. mii_phy = NULL;
  522. for(i = 0; i < 2; i++)
  523. mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
  524. if (mii_status == 0xffff || mii_status == 0x0000) {
  525. if (netif_msg_probe(sis_priv))
  526. printk(KERN_DEBUG "%s: MII at address %d"
  527. " not accessible\n",
  528. dev_name, phy_addr);
  529. continue;
  530. }
  531. if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
  532. mii_phy = sis_priv->first_mii;
  533. while (mii_phy) {
  534. struct mii_phy *phy;
  535. phy = mii_phy;
  536. mii_phy = mii_phy->next;
  537. kfree(phy);
  538. }
  539. return 0;
  540. }
  541. mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
  542. mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
  543. mii_phy->phy_addr = phy_addr;
  544. mii_phy->status = mii_status;
  545. mii_phy->next = sis_priv->mii;
  546. sis_priv->mii = mii_phy;
  547. sis_priv->first_mii = mii_phy;
  548. for (i = 0; mii_chip_table[i].phy_id1; i++)
  549. if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
  550. ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
  551. mii_phy->phy_types = mii_chip_table[i].phy_types;
  552. if (mii_chip_table[i].phy_types == MIX)
  553. mii_phy->phy_types =
  554. (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
  555. printk(KERN_INFO "%s: %s transceiver found "
  556. "at address %d.\n",
  557. dev_name,
  558. mii_chip_table[i].name,
  559. phy_addr);
  560. break;
  561. }
  562. if( !mii_chip_table[i].phy_id1 ) {
  563. printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
  564. dev_name, phy_addr);
  565. mii_phy->phy_types = UNKNOWN;
  566. }
  567. }
  568. if (sis_priv->mii == NULL) {
  569. printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
  570. return 0;
  571. }
  572. /* select default PHY for mac */
  573. sis_priv->mii = NULL;
  574. sis900_default_phy( net_dev );
  575. /* Reset phy if default phy is internal sis900 */
  576. if ((sis_priv->mii->phy_id0 == 0x001D) &&
  577. ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
  578. status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
  579. /* workaround for ICS1893 PHY */
  580. if ((sis_priv->mii->phy_id0 == 0x0015) &&
  581. ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
  582. mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
  583. if(status & MII_STAT_LINK){
  584. while (poll_bit) {
  585. yield();
  586. poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
  587. if (time_after_eq(jiffies, timeout)) {
  588. printk(KERN_WARNING "%s: reset phy and link down now\n",
  589. dev_name);
  590. return -ETIME;
  591. }
  592. }
  593. }
  594. if (sis_priv->chipset_rev == SIS630E_900_REV) {
  595. /* SiS 630E has some bugs on default value of PHY registers */
  596. mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
  597. mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
  598. mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
  599. mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
  600. //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
  601. }
  602. if (sis_priv->mii->status & MII_STAT_LINK)
  603. netif_carrier_on(net_dev);
  604. else
  605. netif_carrier_off(net_dev);
  606. return 1;
  607. }
  608. /**
  609. * sis900_default_phy - Select default PHY for sis900 mac.
  610. * @net_dev: the net device to probe for
  611. *
  612. * Select first detected PHY with link as default.
  613. * If no one is link on, select PHY whose types is HOME as default.
  614. * If HOME doesn't exist, select LAN.
  615. */
  616. static u16 sis900_default_phy(struct net_device * net_dev)
  617. {
  618. struct sis900_private *sis_priv = netdev_priv(net_dev);
  619. struct mii_phy *phy = NULL, *phy_home = NULL,
  620. *default_phy = NULL, *phy_lan = NULL;
  621. u16 status;
  622. for (phy=sis_priv->first_mii; phy; phy=phy->next) {
  623. status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
  624. status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
  625. /* Link ON & Not select default PHY & not ghost PHY */
  626. if ((status & MII_STAT_LINK) && !default_phy &&
  627. (phy->phy_types != UNKNOWN))
  628. default_phy = phy;
  629. else {
  630. status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
  631. mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
  632. status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
  633. if (phy->phy_types == HOME)
  634. phy_home = phy;
  635. else if(phy->phy_types == LAN)
  636. phy_lan = phy;
  637. }
  638. }
  639. if (!default_phy && phy_home)
  640. default_phy = phy_home;
  641. else if (!default_phy && phy_lan)
  642. default_phy = phy_lan;
  643. else if (!default_phy)
  644. default_phy = sis_priv->first_mii;
  645. if (sis_priv->mii != default_phy) {
  646. sis_priv->mii = default_phy;
  647. sis_priv->cur_phy = default_phy->phy_addr;
  648. printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
  649. pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
  650. }
  651. sis_priv->mii_info.phy_id = sis_priv->cur_phy;
  652. status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
  653. status &= (~MII_CNTL_ISOLATE);
  654. mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
  655. status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
  656. status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
  657. return status;
  658. }
  659. /**
  660. * sis900_set_capability - set the media capability of network adapter.
  661. * @net_dev : the net device to probe for
  662. * @phy : default PHY
  663. *
  664. * Set the media capability of network adapter according to
  665. * mii status register. It's necessary before auto-negotiate.
  666. */
  667. static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
  668. {
  669. u16 cap;
  670. u16 status;
  671. status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
  672. status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
  673. cap = MII_NWAY_CSMA_CD |
  674. ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
  675. ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
  676. ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
  677. ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
  678. mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
  679. }
  680. /* Delay between EEPROM clock transitions. */
  681. #define eeprom_delay() sr32(mear)
  682. /**
  683. * read_eeprom - Read Serial EEPROM
  684. * @ioaddr: base i/o address
  685. * @location: the EEPROM location to read
  686. *
  687. * Read Serial EEPROM through EEPROM Access Register.
  688. * Note that location is in word (16 bits) unit
  689. */
  690. static u16 read_eeprom(void __iomem *ioaddr, int location)
  691. {
  692. u32 read_cmd = location | EEread;
  693. int i;
  694. u16 retval = 0;
  695. sw32(mear, 0);
  696. eeprom_delay();
  697. sw32(mear, EECS);
  698. eeprom_delay();
  699. /* Shift the read command (9) bits out. */
  700. for (i = 8; i >= 0; i--) {
  701. u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
  702. sw32(mear, dataval);
  703. eeprom_delay();
  704. sw32(mear, dataval | EECLK);
  705. eeprom_delay();
  706. }
  707. sw32(mear, EECS);
  708. eeprom_delay();
  709. /* read the 16-bits data in */
  710. for (i = 16; i > 0; i--) {
  711. sw32(mear, EECS);
  712. eeprom_delay();
  713. sw32(mear, EECS | EECLK);
  714. eeprom_delay();
  715. retval = (retval << 1) | ((sr32(mear) & EEDO) ? 1 : 0);
  716. eeprom_delay();
  717. }
  718. /* Terminate the EEPROM access. */
  719. sw32(mear, 0);
  720. eeprom_delay();
  721. return retval;
  722. }
  723. /* Read and write the MII management registers using software-generated
  724. serial MDIO protocol. Note that the command bits and data bits are
  725. send out separately */
  726. #define mdio_delay() sr32(mear)
  727. static void mdio_idle(struct sis900_private *sp)
  728. {
  729. void __iomem *ioaddr = sp->ioaddr;
  730. sw32(mear, MDIO | MDDIR);
  731. mdio_delay();
  732. sw32(mear, MDIO | MDDIR | MDC);
  733. }
  734. /* Synchronize the MII management interface by shifting 32 one bits out. */
  735. static void mdio_reset(struct sis900_private *sp)
  736. {
  737. void __iomem *ioaddr = sp->ioaddr;
  738. int i;
  739. for (i = 31; i >= 0; i--) {
  740. sw32(mear, MDDIR | MDIO);
  741. mdio_delay();
  742. sw32(mear, MDDIR | MDIO | MDC);
  743. mdio_delay();
  744. }
  745. }
  746. /**
  747. * mdio_read - read MII PHY register
  748. * @net_dev: the net device to read
  749. * @phy_id: the phy address to read
  750. * @location: the phy regiester id to read
  751. *
  752. * Read MII registers through MDIO and MDC
  753. * using MDIO management frame structure and protocol(defined by ISO/IEC).
  754. * Please see SiS7014 or ICS spec
  755. */
  756. static int mdio_read(struct net_device *net_dev, int phy_id, int location)
  757. {
  758. int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
  759. struct sis900_private *sp = netdev_priv(net_dev);
  760. void __iomem *ioaddr = sp->ioaddr;
  761. u16 retval = 0;
  762. int i;
  763. mdio_reset(sp);
  764. mdio_idle(sp);
  765. for (i = 15; i >= 0; i--) {
  766. int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
  767. sw32(mear, dataval);
  768. mdio_delay();
  769. sw32(mear, dataval | MDC);
  770. mdio_delay();
  771. }
  772. /* Read the 16 data bits. */
  773. for (i = 16; i > 0; i--) {
  774. sw32(mear, 0);
  775. mdio_delay();
  776. retval = (retval << 1) | ((sr32(mear) & MDIO) ? 1 : 0);
  777. sw32(mear, MDC);
  778. mdio_delay();
  779. }
  780. sw32(mear, 0x00);
  781. return retval;
  782. }
  783. /**
  784. * mdio_write - write MII PHY register
  785. * @net_dev: the net device to write
  786. * @phy_id: the phy address to write
  787. * @location: the phy regiester id to write
  788. * @value: the register value to write with
  789. *
  790. * Write MII registers with @value through MDIO and MDC
  791. * using MDIO management frame structure and protocol(defined by ISO/IEC)
  792. * please see SiS7014 or ICS spec
  793. */
  794. static void mdio_write(struct net_device *net_dev, int phy_id, int location,
  795. int value)
  796. {
  797. int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
  798. struct sis900_private *sp = netdev_priv(net_dev);
  799. void __iomem *ioaddr = sp->ioaddr;
  800. int i;
  801. mdio_reset(sp);
  802. mdio_idle(sp);
  803. /* Shift the command bits out. */
  804. for (i = 15; i >= 0; i--) {
  805. int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
  806. sw8(mear, dataval);
  807. mdio_delay();
  808. sw8(mear, dataval | MDC);
  809. mdio_delay();
  810. }
  811. mdio_delay();
  812. /* Shift the value bits out. */
  813. for (i = 15; i >= 0; i--) {
  814. int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
  815. sw32(mear, dataval);
  816. mdio_delay();
  817. sw32(mear, dataval | MDC);
  818. mdio_delay();
  819. }
  820. mdio_delay();
  821. /* Clear out extra bits. */
  822. for (i = 2; i > 0; i--) {
  823. sw8(mear, 0);
  824. mdio_delay();
  825. sw8(mear, MDC);
  826. mdio_delay();
  827. }
  828. sw32(mear, 0x00);
  829. }
  830. /**
  831. * sis900_reset_phy - reset sis900 mii phy.
  832. * @net_dev: the net device to write
  833. * @phy_addr: default phy address
  834. *
  835. * Some specific phy can't work properly without reset.
  836. * This function will be called during initialization and
  837. * link status change from ON to DOWN.
  838. */
  839. static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
  840. {
  841. int i;
  842. u16 status;
  843. for (i = 0; i < 2; i++)
  844. status = mdio_read(net_dev, phy_addr, MII_STATUS);
  845. mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
  846. return status;
  847. }
  848. #ifdef CONFIG_NET_POLL_CONTROLLER
  849. /*
  850. * Polling 'interrupt' - used by things like netconsole to send skbs
  851. * without having to re-enable interrupts. It's not called while
  852. * the interrupt routine is executing.
  853. */
  854. static void sis900_poll(struct net_device *dev)
  855. {
  856. struct sis900_private *sp = netdev_priv(dev);
  857. const int irq = sp->pci_dev->irq;
  858. disable_irq(irq);
  859. sis900_interrupt(irq, dev);
  860. enable_irq(irq);
  861. }
  862. #endif
  863. /**
  864. * sis900_open - open sis900 device
  865. * @net_dev: the net device to open
  866. *
  867. * Do some initialization and start net interface.
  868. * enable interrupts and set sis900 timer.
  869. */
  870. static int
  871. sis900_open(struct net_device *net_dev)
  872. {
  873. struct sis900_private *sis_priv = netdev_priv(net_dev);
  874. void __iomem *ioaddr = sis_priv->ioaddr;
  875. int ret;
  876. /* Soft reset the chip. */
  877. sis900_reset(net_dev);
  878. /* Equalizer workaround Rule */
  879. sis630_set_eq(net_dev, sis_priv->chipset_rev);
  880. ret = request_irq(sis_priv->pci_dev->irq, sis900_interrupt, IRQF_SHARED,
  881. net_dev->name, net_dev);
  882. if (ret)
  883. return ret;
  884. sis900_init_rxfilter(net_dev);
  885. sis900_init_tx_ring(net_dev);
  886. sis900_init_rx_ring(net_dev);
  887. set_rx_mode(net_dev);
  888. netif_start_queue(net_dev);
  889. /* Workaround for EDB */
  890. sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
  891. /* Enable all known interrupts by setting the interrupt mask. */
  892. sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);
  893. sw32(cr, RxENA | sr32(cr));
  894. sw32(ier, IE);
  895. sis900_check_mode(net_dev, sis_priv->mii);
  896. /* Set the timer to switch to check for link beat and perhaps switch
  897. to an alternate media type. */
  898. init_timer(&sis_priv->timer);
  899. sis_priv->timer.expires = jiffies + HZ;
  900. sis_priv->timer.data = (unsigned long)net_dev;
  901. sis_priv->timer.function = sis900_timer;
  902. add_timer(&sis_priv->timer);
  903. return 0;
  904. }
  905. /**
  906. * sis900_init_rxfilter - Initialize the Rx filter
  907. * @net_dev: the net device to initialize for
  908. *
  909. * Set receive filter address to our MAC address
  910. * and enable packet filtering.
  911. */
  912. static void
  913. sis900_init_rxfilter (struct net_device * net_dev)
  914. {
  915. struct sis900_private *sis_priv = netdev_priv(net_dev);
  916. void __iomem *ioaddr = sis_priv->ioaddr;
  917. u32 rfcrSave;
  918. u32 i;
  919. rfcrSave = sr32(rfcr);
  920. /* disable packet filtering before setting filter */
  921. sw32(rfcr, rfcrSave & ~RFEN);
  922. /* load MAC addr to filter data register */
  923. for (i = 0 ; i < 3 ; i++) {
  924. u32 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
  925. sw32(rfcr, i << RFADDR_shift);
  926. sw32(rfdr, w);
  927. if (netif_msg_hw(sis_priv)) {
  928. printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
  929. net_dev->name, i, sr32(rfdr));
  930. }
  931. }
  932. /* enable packet filtering */
  933. sw32(rfcr, rfcrSave | RFEN);
  934. }
  935. /**
  936. * sis900_init_tx_ring - Initialize the Tx descriptor ring
  937. * @net_dev: the net device to initialize for
  938. *
  939. * Initialize the Tx descriptor ring,
  940. */
  941. static void
  942. sis900_init_tx_ring(struct net_device *net_dev)
  943. {
  944. struct sis900_private *sis_priv = netdev_priv(net_dev);
  945. void __iomem *ioaddr = sis_priv->ioaddr;
  946. int i;
  947. sis_priv->tx_full = 0;
  948. sis_priv->dirty_tx = sis_priv->cur_tx = 0;
  949. for (i = 0; i < NUM_TX_DESC; i++) {
  950. sis_priv->tx_skbuff[i] = NULL;
  951. sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
  952. ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
  953. sis_priv->tx_ring[i].cmdsts = 0;
  954. sis_priv->tx_ring[i].bufptr = 0;
  955. }
  956. /* load Transmit Descriptor Register */
  957. sw32(txdp, sis_priv->tx_ring_dma);
  958. if (netif_msg_hw(sis_priv))
  959. printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
  960. net_dev->name, sr32(txdp));
  961. }
  962. /**
  963. * sis900_init_rx_ring - Initialize the Rx descriptor ring
  964. * @net_dev: the net device to initialize for
  965. *
  966. * Initialize the Rx descriptor ring,
  967. * and pre-allocate recevie buffers (socket buffer)
  968. */
  969. static void
  970. sis900_init_rx_ring(struct net_device *net_dev)
  971. {
  972. struct sis900_private *sis_priv = netdev_priv(net_dev);
  973. void __iomem *ioaddr = sis_priv->ioaddr;
  974. int i;
  975. sis_priv->cur_rx = 0;
  976. sis_priv->dirty_rx = 0;
  977. /* init RX descriptor */
  978. for (i = 0; i < NUM_RX_DESC; i++) {
  979. sis_priv->rx_skbuff[i] = NULL;
  980. sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
  981. ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
  982. sis_priv->rx_ring[i].cmdsts = 0;
  983. sis_priv->rx_ring[i].bufptr = 0;
  984. }
  985. /* allocate sock buffers */
  986. for (i = 0; i < NUM_RX_DESC; i++) {
  987. struct sk_buff *skb;
  988. if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) {
  989. /* not enough memory for skbuff, this makes a "hole"
  990. on the buffer ring, it is not clear how the
  991. hardware will react to this kind of degenerated
  992. buffer */
  993. break;
  994. }
  995. sis_priv->rx_skbuff[i] = skb;
  996. sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
  997. sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
  998. skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  999. }
  1000. sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
  1001. /* load Receive Descriptor Register */
  1002. sw32(rxdp, sis_priv->rx_ring_dma);
  1003. if (netif_msg_hw(sis_priv))
  1004. printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
  1005. net_dev->name, sr32(rxdp));
  1006. }
  1007. /**
  1008. * sis630_set_eq - set phy equalizer value for 630 LAN
  1009. * @net_dev: the net device to set equalizer value
  1010. * @revision: 630 LAN revision number
  1011. *
  1012. * 630E equalizer workaround rule(Cyrus Huang 08/15)
  1013. * PHY register 14h(Test)
  1014. * Bit 14: 0 -- Automatically detect (default)
  1015. * 1 -- Manually set Equalizer filter
  1016. * Bit 13: 0 -- (Default)
  1017. * 1 -- Speed up convergence of equalizer setting
  1018. * Bit 9 : 0 -- (Default)
  1019. * 1 -- Disable Baseline Wander
  1020. * Bit 3~7 -- Equalizer filter setting
  1021. * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
  1022. * Then calculate equalizer value
  1023. * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
  1024. * Link Off:Set Bit 13 to 1, Bit 14 to 0
  1025. * Calculate Equalizer value:
  1026. * When Link is ON and Bit 14 is 0, SIS900PHY will auto-detect proper equalizer value.
  1027. * When the equalizer is stable, this value is not a fixed value. It will be within
  1028. * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
  1029. * 0 <= max <= 4 --> set equalizer to max
  1030. * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
  1031. * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
  1032. */
  1033. static void sis630_set_eq(struct net_device *net_dev, u8 revision)
  1034. {
  1035. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1036. u16 reg14h, eq_value=0, max_value=0, min_value=0;
  1037. int i, maxcount=10;
  1038. if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
  1039. revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
  1040. return;
  1041. if (netif_carrier_ok(net_dev)) {
  1042. reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
  1043. mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
  1044. (0x2200 | reg14h) & 0xBFFF);
  1045. for (i=0; i < maxcount; i++) {
  1046. eq_value = (0x00F8 & mdio_read(net_dev,
  1047. sis_priv->cur_phy, MII_RESV)) >> 3;
  1048. if (i == 0)
  1049. max_value=min_value=eq_value;
  1050. max_value = (eq_value > max_value) ?
  1051. eq_value : max_value;
  1052. min_value = (eq_value < min_value) ?
  1053. eq_value : min_value;
  1054. }
  1055. /* 630E rule to determine the equalizer value */
  1056. if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
  1057. revision == SIS630ET_900_REV) {
  1058. if (max_value < 5)
  1059. eq_value = max_value;
  1060. else if (max_value >= 5 && max_value < 15)
  1061. eq_value = (max_value == min_value) ?
  1062. max_value+2 : max_value+1;
  1063. else if (max_value >= 15)
  1064. eq_value=(max_value == min_value) ?
  1065. max_value+6 : max_value+5;
  1066. }
  1067. /* 630B0&B1 rule to determine the equalizer value */
  1068. if (revision == SIS630A_900_REV &&
  1069. (sis_priv->host_bridge_rev == SIS630B0 ||
  1070. sis_priv->host_bridge_rev == SIS630B1)) {
  1071. if (max_value == 0)
  1072. eq_value = 3;
  1073. else
  1074. eq_value = (max_value + min_value + 1)/2;
  1075. }
  1076. /* write equalizer value and setting */
  1077. reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
  1078. reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
  1079. reg14h = (reg14h | 0x6000) & 0xFDFF;
  1080. mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
  1081. } else {
  1082. reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
  1083. if (revision == SIS630A_900_REV &&
  1084. (sis_priv->host_bridge_rev == SIS630B0 ||
  1085. sis_priv->host_bridge_rev == SIS630B1))
  1086. mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
  1087. (reg14h | 0x2200) & 0xBFFF);
  1088. else
  1089. mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
  1090. (reg14h | 0x2000) & 0xBFFF);
  1091. }
  1092. }
  1093. /**
  1094. * sis900_timer - sis900 timer routine
  1095. * @data: pointer to sis900 net device
  1096. *
  1097. * On each timer ticks we check two things,
  1098. * link status (ON/OFF) and link mode (10/100/Full/Half)
  1099. */
  1100. static void sis900_timer(unsigned long data)
  1101. {
  1102. struct net_device *net_dev = (struct net_device *)data;
  1103. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1104. struct mii_phy *mii_phy = sis_priv->mii;
  1105. static const int next_tick = 5*HZ;
  1106. u16 status;
  1107. if (!sis_priv->autong_complete){
  1108. int uninitialized_var(speed), duplex = 0;
  1109. sis900_read_mode(net_dev, &speed, &duplex);
  1110. if (duplex){
  1111. sis900_set_mode(sis_priv, speed, duplex);
  1112. sis630_set_eq(net_dev, sis_priv->chipset_rev);
  1113. netif_start_queue(net_dev);
  1114. }
  1115. sis_priv->timer.expires = jiffies + HZ;
  1116. add_timer(&sis_priv->timer);
  1117. return;
  1118. }
  1119. status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
  1120. status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
  1121. /* Link OFF -> ON */
  1122. if (!netif_carrier_ok(net_dev)) {
  1123. LookForLink:
  1124. /* Search for new PHY */
  1125. status = sis900_default_phy(net_dev);
  1126. mii_phy = sis_priv->mii;
  1127. if (status & MII_STAT_LINK){
  1128. sis900_check_mode(net_dev, mii_phy);
  1129. netif_carrier_on(net_dev);
  1130. }
  1131. } else {
  1132. /* Link ON -> OFF */
  1133. if (!(status & MII_STAT_LINK)){
  1134. netif_carrier_off(net_dev);
  1135. if(netif_msg_link(sis_priv))
  1136. printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
  1137. /* Change mode issue */
  1138. if ((mii_phy->phy_id0 == 0x001D) &&
  1139. ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
  1140. sis900_reset_phy(net_dev, sis_priv->cur_phy);
  1141. sis630_set_eq(net_dev, sis_priv->chipset_rev);
  1142. goto LookForLink;
  1143. }
  1144. }
  1145. sis_priv->timer.expires = jiffies + next_tick;
  1146. add_timer(&sis_priv->timer);
  1147. }
  1148. /**
  1149. * sis900_check_mode - check the media mode for sis900
  1150. * @net_dev: the net device to be checked
  1151. * @mii_phy: the mii phy
  1152. *
  1153. * Older driver gets the media mode from mii status output
  1154. * register. Now we set our media capability and auto-negotiate
  1155. * to get the upper bound of speed and duplex between two ends.
  1156. * If the types of mii phy is HOME, it doesn't need to auto-negotiate
  1157. * and autong_complete should be set to 1.
  1158. */
  1159. static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
  1160. {
  1161. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1162. void __iomem *ioaddr = sis_priv->ioaddr;
  1163. int speed, duplex;
  1164. if (mii_phy->phy_types == LAN) {
  1165. sw32(cfg, ~EXD & sr32(cfg));
  1166. sis900_set_capability(net_dev , mii_phy);
  1167. sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
  1168. } else {
  1169. sw32(cfg, EXD | sr32(cfg));
  1170. speed = HW_SPEED_HOME;
  1171. duplex = FDX_CAPABLE_HALF_SELECTED;
  1172. sis900_set_mode(sis_priv, speed, duplex);
  1173. sis_priv->autong_complete = 1;
  1174. }
  1175. }
  1176. /**
  1177. * sis900_set_mode - Set the media mode of mac register.
  1178. * @sp: the device private data
  1179. * @speed : the transmit speed to be determined
  1180. * @duplex: the duplex mode to be determined
  1181. *
  1182. * Set the media mode of mac register txcfg/rxcfg according to
  1183. * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
  1184. * bus is used instead of PCI bus. When this bit is set 1, the
  1185. * Max DMA Burst Size for TX/RX DMA should be no larger than 16
  1186. * double words.
  1187. */
  1188. static void sis900_set_mode(struct sis900_private *sp, int speed, int duplex)
  1189. {
  1190. void __iomem *ioaddr = sp->ioaddr;
  1191. u32 tx_flags = 0, rx_flags = 0;
  1192. if (sr32( cfg) & EDB_MASTER_EN) {
  1193. tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
  1194. (TX_FILL_THRESH << TxFILLT_shift);
  1195. rx_flags = DMA_BURST_64 << RxMXDMA_shift;
  1196. } else {
  1197. tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
  1198. (TX_FILL_THRESH << TxFILLT_shift);
  1199. rx_flags = DMA_BURST_512 << RxMXDMA_shift;
  1200. }
  1201. if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
  1202. rx_flags |= (RxDRNT_10 << RxDRNT_shift);
  1203. tx_flags |= (TxDRNT_10 << TxDRNT_shift);
  1204. } else {
  1205. rx_flags |= (RxDRNT_100 << RxDRNT_shift);
  1206. tx_flags |= (TxDRNT_100 << TxDRNT_shift);
  1207. }
  1208. if (duplex == FDX_CAPABLE_FULL_SELECTED) {
  1209. tx_flags |= (TxCSI | TxHBI);
  1210. rx_flags |= RxATX;
  1211. }
  1212. #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
  1213. /* Can accept Jumbo packet */
  1214. rx_flags |= RxAJAB;
  1215. #endif
  1216. sw32(txcfg, tx_flags);
  1217. sw32(rxcfg, rx_flags);
  1218. }
  1219. /**
  1220. * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
  1221. * @net_dev: the net device to read mode for
  1222. * @phy_addr: mii phy address
  1223. *
  1224. * If the adapter is link-on, set the auto-negotiate enable/reset bit.
  1225. * autong_complete should be set to 0 when starting auto-negotiation.
  1226. * autong_complete should be set to 1 if we didn't start auto-negotiation.
  1227. * sis900_timer will wait for link on again if autong_complete = 0.
  1228. */
  1229. static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
  1230. {
  1231. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1232. int i = 0;
  1233. u32 status;
  1234. for (i = 0; i < 2; i++)
  1235. status = mdio_read(net_dev, phy_addr, MII_STATUS);
  1236. if (!(status & MII_STAT_LINK)){
  1237. if(netif_msg_link(sis_priv))
  1238. printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
  1239. sis_priv->autong_complete = 1;
  1240. netif_carrier_off(net_dev);
  1241. return;
  1242. }
  1243. /* (Re)start AutoNegotiate */
  1244. mdio_write(net_dev, phy_addr, MII_CONTROL,
  1245. MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
  1246. sis_priv->autong_complete = 0;
  1247. }
  1248. /**
  1249. * sis900_read_mode - read media mode for sis900 internal phy
  1250. * @net_dev: the net device to read mode for
  1251. * @speed : the transmit speed to be determined
  1252. * @duplex : the duplex mode to be determined
  1253. *
  1254. * The capability of remote end will be put in mii register autorec
  1255. * after auto-negotiation. Use AND operation to get the upper bound
  1256. * of speed and duplex between two ends.
  1257. */
  1258. static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
  1259. {
  1260. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1261. struct mii_phy *phy = sis_priv->mii;
  1262. int phy_addr = sis_priv->cur_phy;
  1263. u32 status;
  1264. u16 autoadv, autorec;
  1265. int i;
  1266. for (i = 0; i < 2; i++)
  1267. status = mdio_read(net_dev, phy_addr, MII_STATUS);
  1268. if (!(status & MII_STAT_LINK))
  1269. return;
  1270. /* AutoNegotiate completed */
  1271. autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
  1272. autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
  1273. status = autoadv & autorec;
  1274. *speed = HW_SPEED_10_MBPS;
  1275. *duplex = FDX_CAPABLE_HALF_SELECTED;
  1276. if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
  1277. *speed = HW_SPEED_100_MBPS;
  1278. if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
  1279. *duplex = FDX_CAPABLE_FULL_SELECTED;
  1280. sis_priv->autong_complete = 1;
  1281. /* Workaround for Realtek RTL8201 PHY issue */
  1282. if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
  1283. if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
  1284. *duplex = FDX_CAPABLE_FULL_SELECTED;
  1285. if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
  1286. *speed = HW_SPEED_100_MBPS;
  1287. }
  1288. if(netif_msg_link(sis_priv))
  1289. printk(KERN_INFO "%s: Media Link On %s %s-duplex\n",
  1290. net_dev->name,
  1291. *speed == HW_SPEED_100_MBPS ?
  1292. "100mbps" : "10mbps",
  1293. *duplex == FDX_CAPABLE_FULL_SELECTED ?
  1294. "full" : "half");
  1295. }
  1296. /**
  1297. * sis900_tx_timeout - sis900 transmit timeout routine
  1298. * @net_dev: the net device to transmit
  1299. *
  1300. * print transmit timeout status
  1301. * disable interrupts and do some tasks
  1302. */
  1303. static void sis900_tx_timeout(struct net_device *net_dev)
  1304. {
  1305. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1306. void __iomem *ioaddr = sis_priv->ioaddr;
  1307. unsigned long flags;
  1308. int i;
  1309. if (netif_msg_tx_err(sis_priv)) {
  1310. printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x\n",
  1311. net_dev->name, sr32(cr), sr32(isr));
  1312. }
  1313. /* Disable interrupts by clearing the interrupt mask. */
  1314. sw32(imr, 0x0000);
  1315. /* use spinlock to prevent interrupt handler accessing buffer ring */
  1316. spin_lock_irqsave(&sis_priv->lock, flags);
  1317. /* discard unsent packets */
  1318. sis_priv->dirty_tx = sis_priv->cur_tx = 0;
  1319. for (i = 0; i < NUM_TX_DESC; i++) {
  1320. struct sk_buff *skb = sis_priv->tx_skbuff[i];
  1321. if (skb) {
  1322. pci_unmap_single(sis_priv->pci_dev,
  1323. sis_priv->tx_ring[i].bufptr, skb->len,
  1324. PCI_DMA_TODEVICE);
  1325. dev_kfree_skb_irq(skb);
  1326. sis_priv->tx_skbuff[i] = NULL;
  1327. sis_priv->tx_ring[i].cmdsts = 0;
  1328. sis_priv->tx_ring[i].bufptr = 0;
  1329. net_dev->stats.tx_dropped++;
  1330. }
  1331. }
  1332. sis_priv->tx_full = 0;
  1333. netif_wake_queue(net_dev);
  1334. spin_unlock_irqrestore(&sis_priv->lock, flags);
  1335. net_dev->trans_start = jiffies; /* prevent tx timeout */
  1336. /* load Transmit Descriptor Register */
  1337. sw32(txdp, sis_priv->tx_ring_dma);
  1338. /* Enable all known interrupts by setting the interrupt mask. */
  1339. sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);
  1340. }
  1341. /**
  1342. * sis900_start_xmit - sis900 start transmit routine
  1343. * @skb: socket buffer pointer to put the data being transmitted
  1344. * @net_dev: the net device to transmit with
  1345. *
  1346. * Set the transmit buffer descriptor,
  1347. * and write TxENA to enable transmit state machine.
  1348. * tell upper layer if the buffer is full
  1349. */
  1350. static netdev_tx_t
  1351. sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
  1352. {
  1353. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1354. void __iomem *ioaddr = sis_priv->ioaddr;
  1355. unsigned int entry;
  1356. unsigned long flags;
  1357. unsigned int index_cur_tx, index_dirty_tx;
  1358. unsigned int count_dirty_tx;
  1359. /* Don't transmit data before the complete of auto-negotiation */
  1360. if(!sis_priv->autong_complete){
  1361. netif_stop_queue(net_dev);
  1362. return NETDEV_TX_BUSY;
  1363. }
  1364. spin_lock_irqsave(&sis_priv->lock, flags);
  1365. /* Calculate the next Tx descriptor entry. */
  1366. entry = sis_priv->cur_tx % NUM_TX_DESC;
  1367. sis_priv->tx_skbuff[entry] = skb;
  1368. /* set the transmit buffer descriptor and enable Transmit State Machine */
  1369. sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
  1370. skb->data, skb->len, PCI_DMA_TODEVICE);
  1371. sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
  1372. sw32(cr, TxENA | sr32(cr));
  1373. sis_priv->cur_tx ++;
  1374. index_cur_tx = sis_priv->cur_tx;
  1375. index_dirty_tx = sis_priv->dirty_tx;
  1376. for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
  1377. count_dirty_tx ++;
  1378. if (index_cur_tx == index_dirty_tx) {
  1379. /* dirty_tx is met in the cycle of cur_tx, buffer full */
  1380. sis_priv->tx_full = 1;
  1381. netif_stop_queue(net_dev);
  1382. } else if (count_dirty_tx < NUM_TX_DESC) {
  1383. /* Typical path, tell upper layer that more transmission is possible */
  1384. netif_start_queue(net_dev);
  1385. } else {
  1386. /* buffer full, tell upper layer no more transmission */
  1387. sis_priv->tx_full = 1;
  1388. netif_stop_queue(net_dev);
  1389. }
  1390. spin_unlock_irqrestore(&sis_priv->lock, flags);
  1391. if (netif_msg_tx_queued(sis_priv))
  1392. printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
  1393. "to slot %d.\n",
  1394. net_dev->name, skb->data, (int)skb->len, entry);
  1395. return NETDEV_TX_OK;
  1396. }
  1397. /**
  1398. * sis900_interrupt - sis900 interrupt handler
  1399. * @irq: the irq number
  1400. * @dev_instance: the client data object
  1401. *
  1402. * The interrupt handler does all of the Rx thread work,
  1403. * and cleans up after the Tx thread
  1404. */
  1405. static irqreturn_t sis900_interrupt(int irq, void *dev_instance)
  1406. {
  1407. struct net_device *net_dev = dev_instance;
  1408. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1409. int boguscnt = max_interrupt_work;
  1410. void __iomem *ioaddr = sis_priv->ioaddr;
  1411. u32 status;
  1412. unsigned int handled = 0;
  1413. spin_lock (&sis_priv->lock);
  1414. do {
  1415. status = sr32(isr);
  1416. if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
  1417. /* nothing intresting happened */
  1418. break;
  1419. handled = 1;
  1420. /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
  1421. if (status & (RxORN | RxERR | RxOK))
  1422. /* Rx interrupt */
  1423. sis900_rx(net_dev);
  1424. if (status & (TxURN | TxERR | TxIDLE))
  1425. /* Tx interrupt */
  1426. sis900_finish_xmit(net_dev);
  1427. /* something strange happened !!! */
  1428. if (status & HIBERR) {
  1429. if(netif_msg_intr(sis_priv))
  1430. printk(KERN_INFO "%s: Abnormal interrupt, "
  1431. "status %#8.8x.\n", net_dev->name, status);
  1432. break;
  1433. }
  1434. if (--boguscnt < 0) {
  1435. if(netif_msg_intr(sis_priv))
  1436. printk(KERN_INFO "%s: Too much work at interrupt, "
  1437. "interrupt status = %#8.8x.\n",
  1438. net_dev->name, status);
  1439. break;
  1440. }
  1441. } while (1);
  1442. if(netif_msg_intr(sis_priv))
  1443. printk(KERN_DEBUG "%s: exiting interrupt, "
  1444. "interrupt status = 0x%#8.8x.\n",
  1445. net_dev->name, sr32(isr));
  1446. spin_unlock (&sis_priv->lock);
  1447. return IRQ_RETVAL(handled);
  1448. }
  1449. /**
  1450. * sis900_rx - sis900 receive routine
  1451. * @net_dev: the net device which receives data
  1452. *
  1453. * Process receive interrupt events,
  1454. * put buffer to higher layer and refill buffer pool
  1455. * Note: This function is called by interrupt handler,
  1456. * don't do "too much" work here
  1457. */
  1458. static int sis900_rx(struct net_device *net_dev)
  1459. {
  1460. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1461. void __iomem *ioaddr = sis_priv->ioaddr;
  1462. unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
  1463. u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
  1464. int rx_work_limit;
  1465. if (netif_msg_rx_status(sis_priv))
  1466. printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
  1467. "status:0x%8.8x\n",
  1468. sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
  1469. rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
  1470. while (rx_status & OWN) {
  1471. unsigned int rx_size;
  1472. unsigned int data_size;
  1473. if (--rx_work_limit < 0)
  1474. break;
  1475. data_size = rx_status & DSIZE;
  1476. rx_size = data_size - CRC_SIZE;
  1477. #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
  1478. /* ``TOOLONG'' flag means jumbo packet received. */
  1479. if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE)
  1480. rx_status &= (~ ((unsigned int)TOOLONG));
  1481. #endif
  1482. if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
  1483. /* corrupted packet received */
  1484. if (netif_msg_rx_err(sis_priv))
  1485. printk(KERN_DEBUG "%s: Corrupted packet "
  1486. "received, buffer status = 0x%8.8x/%d.\n",
  1487. net_dev->name, rx_status, data_size);
  1488. net_dev->stats.rx_errors++;
  1489. if (rx_status & OVERRUN)
  1490. net_dev->stats.rx_over_errors++;
  1491. if (rx_status & (TOOLONG|RUNT))
  1492. net_dev->stats.rx_length_errors++;
  1493. if (rx_status & (RXISERR | FAERR))
  1494. net_dev->stats.rx_frame_errors++;
  1495. if (rx_status & CRCERR)
  1496. net_dev->stats.rx_crc_errors++;
  1497. /* reset buffer descriptor state */
  1498. sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
  1499. } else {
  1500. struct sk_buff * skb;
  1501. struct sk_buff * rx_skb;
  1502. pci_unmap_single(sis_priv->pci_dev,
  1503. sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
  1504. PCI_DMA_FROMDEVICE);
  1505. /* refill the Rx buffer, what if there is not enough
  1506. * memory for new socket buffer ?? */
  1507. if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) {
  1508. /*
  1509. * Not enough memory to refill the buffer
  1510. * so we need to recycle the old one so
  1511. * as to avoid creating a memory hole
  1512. * in the rx ring
  1513. */
  1514. skb = sis_priv->rx_skbuff[entry];
  1515. net_dev->stats.rx_dropped++;
  1516. goto refill_rx_ring;
  1517. }
  1518. /* This situation should never happen, but due to
  1519. some unknown bugs, it is possible that
  1520. we are working on NULL sk_buff :-( */
  1521. if (sis_priv->rx_skbuff[entry] == NULL) {
  1522. if (netif_msg_rx_err(sis_priv))
  1523. printk(KERN_WARNING "%s: NULL pointer "
  1524. "encountered in Rx ring\n"
  1525. "cur_rx:%4.4d, dirty_rx:%4.4d\n",
  1526. net_dev->name, sis_priv->cur_rx,
  1527. sis_priv->dirty_rx);
  1528. dev_kfree_skb(skb);
  1529. break;
  1530. }
  1531. /* give the socket buffer to upper layers */
  1532. rx_skb = sis_priv->rx_skbuff[entry];
  1533. skb_put(rx_skb, rx_size);
  1534. rx_skb->protocol = eth_type_trans(rx_skb, net_dev);
  1535. netif_rx(rx_skb);
  1536. /* some network statistics */
  1537. if ((rx_status & BCAST) == MCAST)
  1538. net_dev->stats.multicast++;
  1539. net_dev->stats.rx_bytes += rx_size;
  1540. net_dev->stats.rx_packets++;
  1541. sis_priv->dirty_rx++;
  1542. refill_rx_ring:
  1543. sis_priv->rx_skbuff[entry] = skb;
  1544. sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
  1545. sis_priv->rx_ring[entry].bufptr =
  1546. pci_map_single(sis_priv->pci_dev, skb->data,
  1547. RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  1548. }
  1549. sis_priv->cur_rx++;
  1550. entry = sis_priv->cur_rx % NUM_RX_DESC;
  1551. rx_status = sis_priv->rx_ring[entry].cmdsts;
  1552. } // while
  1553. /* refill the Rx buffer, what if the rate of refilling is slower
  1554. * than consuming ?? */
  1555. for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
  1556. struct sk_buff *skb;
  1557. entry = sis_priv->dirty_rx % NUM_RX_DESC;
  1558. if (sis_priv->rx_skbuff[entry] == NULL) {
  1559. if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) {
  1560. /* not enough memory for skbuff, this makes a
  1561. * "hole" on the buffer ring, it is not clear
  1562. * how the hardware will react to this kind
  1563. * of degenerated buffer */
  1564. if (netif_msg_rx_err(sis_priv))
  1565. printk(KERN_INFO "%s: Memory squeeze, "
  1566. "deferring packet.\n",
  1567. net_dev->name);
  1568. net_dev->stats.rx_dropped++;
  1569. break;
  1570. }
  1571. sis_priv->rx_skbuff[entry] = skb;
  1572. sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
  1573. sis_priv->rx_ring[entry].bufptr =
  1574. pci_map_single(sis_priv->pci_dev, skb->data,
  1575. RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  1576. }
  1577. }
  1578. /* re-enable the potentially idle receive state matchine */
  1579. sw32(cr , RxENA | sr32(cr));
  1580. return 0;
  1581. }
  1582. /**
  1583. * sis900_finish_xmit - finish up transmission of packets
  1584. * @net_dev: the net device to be transmitted on
  1585. *
  1586. * Check for error condition and free socket buffer etc
  1587. * schedule for more transmission as needed
  1588. * Note: This function is called by interrupt handler,
  1589. * don't do "too much" work here
  1590. */
  1591. static void sis900_finish_xmit (struct net_device *net_dev)
  1592. {
  1593. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1594. for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
  1595. struct sk_buff *skb;
  1596. unsigned int entry;
  1597. u32 tx_status;
  1598. entry = sis_priv->dirty_tx % NUM_TX_DESC;
  1599. tx_status = sis_priv->tx_ring[entry].cmdsts;
  1600. if (tx_status & OWN) {
  1601. /* The packet is not transmitted yet (owned by hardware) !
  1602. * Note: the interrupt is generated only when Tx Machine
  1603. * is idle, so this is an almost impossible case */
  1604. break;
  1605. }
  1606. if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
  1607. /* packet unsuccessfully transmitted */
  1608. if (netif_msg_tx_err(sis_priv))
  1609. printk(KERN_DEBUG "%s: Transmit "
  1610. "error, Tx status %8.8x.\n",
  1611. net_dev->name, tx_status);
  1612. net_dev->stats.tx_errors++;
  1613. if (tx_status & UNDERRUN)
  1614. net_dev->stats.tx_fifo_errors++;
  1615. if (tx_status & ABORT)
  1616. net_dev->stats.tx_aborted_errors++;
  1617. if (tx_status & NOCARRIER)
  1618. net_dev->stats.tx_carrier_errors++;
  1619. if (tx_status & OWCOLL)
  1620. net_dev->stats.tx_window_errors++;
  1621. } else {
  1622. /* packet successfully transmitted */
  1623. net_dev->stats.collisions += (tx_status & COLCNT) >> 16;
  1624. net_dev->stats.tx_bytes += tx_status & DSIZE;
  1625. net_dev->stats.tx_packets++;
  1626. }
  1627. /* Free the original skb. */
  1628. skb = sis_priv->tx_skbuff[entry];
  1629. pci_unmap_single(sis_priv->pci_dev,
  1630. sis_priv->tx_ring[entry].bufptr, skb->len,
  1631. PCI_DMA_TODEVICE);
  1632. dev_kfree_skb_irq(skb);
  1633. sis_priv->tx_skbuff[entry] = NULL;
  1634. sis_priv->tx_ring[entry].bufptr = 0;
  1635. sis_priv->tx_ring[entry].cmdsts = 0;
  1636. }
  1637. if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
  1638. sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
  1639. /* The ring is no longer full, clear tx_full and schedule
  1640. * more transmission by netif_wake_queue(net_dev) */
  1641. sis_priv->tx_full = 0;
  1642. netif_wake_queue (net_dev);
  1643. }
  1644. }
  1645. /**
  1646. * sis900_close - close sis900 device
  1647. * @net_dev: the net device to be closed
  1648. *
  1649. * Disable interrupts, stop the Tx and Rx Status Machine
  1650. * free Tx and RX socket buffer
  1651. */
  1652. static int sis900_close(struct net_device *net_dev)
  1653. {
  1654. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1655. struct pci_dev *pdev = sis_priv->pci_dev;
  1656. void __iomem *ioaddr = sis_priv->ioaddr;
  1657. struct sk_buff *skb;
  1658. int i;
  1659. netif_stop_queue(net_dev);
  1660. /* Disable interrupts by clearing the interrupt mask. */
  1661. sw32(imr, 0x0000);
  1662. sw32(ier, 0x0000);
  1663. /* Stop the chip's Tx and Rx Status Machine */
  1664. sw32(cr, RxDIS | TxDIS | sr32(cr));
  1665. del_timer(&sis_priv->timer);
  1666. free_irq(pdev->irq, net_dev);
  1667. /* Free Tx and RX skbuff */
  1668. for (i = 0; i < NUM_RX_DESC; i++) {
  1669. skb = sis_priv->rx_skbuff[i];
  1670. if (skb) {
  1671. pci_unmap_single(pdev, sis_priv->rx_ring[i].bufptr,
  1672. RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  1673. dev_kfree_skb(skb);
  1674. sis_priv->rx_skbuff[i] = NULL;
  1675. }
  1676. }
  1677. for (i = 0; i < NUM_TX_DESC; i++) {
  1678. skb = sis_priv->tx_skbuff[i];
  1679. if (skb) {
  1680. pci_unmap_single(pdev, sis_priv->tx_ring[i].bufptr,
  1681. skb->len, PCI_DMA_TODEVICE);
  1682. dev_kfree_skb(skb);
  1683. sis_priv->tx_skbuff[i] = NULL;
  1684. }
  1685. }
  1686. /* Green! Put the chip in low-power mode. */
  1687. return 0;
  1688. }
  1689. /**
  1690. * sis900_get_drvinfo - Return information about driver
  1691. * @net_dev: the net device to probe
  1692. * @info: container for info returned
  1693. *
  1694. * Process ethtool command such as "ehtool -i" to show information
  1695. */
  1696. static void sis900_get_drvinfo(struct net_device *net_dev,
  1697. struct ethtool_drvinfo *info)
  1698. {
  1699. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1700. strlcpy(info->driver, SIS900_MODULE_NAME, sizeof(info->driver));
  1701. strlcpy(info->version, SIS900_DRV_VERSION, sizeof(info->version));
  1702. strlcpy(info->bus_info, pci_name(sis_priv->pci_dev),
  1703. sizeof(info->bus_info));
  1704. }
  1705. static u32 sis900_get_msglevel(struct net_device *net_dev)
  1706. {
  1707. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1708. return sis_priv->msg_enable;
  1709. }
  1710. static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
  1711. {
  1712. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1713. sis_priv->msg_enable = value;
  1714. }
  1715. static u32 sis900_get_link(struct net_device *net_dev)
  1716. {
  1717. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1718. return mii_link_ok(&sis_priv->mii_info);
  1719. }
  1720. static int sis900_get_settings(struct net_device *net_dev,
  1721. struct ethtool_cmd *cmd)
  1722. {
  1723. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1724. spin_lock_irq(&sis_priv->lock);
  1725. mii_ethtool_gset(&sis_priv->mii_info, cmd);
  1726. spin_unlock_irq(&sis_priv->lock);
  1727. return 0;
  1728. }
  1729. static int sis900_set_settings(struct net_device *net_dev,
  1730. struct ethtool_cmd *cmd)
  1731. {
  1732. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1733. int rt;
  1734. spin_lock_irq(&sis_priv->lock);
  1735. rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
  1736. spin_unlock_irq(&sis_priv->lock);
  1737. return rt;
  1738. }
  1739. static int sis900_nway_reset(struct net_device *net_dev)
  1740. {
  1741. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1742. return mii_nway_restart(&sis_priv->mii_info);
  1743. }
  1744. /**
  1745. * sis900_set_wol - Set up Wake on Lan registers
  1746. * @net_dev: the net device to probe
  1747. * @wol: container for info passed to the driver
  1748. *
  1749. * Process ethtool command "wol" to setup wake on lan features.
  1750. * SiS900 supports sending WoL events if a correct packet is received,
  1751. * but there is no simple way to filter them to only a subset (broadcast,
  1752. * multicast, unicast or arp).
  1753. */
  1754. static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
  1755. {
  1756. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1757. void __iomem *ioaddr = sis_priv->ioaddr;
  1758. u32 cfgpmcsr = 0, pmctrl_bits = 0;
  1759. if (wol->wolopts == 0) {
  1760. pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
  1761. cfgpmcsr &= ~PME_EN;
  1762. pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
  1763. sw32(pmctrl, pmctrl_bits);
  1764. if (netif_msg_wol(sis_priv))
  1765. printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
  1766. return 0;
  1767. }
  1768. if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
  1769. | WAKE_BCAST | WAKE_ARP))
  1770. return -EINVAL;
  1771. if (wol->wolopts & WAKE_MAGIC)
  1772. pmctrl_bits |= MAGICPKT;
  1773. if (wol->wolopts & WAKE_PHY)
  1774. pmctrl_bits |= LINKON;
  1775. sw32(pmctrl, pmctrl_bits);
  1776. pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
  1777. cfgpmcsr |= PME_EN;
  1778. pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
  1779. if (netif_msg_wol(sis_priv))
  1780. printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
  1781. return 0;
  1782. }
  1783. static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
  1784. {
  1785. struct sis900_private *sp = netdev_priv(net_dev);
  1786. void __iomem *ioaddr = sp->ioaddr;
  1787. u32 pmctrl_bits;
  1788. pmctrl_bits = sr32(pmctrl);
  1789. if (pmctrl_bits & MAGICPKT)
  1790. wol->wolopts |= WAKE_MAGIC;
  1791. if (pmctrl_bits & LINKON)
  1792. wol->wolopts |= WAKE_PHY;
  1793. wol->supported = (WAKE_PHY | WAKE_MAGIC);
  1794. }
  1795. static const struct ethtool_ops sis900_ethtool_ops = {
  1796. .get_drvinfo = sis900_get_drvinfo,
  1797. .get_msglevel = sis900_get_msglevel,
  1798. .set_msglevel = sis900_set_msglevel,
  1799. .get_link = sis900_get_link,
  1800. .get_settings = sis900_get_settings,
  1801. .set_settings = sis900_set_settings,
  1802. .nway_reset = sis900_nway_reset,
  1803. .get_wol = sis900_get_wol,
  1804. .set_wol = sis900_set_wol
  1805. };
  1806. /**
  1807. * mii_ioctl - process MII i/o control command
  1808. * @net_dev: the net device to command for
  1809. * @rq: parameter for command
  1810. * @cmd: the i/o command
  1811. *
  1812. * Process MII command like read/write MII register
  1813. */
  1814. static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
  1815. {
  1816. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1817. struct mii_ioctl_data *data = if_mii(rq);
  1818. switch(cmd) {
  1819. case SIOCGMIIPHY: /* Get address of MII PHY in use. */
  1820. data->phy_id = sis_priv->mii->phy_addr;
  1821. /* Fall Through */
  1822. case SIOCGMIIREG: /* Read MII PHY register. */
  1823. data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
  1824. return 0;
  1825. case SIOCSMIIREG: /* Write MII PHY register. */
  1826. mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
  1827. return 0;
  1828. default:
  1829. return -EOPNOTSUPP;
  1830. }
  1831. }
  1832. /**
  1833. * sis900_set_config - Set media type by net_device.set_config
  1834. * @dev: the net device for media type change
  1835. * @map: ifmap passed by ifconfig
  1836. *
  1837. * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
  1838. * we support only port changes. All other runtime configuration
  1839. * changes will be ignored
  1840. */
  1841. static int sis900_set_config(struct net_device *dev, struct ifmap *map)
  1842. {
  1843. struct sis900_private *sis_priv = netdev_priv(dev);
  1844. struct mii_phy *mii_phy = sis_priv->mii;
  1845. u16 status;
  1846. if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
  1847. /* we switch on the ifmap->port field. I couldn't find anything
  1848. * like a definition or standard for the values of that field.
  1849. * I think the meaning of those values is device specific. But
  1850. * since I would like to change the media type via the ifconfig
  1851. * command I use the definition from linux/netdevice.h
  1852. * (which seems to be different from the ifport(pcmcia) definition) */
  1853. switch(map->port){
  1854. case IF_PORT_UNKNOWN: /* use auto here */
  1855. dev->if_port = map->port;
  1856. /* we are going to change the media type, so the Link
  1857. * will be temporary down and we need to reflect that
  1858. * here. When the Link comes up again, it will be
  1859. * sensed by the sis_timer procedure, which also does
  1860. * all the rest for us */
  1861. netif_carrier_off(dev);
  1862. /* read current state */
  1863. status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
  1864. /* enable auto negotiation and reset the negotioation
  1865. * (I don't really know what the auto negatiotiation
  1866. * reset really means, but it sounds for me right to
  1867. * do one here) */
  1868. mdio_write(dev, mii_phy->phy_addr,
  1869. MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
  1870. break;
  1871. case IF_PORT_10BASET: /* 10BaseT */
  1872. dev->if_port = map->port;
  1873. /* we are going to change the media type, so the Link
  1874. * will be temporary down and we need to reflect that
  1875. * here. When the Link comes up again, it will be
  1876. * sensed by the sis_timer procedure, which also does
  1877. * all the rest for us */
  1878. netif_carrier_off(dev);
  1879. /* set Speed to 10Mbps */
  1880. /* read current state */
  1881. status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
  1882. /* disable auto negotiation and force 10MBit mode*/
  1883. mdio_write(dev, mii_phy->phy_addr,
  1884. MII_CONTROL, status & ~(MII_CNTL_SPEED |
  1885. MII_CNTL_AUTO));
  1886. break;
  1887. case IF_PORT_100BASET: /* 100BaseT */
  1888. case IF_PORT_100BASETX: /* 100BaseTx */
  1889. dev->if_port = map->port;
  1890. /* we are going to change the media type, so the Link
  1891. * will be temporary down and we need to reflect that
  1892. * here. When the Link comes up again, it will be
  1893. * sensed by the sis_timer procedure, which also does
  1894. * all the rest for us */
  1895. netif_carrier_off(dev);
  1896. /* set Speed to 100Mbps */
  1897. /* disable auto negotiation and enable 100MBit Mode */
  1898. status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
  1899. mdio_write(dev, mii_phy->phy_addr,
  1900. MII_CONTROL, (status & ~MII_CNTL_SPEED) |
  1901. MII_CNTL_SPEED);
  1902. break;
  1903. case IF_PORT_10BASE2: /* 10Base2 */
  1904. case IF_PORT_AUI: /* AUI */
  1905. case IF_PORT_100BASEFX: /* 100BaseFx */
  1906. /* These Modes are not supported (are they?)*/
  1907. return -EOPNOTSUPP;
  1908. break;
  1909. default:
  1910. return -EINVAL;
  1911. }
  1912. }
  1913. return 0;
  1914. }
  1915. /**
  1916. * sis900_mcast_bitnr - compute hashtable index
  1917. * @addr: multicast address
  1918. * @revision: revision id of chip
  1919. *
  1920. * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
  1921. * hash table, which makes this function a little bit different from other drivers
  1922. * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
  1923. * multicast hash table.
  1924. */
  1925. static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
  1926. {
  1927. u32 crc = ether_crc(6, addr);
  1928. /* leave 8 or 7 most siginifant bits */
  1929. if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
  1930. return (int)(crc >> 24);
  1931. else
  1932. return (int)(crc >> 25);
  1933. }
  1934. /**
  1935. * set_rx_mode - Set SiS900 receive mode
  1936. * @net_dev: the net device to be set
  1937. *
  1938. * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
  1939. * And set the appropriate multicast filter.
  1940. * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
  1941. */
  1942. static void set_rx_mode(struct net_device *net_dev)
  1943. {
  1944. struct sis900_private *sis_priv = netdev_priv(net_dev);
  1945. void __iomem *ioaddr = sis_priv->ioaddr;
  1946. u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
  1947. int i, table_entries;
  1948. u32 rx_mode;
  1949. /* 635 Hash Table entries = 256(2^16) */
  1950. if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
  1951. (sis_priv->chipset_rev == SIS900B_900_REV))
  1952. table_entries = 16;
  1953. else
  1954. table_entries = 8;
  1955. if (net_dev->flags & IFF_PROMISC) {
  1956. /* Accept any kinds of packets */
  1957. rx_mode = RFPromiscuous;
  1958. for (i = 0; i < table_entries; i++)
  1959. mc_filter[i] = 0xffff;
  1960. } else if ((netdev_mc_count(net_dev) > multicast_filter_limit) ||
  1961. (net_dev->flags & IFF_ALLMULTI)) {
  1962. /* too many multicast addresses or accept all multicast packet */
  1963. rx_mode = RFAAB | RFAAM;
  1964. for (i = 0; i < table_entries; i++)
  1965. mc_filter[i] = 0xffff;
  1966. } else {
  1967. /* Accept Broadcast packet, destination address matchs our
  1968. * MAC address, use Receive Filter to reject unwanted MCAST
  1969. * packets */
  1970. struct netdev_hw_addr *ha;
  1971. rx_mode = RFAAB;
  1972. netdev_for_each_mc_addr(ha, net_dev) {
  1973. unsigned int bit_nr;
  1974. bit_nr = sis900_mcast_bitnr(ha->addr,
  1975. sis_priv->chipset_rev);
  1976. mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
  1977. }
  1978. }
  1979. /* update Multicast Hash Table in Receive Filter */
  1980. for (i = 0; i < table_entries; i++) {
  1981. /* why plus 0x04 ??, That makes the correct value for hash table. */
  1982. sw32(rfcr, (u32)(0x00000004 + i) << RFADDR_shift);
  1983. sw32(rfdr, mc_filter[i]);
  1984. }
  1985. sw32(rfcr, RFEN | rx_mode);
  1986. /* sis900 is capable of looping back packets at MAC level for
  1987. * debugging purpose */
  1988. if (net_dev->flags & IFF_LOOPBACK) {
  1989. u32 cr_saved;
  1990. /* We must disable Tx/Rx before setting loopback mode */
  1991. cr_saved = sr32(cr);
  1992. sw32(cr, cr_saved | TxDIS | RxDIS);
  1993. /* enable loopback */
  1994. sw32(txcfg, sr32(txcfg) | TxMLB);
  1995. sw32(rxcfg, sr32(rxcfg) | RxATX);
  1996. /* restore cr */
  1997. sw32(cr, cr_saved);
  1998. }
  1999. }
  2000. /**
  2001. * sis900_reset - Reset sis900 MAC
  2002. * @net_dev: the net device to reset
  2003. *
  2004. * reset sis900 MAC and wait until finished
  2005. * reset through command register
  2006. * change backoff algorithm for 900B0 & 635 M/B
  2007. */
  2008. static void sis900_reset(struct net_device *net_dev)
  2009. {
  2010. struct sis900_private *sis_priv = netdev_priv(net_dev);
  2011. void __iomem *ioaddr = sis_priv->ioaddr;
  2012. u32 status = TxRCMP | RxRCMP;
  2013. int i;
  2014. sw32(ier, 0);
  2015. sw32(imr, 0);
  2016. sw32(rfcr, 0);
  2017. sw32(cr, RxRESET | TxRESET | RESET | sr32(cr));
  2018. /* Check that the chip has finished the reset. */
  2019. for (i = 0; status && (i < 1000); i++)
  2020. status ^= sr32(isr) & status;
  2021. if (sis_priv->chipset_rev >= SIS635A_900_REV ||
  2022. sis_priv->chipset_rev == SIS900B_900_REV)
  2023. sw32(cfg, PESEL | RND_CNT);
  2024. else
  2025. sw32(cfg, PESEL);
  2026. }
  2027. /**
  2028. * sis900_remove - Remove sis900 device
  2029. * @pci_dev: the pci device to be removed
  2030. *
  2031. * remove and release SiS900 net device
  2032. */
  2033. static void sis900_remove(struct pci_dev *pci_dev)
  2034. {
  2035. struct net_device *net_dev = pci_get_drvdata(pci_dev);
  2036. struct sis900_private *sis_priv = netdev_priv(net_dev);
  2037. unregister_netdev(net_dev);
  2038. while (sis_priv->first_mii) {
  2039. struct mii_phy *phy = sis_priv->first_mii;
  2040. sis_priv->first_mii = phy->next;
  2041. kfree(phy);
  2042. }
  2043. pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
  2044. sis_priv->rx_ring_dma);
  2045. pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
  2046. sis_priv->tx_ring_dma);
  2047. pci_iounmap(pci_dev, sis_priv->ioaddr);
  2048. free_netdev(net_dev);
  2049. pci_release_regions(pci_dev);
  2050. pci_set_drvdata(pci_dev, NULL);
  2051. }
  2052. #ifdef CONFIG_PM
  2053. static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
  2054. {
  2055. struct net_device *net_dev = pci_get_drvdata(pci_dev);
  2056. struct sis900_private *sis_priv = netdev_priv(net_dev);
  2057. void __iomem *ioaddr = sis_priv->ioaddr;
  2058. if(!netif_running(net_dev))
  2059. return 0;
  2060. netif_stop_queue(net_dev);
  2061. netif_device_detach(net_dev);
  2062. /* Stop the chip's Tx and Rx Status Machine */
  2063. sw32(cr, RxDIS | TxDIS | sr32(cr));
  2064. pci_set_power_state(pci_dev, PCI_D3hot);
  2065. pci_save_state(pci_dev);
  2066. return 0;
  2067. }
  2068. static int sis900_resume(struct pci_dev *pci_dev)
  2069. {
  2070. struct net_device *net_dev = pci_get_drvdata(pci_dev);
  2071. struct sis900_private *sis_priv = netdev_priv(net_dev);
  2072. void __iomem *ioaddr = sis_priv->ioaddr;
  2073. if(!netif_running(net_dev))
  2074. return 0;
  2075. pci_restore_state(pci_dev);
  2076. pci_set_power_state(pci_dev, PCI_D0);
  2077. sis900_init_rxfilter(net_dev);
  2078. sis900_init_tx_ring(net_dev);
  2079. sis900_init_rx_ring(net_dev);
  2080. set_rx_mode(net_dev);
  2081. netif_device_attach(net_dev);
  2082. netif_start_queue(net_dev);
  2083. /* Workaround for EDB */
  2084. sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
  2085. /* Enable all known interrupts by setting the interrupt mask. */
  2086. sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);
  2087. sw32(cr, RxENA | sr32(cr));
  2088. sw32(ier, IE);
  2089. sis900_check_mode(net_dev, sis_priv->mii);
  2090. return 0;
  2091. }
  2092. #endif /* CONFIG_PM */
  2093. static struct pci_driver sis900_pci_driver = {
  2094. .name = SIS900_MODULE_NAME,
  2095. .id_table = sis900_pci_tbl,
  2096. .probe = sis900_probe,
  2097. .remove = sis900_remove,
  2098. #ifdef CONFIG_PM
  2099. .suspend = sis900_suspend,
  2100. .resume = sis900_resume,
  2101. #endif /* CONFIG_PM */
  2102. };
  2103. static int __init sis900_init_module(void)
  2104. {
  2105. /* when a module, this is printed whether or not devices are found in probe */
  2106. #ifdef MODULE
  2107. printk(version);
  2108. #endif
  2109. return pci_register_driver(&sis900_pci_driver);
  2110. }
  2111. static void __exit sis900_cleanup_module(void)
  2112. {
  2113. pci_unregister_driver(&sis900_pci_driver);
  2114. }
  2115. module_init(sis900_init_module);
  2116. module_exit(sis900_cleanup_module);