rx.c 22 KB

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  1. /****************************************************************************
  2. * Driver for Solarflare Solarstorm network controllers and boards
  3. * Copyright 2005-2006 Fen Systems Ltd.
  4. * Copyright 2005-2011 Solarflare Communications Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation, incorporated herein by reference.
  9. */
  10. #include <linux/socket.h>
  11. #include <linux/in.h>
  12. #include <linux/slab.h>
  13. #include <linux/ip.h>
  14. #include <linux/tcp.h>
  15. #include <linux/udp.h>
  16. #include <linux/prefetch.h>
  17. #include <linux/moduleparam.h>
  18. #include <net/ip.h>
  19. #include <net/checksum.h>
  20. #include "net_driver.h"
  21. #include "efx.h"
  22. #include "nic.h"
  23. #include "selftest.h"
  24. #include "workarounds.h"
  25. /* Number of RX descriptors pushed at once. */
  26. #define EFX_RX_BATCH 8
  27. /* Maximum size of a buffer sharing a page */
  28. #define EFX_RX_HALF_PAGE ((PAGE_SIZE >> 1) - sizeof(struct efx_rx_page_state))
  29. /* Size of buffer allocated for skb header area. */
  30. #define EFX_SKB_HEADERS 64u
  31. /*
  32. * rx_alloc_method - RX buffer allocation method
  33. *
  34. * This driver supports two methods for allocating and using RX buffers:
  35. * each RX buffer may be backed by an skb or by an order-n page.
  36. *
  37. * When GRO is in use then the second method has a lower overhead,
  38. * since we don't have to allocate then free skbs on reassembled frames.
  39. *
  40. * Values:
  41. * - RX_ALLOC_METHOD_AUTO = 0
  42. * - RX_ALLOC_METHOD_SKB = 1
  43. * - RX_ALLOC_METHOD_PAGE = 2
  44. *
  45. * The heuristic for %RX_ALLOC_METHOD_AUTO is a simple hysteresis count
  46. * controlled by the parameters below.
  47. *
  48. * - Since pushing and popping descriptors are separated by the rx_queue
  49. * size, so the watermarks should be ~rxd_size.
  50. * - The performance win by using page-based allocation for GRO is less
  51. * than the performance hit of using page-based allocation of non-GRO,
  52. * so the watermarks should reflect this.
  53. *
  54. * Per channel we maintain a single variable, updated by each channel:
  55. *
  56. * rx_alloc_level += (gro_performed ? RX_ALLOC_FACTOR_GRO :
  57. * RX_ALLOC_FACTOR_SKB)
  58. * Per NAPI poll interval, we constrain rx_alloc_level to 0..MAX (which
  59. * limits the hysteresis), and update the allocation strategy:
  60. *
  61. * rx_alloc_method = (rx_alloc_level > RX_ALLOC_LEVEL_GRO ?
  62. * RX_ALLOC_METHOD_PAGE : RX_ALLOC_METHOD_SKB)
  63. */
  64. static int rx_alloc_method = RX_ALLOC_METHOD_AUTO;
  65. #define RX_ALLOC_LEVEL_GRO 0x2000
  66. #define RX_ALLOC_LEVEL_MAX 0x3000
  67. #define RX_ALLOC_FACTOR_GRO 1
  68. #define RX_ALLOC_FACTOR_SKB (-2)
  69. /* This is the percentage fill level below which new RX descriptors
  70. * will be added to the RX descriptor ring.
  71. */
  72. static unsigned int rx_refill_threshold;
  73. /*
  74. * RX maximum head room required.
  75. *
  76. * This must be at least 1 to prevent overflow and at least 2 to allow
  77. * pipelined receives.
  78. */
  79. #define EFX_RXD_HEAD_ROOM 2
  80. /* Offset of ethernet header within page */
  81. static inline unsigned int efx_rx_buf_offset(struct efx_nic *efx,
  82. struct efx_rx_buffer *buf)
  83. {
  84. return buf->page_offset + efx->type->rx_buffer_hash_size;
  85. }
  86. static inline unsigned int efx_rx_buf_size(struct efx_nic *efx)
  87. {
  88. return PAGE_SIZE << efx->rx_buffer_order;
  89. }
  90. static u8 *efx_rx_buf_eh(struct efx_nic *efx, struct efx_rx_buffer *buf)
  91. {
  92. if (buf->flags & EFX_RX_BUF_PAGE)
  93. return page_address(buf->u.page) + efx_rx_buf_offset(efx, buf);
  94. else
  95. return (u8 *)buf->u.skb->data + efx->type->rx_buffer_hash_size;
  96. }
  97. static inline u32 efx_rx_buf_hash(const u8 *eh)
  98. {
  99. /* The ethernet header is always directly after any hash. */
  100. #if defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) || NET_IP_ALIGN % 4 == 0
  101. return __le32_to_cpup((const __le32 *)(eh - 4));
  102. #else
  103. const u8 *data = eh - 4;
  104. return (u32)data[0] |
  105. (u32)data[1] << 8 |
  106. (u32)data[2] << 16 |
  107. (u32)data[3] << 24;
  108. #endif
  109. }
  110. /**
  111. * efx_init_rx_buffers_skb - create EFX_RX_BATCH skb-based RX buffers
  112. *
  113. * @rx_queue: Efx RX queue
  114. *
  115. * This allocates EFX_RX_BATCH skbs, maps them for DMA, and populates a
  116. * struct efx_rx_buffer for each one. Return a negative error code or 0
  117. * on success. May fail having only inserted fewer than EFX_RX_BATCH
  118. * buffers.
  119. */
  120. static int efx_init_rx_buffers_skb(struct efx_rx_queue *rx_queue)
  121. {
  122. struct efx_nic *efx = rx_queue->efx;
  123. struct net_device *net_dev = efx->net_dev;
  124. struct efx_rx_buffer *rx_buf;
  125. struct sk_buff *skb;
  126. int skb_len = efx->rx_buffer_len;
  127. unsigned index, count;
  128. for (count = 0; count < EFX_RX_BATCH; ++count) {
  129. index = rx_queue->added_count & rx_queue->ptr_mask;
  130. rx_buf = efx_rx_buffer(rx_queue, index);
  131. rx_buf->u.skb = skb = netdev_alloc_skb(net_dev, skb_len);
  132. if (unlikely(!skb))
  133. return -ENOMEM;
  134. /* Adjust the SKB for padding */
  135. skb_reserve(skb, NET_IP_ALIGN);
  136. rx_buf->len = skb_len - NET_IP_ALIGN;
  137. rx_buf->flags = 0;
  138. rx_buf->dma_addr = dma_map_single(&efx->pci_dev->dev,
  139. skb->data, rx_buf->len,
  140. DMA_FROM_DEVICE);
  141. if (unlikely(dma_mapping_error(&efx->pci_dev->dev,
  142. rx_buf->dma_addr))) {
  143. dev_kfree_skb_any(skb);
  144. rx_buf->u.skb = NULL;
  145. return -EIO;
  146. }
  147. ++rx_queue->added_count;
  148. ++rx_queue->alloc_skb_count;
  149. }
  150. return 0;
  151. }
  152. /**
  153. * efx_init_rx_buffers_page - create EFX_RX_BATCH page-based RX buffers
  154. *
  155. * @rx_queue: Efx RX queue
  156. *
  157. * This allocates memory for EFX_RX_BATCH receive buffers, maps them for DMA,
  158. * and populates struct efx_rx_buffers for each one. Return a negative error
  159. * code or 0 on success. If a single page can be split between two buffers,
  160. * then the page will either be inserted fully, or not at at all.
  161. */
  162. static int efx_init_rx_buffers_page(struct efx_rx_queue *rx_queue)
  163. {
  164. struct efx_nic *efx = rx_queue->efx;
  165. struct efx_rx_buffer *rx_buf;
  166. struct page *page;
  167. unsigned int page_offset;
  168. struct efx_rx_page_state *state;
  169. dma_addr_t dma_addr;
  170. unsigned index, count;
  171. /* We can split a page between two buffers */
  172. BUILD_BUG_ON(EFX_RX_BATCH & 1);
  173. for (count = 0; count < EFX_RX_BATCH; ++count) {
  174. page = alloc_pages(__GFP_COLD | __GFP_COMP | GFP_ATOMIC,
  175. efx->rx_buffer_order);
  176. if (unlikely(page == NULL))
  177. return -ENOMEM;
  178. dma_addr = dma_map_page(&efx->pci_dev->dev, page, 0,
  179. efx_rx_buf_size(efx),
  180. DMA_FROM_DEVICE);
  181. if (unlikely(dma_mapping_error(&efx->pci_dev->dev, dma_addr))) {
  182. __free_pages(page, efx->rx_buffer_order);
  183. return -EIO;
  184. }
  185. state = page_address(page);
  186. state->refcnt = 0;
  187. state->dma_addr = dma_addr;
  188. dma_addr += sizeof(struct efx_rx_page_state);
  189. page_offset = sizeof(struct efx_rx_page_state);
  190. split:
  191. index = rx_queue->added_count & rx_queue->ptr_mask;
  192. rx_buf = efx_rx_buffer(rx_queue, index);
  193. rx_buf->dma_addr = dma_addr + EFX_PAGE_IP_ALIGN;
  194. rx_buf->u.page = page;
  195. rx_buf->page_offset = page_offset + EFX_PAGE_IP_ALIGN;
  196. rx_buf->len = efx->rx_buffer_len - EFX_PAGE_IP_ALIGN;
  197. rx_buf->flags = EFX_RX_BUF_PAGE;
  198. ++rx_queue->added_count;
  199. ++rx_queue->alloc_page_count;
  200. ++state->refcnt;
  201. if ((~count & 1) && (efx->rx_buffer_len <= EFX_RX_HALF_PAGE)) {
  202. /* Use the second half of the page */
  203. get_page(page);
  204. dma_addr += (PAGE_SIZE >> 1);
  205. page_offset += (PAGE_SIZE >> 1);
  206. ++count;
  207. goto split;
  208. }
  209. }
  210. return 0;
  211. }
  212. static void efx_unmap_rx_buffer(struct efx_nic *efx,
  213. struct efx_rx_buffer *rx_buf,
  214. unsigned int used_len)
  215. {
  216. if ((rx_buf->flags & EFX_RX_BUF_PAGE) && rx_buf->u.page) {
  217. struct efx_rx_page_state *state;
  218. state = page_address(rx_buf->u.page);
  219. if (--state->refcnt == 0) {
  220. dma_unmap_page(&efx->pci_dev->dev,
  221. state->dma_addr,
  222. efx_rx_buf_size(efx),
  223. DMA_FROM_DEVICE);
  224. } else if (used_len) {
  225. dma_sync_single_for_cpu(&efx->pci_dev->dev,
  226. rx_buf->dma_addr, used_len,
  227. DMA_FROM_DEVICE);
  228. }
  229. } else if (!(rx_buf->flags & EFX_RX_BUF_PAGE) && rx_buf->u.skb) {
  230. dma_unmap_single(&efx->pci_dev->dev, rx_buf->dma_addr,
  231. rx_buf->len, DMA_FROM_DEVICE);
  232. }
  233. }
  234. static void efx_free_rx_buffer(struct efx_nic *efx,
  235. struct efx_rx_buffer *rx_buf)
  236. {
  237. if ((rx_buf->flags & EFX_RX_BUF_PAGE) && rx_buf->u.page) {
  238. __free_pages(rx_buf->u.page, efx->rx_buffer_order);
  239. rx_buf->u.page = NULL;
  240. } else if (!(rx_buf->flags & EFX_RX_BUF_PAGE) && rx_buf->u.skb) {
  241. dev_kfree_skb_any(rx_buf->u.skb);
  242. rx_buf->u.skb = NULL;
  243. }
  244. }
  245. static void efx_fini_rx_buffer(struct efx_rx_queue *rx_queue,
  246. struct efx_rx_buffer *rx_buf)
  247. {
  248. efx_unmap_rx_buffer(rx_queue->efx, rx_buf, 0);
  249. efx_free_rx_buffer(rx_queue->efx, rx_buf);
  250. }
  251. /* Attempt to resurrect the other receive buffer that used to share this page,
  252. * which had previously been passed up to the kernel and freed. */
  253. static void efx_resurrect_rx_buffer(struct efx_rx_queue *rx_queue,
  254. struct efx_rx_buffer *rx_buf)
  255. {
  256. struct efx_rx_page_state *state = page_address(rx_buf->u.page);
  257. struct efx_rx_buffer *new_buf;
  258. unsigned fill_level, index;
  259. /* +1 because efx_rx_packet() incremented removed_count. +1 because
  260. * we'd like to insert an additional descriptor whilst leaving
  261. * EFX_RXD_HEAD_ROOM for the non-recycle path */
  262. fill_level = (rx_queue->added_count - rx_queue->removed_count + 2);
  263. if (unlikely(fill_level > rx_queue->max_fill)) {
  264. /* We could place "state" on a list, and drain the list in
  265. * efx_fast_push_rx_descriptors(). For now, this will do. */
  266. return;
  267. }
  268. ++state->refcnt;
  269. get_page(rx_buf->u.page);
  270. index = rx_queue->added_count & rx_queue->ptr_mask;
  271. new_buf = efx_rx_buffer(rx_queue, index);
  272. new_buf->dma_addr = rx_buf->dma_addr ^ (PAGE_SIZE >> 1);
  273. new_buf->u.page = rx_buf->u.page;
  274. new_buf->len = rx_buf->len;
  275. new_buf->flags = EFX_RX_BUF_PAGE;
  276. ++rx_queue->added_count;
  277. }
  278. /* Recycle the given rx buffer directly back into the rx_queue. There is
  279. * always room to add this buffer, because we've just popped a buffer. */
  280. static void efx_recycle_rx_buffer(struct efx_channel *channel,
  281. struct efx_rx_buffer *rx_buf)
  282. {
  283. struct efx_nic *efx = channel->efx;
  284. struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
  285. struct efx_rx_buffer *new_buf;
  286. unsigned index;
  287. rx_buf->flags &= EFX_RX_BUF_PAGE;
  288. if ((rx_buf->flags & EFX_RX_BUF_PAGE) &&
  289. efx->rx_buffer_len <= EFX_RX_HALF_PAGE &&
  290. page_count(rx_buf->u.page) == 1)
  291. efx_resurrect_rx_buffer(rx_queue, rx_buf);
  292. index = rx_queue->added_count & rx_queue->ptr_mask;
  293. new_buf = efx_rx_buffer(rx_queue, index);
  294. memcpy(new_buf, rx_buf, sizeof(*new_buf));
  295. rx_buf->u.page = NULL;
  296. ++rx_queue->added_count;
  297. }
  298. /**
  299. * efx_fast_push_rx_descriptors - push new RX descriptors quickly
  300. * @rx_queue: RX descriptor queue
  301. *
  302. * This will aim to fill the RX descriptor queue up to
  303. * @rx_queue->@max_fill. If there is insufficient atomic
  304. * memory to do so, a slow fill will be scheduled.
  305. *
  306. * The caller must provide serialisation (none is used here). In practise,
  307. * this means this function must run from the NAPI handler, or be called
  308. * when NAPI is disabled.
  309. */
  310. void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue)
  311. {
  312. struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
  313. unsigned fill_level;
  314. int space, rc = 0;
  315. /* Calculate current fill level, and exit if we don't need to fill */
  316. fill_level = (rx_queue->added_count - rx_queue->removed_count);
  317. EFX_BUG_ON_PARANOID(fill_level > rx_queue->efx->rxq_entries);
  318. if (fill_level >= rx_queue->fast_fill_trigger)
  319. goto out;
  320. /* Record minimum fill level */
  321. if (unlikely(fill_level < rx_queue->min_fill)) {
  322. if (fill_level)
  323. rx_queue->min_fill = fill_level;
  324. }
  325. space = rx_queue->max_fill - fill_level;
  326. EFX_BUG_ON_PARANOID(space < EFX_RX_BATCH);
  327. netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
  328. "RX queue %d fast-filling descriptor ring from"
  329. " level %d to level %d using %s allocation\n",
  330. efx_rx_queue_index(rx_queue), fill_level,
  331. rx_queue->max_fill,
  332. channel->rx_alloc_push_pages ? "page" : "skb");
  333. do {
  334. if (channel->rx_alloc_push_pages)
  335. rc = efx_init_rx_buffers_page(rx_queue);
  336. else
  337. rc = efx_init_rx_buffers_skb(rx_queue);
  338. if (unlikely(rc)) {
  339. /* Ensure that we don't leave the rx queue empty */
  340. if (rx_queue->added_count == rx_queue->removed_count)
  341. efx_schedule_slow_fill(rx_queue);
  342. goto out;
  343. }
  344. } while ((space -= EFX_RX_BATCH) >= EFX_RX_BATCH);
  345. netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
  346. "RX queue %d fast-filled descriptor ring "
  347. "to level %d\n", efx_rx_queue_index(rx_queue),
  348. rx_queue->added_count - rx_queue->removed_count);
  349. out:
  350. if (rx_queue->notified_count != rx_queue->added_count)
  351. efx_nic_notify_rx_desc(rx_queue);
  352. }
  353. void efx_rx_slow_fill(unsigned long context)
  354. {
  355. struct efx_rx_queue *rx_queue = (struct efx_rx_queue *)context;
  356. /* Post an event to cause NAPI to run and refill the queue */
  357. efx_nic_generate_fill_event(rx_queue);
  358. ++rx_queue->slow_fill_count;
  359. }
  360. static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue,
  361. struct efx_rx_buffer *rx_buf,
  362. int len, bool *leak_packet)
  363. {
  364. struct efx_nic *efx = rx_queue->efx;
  365. unsigned max_len = rx_buf->len - efx->type->rx_buffer_padding;
  366. if (likely(len <= max_len))
  367. return;
  368. /* The packet must be discarded, but this is only a fatal error
  369. * if the caller indicated it was
  370. */
  371. rx_buf->flags |= EFX_RX_PKT_DISCARD;
  372. if ((len > rx_buf->len) && EFX_WORKAROUND_8071(efx)) {
  373. if (net_ratelimit())
  374. netif_err(efx, rx_err, efx->net_dev,
  375. " RX queue %d seriously overlength "
  376. "RX event (0x%x > 0x%x+0x%x). Leaking\n",
  377. efx_rx_queue_index(rx_queue), len, max_len,
  378. efx->type->rx_buffer_padding);
  379. /* If this buffer was skb-allocated, then the meta
  380. * data at the end of the skb will be trashed. So
  381. * we have no choice but to leak the fragment.
  382. */
  383. *leak_packet = !(rx_buf->flags & EFX_RX_BUF_PAGE);
  384. efx_schedule_reset(efx, RESET_TYPE_RX_RECOVERY);
  385. } else {
  386. if (net_ratelimit())
  387. netif_err(efx, rx_err, efx->net_dev,
  388. " RX queue %d overlength RX event "
  389. "(0x%x > 0x%x)\n",
  390. efx_rx_queue_index(rx_queue), len, max_len);
  391. }
  392. efx_rx_queue_channel(rx_queue)->n_rx_overlength++;
  393. }
  394. /* Pass a received packet up through GRO. GRO can handle pages
  395. * regardless of checksum state and skbs with a good checksum.
  396. */
  397. static void efx_rx_packet_gro(struct efx_channel *channel,
  398. struct efx_rx_buffer *rx_buf,
  399. const u8 *eh)
  400. {
  401. struct napi_struct *napi = &channel->napi_str;
  402. gro_result_t gro_result;
  403. if (rx_buf->flags & EFX_RX_BUF_PAGE) {
  404. struct efx_nic *efx = channel->efx;
  405. struct page *page = rx_buf->u.page;
  406. struct sk_buff *skb;
  407. rx_buf->u.page = NULL;
  408. skb = napi_get_frags(napi);
  409. if (!skb) {
  410. put_page(page);
  411. return;
  412. }
  413. if (efx->net_dev->features & NETIF_F_RXHASH)
  414. skb->rxhash = efx_rx_buf_hash(eh);
  415. skb_fill_page_desc(skb, 0, page,
  416. efx_rx_buf_offset(efx, rx_buf), rx_buf->len);
  417. skb->len = rx_buf->len;
  418. skb->data_len = rx_buf->len;
  419. skb->truesize += rx_buf->len;
  420. skb->ip_summed = ((rx_buf->flags & EFX_RX_PKT_CSUMMED) ?
  421. CHECKSUM_UNNECESSARY : CHECKSUM_NONE);
  422. skb_record_rx_queue(skb, channel->rx_queue.core_index);
  423. gro_result = napi_gro_frags(napi);
  424. } else {
  425. struct sk_buff *skb = rx_buf->u.skb;
  426. EFX_BUG_ON_PARANOID(!(rx_buf->flags & EFX_RX_PKT_CSUMMED));
  427. rx_buf->u.skb = NULL;
  428. skb->ip_summed = CHECKSUM_UNNECESSARY;
  429. gro_result = napi_gro_receive(napi, skb);
  430. }
  431. if (gro_result == GRO_NORMAL) {
  432. channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB;
  433. } else if (gro_result != GRO_DROP) {
  434. channel->rx_alloc_level += RX_ALLOC_FACTOR_GRO;
  435. channel->irq_mod_score += 2;
  436. }
  437. }
  438. void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
  439. unsigned int len, u16 flags)
  440. {
  441. struct efx_nic *efx = rx_queue->efx;
  442. struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
  443. struct efx_rx_buffer *rx_buf;
  444. bool leak_packet = false;
  445. rx_buf = efx_rx_buffer(rx_queue, index);
  446. rx_buf->flags |= flags;
  447. /* This allows the refill path to post another buffer.
  448. * EFX_RXD_HEAD_ROOM ensures that the slot we are using
  449. * isn't overwritten yet.
  450. */
  451. rx_queue->removed_count++;
  452. /* Validate the length encoded in the event vs the descriptor pushed */
  453. efx_rx_packet__check_len(rx_queue, rx_buf, len, &leak_packet);
  454. netif_vdbg(efx, rx_status, efx->net_dev,
  455. "RX queue %d received id %x at %llx+%x %s%s\n",
  456. efx_rx_queue_index(rx_queue), index,
  457. (unsigned long long)rx_buf->dma_addr, len,
  458. (rx_buf->flags & EFX_RX_PKT_CSUMMED) ? " [SUMMED]" : "",
  459. (rx_buf->flags & EFX_RX_PKT_DISCARD) ? " [DISCARD]" : "");
  460. /* Discard packet, if instructed to do so */
  461. if (unlikely(rx_buf->flags & EFX_RX_PKT_DISCARD)) {
  462. if (unlikely(leak_packet))
  463. channel->n_skbuff_leaks++;
  464. else
  465. efx_recycle_rx_buffer(channel, rx_buf);
  466. /* Don't hold off the previous receive */
  467. rx_buf = NULL;
  468. goto out;
  469. }
  470. /* Release and/or sync DMA mapping - assumes all RX buffers
  471. * consumed in-order per RX queue
  472. */
  473. efx_unmap_rx_buffer(efx, rx_buf, len);
  474. /* Prefetch nice and early so data will (hopefully) be in cache by
  475. * the time we look at it.
  476. */
  477. prefetch(efx_rx_buf_eh(efx, rx_buf));
  478. /* Pipeline receives so that we give time for packet headers to be
  479. * prefetched into cache.
  480. */
  481. rx_buf->len = len - efx->type->rx_buffer_hash_size;
  482. out:
  483. if (channel->rx_pkt)
  484. __efx_rx_packet(channel, channel->rx_pkt);
  485. channel->rx_pkt = rx_buf;
  486. }
  487. static void efx_rx_deliver(struct efx_channel *channel,
  488. struct efx_rx_buffer *rx_buf)
  489. {
  490. struct sk_buff *skb;
  491. /* We now own the SKB */
  492. skb = rx_buf->u.skb;
  493. rx_buf->u.skb = NULL;
  494. /* Set the SKB flags */
  495. skb_checksum_none_assert(skb);
  496. /* Record the rx_queue */
  497. skb_record_rx_queue(skb, channel->rx_queue.core_index);
  498. /* Pass the packet up */
  499. if (channel->type->receive_skb)
  500. channel->type->receive_skb(channel, skb);
  501. else
  502. netif_receive_skb(skb);
  503. /* Update allocation strategy method */
  504. channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB;
  505. }
  506. /* Handle a received packet. Second half: Touches packet payload. */
  507. void __efx_rx_packet(struct efx_channel *channel, struct efx_rx_buffer *rx_buf)
  508. {
  509. struct efx_nic *efx = channel->efx;
  510. u8 *eh = efx_rx_buf_eh(efx, rx_buf);
  511. /* If we're in loopback test, then pass the packet directly to the
  512. * loopback layer, and free the rx_buf here
  513. */
  514. if (unlikely(efx->loopback_selftest)) {
  515. efx_loopback_rx_packet(efx, eh, rx_buf->len);
  516. efx_free_rx_buffer(efx, rx_buf);
  517. return;
  518. }
  519. if (!(rx_buf->flags & EFX_RX_BUF_PAGE)) {
  520. struct sk_buff *skb = rx_buf->u.skb;
  521. prefetch(skb_shinfo(skb));
  522. skb_reserve(skb, efx->type->rx_buffer_hash_size);
  523. skb_put(skb, rx_buf->len);
  524. if (efx->net_dev->features & NETIF_F_RXHASH)
  525. skb->rxhash = efx_rx_buf_hash(eh);
  526. /* Move past the ethernet header. rx_buf->data still points
  527. * at the ethernet header */
  528. skb->protocol = eth_type_trans(skb, efx->net_dev);
  529. skb_record_rx_queue(skb, channel->rx_queue.core_index);
  530. }
  531. if (unlikely(!(efx->net_dev->features & NETIF_F_RXCSUM)))
  532. rx_buf->flags &= ~EFX_RX_PKT_CSUMMED;
  533. if (likely(rx_buf->flags & (EFX_RX_BUF_PAGE | EFX_RX_PKT_CSUMMED)) &&
  534. !channel->type->receive_skb)
  535. efx_rx_packet_gro(channel, rx_buf, eh);
  536. else
  537. efx_rx_deliver(channel, rx_buf);
  538. }
  539. void efx_rx_strategy(struct efx_channel *channel)
  540. {
  541. enum efx_rx_alloc_method method = rx_alloc_method;
  542. if (channel->type->receive_skb) {
  543. channel->rx_alloc_push_pages = false;
  544. return;
  545. }
  546. /* Only makes sense to use page based allocation if GRO is enabled */
  547. if (!(channel->efx->net_dev->features & NETIF_F_GRO)) {
  548. method = RX_ALLOC_METHOD_SKB;
  549. } else if (method == RX_ALLOC_METHOD_AUTO) {
  550. /* Constrain the rx_alloc_level */
  551. if (channel->rx_alloc_level < 0)
  552. channel->rx_alloc_level = 0;
  553. else if (channel->rx_alloc_level > RX_ALLOC_LEVEL_MAX)
  554. channel->rx_alloc_level = RX_ALLOC_LEVEL_MAX;
  555. /* Decide on the allocation method */
  556. method = ((channel->rx_alloc_level > RX_ALLOC_LEVEL_GRO) ?
  557. RX_ALLOC_METHOD_PAGE : RX_ALLOC_METHOD_SKB);
  558. }
  559. /* Push the option */
  560. channel->rx_alloc_push_pages = (method == RX_ALLOC_METHOD_PAGE);
  561. }
  562. int efx_probe_rx_queue(struct efx_rx_queue *rx_queue)
  563. {
  564. struct efx_nic *efx = rx_queue->efx;
  565. unsigned int entries;
  566. int rc;
  567. /* Create the smallest power-of-two aligned ring */
  568. entries = max(roundup_pow_of_two(efx->rxq_entries), EFX_MIN_DMAQ_SIZE);
  569. EFX_BUG_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE);
  570. rx_queue->ptr_mask = entries - 1;
  571. netif_dbg(efx, probe, efx->net_dev,
  572. "creating RX queue %d size %#x mask %#x\n",
  573. efx_rx_queue_index(rx_queue), efx->rxq_entries,
  574. rx_queue->ptr_mask);
  575. /* Allocate RX buffers */
  576. rx_queue->buffer = kcalloc(entries, sizeof(*rx_queue->buffer),
  577. GFP_KERNEL);
  578. if (!rx_queue->buffer)
  579. return -ENOMEM;
  580. rc = efx_nic_probe_rx(rx_queue);
  581. if (rc) {
  582. kfree(rx_queue->buffer);
  583. rx_queue->buffer = NULL;
  584. }
  585. return rc;
  586. }
  587. void efx_init_rx_queue(struct efx_rx_queue *rx_queue)
  588. {
  589. struct efx_nic *efx = rx_queue->efx;
  590. unsigned int max_fill, trigger, max_trigger;
  591. netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
  592. "initialising RX queue %d\n", efx_rx_queue_index(rx_queue));
  593. /* Initialise ptr fields */
  594. rx_queue->added_count = 0;
  595. rx_queue->notified_count = 0;
  596. rx_queue->removed_count = 0;
  597. rx_queue->min_fill = -1U;
  598. /* Initialise limit fields */
  599. max_fill = efx->rxq_entries - EFX_RXD_HEAD_ROOM;
  600. max_trigger = max_fill - EFX_RX_BATCH;
  601. if (rx_refill_threshold != 0) {
  602. trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
  603. if (trigger > max_trigger)
  604. trigger = max_trigger;
  605. } else {
  606. trigger = max_trigger;
  607. }
  608. rx_queue->max_fill = max_fill;
  609. rx_queue->fast_fill_trigger = trigger;
  610. /* Set up RX descriptor ring */
  611. rx_queue->enabled = true;
  612. efx_nic_init_rx(rx_queue);
  613. }
  614. void efx_fini_rx_queue(struct efx_rx_queue *rx_queue)
  615. {
  616. int i;
  617. struct efx_rx_buffer *rx_buf;
  618. netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
  619. "shutting down RX queue %d\n", efx_rx_queue_index(rx_queue));
  620. /* A flush failure might have left rx_queue->enabled */
  621. rx_queue->enabled = false;
  622. del_timer_sync(&rx_queue->slow_fill);
  623. efx_nic_fini_rx(rx_queue);
  624. /* Release RX buffers NB start at index 0 not current HW ptr */
  625. if (rx_queue->buffer) {
  626. for (i = 0; i <= rx_queue->ptr_mask; i++) {
  627. rx_buf = efx_rx_buffer(rx_queue, i);
  628. efx_fini_rx_buffer(rx_queue, rx_buf);
  629. }
  630. }
  631. }
  632. void efx_remove_rx_queue(struct efx_rx_queue *rx_queue)
  633. {
  634. netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
  635. "destroying RX queue %d\n", efx_rx_queue_index(rx_queue));
  636. efx_nic_remove_rx(rx_queue);
  637. kfree(rx_queue->buffer);
  638. rx_queue->buffer = NULL;
  639. }
  640. module_param(rx_alloc_method, int, 0644);
  641. MODULE_PARM_DESC(rx_alloc_method, "Allocation method used for RX buffers");
  642. module_param(rx_refill_threshold, uint, 0444);
  643. MODULE_PARM_DESC(rx_refill_threshold,
  644. "RX descriptor ring refill threshold (%)");