nic.h 14 KB

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  1. /****************************************************************************
  2. * Driver for Solarflare Solarstorm network controllers and boards
  3. * Copyright 2005-2006 Fen Systems Ltd.
  4. * Copyright 2006-2011 Solarflare Communications Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation, incorporated herein by reference.
  9. */
  10. #ifndef EFX_NIC_H
  11. #define EFX_NIC_H
  12. #include <linux/net_tstamp.h>
  13. #include <linux/i2c-algo-bit.h>
  14. #include "net_driver.h"
  15. #include "efx.h"
  16. #include "mcdi.h"
  17. #include "spi.h"
  18. /*
  19. * Falcon hardware control
  20. */
  21. enum {
  22. EFX_REV_FALCON_A0 = 0,
  23. EFX_REV_FALCON_A1 = 1,
  24. EFX_REV_FALCON_B0 = 2,
  25. EFX_REV_SIENA_A0 = 3,
  26. };
  27. static inline int efx_nic_rev(struct efx_nic *efx)
  28. {
  29. return efx->type->revision;
  30. }
  31. extern u32 efx_nic_fpga_ver(struct efx_nic *efx);
  32. /* NIC has two interlinked PCI functions for the same port. */
  33. static inline bool efx_nic_is_dual_func(struct efx_nic *efx)
  34. {
  35. return efx_nic_rev(efx) < EFX_REV_FALCON_B0;
  36. }
  37. enum {
  38. PHY_TYPE_NONE = 0,
  39. PHY_TYPE_TXC43128 = 1,
  40. PHY_TYPE_88E1111 = 2,
  41. PHY_TYPE_SFX7101 = 3,
  42. PHY_TYPE_QT2022C2 = 4,
  43. PHY_TYPE_PM8358 = 6,
  44. PHY_TYPE_SFT9001A = 8,
  45. PHY_TYPE_QT2025C = 9,
  46. PHY_TYPE_SFT9001B = 10,
  47. };
  48. #define FALCON_XMAC_LOOPBACKS \
  49. ((1 << LOOPBACK_XGMII) | \
  50. (1 << LOOPBACK_XGXS) | \
  51. (1 << LOOPBACK_XAUI))
  52. #define FALCON_GMAC_LOOPBACKS \
  53. (1 << LOOPBACK_GMAC)
  54. /* Alignment of PCIe DMA boundaries (4KB) */
  55. #define EFX_PAGE_SIZE 4096
  56. /* Size and alignment of buffer table entries (same) */
  57. #define EFX_BUF_SIZE EFX_PAGE_SIZE
  58. /**
  59. * struct falcon_board_type - board operations and type information
  60. * @id: Board type id, as found in NVRAM
  61. * @init: Allocate resources and initialise peripheral hardware
  62. * @init_phy: Do board-specific PHY initialisation
  63. * @fini: Shut down hardware and free resources
  64. * @set_id_led: Set state of identifying LED or revert to automatic function
  65. * @monitor: Board-specific health check function
  66. */
  67. struct falcon_board_type {
  68. u8 id;
  69. int (*init) (struct efx_nic *nic);
  70. void (*init_phy) (struct efx_nic *efx);
  71. void (*fini) (struct efx_nic *nic);
  72. void (*set_id_led) (struct efx_nic *efx, enum efx_led_mode mode);
  73. int (*monitor) (struct efx_nic *nic);
  74. };
  75. /**
  76. * struct falcon_board - board information
  77. * @type: Type of board
  78. * @major: Major rev. ('A', 'B' ...)
  79. * @minor: Minor rev. (0, 1, ...)
  80. * @i2c_adap: I2C adapter for on-board peripherals
  81. * @i2c_data: Data for bit-banging algorithm
  82. * @hwmon_client: I2C client for hardware monitor
  83. * @ioexp_client: I2C client for power/port control
  84. */
  85. struct falcon_board {
  86. const struct falcon_board_type *type;
  87. int major;
  88. int minor;
  89. struct i2c_adapter i2c_adap;
  90. struct i2c_algo_bit_data i2c_data;
  91. struct i2c_client *hwmon_client, *ioexp_client;
  92. };
  93. /**
  94. * struct falcon_nic_data - Falcon NIC state
  95. * @pci_dev2: Secondary function of Falcon A
  96. * @board: Board state and functions
  97. * @stats_disable_count: Nest count for disabling statistics fetches
  98. * @stats_pending: Is there a pending DMA of MAC statistics.
  99. * @stats_timer: A timer for regularly fetching MAC statistics.
  100. * @stats_dma_done: Pointer to the flag which indicates DMA completion.
  101. * @spi_flash: SPI flash device
  102. * @spi_eeprom: SPI EEPROM device
  103. * @spi_lock: SPI bus lock
  104. * @mdio_lock: MDIO bus lock
  105. * @xmac_poll_required: XMAC link state needs polling
  106. */
  107. struct falcon_nic_data {
  108. struct pci_dev *pci_dev2;
  109. struct falcon_board board;
  110. unsigned int stats_disable_count;
  111. bool stats_pending;
  112. struct timer_list stats_timer;
  113. u32 *stats_dma_done;
  114. struct efx_spi_device spi_flash;
  115. struct efx_spi_device spi_eeprom;
  116. struct mutex spi_lock;
  117. struct mutex mdio_lock;
  118. bool xmac_poll_required;
  119. };
  120. static inline struct falcon_board *falcon_board(struct efx_nic *efx)
  121. {
  122. struct falcon_nic_data *data = efx->nic_data;
  123. return &data->board;
  124. }
  125. /**
  126. * struct siena_nic_data - Siena NIC state
  127. * @mcdi: Management-Controller-to-Driver Interface
  128. * @wol_filter_id: Wake-on-LAN packet filter id
  129. * @hwmon: Hardware monitor state
  130. */
  131. struct siena_nic_data {
  132. struct efx_mcdi_iface mcdi;
  133. int wol_filter_id;
  134. #ifdef CONFIG_SFC_MCDI_MON
  135. struct efx_mcdi_mon hwmon;
  136. #endif
  137. };
  138. #ifdef CONFIG_SFC_MCDI_MON
  139. static inline struct efx_mcdi_mon *efx_mcdi_mon(struct efx_nic *efx)
  140. {
  141. struct siena_nic_data *nic_data;
  142. EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
  143. nic_data = efx->nic_data;
  144. return &nic_data->hwmon;
  145. }
  146. #endif
  147. /*
  148. * On the SFC9000 family each port is associated with 1 PCI physical
  149. * function (PF) handled by sfc and a configurable number of virtual
  150. * functions (VFs) that may be handled by some other driver, often in
  151. * a VM guest. The queue pointer registers are mapped in both PF and
  152. * VF BARs such that an 8K region provides access to a single RX, TX
  153. * and event queue (collectively a Virtual Interface, VI or VNIC).
  154. *
  155. * The PF has access to all 1024 VIs while VFs are mapped to VIs
  156. * according to VI_BASE and VI_SCALE: VF i has access to VIs numbered
  157. * in range [VI_BASE + i << VI_SCALE, VI_BASE + i + 1 << VI_SCALE).
  158. * The number of VIs and the VI_SCALE value are configurable but must
  159. * be established at boot time by firmware.
  160. */
  161. /* Maximum VI_SCALE parameter supported by Siena */
  162. #define EFX_VI_SCALE_MAX 6
  163. /* Base VI to use for SR-IOV. Must be aligned to (1 << EFX_VI_SCALE_MAX),
  164. * so this is the smallest allowed value. */
  165. #define EFX_VI_BASE 128U
  166. /* Maximum number of VFs allowed */
  167. #define EFX_VF_COUNT_MAX 127
  168. /* Limit EVQs on VFs to be only 8k to reduce buffer table reservation */
  169. #define EFX_MAX_VF_EVQ_SIZE 8192UL
  170. /* The number of buffer table entries reserved for each VI on a VF */
  171. #define EFX_VF_BUFTBL_PER_VI \
  172. ((EFX_MAX_VF_EVQ_SIZE + 2 * EFX_MAX_DMAQ_SIZE) * \
  173. sizeof(efx_qword_t) / EFX_BUF_SIZE)
  174. #ifdef CONFIG_SFC_SRIOV
  175. static inline bool efx_sriov_wanted(struct efx_nic *efx)
  176. {
  177. return efx->vf_count != 0;
  178. }
  179. static inline bool efx_sriov_enabled(struct efx_nic *efx)
  180. {
  181. return efx->vf_init_count != 0;
  182. }
  183. static inline unsigned int efx_vf_size(struct efx_nic *efx)
  184. {
  185. return 1 << efx->vi_scale;
  186. }
  187. extern int efx_init_sriov(void);
  188. extern void efx_sriov_probe(struct efx_nic *efx);
  189. extern int efx_sriov_init(struct efx_nic *efx);
  190. extern void efx_sriov_mac_address_changed(struct efx_nic *efx);
  191. extern void efx_sriov_tx_flush_done(struct efx_nic *efx, efx_qword_t *event);
  192. extern void efx_sriov_rx_flush_done(struct efx_nic *efx, efx_qword_t *event);
  193. extern void efx_sriov_event(struct efx_channel *channel, efx_qword_t *event);
  194. extern void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq);
  195. extern void efx_sriov_flr(struct efx_nic *efx, unsigned flr);
  196. extern void efx_sriov_reset(struct efx_nic *efx);
  197. extern void efx_sriov_fini(struct efx_nic *efx);
  198. extern void efx_fini_sriov(void);
  199. #else
  200. static inline bool efx_sriov_wanted(struct efx_nic *efx) { return false; }
  201. static inline bool efx_sriov_enabled(struct efx_nic *efx) { return false; }
  202. static inline unsigned int efx_vf_size(struct efx_nic *efx) { return 0; }
  203. static inline int efx_init_sriov(void) { return 0; }
  204. static inline void efx_sriov_probe(struct efx_nic *efx) {}
  205. static inline int efx_sriov_init(struct efx_nic *efx) { return -EOPNOTSUPP; }
  206. static inline void efx_sriov_mac_address_changed(struct efx_nic *efx) {}
  207. static inline void efx_sriov_tx_flush_done(struct efx_nic *efx,
  208. efx_qword_t *event) {}
  209. static inline void efx_sriov_rx_flush_done(struct efx_nic *efx,
  210. efx_qword_t *event) {}
  211. static inline void efx_sriov_event(struct efx_channel *channel,
  212. efx_qword_t *event) {}
  213. static inline void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq) {}
  214. static inline void efx_sriov_flr(struct efx_nic *efx, unsigned flr) {}
  215. static inline void efx_sriov_reset(struct efx_nic *efx) {}
  216. static inline void efx_sriov_fini(struct efx_nic *efx) {}
  217. static inline void efx_fini_sriov(void) {}
  218. #endif
  219. extern int efx_sriov_set_vf_mac(struct net_device *dev, int vf, u8 *mac);
  220. extern int efx_sriov_set_vf_vlan(struct net_device *dev, int vf,
  221. u16 vlan, u8 qos);
  222. extern int efx_sriov_get_vf_config(struct net_device *dev, int vf,
  223. struct ifla_vf_info *ivf);
  224. extern int efx_sriov_set_vf_spoofchk(struct net_device *net_dev, int vf,
  225. bool spoofchk);
  226. struct ethtool_ts_info;
  227. extern void efx_ptp_probe(struct efx_nic *efx);
  228. extern int efx_ptp_ioctl(struct efx_nic *efx, struct ifreq *ifr, int cmd);
  229. extern int efx_ptp_get_ts_info(struct net_device *net_dev,
  230. struct ethtool_ts_info *ts_info);
  231. extern bool efx_ptp_is_ptp_tx(struct efx_nic *efx, struct sk_buff *skb);
  232. extern int efx_ptp_tx(struct efx_nic *efx, struct sk_buff *skb);
  233. extern void efx_ptp_event(struct efx_nic *efx, efx_qword_t *ev);
  234. extern const struct efx_nic_type falcon_a1_nic_type;
  235. extern const struct efx_nic_type falcon_b0_nic_type;
  236. extern const struct efx_nic_type siena_a0_nic_type;
  237. /**************************************************************************
  238. *
  239. * Externs
  240. *
  241. **************************************************************************
  242. */
  243. extern int falcon_probe_board(struct efx_nic *efx, u16 revision_info);
  244. /* TX data path */
  245. extern int efx_nic_probe_tx(struct efx_tx_queue *tx_queue);
  246. extern void efx_nic_init_tx(struct efx_tx_queue *tx_queue);
  247. extern void efx_nic_fini_tx(struct efx_tx_queue *tx_queue);
  248. extern void efx_nic_remove_tx(struct efx_tx_queue *tx_queue);
  249. extern void efx_nic_push_buffers(struct efx_tx_queue *tx_queue);
  250. /* RX data path */
  251. extern int efx_nic_probe_rx(struct efx_rx_queue *rx_queue);
  252. extern void efx_nic_init_rx(struct efx_rx_queue *rx_queue);
  253. extern void efx_nic_fini_rx(struct efx_rx_queue *rx_queue);
  254. extern void efx_nic_remove_rx(struct efx_rx_queue *rx_queue);
  255. extern void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue);
  256. extern void efx_nic_generate_fill_event(struct efx_rx_queue *rx_queue);
  257. /* Event data path */
  258. extern int efx_nic_probe_eventq(struct efx_channel *channel);
  259. extern void efx_nic_init_eventq(struct efx_channel *channel);
  260. extern void efx_nic_fini_eventq(struct efx_channel *channel);
  261. extern void efx_nic_remove_eventq(struct efx_channel *channel);
  262. extern int efx_nic_process_eventq(struct efx_channel *channel, int rx_quota);
  263. extern void efx_nic_eventq_read_ack(struct efx_channel *channel);
  264. extern bool efx_nic_event_present(struct efx_channel *channel);
  265. /* MAC/PHY */
  266. extern void falcon_drain_tx_fifo(struct efx_nic *efx);
  267. extern void falcon_reconfigure_mac_wrapper(struct efx_nic *efx);
  268. extern bool falcon_xmac_check_fault(struct efx_nic *efx);
  269. extern int falcon_reconfigure_xmac(struct efx_nic *efx);
  270. extern void falcon_update_stats_xmac(struct efx_nic *efx);
  271. /* Some statistics are computed as A - B where A and B each increase
  272. * linearly with some hardware counter(s) and the counters are read
  273. * asynchronously. If the counters contributing to B are always read
  274. * after those contributing to A, the computed value may be lower than
  275. * the true value by some variable amount, and may decrease between
  276. * subsequent computations.
  277. *
  278. * We should never allow statistics to decrease or to exceed the true
  279. * value. Since the computed value will never be greater than the
  280. * true value, we can achieve this by only storing the computed value
  281. * when it increases.
  282. */
  283. static inline void efx_update_diff_stat(u64 *stat, u64 diff)
  284. {
  285. if ((s64)(diff - *stat) > 0)
  286. *stat = diff;
  287. }
  288. /* Interrupts and test events */
  289. extern int efx_nic_init_interrupt(struct efx_nic *efx);
  290. extern void efx_nic_enable_interrupts(struct efx_nic *efx);
  291. extern void efx_nic_event_test_start(struct efx_channel *channel);
  292. extern void efx_nic_irq_test_start(struct efx_nic *efx);
  293. extern void efx_nic_disable_interrupts(struct efx_nic *efx);
  294. extern void efx_nic_fini_interrupt(struct efx_nic *efx);
  295. extern irqreturn_t efx_nic_fatal_interrupt(struct efx_nic *efx);
  296. extern irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id);
  297. extern void falcon_irq_ack_a1(struct efx_nic *efx);
  298. static inline int efx_nic_event_test_irq_cpu(struct efx_channel *channel)
  299. {
  300. return ACCESS_ONCE(channel->event_test_cpu);
  301. }
  302. static inline int efx_nic_irq_test_irq_cpu(struct efx_nic *efx)
  303. {
  304. return ACCESS_ONCE(efx->last_irq_cpu);
  305. }
  306. /* Global Resources */
  307. extern int efx_nic_flush_queues(struct efx_nic *efx);
  308. extern void siena_prepare_flush(struct efx_nic *efx);
  309. extern void siena_finish_flush(struct efx_nic *efx);
  310. extern void falcon_start_nic_stats(struct efx_nic *efx);
  311. extern void falcon_stop_nic_stats(struct efx_nic *efx);
  312. extern void falcon_setup_xaui(struct efx_nic *efx);
  313. extern int falcon_reset_xaui(struct efx_nic *efx);
  314. extern void
  315. efx_nic_dimension_resources(struct efx_nic *efx, unsigned sram_lim_qw);
  316. extern void efx_nic_init_common(struct efx_nic *efx);
  317. extern void efx_nic_push_rx_indir_table(struct efx_nic *efx);
  318. int efx_nic_alloc_buffer(struct efx_nic *efx, struct efx_buffer *buffer,
  319. unsigned int len);
  320. void efx_nic_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer);
  321. /* Tests */
  322. struct efx_nic_register_test {
  323. unsigned address;
  324. efx_oword_t mask;
  325. };
  326. extern int efx_nic_test_registers(struct efx_nic *efx,
  327. const struct efx_nic_register_test *regs,
  328. size_t n_regs);
  329. extern size_t efx_nic_get_regs_len(struct efx_nic *efx);
  330. extern void efx_nic_get_regs(struct efx_nic *efx, void *buf);
  331. /**************************************************************************
  332. *
  333. * Falcon MAC stats
  334. *
  335. **************************************************************************
  336. */
  337. #define FALCON_STAT_OFFSET(falcon_stat) EFX_VAL(falcon_stat, offset)
  338. #define FALCON_STAT_WIDTH(falcon_stat) EFX_VAL(falcon_stat, WIDTH)
  339. /* Retrieve statistic from statistics block */
  340. #define FALCON_STAT(efx, falcon_stat, efx_stat) do { \
  341. if (FALCON_STAT_WIDTH(falcon_stat) == 16) \
  342. (efx)->mac_stats.efx_stat += le16_to_cpu( \
  343. *((__force __le16 *) \
  344. (efx->stats_buffer.addr + \
  345. FALCON_STAT_OFFSET(falcon_stat)))); \
  346. else if (FALCON_STAT_WIDTH(falcon_stat) == 32) \
  347. (efx)->mac_stats.efx_stat += le32_to_cpu( \
  348. *((__force __le32 *) \
  349. (efx->stats_buffer.addr + \
  350. FALCON_STAT_OFFSET(falcon_stat)))); \
  351. else \
  352. (efx)->mac_stats.efx_stat += le64_to_cpu( \
  353. *((__force __le64 *) \
  354. (efx->stats_buffer.addr + \
  355. FALCON_STAT_OFFSET(falcon_stat)))); \
  356. } while (0)
  357. #define FALCON_MAC_STATS_SIZE 0x100
  358. #define MAC_DATA_LBN 0
  359. #define MAC_DATA_WIDTH 32
  360. extern void efx_generate_event(struct efx_nic *efx, unsigned int evq,
  361. efx_qword_t *event);
  362. extern void falcon_poll_xmac(struct efx_nic *efx);
  363. #endif /* EFX_NIC_H */