qlcnic_ethtool.c 42 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539
  1. /*
  2. * QLogic qlcnic NIC Driver
  3. * Copyright (c) 2009-2013 QLogic Corporation
  4. *
  5. * See LICENSE.qlcnic for copyright and licensing details.
  6. */
  7. #include <linux/types.h>
  8. #include <linux/delay.h>
  9. #include <linux/pci.h>
  10. #include <linux/io.h>
  11. #include <linux/netdevice.h>
  12. #include <linux/ethtool.h>
  13. #include "qlcnic.h"
  14. struct qlcnic_stats {
  15. char stat_string[ETH_GSTRING_LEN];
  16. int sizeof_stat;
  17. int stat_offset;
  18. };
  19. #define QLC_SIZEOF(m) FIELD_SIZEOF(struct qlcnic_adapter, m)
  20. #define QLC_OFF(m) offsetof(struct qlcnic_adapter, m)
  21. static const u32 qlcnic_fw_dump_level[] = {
  22. 0x3, 0x7, 0xf, 0x1f, 0x3f, 0x7f, 0xff
  23. };
  24. static const struct qlcnic_stats qlcnic_gstrings_stats[] = {
  25. {"xmit_called", QLC_SIZEOF(stats.xmitcalled),
  26. QLC_OFF(stats.xmitcalled)},
  27. {"xmit_finished", QLC_SIZEOF(stats.xmitfinished),
  28. QLC_OFF(stats.xmitfinished)},
  29. {"rx_dropped", QLC_SIZEOF(stats.rxdropped), QLC_OFF(stats.rxdropped)},
  30. {"tx_dropped", QLC_SIZEOF(stats.txdropped), QLC_OFF(stats.txdropped)},
  31. {"csummed", QLC_SIZEOF(stats.csummed), QLC_OFF(stats.csummed)},
  32. {"rx_pkts", QLC_SIZEOF(stats.rx_pkts), QLC_OFF(stats.rx_pkts)},
  33. {"lro_pkts", QLC_SIZEOF(stats.lro_pkts), QLC_OFF(stats.lro_pkts)},
  34. {"rx_bytes", QLC_SIZEOF(stats.rxbytes), QLC_OFF(stats.rxbytes)},
  35. {"tx_bytes", QLC_SIZEOF(stats.txbytes), QLC_OFF(stats.txbytes)},
  36. {"lrobytes", QLC_SIZEOF(stats.lrobytes), QLC_OFF(stats.lrobytes)},
  37. {"lso_frames", QLC_SIZEOF(stats.lso_frames), QLC_OFF(stats.lso_frames)},
  38. {"xmit_on", QLC_SIZEOF(stats.xmit_on), QLC_OFF(stats.xmit_on)},
  39. {"xmit_off", QLC_SIZEOF(stats.xmit_off), QLC_OFF(stats.xmit_off)},
  40. {"skb_alloc_failure", QLC_SIZEOF(stats.skb_alloc_failure),
  41. QLC_OFF(stats.skb_alloc_failure)},
  42. {"null rxbuf", QLC_SIZEOF(stats.null_rxbuf), QLC_OFF(stats.null_rxbuf)},
  43. {"rx dma map error", QLC_SIZEOF(stats.rx_dma_map_error),
  44. QLC_OFF(stats.rx_dma_map_error)},
  45. {"tx dma map error", QLC_SIZEOF(stats.tx_dma_map_error),
  46. QLC_OFF(stats.tx_dma_map_error)},
  47. {"mac_filter_limit_overrun", QLC_SIZEOF(stats.mac_filter_limit_overrun),
  48. QLC_OFF(stats.mac_filter_limit_overrun)},
  49. {"spurious intr", QLC_SIZEOF(stats.spurious_intr),
  50. QLC_OFF(stats.spurious_intr)},
  51. };
  52. static const char qlcnic_device_gstrings_stats[][ETH_GSTRING_LEN] = {
  53. "rx unicast frames",
  54. "rx multicast frames",
  55. "rx broadcast frames",
  56. "rx dropped frames",
  57. "rx errors",
  58. "rx local frames",
  59. "rx numbytes",
  60. "tx unicast frames",
  61. "tx multicast frames",
  62. "tx broadcast frames",
  63. "tx dropped frames",
  64. "tx errors",
  65. "tx local frames",
  66. "tx numbytes",
  67. };
  68. static const char qlcnic_83xx_tx_stats_strings[][ETH_GSTRING_LEN] = {
  69. "ctx_tx_bytes",
  70. "ctx_tx_pkts",
  71. "ctx_tx_errors",
  72. "ctx_tx_dropped_pkts",
  73. "ctx_tx_num_buffers",
  74. };
  75. static const char qlcnic_83xx_mac_stats_strings[][ETH_GSTRING_LEN] = {
  76. "mac_tx_frames",
  77. "mac_tx_bytes",
  78. "mac_tx_mcast_pkts",
  79. "mac_tx_bcast_pkts",
  80. "mac_tx_pause_cnt",
  81. "mac_tx_ctrl_pkt",
  82. "mac_tx_lt_64b_pkts",
  83. "mac_tx_lt_127b_pkts",
  84. "mac_tx_lt_255b_pkts",
  85. "mac_tx_lt_511b_pkts",
  86. "mac_tx_lt_1023b_pkts",
  87. "mac_tx_lt_1518b_pkts",
  88. "mac_tx_gt_1518b_pkts",
  89. "mac_rx_frames",
  90. "mac_rx_bytes",
  91. "mac_rx_mcast_pkts",
  92. "mac_rx_bcast_pkts",
  93. "mac_rx_pause_cnt",
  94. "mac_rx_ctrl_pkt",
  95. "mac_rx_lt_64b_pkts",
  96. "mac_rx_lt_127b_pkts",
  97. "mac_rx_lt_255b_pkts",
  98. "mac_rx_lt_511b_pkts",
  99. "mac_rx_lt_1023b_pkts",
  100. "mac_rx_lt_1518b_pkts",
  101. "mac_rx_gt_1518b_pkts",
  102. "mac_rx_length_error",
  103. "mac_rx_length_small",
  104. "mac_rx_length_large",
  105. "mac_rx_jabber",
  106. "mac_rx_dropped",
  107. "mac_crc_error",
  108. "mac_align_error",
  109. };
  110. #define QLCNIC_STATS_LEN ARRAY_SIZE(qlcnic_gstrings_stats)
  111. static const char qlcnic_83xx_rx_stats_strings[][ETH_GSTRING_LEN] = {
  112. "ctx_rx_bytes",
  113. "ctx_rx_pkts",
  114. "ctx_lro_pkt_cnt",
  115. "ctx_ip_csum_error",
  116. "ctx_rx_pkts_wo_ctx",
  117. "ctx_rx_pkts_dropped_wo_sts",
  118. "ctx_rx_osized_pkts",
  119. "ctx_rx_pkts_dropped_wo_rds",
  120. "ctx_rx_unexpected_mcast_pkts",
  121. "ctx_invalid_mac_address",
  122. "ctx_rx_rds_ring_prim_attemoted",
  123. "ctx_rx_rds_ring_prim_success",
  124. "ctx_num_lro_flows_added",
  125. "ctx_num_lro_flows_removed",
  126. "ctx_num_lro_flows_active",
  127. "ctx_pkts_dropped_unknown",
  128. };
  129. static const char qlcnic_gstrings_test[][ETH_GSTRING_LEN] = {
  130. "Register_Test_on_offline",
  131. "Link_Test_on_offline",
  132. "Interrupt_Test_offline",
  133. "Internal_Loopback_offline",
  134. "EEPROM_Test_offline"
  135. };
  136. #define QLCNIC_TEST_LEN ARRAY_SIZE(qlcnic_gstrings_test)
  137. static inline int qlcnic_82xx_statistics(void)
  138. {
  139. return QLCNIC_STATS_LEN + ARRAY_SIZE(qlcnic_83xx_mac_stats_strings);
  140. }
  141. static inline int qlcnic_83xx_statistics(void)
  142. {
  143. return ARRAY_SIZE(qlcnic_83xx_tx_stats_strings) +
  144. ARRAY_SIZE(qlcnic_83xx_mac_stats_strings) +
  145. ARRAY_SIZE(qlcnic_83xx_rx_stats_strings);
  146. }
  147. static int qlcnic_dev_statistics_len(struct qlcnic_adapter *adapter)
  148. {
  149. if (qlcnic_82xx_check(adapter))
  150. return qlcnic_82xx_statistics();
  151. else if (qlcnic_83xx_check(adapter))
  152. return qlcnic_83xx_statistics();
  153. else
  154. return -1;
  155. }
  156. #define QLCNIC_RING_REGS_COUNT 20
  157. #define QLCNIC_RING_REGS_LEN (QLCNIC_RING_REGS_COUNT * sizeof(u32))
  158. #define QLCNIC_MAX_EEPROM_LEN 1024
  159. static const u32 diag_registers[] = {
  160. QLCNIC_CMDPEG_STATE,
  161. QLCNIC_RCVPEG_STATE,
  162. QLCNIC_FW_CAPABILITIES,
  163. QLCNIC_CRB_DRV_ACTIVE,
  164. QLCNIC_CRB_DEV_STATE,
  165. QLCNIC_CRB_DRV_STATE,
  166. QLCNIC_CRB_DRV_SCRATCH,
  167. QLCNIC_CRB_DEV_PARTITION_INFO,
  168. QLCNIC_CRB_DRV_IDC_VER,
  169. QLCNIC_PEG_ALIVE_COUNTER,
  170. QLCNIC_PEG_HALT_STATUS1,
  171. QLCNIC_PEG_HALT_STATUS2,
  172. -1
  173. };
  174. static const u32 ext_diag_registers[] = {
  175. CRB_XG_STATE_P3P,
  176. ISR_INT_STATE_REG,
  177. QLCNIC_CRB_PEG_NET_0+0x3c,
  178. QLCNIC_CRB_PEG_NET_1+0x3c,
  179. QLCNIC_CRB_PEG_NET_2+0x3c,
  180. QLCNIC_CRB_PEG_NET_4+0x3c,
  181. -1
  182. };
  183. #define QLCNIC_MGMT_API_VERSION 2
  184. #define QLCNIC_ETHTOOL_REGS_VER 3
  185. static int qlcnic_get_regs_len(struct net_device *dev)
  186. {
  187. struct qlcnic_adapter *adapter = netdev_priv(dev);
  188. u32 len;
  189. if (qlcnic_83xx_check(adapter))
  190. len = qlcnic_83xx_get_regs_len(adapter);
  191. else
  192. len = sizeof(ext_diag_registers) + sizeof(diag_registers);
  193. return QLCNIC_RING_REGS_LEN + len + QLCNIC_DEV_INFO_SIZE + 1;
  194. }
  195. static int qlcnic_get_eeprom_len(struct net_device *dev)
  196. {
  197. return QLCNIC_FLASH_TOTAL_SIZE;
  198. }
  199. static void
  200. qlcnic_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
  201. {
  202. struct qlcnic_adapter *adapter = netdev_priv(dev);
  203. u32 fw_major, fw_minor, fw_build;
  204. fw_major = QLC_SHARED_REG_RD32(adapter, QLCNIC_FW_VERSION_MAJOR);
  205. fw_minor = QLC_SHARED_REG_RD32(adapter, QLCNIC_FW_VERSION_MINOR);
  206. fw_build = QLC_SHARED_REG_RD32(adapter, QLCNIC_FW_VERSION_SUB);
  207. snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
  208. "%d.%d.%d", fw_major, fw_minor, fw_build);
  209. strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
  210. sizeof(drvinfo->bus_info));
  211. strlcpy(drvinfo->driver, qlcnic_driver_name, sizeof(drvinfo->driver));
  212. strlcpy(drvinfo->version, QLCNIC_LINUX_VERSIONID,
  213. sizeof(drvinfo->version));
  214. }
  215. static int
  216. qlcnic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
  217. {
  218. struct qlcnic_adapter *adapter = netdev_priv(dev);
  219. struct qlcnic_hardware_context *ahw = adapter->ahw;
  220. u32 speed, reg;
  221. int check_sfp_module = 0;
  222. u16 pcifn = ahw->pci_func;
  223. /* read which mode */
  224. if (adapter->ahw->port_type == QLCNIC_GBE) {
  225. ecmd->supported = (SUPPORTED_10baseT_Half |
  226. SUPPORTED_10baseT_Full |
  227. SUPPORTED_100baseT_Half |
  228. SUPPORTED_100baseT_Full |
  229. SUPPORTED_1000baseT_Half |
  230. SUPPORTED_1000baseT_Full);
  231. ecmd->advertising = (ADVERTISED_100baseT_Half |
  232. ADVERTISED_100baseT_Full |
  233. ADVERTISED_1000baseT_Half |
  234. ADVERTISED_1000baseT_Full);
  235. ethtool_cmd_speed_set(ecmd, adapter->ahw->link_speed);
  236. ecmd->duplex = adapter->ahw->link_duplex;
  237. ecmd->autoneg = adapter->ahw->link_autoneg;
  238. } else if (adapter->ahw->port_type == QLCNIC_XGBE) {
  239. u32 val = 0;
  240. if (qlcnic_83xx_check(adapter))
  241. qlcnic_83xx_get_settings(adapter);
  242. else
  243. val = QLCRD32(adapter, QLCNIC_PORT_MODE_ADDR);
  244. if (val == QLCNIC_PORT_MODE_802_3_AP) {
  245. ecmd->supported = SUPPORTED_1000baseT_Full;
  246. ecmd->advertising = ADVERTISED_1000baseT_Full;
  247. } else {
  248. ecmd->supported = SUPPORTED_10000baseT_Full;
  249. ecmd->advertising = ADVERTISED_10000baseT_Full;
  250. }
  251. if (netif_running(dev) && adapter->ahw->has_link_events) {
  252. if (qlcnic_82xx_check(adapter)) {
  253. reg = QLCRD32(adapter,
  254. P3P_LINK_SPEED_REG(pcifn));
  255. speed = P3P_LINK_SPEED_VAL(pcifn, reg);
  256. ahw->link_speed = speed * P3P_LINK_SPEED_MHZ;
  257. }
  258. ethtool_cmd_speed_set(ecmd, adapter->ahw->link_speed);
  259. ecmd->autoneg = adapter->ahw->link_autoneg;
  260. ecmd->duplex = adapter->ahw->link_duplex;
  261. goto skip;
  262. }
  263. ethtool_cmd_speed_set(ecmd, SPEED_UNKNOWN);
  264. ecmd->duplex = DUPLEX_UNKNOWN;
  265. ecmd->autoneg = AUTONEG_DISABLE;
  266. } else
  267. return -EIO;
  268. skip:
  269. ecmd->phy_address = adapter->ahw->physical_port;
  270. ecmd->transceiver = XCVR_EXTERNAL;
  271. switch (adapter->ahw->board_type) {
  272. case QLCNIC_BRDTYPE_P3P_REF_QG:
  273. case QLCNIC_BRDTYPE_P3P_4_GB:
  274. case QLCNIC_BRDTYPE_P3P_4_GB_MM:
  275. ecmd->supported |= SUPPORTED_Autoneg;
  276. ecmd->advertising |= ADVERTISED_Autoneg;
  277. case QLCNIC_BRDTYPE_P3P_10G_CX4:
  278. case QLCNIC_BRDTYPE_P3P_10G_CX4_LP:
  279. case QLCNIC_BRDTYPE_P3P_10000_BASE_T:
  280. ecmd->supported |= SUPPORTED_TP;
  281. ecmd->advertising |= ADVERTISED_TP;
  282. ecmd->port = PORT_TP;
  283. ecmd->autoneg = adapter->ahw->link_autoneg;
  284. break;
  285. case QLCNIC_BRDTYPE_P3P_IMEZ:
  286. case QLCNIC_BRDTYPE_P3P_XG_LOM:
  287. case QLCNIC_BRDTYPE_P3P_HMEZ:
  288. ecmd->supported |= SUPPORTED_MII;
  289. ecmd->advertising |= ADVERTISED_MII;
  290. ecmd->port = PORT_MII;
  291. ecmd->autoneg = AUTONEG_DISABLE;
  292. break;
  293. case QLCNIC_BRDTYPE_P3P_10G_SFP_PLUS:
  294. case QLCNIC_BRDTYPE_P3P_10G_SFP_CT:
  295. case QLCNIC_BRDTYPE_P3P_10G_SFP_QT:
  296. ecmd->advertising |= ADVERTISED_TP;
  297. ecmd->supported |= SUPPORTED_TP;
  298. check_sfp_module = netif_running(dev) &&
  299. adapter->ahw->has_link_events;
  300. case QLCNIC_BRDTYPE_P3P_10G_XFP:
  301. ecmd->supported |= SUPPORTED_FIBRE;
  302. ecmd->advertising |= ADVERTISED_FIBRE;
  303. ecmd->port = PORT_FIBRE;
  304. ecmd->autoneg = AUTONEG_DISABLE;
  305. break;
  306. case QLCNIC_BRDTYPE_P3P_10G_TP:
  307. if (adapter->ahw->port_type == QLCNIC_XGBE) {
  308. ecmd->autoneg = AUTONEG_DISABLE;
  309. ecmd->supported |= (SUPPORTED_FIBRE | SUPPORTED_TP);
  310. ecmd->advertising |=
  311. (ADVERTISED_FIBRE | ADVERTISED_TP);
  312. ecmd->port = PORT_FIBRE;
  313. check_sfp_module = netif_running(dev) &&
  314. adapter->ahw->has_link_events;
  315. } else {
  316. ecmd->autoneg = AUTONEG_ENABLE;
  317. ecmd->supported |= (SUPPORTED_TP | SUPPORTED_Autoneg);
  318. ecmd->advertising |=
  319. (ADVERTISED_TP | ADVERTISED_Autoneg);
  320. ecmd->port = PORT_TP;
  321. }
  322. break;
  323. case QLCNIC_BRDTYPE_83XX_10G:
  324. ecmd->autoneg = AUTONEG_DISABLE;
  325. ecmd->supported |= (SUPPORTED_FIBRE | SUPPORTED_TP);
  326. ecmd->advertising |= (ADVERTISED_FIBRE | ADVERTISED_TP);
  327. ecmd->port = PORT_FIBRE;
  328. check_sfp_module = netif_running(dev) && ahw->has_link_events;
  329. break;
  330. default:
  331. dev_err(&adapter->pdev->dev, "Unsupported board model %d\n",
  332. adapter->ahw->board_type);
  333. return -EIO;
  334. }
  335. if (check_sfp_module) {
  336. switch (adapter->ahw->module_type) {
  337. case LINKEVENT_MODULE_OPTICAL_UNKNOWN:
  338. case LINKEVENT_MODULE_OPTICAL_SRLR:
  339. case LINKEVENT_MODULE_OPTICAL_LRM:
  340. case LINKEVENT_MODULE_OPTICAL_SFP_1G:
  341. ecmd->port = PORT_FIBRE;
  342. break;
  343. case LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE:
  344. case LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN:
  345. case LINKEVENT_MODULE_TWINAX:
  346. ecmd->port = PORT_TP;
  347. break;
  348. default:
  349. ecmd->port = PORT_OTHER;
  350. }
  351. }
  352. return 0;
  353. }
  354. static int qlcnic_set_port_config(struct qlcnic_adapter *adapter,
  355. struct ethtool_cmd *ecmd)
  356. {
  357. u32 ret = 0, config = 0;
  358. /* read which mode */
  359. if (ecmd->duplex)
  360. config |= 0x1;
  361. if (ecmd->autoneg)
  362. config |= 0x2;
  363. switch (ethtool_cmd_speed(ecmd)) {
  364. case SPEED_10:
  365. config |= (0 << 8);
  366. break;
  367. case SPEED_100:
  368. config |= (1 << 8);
  369. break;
  370. case SPEED_1000:
  371. config |= (10 << 8);
  372. break;
  373. default:
  374. return -EIO;
  375. }
  376. ret = qlcnic_fw_cmd_set_port(adapter, config);
  377. if (ret == QLCNIC_RCODE_NOT_SUPPORTED)
  378. return -EOPNOTSUPP;
  379. else if (ret)
  380. return -EIO;
  381. return ret;
  382. }
  383. static int qlcnic_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
  384. {
  385. u32 ret = 0;
  386. struct qlcnic_adapter *adapter = netdev_priv(dev);
  387. if (adapter->ahw->port_type != QLCNIC_GBE)
  388. return -EOPNOTSUPP;
  389. if (qlcnic_83xx_check(adapter))
  390. ret = qlcnic_83xx_set_settings(adapter, ecmd);
  391. else
  392. ret = qlcnic_set_port_config(adapter, ecmd);
  393. if (!ret)
  394. return ret;
  395. adapter->ahw->link_speed = ethtool_cmd_speed(ecmd);
  396. adapter->ahw->link_duplex = ecmd->duplex;
  397. adapter->ahw->link_autoneg = ecmd->autoneg;
  398. if (!netif_running(dev))
  399. return 0;
  400. dev->netdev_ops->ndo_stop(dev);
  401. return dev->netdev_ops->ndo_open(dev);
  402. }
  403. static int qlcnic_82xx_get_registers(struct qlcnic_adapter *adapter,
  404. u32 *regs_buff)
  405. {
  406. int i, j = 0;
  407. for (i = QLCNIC_DEV_INFO_SIZE + 1; diag_registers[j] != -1; j++, i++)
  408. regs_buff[i] = QLC_SHARED_REG_RD32(adapter, diag_registers[j]);
  409. j = 0;
  410. while (ext_diag_registers[j] != -1)
  411. regs_buff[i++] = QLCRD32(adapter, ext_diag_registers[j++]);
  412. return i;
  413. }
  414. static void
  415. qlcnic_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *p)
  416. {
  417. struct qlcnic_adapter *adapter = netdev_priv(dev);
  418. struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
  419. struct qlcnic_host_sds_ring *sds_ring;
  420. u32 *regs_buff = p;
  421. int ring, i = 0;
  422. memset(p, 0, qlcnic_get_regs_len(dev));
  423. regs->version = (QLCNIC_ETHTOOL_REGS_VER << 24) |
  424. (adapter->ahw->revision_id << 16) | (adapter->pdev)->device;
  425. regs_buff[0] = (0xcafe0000 | (QLCNIC_DEV_INFO_SIZE & 0xffff));
  426. regs_buff[1] = QLCNIC_MGMT_API_VERSION;
  427. if (qlcnic_82xx_check(adapter))
  428. i = qlcnic_82xx_get_registers(adapter, regs_buff);
  429. else
  430. i = qlcnic_83xx_get_registers(adapter, regs_buff);
  431. if (!test_bit(__QLCNIC_DEV_UP, &adapter->state))
  432. return;
  433. regs_buff[i++] = 0xFFEFCDAB; /* Marker btw regs and ring count*/
  434. regs_buff[i++] = 1; /* No. of tx ring */
  435. regs_buff[i++] = le32_to_cpu(*(adapter->tx_ring->hw_consumer));
  436. regs_buff[i++] = readl(adapter->tx_ring->crb_cmd_producer);
  437. regs_buff[i++] = 2; /* No. of rx ring */
  438. regs_buff[i++] = readl(recv_ctx->rds_rings[0].crb_rcv_producer);
  439. regs_buff[i++] = readl(recv_ctx->rds_rings[1].crb_rcv_producer);
  440. regs_buff[i++] = adapter->max_sds_rings;
  441. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  442. sds_ring = &(recv_ctx->sds_rings[ring]);
  443. regs_buff[i++] = readl(sds_ring->crb_sts_consumer);
  444. }
  445. }
  446. static u32 qlcnic_test_link(struct net_device *dev)
  447. {
  448. struct qlcnic_adapter *adapter = netdev_priv(dev);
  449. u32 val;
  450. if (qlcnic_83xx_check(adapter)) {
  451. val = qlcnic_83xx_test_link(adapter);
  452. return (val & 1) ? 0 : 1;
  453. }
  454. val = QLCRD32(adapter, CRB_XG_STATE_P3P);
  455. val = XG_LINK_STATE_P3P(adapter->ahw->pci_func, val);
  456. return (val == XG_LINK_UP_P3P) ? 0 : 1;
  457. }
  458. static int
  459. qlcnic_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
  460. u8 *bytes)
  461. {
  462. struct qlcnic_adapter *adapter = netdev_priv(dev);
  463. int offset;
  464. int ret = -1;
  465. if (qlcnic_83xx_check(adapter))
  466. return 0;
  467. if (eeprom->len == 0)
  468. return -EINVAL;
  469. eeprom->magic = (adapter->pdev)->vendor |
  470. ((adapter->pdev)->device << 16);
  471. offset = eeprom->offset;
  472. if (qlcnic_82xx_check(adapter))
  473. ret = qlcnic_rom_fast_read_words(adapter, offset, bytes,
  474. eeprom->len);
  475. if (ret < 0)
  476. return ret;
  477. return 0;
  478. }
  479. static void
  480. qlcnic_get_ringparam(struct net_device *dev,
  481. struct ethtool_ringparam *ring)
  482. {
  483. struct qlcnic_adapter *adapter = netdev_priv(dev);
  484. ring->rx_pending = adapter->num_rxd;
  485. ring->rx_jumbo_pending = adapter->num_jumbo_rxd;
  486. ring->tx_pending = adapter->num_txd;
  487. ring->rx_max_pending = adapter->max_rxd;
  488. ring->rx_jumbo_max_pending = adapter->max_jumbo_rxd;
  489. ring->tx_max_pending = MAX_CMD_DESCRIPTORS;
  490. }
  491. static u32
  492. qlcnic_validate_ringparam(u32 val, u32 min, u32 max, char *r_name)
  493. {
  494. u32 num_desc;
  495. num_desc = max(val, min);
  496. num_desc = min(num_desc, max);
  497. num_desc = roundup_pow_of_two(num_desc);
  498. if (val != num_desc) {
  499. printk(KERN_INFO "%s: setting %s ring size %d instead of %d\n",
  500. qlcnic_driver_name, r_name, num_desc, val);
  501. }
  502. return num_desc;
  503. }
  504. static int
  505. qlcnic_set_ringparam(struct net_device *dev,
  506. struct ethtool_ringparam *ring)
  507. {
  508. struct qlcnic_adapter *adapter = netdev_priv(dev);
  509. u16 num_rxd, num_jumbo_rxd, num_txd;
  510. if (ring->rx_mini_pending)
  511. return -EOPNOTSUPP;
  512. num_rxd = qlcnic_validate_ringparam(ring->rx_pending,
  513. MIN_RCV_DESCRIPTORS, adapter->max_rxd, "rx");
  514. num_jumbo_rxd = qlcnic_validate_ringparam(ring->rx_jumbo_pending,
  515. MIN_JUMBO_DESCRIPTORS, adapter->max_jumbo_rxd,
  516. "rx jumbo");
  517. num_txd = qlcnic_validate_ringparam(ring->tx_pending,
  518. MIN_CMD_DESCRIPTORS, MAX_CMD_DESCRIPTORS, "tx");
  519. if (num_rxd == adapter->num_rxd && num_txd == adapter->num_txd &&
  520. num_jumbo_rxd == adapter->num_jumbo_rxd)
  521. return 0;
  522. adapter->num_rxd = num_rxd;
  523. adapter->num_jumbo_rxd = num_jumbo_rxd;
  524. adapter->num_txd = num_txd;
  525. return qlcnic_reset_context(adapter);
  526. }
  527. static void qlcnic_get_channels(struct net_device *dev,
  528. struct ethtool_channels *channel)
  529. {
  530. int min;
  531. struct qlcnic_adapter *adapter = netdev_priv(dev);
  532. min = min_t(int, adapter->ahw->max_rx_ques, num_online_cpus());
  533. channel->max_rx = rounddown_pow_of_two(min);
  534. channel->max_tx = adapter->ahw->max_tx_ques;
  535. channel->rx_count = adapter->max_sds_rings;
  536. channel->tx_count = adapter->ahw->max_tx_ques;
  537. }
  538. static int qlcnic_set_channels(struct net_device *dev,
  539. struct ethtool_channels *channel)
  540. {
  541. struct qlcnic_adapter *adapter = netdev_priv(dev);
  542. int err;
  543. if (channel->other_count || channel->combined_count ||
  544. channel->tx_count != channel->max_tx)
  545. return -EINVAL;
  546. err = qlcnic_validate_max_rss(channel->max_rx, channel->rx_count);
  547. if (err)
  548. return err;
  549. err = qlcnic_set_max_rss(adapter, channel->rx_count, 0);
  550. netdev_info(dev, "allocated 0x%x sds rings\n",
  551. adapter->max_sds_rings);
  552. return err;
  553. }
  554. static void
  555. qlcnic_get_pauseparam(struct net_device *netdev,
  556. struct ethtool_pauseparam *pause)
  557. {
  558. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  559. int port = adapter->ahw->physical_port;
  560. __u32 val;
  561. if (qlcnic_83xx_check(adapter)) {
  562. qlcnic_83xx_get_pauseparam(adapter, pause);
  563. return;
  564. }
  565. if (adapter->ahw->port_type == QLCNIC_GBE) {
  566. if ((port < 0) || (port > QLCNIC_NIU_MAX_GBE_PORTS))
  567. return;
  568. /* get flow control settings */
  569. val = QLCRD32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port));
  570. pause->rx_pause = qlcnic_gb_get_rx_flowctl(val);
  571. val = QLCRD32(adapter, QLCNIC_NIU_GB_PAUSE_CTL);
  572. switch (port) {
  573. case 0:
  574. pause->tx_pause = !(qlcnic_gb_get_gb0_mask(val));
  575. break;
  576. case 1:
  577. pause->tx_pause = !(qlcnic_gb_get_gb1_mask(val));
  578. break;
  579. case 2:
  580. pause->tx_pause = !(qlcnic_gb_get_gb2_mask(val));
  581. break;
  582. case 3:
  583. default:
  584. pause->tx_pause = !(qlcnic_gb_get_gb3_mask(val));
  585. break;
  586. }
  587. } else if (adapter->ahw->port_type == QLCNIC_XGBE) {
  588. if ((port < 0) || (port > QLCNIC_NIU_MAX_XG_PORTS))
  589. return;
  590. pause->rx_pause = 1;
  591. val = QLCRD32(adapter, QLCNIC_NIU_XG_PAUSE_CTL);
  592. if (port == 0)
  593. pause->tx_pause = !(qlcnic_xg_get_xg0_mask(val));
  594. else
  595. pause->tx_pause = !(qlcnic_xg_get_xg1_mask(val));
  596. } else {
  597. dev_err(&netdev->dev, "Unknown board type: %x\n",
  598. adapter->ahw->port_type);
  599. }
  600. }
  601. static int
  602. qlcnic_set_pauseparam(struct net_device *netdev,
  603. struct ethtool_pauseparam *pause)
  604. {
  605. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  606. int port = adapter->ahw->physical_port;
  607. __u32 val;
  608. if (qlcnic_83xx_check(adapter))
  609. return qlcnic_83xx_set_pauseparam(adapter, pause);
  610. /* read mode */
  611. if (adapter->ahw->port_type == QLCNIC_GBE) {
  612. if ((port < 0) || (port > QLCNIC_NIU_MAX_GBE_PORTS))
  613. return -EIO;
  614. /* set flow control */
  615. val = QLCRD32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port));
  616. if (pause->rx_pause)
  617. qlcnic_gb_rx_flowctl(val);
  618. else
  619. qlcnic_gb_unset_rx_flowctl(val);
  620. QLCWR32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port),
  621. val);
  622. QLCWR32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port), val);
  623. /* set autoneg */
  624. val = QLCRD32(adapter, QLCNIC_NIU_GB_PAUSE_CTL);
  625. switch (port) {
  626. case 0:
  627. if (pause->tx_pause)
  628. qlcnic_gb_unset_gb0_mask(val);
  629. else
  630. qlcnic_gb_set_gb0_mask(val);
  631. break;
  632. case 1:
  633. if (pause->tx_pause)
  634. qlcnic_gb_unset_gb1_mask(val);
  635. else
  636. qlcnic_gb_set_gb1_mask(val);
  637. break;
  638. case 2:
  639. if (pause->tx_pause)
  640. qlcnic_gb_unset_gb2_mask(val);
  641. else
  642. qlcnic_gb_set_gb2_mask(val);
  643. break;
  644. case 3:
  645. default:
  646. if (pause->tx_pause)
  647. qlcnic_gb_unset_gb3_mask(val);
  648. else
  649. qlcnic_gb_set_gb3_mask(val);
  650. break;
  651. }
  652. QLCWR32(adapter, QLCNIC_NIU_GB_PAUSE_CTL, val);
  653. } else if (adapter->ahw->port_type == QLCNIC_XGBE) {
  654. if (!pause->rx_pause || pause->autoneg)
  655. return -EOPNOTSUPP;
  656. if ((port < 0) || (port > QLCNIC_NIU_MAX_XG_PORTS))
  657. return -EIO;
  658. val = QLCRD32(adapter, QLCNIC_NIU_XG_PAUSE_CTL);
  659. if (port == 0) {
  660. if (pause->tx_pause)
  661. qlcnic_xg_unset_xg0_mask(val);
  662. else
  663. qlcnic_xg_set_xg0_mask(val);
  664. } else {
  665. if (pause->tx_pause)
  666. qlcnic_xg_unset_xg1_mask(val);
  667. else
  668. qlcnic_xg_set_xg1_mask(val);
  669. }
  670. QLCWR32(adapter, QLCNIC_NIU_XG_PAUSE_CTL, val);
  671. } else {
  672. dev_err(&netdev->dev, "Unknown board type: %x\n",
  673. adapter->ahw->port_type);
  674. }
  675. return 0;
  676. }
  677. static int qlcnic_reg_test(struct net_device *dev)
  678. {
  679. struct qlcnic_adapter *adapter = netdev_priv(dev);
  680. u32 data_read;
  681. if (qlcnic_83xx_check(adapter))
  682. return qlcnic_83xx_reg_test(adapter);
  683. data_read = QLCRD32(adapter, QLCNIC_PCIX_PH_REG(0));
  684. if ((data_read & 0xffff) != adapter->pdev->vendor)
  685. return 1;
  686. return 0;
  687. }
  688. static int qlcnic_eeprom_test(struct net_device *dev)
  689. {
  690. struct qlcnic_adapter *adapter = netdev_priv(dev);
  691. if (qlcnic_82xx_check(adapter))
  692. return 0;
  693. return qlcnic_83xx_flash_test(adapter);
  694. }
  695. static int qlcnic_get_sset_count(struct net_device *dev, int sset)
  696. {
  697. int len;
  698. struct qlcnic_adapter *adapter = netdev_priv(dev);
  699. switch (sset) {
  700. case ETH_SS_TEST:
  701. return QLCNIC_TEST_LEN;
  702. case ETH_SS_STATS:
  703. len = qlcnic_dev_statistics_len(adapter) + QLCNIC_STATS_LEN;
  704. if ((adapter->flags & QLCNIC_ESWITCH_ENABLED) ||
  705. qlcnic_83xx_check(adapter))
  706. return len;
  707. return qlcnic_82xx_statistics();
  708. default:
  709. return -EOPNOTSUPP;
  710. }
  711. }
  712. static int qlcnic_irq_test(struct net_device *netdev)
  713. {
  714. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  715. struct qlcnic_hardware_context *ahw = adapter->ahw;
  716. struct qlcnic_cmd_args cmd;
  717. int ret, max_sds_rings = adapter->max_sds_rings;
  718. if (qlcnic_83xx_check(adapter))
  719. return qlcnic_83xx_interrupt_test(netdev);
  720. if (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
  721. return -EIO;
  722. ret = qlcnic_diag_alloc_res(netdev, QLCNIC_INTERRUPT_TEST);
  723. if (ret)
  724. goto clear_diag_irq;
  725. ahw->diag_cnt = 0;
  726. qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_INTRPT_TEST);
  727. cmd.req.arg[1] = ahw->pci_func;
  728. ret = qlcnic_issue_cmd(adapter, &cmd);
  729. if (ret)
  730. goto done;
  731. usleep_range(1000, 12000);
  732. ret = !ahw->diag_cnt;
  733. done:
  734. qlcnic_free_mbx_args(&cmd);
  735. qlcnic_diag_free_res(netdev, max_sds_rings);
  736. clear_diag_irq:
  737. adapter->max_sds_rings = max_sds_rings;
  738. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  739. return ret;
  740. }
  741. #define QLCNIC_ILB_PKT_SIZE 64
  742. #define QLCNIC_NUM_ILB_PKT 16
  743. #define QLCNIC_ILB_MAX_RCV_LOOP 10
  744. static void qlcnic_create_loopback_buff(unsigned char *data, u8 mac[])
  745. {
  746. unsigned char random_data[] = {0xa8, 0x06, 0x45, 0x00};
  747. memset(data, 0x4e, QLCNIC_ILB_PKT_SIZE);
  748. memcpy(data, mac, ETH_ALEN);
  749. memcpy(data + ETH_ALEN, mac, ETH_ALEN);
  750. memcpy(data + 2 * ETH_ALEN, random_data, sizeof(random_data));
  751. }
  752. int qlcnic_check_loopback_buff(unsigned char *data, u8 mac[])
  753. {
  754. unsigned char buff[QLCNIC_ILB_PKT_SIZE];
  755. qlcnic_create_loopback_buff(buff, mac);
  756. return memcmp(data, buff, QLCNIC_ILB_PKT_SIZE);
  757. }
  758. int qlcnic_do_lb_test(struct qlcnic_adapter *adapter, u8 mode)
  759. {
  760. struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
  761. struct qlcnic_host_sds_ring *sds_ring = &recv_ctx->sds_rings[0];
  762. struct sk_buff *skb;
  763. int i, loop, cnt = 0;
  764. for (i = 0; i < QLCNIC_NUM_ILB_PKT; i++) {
  765. skb = netdev_alloc_skb(adapter->netdev, QLCNIC_ILB_PKT_SIZE);
  766. qlcnic_create_loopback_buff(skb->data, adapter->mac_addr);
  767. skb_put(skb, QLCNIC_ILB_PKT_SIZE);
  768. adapter->ahw->diag_cnt = 0;
  769. qlcnic_xmit_frame(skb, adapter->netdev);
  770. loop = 0;
  771. do {
  772. msleep(1);
  773. qlcnic_process_rcv_ring_diag(sds_ring);
  774. if (loop++ > QLCNIC_ILB_MAX_RCV_LOOP)
  775. break;
  776. } while (!adapter->ahw->diag_cnt);
  777. dev_kfree_skb_any(skb);
  778. if (!adapter->ahw->diag_cnt)
  779. dev_warn(&adapter->pdev->dev,
  780. "LB Test: packet #%d was not received\n",
  781. i + 1);
  782. else
  783. cnt++;
  784. }
  785. if (cnt != i) {
  786. dev_err(&adapter->pdev->dev,
  787. "LB Test: failed, TX[%d], RX[%d]\n", i, cnt);
  788. if (mode != QLCNIC_ILB_MODE)
  789. dev_warn(&adapter->pdev->dev,
  790. "WARNING: Please check loopback cable\n");
  791. return -1;
  792. }
  793. return 0;
  794. }
  795. int qlcnic_loopback_test(struct net_device *netdev, u8 mode)
  796. {
  797. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  798. int max_sds_rings = adapter->max_sds_rings;
  799. struct qlcnic_host_sds_ring *sds_ring;
  800. struct qlcnic_hardware_context *ahw = adapter->ahw;
  801. int loop = 0;
  802. int ret;
  803. if (qlcnic_83xx_check(adapter))
  804. return qlcnic_83xx_loopback_test(netdev, mode);
  805. if (!(ahw->capabilities & QLCNIC_FW_CAPABILITY_MULTI_LOOPBACK)) {
  806. dev_info(&adapter->pdev->dev,
  807. "Firmware do not support loopback test\n");
  808. return -EOPNOTSUPP;
  809. }
  810. dev_warn(&adapter->pdev->dev, "%s loopback test in progress\n",
  811. mode == QLCNIC_ILB_MODE ? "internal" : "external");
  812. if (ahw->op_mode == QLCNIC_NON_PRIV_FUNC) {
  813. dev_warn(&adapter->pdev->dev,
  814. "Loopback test not supported in nonprivileged mode\n");
  815. return 0;
  816. }
  817. if (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
  818. return -EBUSY;
  819. ret = qlcnic_diag_alloc_res(netdev, QLCNIC_LOOPBACK_TEST);
  820. if (ret)
  821. goto clear_it;
  822. sds_ring = &adapter->recv_ctx->sds_rings[0];
  823. ret = qlcnic_set_lb_mode(adapter, mode);
  824. if (ret)
  825. goto free_res;
  826. ahw->diag_cnt = 0;
  827. do {
  828. msleep(500);
  829. qlcnic_process_rcv_ring_diag(sds_ring);
  830. if (loop++ > QLCNIC_ILB_MAX_RCV_LOOP) {
  831. netdev_info(netdev, "firmware didnt respond to loopback"
  832. " configure request\n");
  833. ret = -QLCNIC_FW_NOT_RESPOND;
  834. goto free_res;
  835. } else if (adapter->ahw->diag_cnt) {
  836. ret = adapter->ahw->diag_cnt;
  837. goto free_res;
  838. }
  839. } while (!QLCNIC_IS_LB_CONFIGURED(ahw->loopback_state));
  840. ret = qlcnic_do_lb_test(adapter, mode);
  841. qlcnic_clear_lb_mode(adapter, mode);
  842. free_res:
  843. qlcnic_diag_free_res(netdev, max_sds_rings);
  844. clear_it:
  845. adapter->max_sds_rings = max_sds_rings;
  846. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  847. return ret;
  848. }
  849. static void
  850. qlcnic_diag_test(struct net_device *dev, struct ethtool_test *eth_test,
  851. u64 *data)
  852. {
  853. memset(data, 0, sizeof(u64) * QLCNIC_TEST_LEN);
  854. data[0] = qlcnic_reg_test(dev);
  855. if (data[0])
  856. eth_test->flags |= ETH_TEST_FL_FAILED;
  857. data[1] = (u64) qlcnic_test_link(dev);
  858. if (data[1])
  859. eth_test->flags |= ETH_TEST_FL_FAILED;
  860. if (eth_test->flags & ETH_TEST_FL_OFFLINE) {
  861. data[2] = qlcnic_irq_test(dev);
  862. if (data[2])
  863. eth_test->flags |= ETH_TEST_FL_FAILED;
  864. data[3] = qlcnic_loopback_test(dev, QLCNIC_ILB_MODE);
  865. if (data[3])
  866. eth_test->flags |= ETH_TEST_FL_FAILED;
  867. data[4] = qlcnic_eeprom_test(dev);
  868. if (data[4])
  869. eth_test->flags |= ETH_TEST_FL_FAILED;
  870. }
  871. }
  872. static void
  873. qlcnic_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  874. {
  875. struct qlcnic_adapter *adapter = netdev_priv(dev);
  876. int index, i, num_stats;
  877. switch (stringset) {
  878. case ETH_SS_TEST:
  879. memcpy(data, *qlcnic_gstrings_test,
  880. QLCNIC_TEST_LEN * ETH_GSTRING_LEN);
  881. break;
  882. case ETH_SS_STATS:
  883. for (index = 0; index < QLCNIC_STATS_LEN; index++) {
  884. memcpy(data + index * ETH_GSTRING_LEN,
  885. qlcnic_gstrings_stats[index].stat_string,
  886. ETH_GSTRING_LEN);
  887. }
  888. if (qlcnic_83xx_check(adapter)) {
  889. num_stats = ARRAY_SIZE(qlcnic_83xx_tx_stats_strings);
  890. for (i = 0; i < num_stats; i++, index++)
  891. memcpy(data + index * ETH_GSTRING_LEN,
  892. qlcnic_83xx_tx_stats_strings[i],
  893. ETH_GSTRING_LEN);
  894. num_stats = ARRAY_SIZE(qlcnic_83xx_mac_stats_strings);
  895. for (i = 0; i < num_stats; i++, index++)
  896. memcpy(data + index * ETH_GSTRING_LEN,
  897. qlcnic_83xx_mac_stats_strings[i],
  898. ETH_GSTRING_LEN);
  899. num_stats = ARRAY_SIZE(qlcnic_83xx_rx_stats_strings);
  900. for (i = 0; i < num_stats; i++, index++)
  901. memcpy(data + index * ETH_GSTRING_LEN,
  902. qlcnic_83xx_rx_stats_strings[i],
  903. ETH_GSTRING_LEN);
  904. return;
  905. } else {
  906. num_stats = ARRAY_SIZE(qlcnic_83xx_mac_stats_strings);
  907. for (i = 0; i < num_stats; i++, index++)
  908. memcpy(data + index * ETH_GSTRING_LEN,
  909. qlcnic_83xx_mac_stats_strings[i],
  910. ETH_GSTRING_LEN);
  911. }
  912. if (!(adapter->flags & QLCNIC_ESWITCH_ENABLED))
  913. return;
  914. num_stats = ARRAY_SIZE(qlcnic_device_gstrings_stats);
  915. for (i = 0; i < num_stats; index++, i++) {
  916. memcpy(data + index * ETH_GSTRING_LEN,
  917. qlcnic_device_gstrings_stats[i],
  918. ETH_GSTRING_LEN);
  919. }
  920. }
  921. }
  922. static void
  923. qlcnic_fill_stats(u64 *data, void *stats, int type)
  924. {
  925. if (type == QLCNIC_MAC_STATS) {
  926. struct qlcnic_mac_statistics *mac_stats =
  927. (struct qlcnic_mac_statistics *)stats;
  928. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_tx_frames);
  929. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_tx_bytes);
  930. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_tx_mcast_pkts);
  931. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_tx_bcast_pkts);
  932. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_tx_pause_cnt);
  933. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_tx_ctrl_pkt);
  934. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_tx_lt_64b_pkts);
  935. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_tx_lt_127b_pkts);
  936. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_tx_lt_255b_pkts);
  937. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_tx_lt_511b_pkts);
  938. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_tx_lt_1023b_pkts);
  939. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_tx_lt_1518b_pkts);
  940. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_tx_gt_1518b_pkts);
  941. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_rx_frames);
  942. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_rx_bytes);
  943. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_rx_mcast_pkts);
  944. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_rx_bcast_pkts);
  945. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_rx_pause_cnt);
  946. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_rx_ctrl_pkt);
  947. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_rx_lt_64b_pkts);
  948. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_rx_lt_127b_pkts);
  949. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_rx_lt_255b_pkts);
  950. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_rx_lt_511b_pkts);
  951. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_rx_lt_1023b_pkts);
  952. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_rx_lt_1518b_pkts);
  953. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_rx_gt_1518b_pkts);
  954. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_rx_length_error);
  955. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_rx_length_small);
  956. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_rx_length_large);
  957. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_rx_jabber);
  958. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_rx_dropped);
  959. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_rx_crc_error);
  960. *data++ = QLCNIC_FILL_STATS(mac_stats->mac_align_error);
  961. } else if (type == QLCNIC_ESW_STATS) {
  962. struct __qlcnic_esw_statistics *esw_stats =
  963. (struct __qlcnic_esw_statistics *)stats;
  964. *data++ = QLCNIC_FILL_STATS(esw_stats->unicast_frames);
  965. *data++ = QLCNIC_FILL_STATS(esw_stats->multicast_frames);
  966. *data++ = QLCNIC_FILL_STATS(esw_stats->broadcast_frames);
  967. *data++ = QLCNIC_FILL_STATS(esw_stats->dropped_frames);
  968. *data++ = QLCNIC_FILL_STATS(esw_stats->errors);
  969. *data++ = QLCNIC_FILL_STATS(esw_stats->local_frames);
  970. *data++ = QLCNIC_FILL_STATS(esw_stats->numbytes);
  971. }
  972. }
  973. static void qlcnic_get_ethtool_stats(struct net_device *dev,
  974. struct ethtool_stats *stats, u64 *data)
  975. {
  976. struct qlcnic_adapter *adapter = netdev_priv(dev);
  977. struct qlcnic_esw_statistics port_stats;
  978. struct qlcnic_mac_statistics mac_stats;
  979. int index, ret, length, size;
  980. char *p;
  981. memset(data, 0, stats->n_stats * sizeof(u64));
  982. length = QLCNIC_STATS_LEN;
  983. for (index = 0; index < length; index++) {
  984. p = (char *)adapter + qlcnic_gstrings_stats[index].stat_offset;
  985. size = qlcnic_gstrings_stats[index].sizeof_stat;
  986. *data++ = (size == sizeof(u64)) ? (*(u64 *)p) : ((*(u32 *)p));
  987. }
  988. if (qlcnic_83xx_check(adapter)) {
  989. if (adapter->ahw->linkup)
  990. qlcnic_83xx_get_stats(adapter, data);
  991. return;
  992. } else {
  993. /* Retrieve MAC statistics from firmware */
  994. memset(&mac_stats, 0, sizeof(struct qlcnic_mac_statistics));
  995. qlcnic_get_mac_stats(adapter, &mac_stats);
  996. qlcnic_fill_stats(data, &mac_stats, QLCNIC_MAC_STATS);
  997. }
  998. if (!(adapter->flags & QLCNIC_ESWITCH_ENABLED))
  999. return;
  1000. memset(&port_stats, 0, sizeof(struct qlcnic_esw_statistics));
  1001. ret = qlcnic_get_port_stats(adapter, adapter->ahw->pci_func,
  1002. QLCNIC_QUERY_RX_COUNTER, &port_stats.rx);
  1003. if (ret)
  1004. return;
  1005. qlcnic_fill_stats(data, &port_stats.rx, QLCNIC_ESW_STATS);
  1006. ret = qlcnic_get_port_stats(adapter, adapter->ahw->pci_func,
  1007. QLCNIC_QUERY_TX_COUNTER, &port_stats.tx);
  1008. if (ret)
  1009. return;
  1010. qlcnic_fill_stats(data, &port_stats.tx, QLCNIC_ESW_STATS);
  1011. }
  1012. static int qlcnic_set_led(struct net_device *dev,
  1013. enum ethtool_phys_id_state state)
  1014. {
  1015. struct qlcnic_adapter *adapter = netdev_priv(dev);
  1016. int max_sds_rings = adapter->max_sds_rings;
  1017. int err = -EIO, active = 1;
  1018. if (qlcnic_83xx_check(adapter))
  1019. return -EOPNOTSUPP;
  1020. if (adapter->ahw->op_mode == QLCNIC_NON_PRIV_FUNC) {
  1021. netdev_warn(dev, "LED test not supported for non "
  1022. "privilege function\n");
  1023. return -EOPNOTSUPP;
  1024. }
  1025. switch (state) {
  1026. case ETHTOOL_ID_ACTIVE:
  1027. if (test_and_set_bit(__QLCNIC_LED_ENABLE, &adapter->state))
  1028. return -EBUSY;
  1029. if (test_bit(__QLCNIC_RESETTING, &adapter->state))
  1030. break;
  1031. if (!test_bit(__QLCNIC_DEV_UP, &adapter->state)) {
  1032. if (qlcnic_diag_alloc_res(dev, QLCNIC_LED_TEST))
  1033. break;
  1034. set_bit(__QLCNIC_DIAG_RES_ALLOC, &adapter->state);
  1035. }
  1036. if (adapter->nic_ops->config_led(adapter, 1, 0xf) == 0) {
  1037. err = 0;
  1038. break;
  1039. }
  1040. dev_err(&adapter->pdev->dev,
  1041. "Failed to set LED blink state.\n");
  1042. break;
  1043. case ETHTOOL_ID_INACTIVE:
  1044. active = 0;
  1045. if (test_bit(__QLCNIC_RESETTING, &adapter->state))
  1046. break;
  1047. if (!test_bit(__QLCNIC_DEV_UP, &adapter->state)) {
  1048. if (qlcnic_diag_alloc_res(dev, QLCNIC_LED_TEST))
  1049. break;
  1050. set_bit(__QLCNIC_DIAG_RES_ALLOC, &adapter->state);
  1051. }
  1052. if (adapter->nic_ops->config_led(adapter, 0, 0xf))
  1053. dev_err(&adapter->pdev->dev,
  1054. "Failed to reset LED blink state.\n");
  1055. break;
  1056. default:
  1057. return -EINVAL;
  1058. }
  1059. if (test_and_clear_bit(__QLCNIC_DIAG_RES_ALLOC, &adapter->state))
  1060. qlcnic_diag_free_res(dev, max_sds_rings);
  1061. if (!active || err)
  1062. clear_bit(__QLCNIC_LED_ENABLE, &adapter->state);
  1063. return err;
  1064. }
  1065. static void
  1066. qlcnic_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  1067. {
  1068. struct qlcnic_adapter *adapter = netdev_priv(dev);
  1069. u32 wol_cfg;
  1070. if (qlcnic_83xx_check(adapter))
  1071. return;
  1072. wol->supported = 0;
  1073. wol->wolopts = 0;
  1074. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG_NV);
  1075. if (wol_cfg & (1UL << adapter->portnum))
  1076. wol->supported |= WAKE_MAGIC;
  1077. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG);
  1078. if (wol_cfg & (1UL << adapter->portnum))
  1079. wol->wolopts |= WAKE_MAGIC;
  1080. }
  1081. static int
  1082. qlcnic_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  1083. {
  1084. struct qlcnic_adapter *adapter = netdev_priv(dev);
  1085. u32 wol_cfg;
  1086. if (qlcnic_83xx_check(adapter))
  1087. return -EOPNOTSUPP;
  1088. if (wol->wolopts & ~WAKE_MAGIC)
  1089. return -EINVAL;
  1090. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG_NV);
  1091. if (!(wol_cfg & (1 << adapter->portnum)))
  1092. return -EOPNOTSUPP;
  1093. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG);
  1094. if (wol->wolopts & WAKE_MAGIC)
  1095. wol_cfg |= 1UL << adapter->portnum;
  1096. else
  1097. wol_cfg &= ~(1UL << adapter->portnum);
  1098. QLCWR32(adapter, QLCNIC_WOL_CONFIG, wol_cfg);
  1099. return 0;
  1100. }
  1101. /*
  1102. * Set the coalescing parameters. Currently only normal is supported.
  1103. * If rx_coalesce_usecs == 0 or rx_max_coalesced_frames == 0 then set the
  1104. * firmware coalescing to default.
  1105. */
  1106. static int qlcnic_set_intr_coalesce(struct net_device *netdev,
  1107. struct ethtool_coalesce *ethcoal)
  1108. {
  1109. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  1110. if (!test_bit(__QLCNIC_DEV_UP, &adapter->state))
  1111. return -EINVAL;
  1112. /*
  1113. * Return Error if unsupported values or
  1114. * unsupported parameters are set.
  1115. */
  1116. if (ethcoal->rx_coalesce_usecs > 0xffff ||
  1117. ethcoal->rx_max_coalesced_frames > 0xffff ||
  1118. ethcoal->tx_coalesce_usecs ||
  1119. ethcoal->tx_max_coalesced_frames ||
  1120. ethcoal->rx_coalesce_usecs_irq ||
  1121. ethcoal->rx_max_coalesced_frames_irq ||
  1122. ethcoal->tx_coalesce_usecs_irq ||
  1123. ethcoal->tx_max_coalesced_frames_irq ||
  1124. ethcoal->stats_block_coalesce_usecs ||
  1125. ethcoal->use_adaptive_rx_coalesce ||
  1126. ethcoal->use_adaptive_tx_coalesce ||
  1127. ethcoal->pkt_rate_low ||
  1128. ethcoal->rx_coalesce_usecs_low ||
  1129. ethcoal->rx_max_coalesced_frames_low ||
  1130. ethcoal->tx_coalesce_usecs_low ||
  1131. ethcoal->tx_max_coalesced_frames_low ||
  1132. ethcoal->pkt_rate_high ||
  1133. ethcoal->rx_coalesce_usecs_high ||
  1134. ethcoal->rx_max_coalesced_frames_high ||
  1135. ethcoal->tx_coalesce_usecs_high ||
  1136. ethcoal->tx_max_coalesced_frames_high)
  1137. return -EINVAL;
  1138. if (!ethcoal->rx_coalesce_usecs ||
  1139. !ethcoal->rx_max_coalesced_frames) {
  1140. adapter->ahw->coal.flag = QLCNIC_INTR_DEFAULT;
  1141. adapter->ahw->coal.rx_time_us =
  1142. QLCNIC_DEFAULT_INTR_COALESCE_RX_TIME_US;
  1143. adapter->ahw->coal.rx_packets =
  1144. QLCNIC_DEFAULT_INTR_COALESCE_RX_PACKETS;
  1145. } else {
  1146. adapter->ahw->coal.flag = 0;
  1147. adapter->ahw->coal.rx_time_us = ethcoal->rx_coalesce_usecs;
  1148. adapter->ahw->coal.rx_packets =
  1149. ethcoal->rx_max_coalesced_frames;
  1150. }
  1151. qlcnic_config_intr_coalesce(adapter);
  1152. return 0;
  1153. }
  1154. static int qlcnic_get_intr_coalesce(struct net_device *netdev,
  1155. struct ethtool_coalesce *ethcoal)
  1156. {
  1157. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  1158. if (adapter->is_up != QLCNIC_ADAPTER_UP_MAGIC)
  1159. return -EINVAL;
  1160. ethcoal->rx_coalesce_usecs = adapter->ahw->coal.rx_time_us;
  1161. ethcoal->rx_max_coalesced_frames = adapter->ahw->coal.rx_packets;
  1162. return 0;
  1163. }
  1164. static u32 qlcnic_get_msglevel(struct net_device *netdev)
  1165. {
  1166. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  1167. return adapter->ahw->msg_enable;
  1168. }
  1169. static void qlcnic_set_msglevel(struct net_device *netdev, u32 msglvl)
  1170. {
  1171. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  1172. adapter->ahw->msg_enable = msglvl;
  1173. }
  1174. static int
  1175. qlcnic_get_dump_flag(struct net_device *netdev, struct ethtool_dump *dump)
  1176. {
  1177. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  1178. struct qlcnic_fw_dump *fw_dump = &adapter->ahw->fw_dump;
  1179. if (!fw_dump->tmpl_hdr) {
  1180. netdev_err(adapter->netdev, "FW Dump not supported\n");
  1181. return -ENOTSUPP;
  1182. }
  1183. if (fw_dump->clr)
  1184. dump->len = fw_dump->tmpl_hdr->size + fw_dump->size;
  1185. else
  1186. dump->len = 0;
  1187. if (!fw_dump->enable)
  1188. dump->flag = ETH_FW_DUMP_DISABLE;
  1189. else
  1190. dump->flag = fw_dump->tmpl_hdr->drv_cap_mask;
  1191. dump->version = adapter->fw_version;
  1192. return 0;
  1193. }
  1194. static int
  1195. qlcnic_get_dump_data(struct net_device *netdev, struct ethtool_dump *dump,
  1196. void *buffer)
  1197. {
  1198. int i, copy_sz;
  1199. u32 *hdr_ptr;
  1200. __le32 *data;
  1201. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  1202. struct qlcnic_fw_dump *fw_dump = &adapter->ahw->fw_dump;
  1203. if (!fw_dump->tmpl_hdr) {
  1204. netdev_err(netdev, "FW Dump not supported\n");
  1205. return -ENOTSUPP;
  1206. }
  1207. if (!fw_dump->clr) {
  1208. netdev_info(netdev, "Dump not available\n");
  1209. return -EINVAL;
  1210. }
  1211. /* Copy template header first */
  1212. copy_sz = fw_dump->tmpl_hdr->size;
  1213. hdr_ptr = (u32 *) fw_dump->tmpl_hdr;
  1214. data = buffer;
  1215. for (i = 0; i < copy_sz/sizeof(u32); i++)
  1216. *data++ = cpu_to_le32(*hdr_ptr++);
  1217. /* Copy captured dump data */
  1218. memcpy(buffer + copy_sz, fw_dump->data, fw_dump->size);
  1219. dump->len = copy_sz + fw_dump->size;
  1220. dump->flag = fw_dump->tmpl_hdr->drv_cap_mask;
  1221. /* Free dump area once data has been captured */
  1222. vfree(fw_dump->data);
  1223. fw_dump->data = NULL;
  1224. fw_dump->clr = 0;
  1225. netdev_info(netdev, "extracted the FW dump Successfully\n");
  1226. return 0;
  1227. }
  1228. static int
  1229. qlcnic_set_dump(struct net_device *netdev, struct ethtool_dump *val)
  1230. {
  1231. int i;
  1232. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  1233. struct qlcnic_fw_dump *fw_dump = &adapter->ahw->fw_dump;
  1234. u32 state;
  1235. switch (val->flag) {
  1236. case QLCNIC_FORCE_FW_DUMP_KEY:
  1237. if (!fw_dump->tmpl_hdr) {
  1238. netdev_err(netdev, "FW dump not supported\n");
  1239. return -ENOTSUPP;
  1240. }
  1241. if (!fw_dump->enable) {
  1242. netdev_info(netdev, "FW dump not enabled\n");
  1243. return 0;
  1244. }
  1245. if (fw_dump->clr) {
  1246. netdev_info(netdev,
  1247. "Previous dump not cleared, not forcing dump\n");
  1248. return 0;
  1249. }
  1250. netdev_info(netdev, "Forcing a FW dump\n");
  1251. qlcnic_dev_request_reset(adapter, val->flag);
  1252. break;
  1253. case QLCNIC_DISABLE_FW_DUMP:
  1254. if (fw_dump->enable && fw_dump->tmpl_hdr) {
  1255. netdev_info(netdev, "Disabling FW dump\n");
  1256. fw_dump->enable = 0;
  1257. }
  1258. return 0;
  1259. case QLCNIC_ENABLE_FW_DUMP:
  1260. if (!fw_dump->tmpl_hdr) {
  1261. netdev_err(netdev, "FW dump not supported\n");
  1262. return -ENOTSUPP;
  1263. }
  1264. if (!fw_dump->enable) {
  1265. netdev_info(netdev, "Enabling FW dump\n");
  1266. fw_dump->enable = 1;
  1267. }
  1268. return 0;
  1269. case QLCNIC_FORCE_FW_RESET:
  1270. netdev_info(netdev, "Forcing a FW reset\n");
  1271. qlcnic_dev_request_reset(adapter, val->flag);
  1272. adapter->flags &= ~QLCNIC_FW_RESET_OWNER;
  1273. return 0;
  1274. case QLCNIC_SET_QUIESCENT:
  1275. case QLCNIC_RESET_QUIESCENT:
  1276. state = QLCRD32(adapter, QLCNIC_CRB_DEV_STATE);
  1277. if (state == QLCNIC_DEV_FAILED || (state == QLCNIC_DEV_BADBAD))
  1278. netdev_info(netdev, "Device in FAILED state\n");
  1279. return 0;
  1280. default:
  1281. if (!fw_dump->tmpl_hdr) {
  1282. netdev_err(netdev, "FW dump not supported\n");
  1283. return -ENOTSUPP;
  1284. }
  1285. for (i = 0; i < ARRAY_SIZE(qlcnic_fw_dump_level); i++) {
  1286. if (val->flag == qlcnic_fw_dump_level[i]) {
  1287. fw_dump->tmpl_hdr->drv_cap_mask =
  1288. val->flag;
  1289. netdev_info(netdev, "Driver mask changed to: 0x%x\n",
  1290. fw_dump->tmpl_hdr->drv_cap_mask);
  1291. return 0;
  1292. }
  1293. }
  1294. netdev_info(netdev, "Invalid dump level: 0x%x\n", val->flag);
  1295. return -EINVAL;
  1296. }
  1297. return 0;
  1298. }
  1299. const struct ethtool_ops qlcnic_ethtool_ops = {
  1300. .get_settings = qlcnic_get_settings,
  1301. .set_settings = qlcnic_set_settings,
  1302. .get_drvinfo = qlcnic_get_drvinfo,
  1303. .get_regs_len = qlcnic_get_regs_len,
  1304. .get_regs = qlcnic_get_regs,
  1305. .get_link = ethtool_op_get_link,
  1306. .get_eeprom_len = qlcnic_get_eeprom_len,
  1307. .get_eeprom = qlcnic_get_eeprom,
  1308. .get_ringparam = qlcnic_get_ringparam,
  1309. .set_ringparam = qlcnic_set_ringparam,
  1310. .get_channels = qlcnic_get_channels,
  1311. .set_channels = qlcnic_set_channels,
  1312. .get_pauseparam = qlcnic_get_pauseparam,
  1313. .set_pauseparam = qlcnic_set_pauseparam,
  1314. .get_wol = qlcnic_get_wol,
  1315. .set_wol = qlcnic_set_wol,
  1316. .self_test = qlcnic_diag_test,
  1317. .get_strings = qlcnic_get_strings,
  1318. .get_ethtool_stats = qlcnic_get_ethtool_stats,
  1319. .get_sset_count = qlcnic_get_sset_count,
  1320. .get_coalesce = qlcnic_get_intr_coalesce,
  1321. .set_coalesce = qlcnic_set_intr_coalesce,
  1322. .set_phys_id = qlcnic_set_led,
  1323. .set_msglevel = qlcnic_set_msglevel,
  1324. .get_msglevel = qlcnic_get_msglevel,
  1325. .get_dump_flag = qlcnic_get_dump_flag,
  1326. .get_dump_data = qlcnic_get_dump_data,
  1327. .set_dump = qlcnic_set_dump,
  1328. };