icm.c 11 KB

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  1. /*
  2. * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
  3. * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/errno.h>
  34. #include <linux/mm.h>
  35. #include <linux/scatterlist.h>
  36. #include <linux/slab.h>
  37. #include <linux/mlx4/cmd.h>
  38. #include "mlx4.h"
  39. #include "icm.h"
  40. #include "fw.h"
  41. /*
  42. * We allocate in as big chunks as we can, up to a maximum of 256 KB
  43. * per chunk.
  44. */
  45. enum {
  46. MLX4_ICM_ALLOC_SIZE = 1 << 18,
  47. MLX4_TABLE_CHUNK_SIZE = 1 << 18
  48. };
  49. static void mlx4_free_icm_pages(struct mlx4_dev *dev, struct mlx4_icm_chunk *chunk)
  50. {
  51. int i;
  52. if (chunk->nsg > 0)
  53. pci_unmap_sg(dev->pdev, chunk->mem, chunk->npages,
  54. PCI_DMA_BIDIRECTIONAL);
  55. for (i = 0; i < chunk->npages; ++i)
  56. __free_pages(sg_page(&chunk->mem[i]),
  57. get_order(chunk->mem[i].length));
  58. }
  59. static void mlx4_free_icm_coherent(struct mlx4_dev *dev, struct mlx4_icm_chunk *chunk)
  60. {
  61. int i;
  62. for (i = 0; i < chunk->npages; ++i)
  63. dma_free_coherent(&dev->pdev->dev, chunk->mem[i].length,
  64. lowmem_page_address(sg_page(&chunk->mem[i])),
  65. sg_dma_address(&chunk->mem[i]));
  66. }
  67. void mlx4_free_icm(struct mlx4_dev *dev, struct mlx4_icm *icm, int coherent)
  68. {
  69. struct mlx4_icm_chunk *chunk, *tmp;
  70. if (!icm)
  71. return;
  72. list_for_each_entry_safe(chunk, tmp, &icm->chunk_list, list) {
  73. if (coherent)
  74. mlx4_free_icm_coherent(dev, chunk);
  75. else
  76. mlx4_free_icm_pages(dev, chunk);
  77. kfree(chunk);
  78. }
  79. kfree(icm);
  80. }
  81. static int mlx4_alloc_icm_pages(struct scatterlist *mem, int order, gfp_t gfp_mask)
  82. {
  83. struct page *page;
  84. page = alloc_pages(gfp_mask, order);
  85. if (!page)
  86. return -ENOMEM;
  87. sg_set_page(mem, page, PAGE_SIZE << order, 0);
  88. return 0;
  89. }
  90. static int mlx4_alloc_icm_coherent(struct device *dev, struct scatterlist *mem,
  91. int order, gfp_t gfp_mask)
  92. {
  93. void *buf = dma_alloc_coherent(dev, PAGE_SIZE << order,
  94. &sg_dma_address(mem), gfp_mask);
  95. if (!buf)
  96. return -ENOMEM;
  97. sg_set_buf(mem, buf, PAGE_SIZE << order);
  98. BUG_ON(mem->offset);
  99. sg_dma_len(mem) = PAGE_SIZE << order;
  100. return 0;
  101. }
  102. struct mlx4_icm *mlx4_alloc_icm(struct mlx4_dev *dev, int npages,
  103. gfp_t gfp_mask, int coherent)
  104. {
  105. struct mlx4_icm *icm;
  106. struct mlx4_icm_chunk *chunk = NULL;
  107. int cur_order;
  108. int ret;
  109. /* We use sg_set_buf for coherent allocs, which assumes low memory */
  110. BUG_ON(coherent && (gfp_mask & __GFP_HIGHMEM));
  111. icm = kmalloc(sizeof *icm, gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
  112. if (!icm)
  113. return NULL;
  114. icm->refcount = 0;
  115. INIT_LIST_HEAD(&icm->chunk_list);
  116. cur_order = get_order(MLX4_ICM_ALLOC_SIZE);
  117. while (npages > 0) {
  118. if (!chunk) {
  119. chunk = kmalloc(sizeof *chunk,
  120. gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
  121. if (!chunk)
  122. goto fail;
  123. sg_init_table(chunk->mem, MLX4_ICM_CHUNK_LEN);
  124. chunk->npages = 0;
  125. chunk->nsg = 0;
  126. list_add_tail(&chunk->list, &icm->chunk_list);
  127. }
  128. while (1 << cur_order > npages)
  129. --cur_order;
  130. if (coherent)
  131. ret = mlx4_alloc_icm_coherent(&dev->pdev->dev,
  132. &chunk->mem[chunk->npages],
  133. cur_order, gfp_mask);
  134. else
  135. ret = mlx4_alloc_icm_pages(&chunk->mem[chunk->npages],
  136. cur_order, gfp_mask);
  137. if (ret) {
  138. if (--cur_order < 0)
  139. goto fail;
  140. else
  141. continue;
  142. }
  143. ++chunk->npages;
  144. if (coherent)
  145. ++chunk->nsg;
  146. else if (chunk->npages == MLX4_ICM_CHUNK_LEN) {
  147. chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
  148. chunk->npages,
  149. PCI_DMA_BIDIRECTIONAL);
  150. if (chunk->nsg <= 0)
  151. goto fail;
  152. }
  153. if (chunk->npages == MLX4_ICM_CHUNK_LEN)
  154. chunk = NULL;
  155. npages -= 1 << cur_order;
  156. }
  157. if (!coherent && chunk) {
  158. chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
  159. chunk->npages,
  160. PCI_DMA_BIDIRECTIONAL);
  161. if (chunk->nsg <= 0)
  162. goto fail;
  163. }
  164. return icm;
  165. fail:
  166. mlx4_free_icm(dev, icm, coherent);
  167. return NULL;
  168. }
  169. static int mlx4_MAP_ICM(struct mlx4_dev *dev, struct mlx4_icm *icm, u64 virt)
  170. {
  171. return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM, icm, virt);
  172. }
  173. static int mlx4_UNMAP_ICM(struct mlx4_dev *dev, u64 virt, u32 page_count)
  174. {
  175. return mlx4_cmd(dev, virt, page_count, 0, MLX4_CMD_UNMAP_ICM,
  176. MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
  177. }
  178. int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm)
  179. {
  180. return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM_AUX, icm, -1);
  181. }
  182. int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev)
  183. {
  184. return mlx4_cmd(dev, 0, 0, 0, MLX4_CMD_UNMAP_ICM_AUX,
  185. MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
  186. }
  187. int mlx4_table_get(struct mlx4_dev *dev, struct mlx4_icm_table *table, u32 obj)
  188. {
  189. u32 i = (obj & (table->num_obj - 1)) /
  190. (MLX4_TABLE_CHUNK_SIZE / table->obj_size);
  191. int ret = 0;
  192. mutex_lock(&table->mutex);
  193. if (table->icm[i]) {
  194. ++table->icm[i]->refcount;
  195. goto out;
  196. }
  197. table->icm[i] = mlx4_alloc_icm(dev, MLX4_TABLE_CHUNK_SIZE >> PAGE_SHIFT,
  198. (table->lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
  199. __GFP_NOWARN, table->coherent);
  200. if (!table->icm[i]) {
  201. ret = -ENOMEM;
  202. goto out;
  203. }
  204. if (mlx4_MAP_ICM(dev, table->icm[i], table->virt +
  205. (u64) i * MLX4_TABLE_CHUNK_SIZE)) {
  206. mlx4_free_icm(dev, table->icm[i], table->coherent);
  207. table->icm[i] = NULL;
  208. ret = -ENOMEM;
  209. goto out;
  210. }
  211. ++table->icm[i]->refcount;
  212. out:
  213. mutex_unlock(&table->mutex);
  214. return ret;
  215. }
  216. void mlx4_table_put(struct mlx4_dev *dev, struct mlx4_icm_table *table, u32 obj)
  217. {
  218. u32 i;
  219. u64 offset;
  220. i = (obj & (table->num_obj - 1)) / (MLX4_TABLE_CHUNK_SIZE / table->obj_size);
  221. mutex_lock(&table->mutex);
  222. if (--table->icm[i]->refcount == 0) {
  223. offset = (u64) i * MLX4_TABLE_CHUNK_SIZE;
  224. mlx4_UNMAP_ICM(dev, table->virt + offset,
  225. MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
  226. mlx4_free_icm(dev, table->icm[i], table->coherent);
  227. table->icm[i] = NULL;
  228. }
  229. mutex_unlock(&table->mutex);
  230. }
  231. void *mlx4_table_find(struct mlx4_icm_table *table, u32 obj,
  232. dma_addr_t *dma_handle)
  233. {
  234. int offset, dma_offset, i;
  235. u64 idx;
  236. struct mlx4_icm_chunk *chunk;
  237. struct mlx4_icm *icm;
  238. struct page *page = NULL;
  239. if (!table->lowmem)
  240. return NULL;
  241. mutex_lock(&table->mutex);
  242. idx = (u64) (obj & (table->num_obj - 1)) * table->obj_size;
  243. icm = table->icm[idx / MLX4_TABLE_CHUNK_SIZE];
  244. dma_offset = offset = idx % MLX4_TABLE_CHUNK_SIZE;
  245. if (!icm)
  246. goto out;
  247. list_for_each_entry(chunk, &icm->chunk_list, list) {
  248. for (i = 0; i < chunk->npages; ++i) {
  249. if (dma_handle && dma_offset >= 0) {
  250. if (sg_dma_len(&chunk->mem[i]) > dma_offset)
  251. *dma_handle = sg_dma_address(&chunk->mem[i]) +
  252. dma_offset;
  253. dma_offset -= sg_dma_len(&chunk->mem[i]);
  254. }
  255. /*
  256. * DMA mapping can merge pages but not split them,
  257. * so if we found the page, dma_handle has already
  258. * been assigned to.
  259. */
  260. if (chunk->mem[i].length > offset) {
  261. page = sg_page(&chunk->mem[i]);
  262. goto out;
  263. }
  264. offset -= chunk->mem[i].length;
  265. }
  266. }
  267. out:
  268. mutex_unlock(&table->mutex);
  269. return page ? lowmem_page_address(page) + offset : NULL;
  270. }
  271. int mlx4_table_get_range(struct mlx4_dev *dev, struct mlx4_icm_table *table,
  272. u32 start, u32 end)
  273. {
  274. int inc = MLX4_TABLE_CHUNK_SIZE / table->obj_size;
  275. int err;
  276. u32 i;
  277. for (i = start; i <= end; i += inc) {
  278. err = mlx4_table_get(dev, table, i);
  279. if (err)
  280. goto fail;
  281. }
  282. return 0;
  283. fail:
  284. while (i > start) {
  285. i -= inc;
  286. mlx4_table_put(dev, table, i);
  287. }
  288. return err;
  289. }
  290. void mlx4_table_put_range(struct mlx4_dev *dev, struct mlx4_icm_table *table,
  291. u32 start, u32 end)
  292. {
  293. u32 i;
  294. for (i = start; i <= end; i += MLX4_TABLE_CHUNK_SIZE / table->obj_size)
  295. mlx4_table_put(dev, table, i);
  296. }
  297. int mlx4_init_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table,
  298. u64 virt, int obj_size, u32 nobj, int reserved,
  299. int use_lowmem, int use_coherent)
  300. {
  301. int obj_per_chunk;
  302. int num_icm;
  303. unsigned chunk_size;
  304. int i;
  305. u64 size;
  306. obj_per_chunk = MLX4_TABLE_CHUNK_SIZE / obj_size;
  307. num_icm = (nobj + obj_per_chunk - 1) / obj_per_chunk;
  308. table->icm = kcalloc(num_icm, sizeof *table->icm, GFP_KERNEL);
  309. if (!table->icm)
  310. return -ENOMEM;
  311. table->virt = virt;
  312. table->num_icm = num_icm;
  313. table->num_obj = nobj;
  314. table->obj_size = obj_size;
  315. table->lowmem = use_lowmem;
  316. table->coherent = use_coherent;
  317. mutex_init(&table->mutex);
  318. size = (u64) nobj * obj_size;
  319. for (i = 0; i * MLX4_TABLE_CHUNK_SIZE < reserved * obj_size; ++i) {
  320. chunk_size = MLX4_TABLE_CHUNK_SIZE;
  321. if ((i + 1) * MLX4_TABLE_CHUNK_SIZE > size)
  322. chunk_size = PAGE_ALIGN(size -
  323. i * MLX4_TABLE_CHUNK_SIZE);
  324. table->icm[i] = mlx4_alloc_icm(dev, chunk_size >> PAGE_SHIFT,
  325. (use_lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
  326. __GFP_NOWARN, use_coherent);
  327. if (!table->icm[i])
  328. goto err;
  329. if (mlx4_MAP_ICM(dev, table->icm[i], virt + i * MLX4_TABLE_CHUNK_SIZE)) {
  330. mlx4_free_icm(dev, table->icm[i], use_coherent);
  331. table->icm[i] = NULL;
  332. goto err;
  333. }
  334. /*
  335. * Add a reference to this ICM chunk so that it never
  336. * gets freed (since it contains reserved firmware objects).
  337. */
  338. ++table->icm[i]->refcount;
  339. }
  340. return 0;
  341. err:
  342. for (i = 0; i < num_icm; ++i)
  343. if (table->icm[i]) {
  344. mlx4_UNMAP_ICM(dev, virt + i * MLX4_TABLE_CHUNK_SIZE,
  345. MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
  346. mlx4_free_icm(dev, table->icm[i], use_coherent);
  347. }
  348. kfree(table->icm);
  349. return -ENOMEM;
  350. }
  351. void mlx4_cleanup_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table)
  352. {
  353. int i;
  354. for (i = 0; i < table->num_icm; ++i)
  355. if (table->icm[i]) {
  356. mlx4_UNMAP_ICM(dev, table->virt + i * MLX4_TABLE_CHUNK_SIZE,
  357. MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
  358. mlx4_free_icm(dev, table->icm[i], table->coherent);
  359. }
  360. kfree(table->icm);
  361. }