mvmdio.c 5.1 KB

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  1. /*
  2. * Driver for the MDIO interface of Marvell network interfaces.
  3. *
  4. * Since the MDIO interface of Marvell network interfaces is shared
  5. * between all network interfaces, having a single driver allows to
  6. * handle concurrent accesses properly (you may have four Ethernet
  7. * ports, but they in fact share the same SMI interface to access the
  8. * MDIO bus). Moreover, this MDIO interface code is similar between
  9. * the mv643xx_eth driver and the mvneta driver. For now, it is only
  10. * used by the mvneta driver, but it could later be used by the
  11. * mv643xx_eth driver as well.
  12. *
  13. * Copyright (C) 2012 Marvell
  14. *
  15. * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  16. *
  17. * This file is licensed under the terms of the GNU General Public
  18. * License version 2. This program is licensed "as is" without any
  19. * warranty of any kind, whether express or implied.
  20. */
  21. #include <linux/init.h>
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/mutex.h>
  25. #include <linux/phy.h>
  26. #include <linux/of_address.h>
  27. #include <linux/of_mdio.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/delay.h>
  30. #define MVMDIO_SMI_DATA_SHIFT 0
  31. #define MVMDIO_SMI_PHY_ADDR_SHIFT 16
  32. #define MVMDIO_SMI_PHY_REG_SHIFT 21
  33. #define MVMDIO_SMI_READ_OPERATION BIT(26)
  34. #define MVMDIO_SMI_WRITE_OPERATION 0
  35. #define MVMDIO_SMI_READ_VALID BIT(27)
  36. #define MVMDIO_SMI_BUSY BIT(28)
  37. struct orion_mdio_dev {
  38. struct mutex lock;
  39. void __iomem *smireg;
  40. };
  41. /* Wait for the SMI unit to be ready for another operation
  42. */
  43. static int orion_mdio_wait_ready(struct mii_bus *bus)
  44. {
  45. struct orion_mdio_dev *dev = bus->priv;
  46. int count;
  47. u32 val;
  48. count = 0;
  49. while (1) {
  50. val = readl(dev->smireg);
  51. if (!(val & MVMDIO_SMI_BUSY))
  52. break;
  53. if (count > 100) {
  54. dev_err(bus->parent, "Timeout: SMI busy for too long\n");
  55. return -ETIMEDOUT;
  56. }
  57. udelay(10);
  58. count++;
  59. }
  60. return 0;
  61. }
  62. static int orion_mdio_read(struct mii_bus *bus, int mii_id,
  63. int regnum)
  64. {
  65. struct orion_mdio_dev *dev = bus->priv;
  66. int count;
  67. u32 val;
  68. int ret;
  69. mutex_lock(&dev->lock);
  70. ret = orion_mdio_wait_ready(bus);
  71. if (ret < 0) {
  72. mutex_unlock(&dev->lock);
  73. return ret;
  74. }
  75. writel(((mii_id << MVMDIO_SMI_PHY_ADDR_SHIFT) |
  76. (regnum << MVMDIO_SMI_PHY_REG_SHIFT) |
  77. MVMDIO_SMI_READ_OPERATION),
  78. dev->smireg);
  79. /* Wait for the value to become available */
  80. count = 0;
  81. while (1) {
  82. val = readl(dev->smireg);
  83. if (val & MVMDIO_SMI_READ_VALID)
  84. break;
  85. if (count > 100) {
  86. dev_err(bus->parent, "Timeout when reading PHY\n");
  87. mutex_unlock(&dev->lock);
  88. return -ETIMEDOUT;
  89. }
  90. udelay(10);
  91. count++;
  92. }
  93. mutex_unlock(&dev->lock);
  94. return val & 0xFFFF;
  95. }
  96. static int orion_mdio_write(struct mii_bus *bus, int mii_id,
  97. int regnum, u16 value)
  98. {
  99. struct orion_mdio_dev *dev = bus->priv;
  100. int ret;
  101. mutex_lock(&dev->lock);
  102. ret = orion_mdio_wait_ready(bus);
  103. if (ret < 0) {
  104. mutex_unlock(&dev->lock);
  105. return ret;
  106. }
  107. writel(((mii_id << MVMDIO_SMI_PHY_ADDR_SHIFT) |
  108. (regnum << MVMDIO_SMI_PHY_REG_SHIFT) |
  109. MVMDIO_SMI_WRITE_OPERATION |
  110. (value << MVMDIO_SMI_DATA_SHIFT)),
  111. dev->smireg);
  112. mutex_unlock(&dev->lock);
  113. return 0;
  114. }
  115. static int orion_mdio_reset(struct mii_bus *bus)
  116. {
  117. return 0;
  118. }
  119. static int orion_mdio_probe(struct platform_device *pdev)
  120. {
  121. struct device_node *np = pdev->dev.of_node;
  122. struct mii_bus *bus;
  123. struct orion_mdio_dev *dev;
  124. int i, ret;
  125. bus = mdiobus_alloc_size(sizeof(struct orion_mdio_dev));
  126. if (!bus) {
  127. dev_err(&pdev->dev, "Cannot allocate MDIO bus\n");
  128. return -ENOMEM;
  129. }
  130. bus->name = "orion_mdio_bus";
  131. bus->read = orion_mdio_read;
  132. bus->write = orion_mdio_write;
  133. bus->reset = orion_mdio_reset;
  134. snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mii",
  135. dev_name(&pdev->dev));
  136. bus->parent = &pdev->dev;
  137. bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
  138. if (!bus->irq) {
  139. mdiobus_free(bus);
  140. return -ENOMEM;
  141. }
  142. for (i = 0; i < PHY_MAX_ADDR; i++)
  143. bus->irq[i] = PHY_POLL;
  144. dev = bus->priv;
  145. dev->smireg = of_iomap(pdev->dev.of_node, 0);
  146. if (!dev->smireg) {
  147. dev_err(&pdev->dev, "No SMI register address given in DT\n");
  148. kfree(bus->irq);
  149. mdiobus_free(bus);
  150. return -ENODEV;
  151. }
  152. mutex_init(&dev->lock);
  153. ret = of_mdiobus_register(bus, np);
  154. if (ret < 0) {
  155. dev_err(&pdev->dev, "Cannot register MDIO bus (%d)\n", ret);
  156. iounmap(dev->smireg);
  157. kfree(bus->irq);
  158. mdiobus_free(bus);
  159. return ret;
  160. }
  161. platform_set_drvdata(pdev, bus);
  162. return 0;
  163. }
  164. static int orion_mdio_remove(struct platform_device *pdev)
  165. {
  166. struct mii_bus *bus = platform_get_drvdata(pdev);
  167. mdiobus_unregister(bus);
  168. kfree(bus->irq);
  169. mdiobus_free(bus);
  170. return 0;
  171. }
  172. static const struct of_device_id orion_mdio_match[] = {
  173. { .compatible = "marvell,orion-mdio" },
  174. { }
  175. };
  176. MODULE_DEVICE_TABLE(of, orion_mdio_match);
  177. static struct platform_driver orion_mdio_driver = {
  178. .probe = orion_mdio_probe,
  179. .remove = orion_mdio_remove,
  180. .driver = {
  181. .name = "orion-mdio",
  182. .of_match_table = orion_mdio_match,
  183. },
  184. };
  185. module_platform_driver(orion_mdio_driver);
  186. MODULE_DESCRIPTION("Marvell MDIO interface driver");
  187. MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
  188. MODULE_LICENSE("GPL");