at91_ether.c 13 KB

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  1. /*
  2. * Ethernet driver for the Atmel AT91RM9200 (Thunder)
  3. *
  4. * Copyright (C) 2003 SAN People (Pty) Ltd
  5. *
  6. * Based on an earlier Atmel EMAC macrocell driver by Atmel and Lineo Inc.
  7. * Initial version by Rick Bronson 01/11/2003
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/init.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/netdevice.h>
  18. #include <linux/etherdevice.h>
  19. #include <linux/skbuff.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/ethtool.h>
  22. #include <linux/platform_data/macb.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/clk.h>
  25. #include <linux/gfp.h>
  26. #include <linux/phy.h>
  27. #include <linux/io.h>
  28. #include <linux/of.h>
  29. #include <linux/of_device.h>
  30. #include <linux/of_net.h>
  31. #include <linux/pinctrl/consumer.h>
  32. #include "macb.h"
  33. /* 1518 rounded up */
  34. #define MAX_RBUFF_SZ 0x600
  35. /* max number of receive buffers */
  36. #define MAX_RX_DESCR 9
  37. /* Initialize and start the Receiver and Transmit subsystems */
  38. static int at91ether_start(struct net_device *dev)
  39. {
  40. struct macb *lp = netdev_priv(dev);
  41. dma_addr_t addr;
  42. u32 ctl;
  43. int i;
  44. lp->rx_ring = dma_alloc_coherent(&lp->pdev->dev,
  45. MAX_RX_DESCR * sizeof(struct macb_dma_desc),
  46. &lp->rx_ring_dma, GFP_KERNEL);
  47. if (!lp->rx_ring) {
  48. netdev_err(dev, "unable to alloc rx ring DMA buffer\n");
  49. return -ENOMEM;
  50. }
  51. lp->rx_buffers = dma_alloc_coherent(&lp->pdev->dev,
  52. MAX_RX_DESCR * MAX_RBUFF_SZ,
  53. &lp->rx_buffers_dma, GFP_KERNEL);
  54. if (!lp->rx_buffers) {
  55. netdev_err(dev, "unable to alloc rx data DMA buffer\n");
  56. dma_free_coherent(&lp->pdev->dev,
  57. MAX_RX_DESCR * sizeof(struct macb_dma_desc),
  58. lp->rx_ring, lp->rx_ring_dma);
  59. lp->rx_ring = NULL;
  60. return -ENOMEM;
  61. }
  62. addr = lp->rx_buffers_dma;
  63. for (i = 0; i < MAX_RX_DESCR; i++) {
  64. lp->rx_ring[i].addr = addr;
  65. lp->rx_ring[i].ctrl = 0;
  66. addr += MAX_RBUFF_SZ;
  67. }
  68. /* Set the Wrap bit on the last descriptor */
  69. lp->rx_ring[MAX_RX_DESCR - 1].addr |= MACB_BIT(RX_WRAP);
  70. /* Reset buffer index */
  71. lp->rx_tail = 0;
  72. /* Program address of descriptor list in Rx Buffer Queue register */
  73. macb_writel(lp, RBQP, lp->rx_ring_dma);
  74. /* Enable Receive and Transmit */
  75. ctl = macb_readl(lp, NCR);
  76. macb_writel(lp, NCR, ctl | MACB_BIT(RE) | MACB_BIT(TE));
  77. return 0;
  78. }
  79. /* Open the ethernet interface */
  80. static int at91ether_open(struct net_device *dev)
  81. {
  82. struct macb *lp = netdev_priv(dev);
  83. u32 ctl;
  84. int ret;
  85. /* Clear internal statistics */
  86. ctl = macb_readl(lp, NCR);
  87. macb_writel(lp, NCR, ctl | MACB_BIT(CLRSTAT));
  88. macb_set_hwaddr(lp);
  89. ret = at91ether_start(dev);
  90. if (ret)
  91. return ret;
  92. /* Enable MAC interrupts */
  93. macb_writel(lp, IER, MACB_BIT(RCOMP) |
  94. MACB_BIT(RXUBR) |
  95. MACB_BIT(ISR_TUND) |
  96. MACB_BIT(ISR_RLE) |
  97. MACB_BIT(TCOMP) |
  98. MACB_BIT(ISR_ROVR) |
  99. MACB_BIT(HRESP));
  100. /* schedule a link state check */
  101. phy_start(lp->phy_dev);
  102. netif_start_queue(dev);
  103. return 0;
  104. }
  105. /* Close the interface */
  106. static int at91ether_close(struct net_device *dev)
  107. {
  108. struct macb *lp = netdev_priv(dev);
  109. u32 ctl;
  110. /* Disable Receiver and Transmitter */
  111. ctl = macb_readl(lp, NCR);
  112. macb_writel(lp, NCR, ctl & ~(MACB_BIT(TE) | MACB_BIT(RE)));
  113. /* Disable MAC interrupts */
  114. macb_writel(lp, IDR, MACB_BIT(RCOMP) |
  115. MACB_BIT(RXUBR) |
  116. MACB_BIT(ISR_TUND) |
  117. MACB_BIT(ISR_RLE) |
  118. MACB_BIT(TCOMP) |
  119. MACB_BIT(ISR_ROVR) |
  120. MACB_BIT(HRESP));
  121. netif_stop_queue(dev);
  122. dma_free_coherent(&lp->pdev->dev,
  123. MAX_RX_DESCR * sizeof(struct macb_dma_desc),
  124. lp->rx_ring, lp->rx_ring_dma);
  125. lp->rx_ring = NULL;
  126. dma_free_coherent(&lp->pdev->dev,
  127. MAX_RX_DESCR * MAX_RBUFF_SZ,
  128. lp->rx_buffers, lp->rx_buffers_dma);
  129. lp->rx_buffers = NULL;
  130. return 0;
  131. }
  132. /* Transmit packet */
  133. static int at91ether_start_xmit(struct sk_buff *skb, struct net_device *dev)
  134. {
  135. struct macb *lp = netdev_priv(dev);
  136. if (macb_readl(lp, TSR) & MACB_BIT(RM9200_BNQ)) {
  137. netif_stop_queue(dev);
  138. /* Store packet information (to free when Tx completed) */
  139. lp->skb = skb;
  140. lp->skb_length = skb->len;
  141. lp->skb_physaddr = dma_map_single(NULL, skb->data, skb->len,
  142. DMA_TO_DEVICE);
  143. /* Set address of the data in the Transmit Address register */
  144. macb_writel(lp, TAR, lp->skb_physaddr);
  145. /* Set length of the packet in the Transmit Control register */
  146. macb_writel(lp, TCR, skb->len);
  147. } else {
  148. netdev_err(dev, "%s called, but device is busy!\n", __func__);
  149. return NETDEV_TX_BUSY;
  150. }
  151. return NETDEV_TX_OK;
  152. }
  153. /* Extract received frame from buffer descriptors and sent to upper layers.
  154. * (Called from interrupt context)
  155. */
  156. static void at91ether_rx(struct net_device *dev)
  157. {
  158. struct macb *lp = netdev_priv(dev);
  159. unsigned char *p_recv;
  160. struct sk_buff *skb;
  161. unsigned int pktlen;
  162. while (lp->rx_ring[lp->rx_tail].addr & MACB_BIT(RX_USED)) {
  163. p_recv = lp->rx_buffers + lp->rx_tail * MAX_RBUFF_SZ;
  164. pktlen = MACB_BF(RX_FRMLEN, lp->rx_ring[lp->rx_tail].ctrl);
  165. skb = netdev_alloc_skb(dev, pktlen + 2);
  166. if (skb) {
  167. skb_reserve(skb, 2);
  168. memcpy(skb_put(skb, pktlen), p_recv, pktlen);
  169. skb->protocol = eth_type_trans(skb, dev);
  170. lp->stats.rx_packets++;
  171. lp->stats.rx_bytes += pktlen;
  172. netif_rx(skb);
  173. } else {
  174. lp->stats.rx_dropped++;
  175. netdev_notice(dev, "Memory squeeze, dropping packet.\n");
  176. }
  177. if (lp->rx_ring[lp->rx_tail].ctrl & MACB_BIT(RX_MHASH_MATCH))
  178. lp->stats.multicast++;
  179. /* reset ownership bit */
  180. lp->rx_ring[lp->rx_tail].addr &= ~MACB_BIT(RX_USED);
  181. /* wrap after last buffer */
  182. if (lp->rx_tail == MAX_RX_DESCR - 1)
  183. lp->rx_tail = 0;
  184. else
  185. lp->rx_tail++;
  186. }
  187. }
  188. /* MAC interrupt handler */
  189. static irqreturn_t at91ether_interrupt(int irq, void *dev_id)
  190. {
  191. struct net_device *dev = dev_id;
  192. struct macb *lp = netdev_priv(dev);
  193. u32 intstatus, ctl;
  194. /* MAC Interrupt Status register indicates what interrupts are pending.
  195. * It is automatically cleared once read.
  196. */
  197. intstatus = macb_readl(lp, ISR);
  198. /* Receive complete */
  199. if (intstatus & MACB_BIT(RCOMP))
  200. at91ether_rx(dev);
  201. /* Transmit complete */
  202. if (intstatus & MACB_BIT(TCOMP)) {
  203. /* The TCOM bit is set even if the transmission failed */
  204. if (intstatus & (MACB_BIT(ISR_TUND) | MACB_BIT(ISR_RLE)))
  205. lp->stats.tx_errors++;
  206. if (lp->skb) {
  207. dev_kfree_skb_irq(lp->skb);
  208. lp->skb = NULL;
  209. dma_unmap_single(NULL, lp->skb_physaddr, lp->skb_length, DMA_TO_DEVICE);
  210. lp->stats.tx_packets++;
  211. lp->stats.tx_bytes += lp->skb_length;
  212. }
  213. netif_wake_queue(dev);
  214. }
  215. /* Work-around for EMAC Errata section 41.3.1 */
  216. if (intstatus & MACB_BIT(RXUBR)) {
  217. ctl = macb_readl(lp, NCR);
  218. macb_writel(lp, NCR, ctl & ~MACB_BIT(RE));
  219. macb_writel(lp, NCR, ctl | MACB_BIT(RE));
  220. }
  221. if (intstatus & MACB_BIT(ISR_ROVR))
  222. netdev_err(dev, "ROVR error\n");
  223. return IRQ_HANDLED;
  224. }
  225. #ifdef CONFIG_NET_POLL_CONTROLLER
  226. static void at91ether_poll_controller(struct net_device *dev)
  227. {
  228. unsigned long flags;
  229. local_irq_save(flags);
  230. at91ether_interrupt(dev->irq, dev);
  231. local_irq_restore(flags);
  232. }
  233. #endif
  234. static const struct net_device_ops at91ether_netdev_ops = {
  235. .ndo_open = at91ether_open,
  236. .ndo_stop = at91ether_close,
  237. .ndo_start_xmit = at91ether_start_xmit,
  238. .ndo_get_stats = macb_get_stats,
  239. .ndo_set_rx_mode = macb_set_rx_mode,
  240. .ndo_set_mac_address = eth_mac_addr,
  241. .ndo_do_ioctl = macb_ioctl,
  242. .ndo_validate_addr = eth_validate_addr,
  243. .ndo_change_mtu = eth_change_mtu,
  244. #ifdef CONFIG_NET_POLL_CONTROLLER
  245. .ndo_poll_controller = at91ether_poll_controller,
  246. #endif
  247. };
  248. #if defined(CONFIG_OF)
  249. static const struct of_device_id at91ether_dt_ids[] = {
  250. { .compatible = "cdns,at91rm9200-emac" },
  251. { .compatible = "cdns,emac" },
  252. { /* sentinel */ }
  253. };
  254. MODULE_DEVICE_TABLE(of, at91ether_dt_ids);
  255. static int at91ether_get_phy_mode_dt(struct platform_device *pdev)
  256. {
  257. struct device_node *np = pdev->dev.of_node;
  258. if (np)
  259. return of_get_phy_mode(np);
  260. return -ENODEV;
  261. }
  262. static int at91ether_get_hwaddr_dt(struct macb *bp)
  263. {
  264. struct device_node *np = bp->pdev->dev.of_node;
  265. if (np) {
  266. const char *mac = of_get_mac_address(np);
  267. if (mac) {
  268. memcpy(bp->dev->dev_addr, mac, ETH_ALEN);
  269. return 0;
  270. }
  271. }
  272. return -ENODEV;
  273. }
  274. #else
  275. static int at91ether_get_phy_mode_dt(struct platform_device *pdev)
  276. {
  277. return -ENODEV;
  278. }
  279. static int at91ether_get_hwaddr_dt(struct macb *bp)
  280. {
  281. return -ENODEV;
  282. }
  283. #endif
  284. /* Detect MAC & PHY and perform ethernet interface initialization */
  285. static int __init at91ether_probe(struct platform_device *pdev)
  286. {
  287. struct macb_platform_data *board_data = pdev->dev.platform_data;
  288. struct resource *regs;
  289. struct net_device *dev;
  290. struct phy_device *phydev;
  291. struct pinctrl *pinctrl;
  292. struct macb *lp;
  293. int res;
  294. u32 reg;
  295. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  296. if (!regs)
  297. return -ENOENT;
  298. pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
  299. if (IS_ERR(pinctrl)) {
  300. res = PTR_ERR(pinctrl);
  301. if (res == -EPROBE_DEFER)
  302. return res;
  303. dev_warn(&pdev->dev, "No pinctrl provided\n");
  304. }
  305. dev = alloc_etherdev(sizeof(struct macb));
  306. if (!dev)
  307. return -ENOMEM;
  308. lp = netdev_priv(dev);
  309. lp->pdev = pdev;
  310. lp->dev = dev;
  311. spin_lock_init(&lp->lock);
  312. /* physical base address */
  313. dev->base_addr = regs->start;
  314. lp->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs));
  315. if (!lp->regs) {
  316. res = -ENOMEM;
  317. goto err_free_dev;
  318. }
  319. /* Clock */
  320. lp->pclk = devm_clk_get(&pdev->dev, "ether_clk");
  321. if (IS_ERR(lp->pclk)) {
  322. res = PTR_ERR(lp->pclk);
  323. goto err_free_dev;
  324. }
  325. clk_enable(lp->pclk);
  326. /* Install the interrupt handler */
  327. dev->irq = platform_get_irq(pdev, 0);
  328. res = devm_request_irq(&pdev->dev, dev->irq, at91ether_interrupt, 0, dev->name, dev);
  329. if (res)
  330. goto err_disable_clock;
  331. ether_setup(dev);
  332. dev->netdev_ops = &at91ether_netdev_ops;
  333. dev->ethtool_ops = &macb_ethtool_ops;
  334. platform_set_drvdata(pdev, dev);
  335. SET_NETDEV_DEV(dev, &pdev->dev);
  336. res = at91ether_get_hwaddr_dt(lp);
  337. if (res < 0)
  338. macb_get_hwaddr(lp);
  339. res = at91ether_get_phy_mode_dt(pdev);
  340. if (res < 0) {
  341. if (board_data && board_data->is_rmii)
  342. lp->phy_interface = PHY_INTERFACE_MODE_RMII;
  343. else
  344. lp->phy_interface = PHY_INTERFACE_MODE_MII;
  345. } else {
  346. lp->phy_interface = res;
  347. }
  348. macb_writel(lp, NCR, 0);
  349. reg = MACB_BF(CLK, MACB_CLK_DIV32) | MACB_BIT(BIG);
  350. if (lp->phy_interface == PHY_INTERFACE_MODE_RMII)
  351. reg |= MACB_BIT(RM9200_RMII);
  352. macb_writel(lp, NCFGR, reg);
  353. /* Register the network interface */
  354. res = register_netdev(dev);
  355. if (res)
  356. goto err_disable_clock;
  357. if (macb_mii_init(lp) != 0)
  358. goto err_out_unregister_netdev;
  359. /* will be enabled in open() */
  360. netif_carrier_off(dev);
  361. phydev = lp->phy_dev;
  362. netdev_info(dev, "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
  363. phydev->drv->name, dev_name(&phydev->dev),
  364. phydev->irq);
  365. /* Display ethernet banner */
  366. netdev_info(dev, "AT91 ethernet at 0x%08lx int=%d (%pM)\n",
  367. dev->base_addr, dev->irq, dev->dev_addr);
  368. return 0;
  369. err_out_unregister_netdev:
  370. unregister_netdev(dev);
  371. err_disable_clock:
  372. clk_disable(lp->pclk);
  373. err_free_dev:
  374. free_netdev(dev);
  375. return res;
  376. }
  377. static int at91ether_remove(struct platform_device *pdev)
  378. {
  379. struct net_device *dev = platform_get_drvdata(pdev);
  380. struct macb *lp = netdev_priv(dev);
  381. if (lp->phy_dev)
  382. phy_disconnect(lp->phy_dev);
  383. mdiobus_unregister(lp->mii_bus);
  384. kfree(lp->mii_bus->irq);
  385. mdiobus_free(lp->mii_bus);
  386. unregister_netdev(dev);
  387. clk_disable(lp->pclk);
  388. free_netdev(dev);
  389. platform_set_drvdata(pdev, NULL);
  390. return 0;
  391. }
  392. #ifdef CONFIG_PM
  393. static int at91ether_suspend(struct platform_device *pdev, pm_message_t mesg)
  394. {
  395. struct net_device *net_dev = platform_get_drvdata(pdev);
  396. struct macb *lp = netdev_priv(net_dev);
  397. if (netif_running(net_dev)) {
  398. netif_stop_queue(net_dev);
  399. netif_device_detach(net_dev);
  400. clk_disable(lp->pclk);
  401. }
  402. return 0;
  403. }
  404. static int at91ether_resume(struct platform_device *pdev)
  405. {
  406. struct net_device *net_dev = platform_get_drvdata(pdev);
  407. struct macb *lp = netdev_priv(net_dev);
  408. if (netif_running(net_dev)) {
  409. clk_enable(lp->pclk);
  410. netif_device_attach(net_dev);
  411. netif_start_queue(net_dev);
  412. }
  413. return 0;
  414. }
  415. #else
  416. #define at91ether_suspend NULL
  417. #define at91ether_resume NULL
  418. #endif
  419. static struct platform_driver at91ether_driver = {
  420. .remove = at91ether_remove,
  421. .suspend = at91ether_suspend,
  422. .resume = at91ether_resume,
  423. .driver = {
  424. .name = "at91_ether",
  425. .owner = THIS_MODULE,
  426. .of_match_table = of_match_ptr(at91ether_dt_ids),
  427. },
  428. };
  429. static int __init at91ether_init(void)
  430. {
  431. return platform_driver_probe(&at91ether_driver, at91ether_probe);
  432. }
  433. static void __exit at91ether_exit(void)
  434. {
  435. platform_driver_unregister(&at91ether_driver);
  436. }
  437. module_init(at91ether_init)
  438. module_exit(at91ether_exit)
  439. MODULE_LICENSE("GPL");
  440. MODULE_DESCRIPTION("AT91RM9200 EMAC Ethernet driver");
  441. MODULE_AUTHOR("Andrew Victor");
  442. MODULE_ALIAS("platform:at91_ether");