cnic.h 12 KB

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  1. /* cnic.h: Broadcom CNIC core network driver.
  2. *
  3. * Copyright (c) 2006-2011 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. *
  9. */
  10. #ifndef CNIC_H
  11. #define CNIC_H
  12. #define HC_INDEX_ISCSI_EQ_CONS 6
  13. #define HC_INDEX_FCOE_EQ_CONS 3
  14. #define HC_SP_INDEX_ETH_ISCSI_CQ_CONS 5
  15. #define HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS 1
  16. #define KWQ_PAGE_CNT 4
  17. #define KCQ_PAGE_CNT 16
  18. #define KWQ_CID 24
  19. #define KCQ_CID 25
  20. /*
  21. * krnlq_context definition
  22. */
  23. #define L5_KRNLQ_FLAGS 0x00000000
  24. #define L5_KRNLQ_SIZE 0x00000000
  25. #define L5_KRNLQ_TYPE 0x00000000
  26. #define KRNLQ_FLAGS_PG_SZ (0xf<<0)
  27. #define KRNLQ_FLAGS_PG_SZ_256 (0<<0)
  28. #define KRNLQ_FLAGS_PG_SZ_512 (1<<0)
  29. #define KRNLQ_FLAGS_PG_SZ_1K (2<<0)
  30. #define KRNLQ_FLAGS_PG_SZ_2K (3<<0)
  31. #define KRNLQ_FLAGS_PG_SZ_4K (4<<0)
  32. #define KRNLQ_FLAGS_PG_SZ_8K (5<<0)
  33. #define KRNLQ_FLAGS_PG_SZ_16K (6<<0)
  34. #define KRNLQ_FLAGS_PG_SZ_32K (7<<0)
  35. #define KRNLQ_FLAGS_PG_SZ_64K (8<<0)
  36. #define KRNLQ_FLAGS_PG_SZ_128K (9<<0)
  37. #define KRNLQ_FLAGS_PG_SZ_256K (10<<0)
  38. #define KRNLQ_FLAGS_PG_SZ_512K (11<<0)
  39. #define KRNLQ_FLAGS_PG_SZ_1M (12<<0)
  40. #define KRNLQ_FLAGS_PG_SZ_2M (13<<0)
  41. #define KRNLQ_FLAGS_QE_SELF_SEQ (1<<15)
  42. #define KRNLQ_SIZE_TYPE_SIZE ((((0x28 + 0x1f) & ~0x1f) / 0x20) << 16)
  43. #define KRNLQ_TYPE_TYPE (0xf<<28)
  44. #define KRNLQ_TYPE_TYPE_EMPTY (0<<28)
  45. #define KRNLQ_TYPE_TYPE_KRNLQ (6<<28)
  46. #define L5_KRNLQ_HOST_QIDX 0x00000004
  47. #define L5_KRNLQ_HOST_FW_QIDX 0x00000008
  48. #define L5_KRNLQ_NX_QE_SELF_SEQ 0x0000000c
  49. #define L5_KRNLQ_QE_SELF_SEQ_MAX 0x0000000c
  50. #define L5_KRNLQ_NX_QE_HADDR_HI 0x00000010
  51. #define L5_KRNLQ_NX_QE_HADDR_LO 0x00000014
  52. #define L5_KRNLQ_PGTBL_PGIDX 0x00000018
  53. #define L5_KRNLQ_NX_PG_QIDX 0x00000018
  54. #define L5_KRNLQ_PGTBL_NPAGES 0x0000001c
  55. #define L5_KRNLQ_QIDX_INCR 0x0000001c
  56. #define L5_KRNLQ_PGTBL_HADDR_HI 0x00000020
  57. #define L5_KRNLQ_PGTBL_HADDR_LO 0x00000024
  58. #define BNX2_PG_CTX_MAP 0x1a0034
  59. #define BNX2_ISCSI_CTX_MAP 0x1a0074
  60. #define MAX_COMPLETED_KCQE 64
  61. #define MAX_CNIC_L5_CONTEXT 256
  62. #define MAX_CM_SK_TBL_SZ MAX_CNIC_L5_CONTEXT
  63. #define MAX_ISCSI_TBL_SZ 256
  64. #define CNIC_LOCAL_PORT_MIN 60000
  65. #define CNIC_LOCAL_PORT_MAX 61024
  66. #define CNIC_LOCAL_PORT_RANGE (CNIC_LOCAL_PORT_MAX - CNIC_LOCAL_PORT_MIN)
  67. #define KWQE_CNT (BNX2_PAGE_SIZE / sizeof(struct kwqe))
  68. #define KCQE_CNT (BNX2_PAGE_SIZE / sizeof(struct kcqe))
  69. #define MAX_KWQE_CNT (KWQE_CNT - 1)
  70. #define MAX_KCQE_CNT (KCQE_CNT - 1)
  71. #define MAX_KWQ_IDX ((KWQ_PAGE_CNT * KWQE_CNT) - 1)
  72. #define MAX_KCQ_IDX ((KCQ_PAGE_CNT * KCQE_CNT) - 1)
  73. #define KWQ_PG(x) (((x) & ~MAX_KWQE_CNT) >> (BNX2_PAGE_BITS - 5))
  74. #define KWQ_IDX(x) ((x) & MAX_KWQE_CNT)
  75. #define KCQ_PG(x) (((x) & ~MAX_KCQE_CNT) >> (BNX2_PAGE_BITS - 5))
  76. #define KCQ_IDX(x) ((x) & MAX_KCQE_CNT)
  77. #define BNX2X_NEXT_KCQE(x) (((x) & (MAX_KCQE_CNT - 1)) == \
  78. (MAX_KCQE_CNT - 1)) ? \
  79. (x) + 2 : (x) + 1
  80. #define BNX2X_KWQ_DATA_PG(cp, x) ((x) / (cp)->kwq_16_data_pp)
  81. #define BNX2X_KWQ_DATA_IDX(cp, x) ((x) % (cp)->kwq_16_data_pp)
  82. #define BNX2X_KWQ_DATA(cp, x) \
  83. &(cp)->kwq_16_data[BNX2X_KWQ_DATA_PG(cp, x)][BNX2X_KWQ_DATA_IDX(cp, x)]
  84. #define DEF_IPID_START 0x8000
  85. #define DEF_KA_TIMEOUT 10000
  86. #define DEF_KA_INTERVAL 300000
  87. #define DEF_KA_MAX_PROBE_COUNT 3
  88. #define DEF_TOS 0
  89. #define DEF_TTL 0xfe
  90. #define DEF_SND_SEQ_SCALE 0
  91. #define DEF_RCV_BUF 0xffff
  92. #define DEF_SND_BUF 0xffff
  93. #define DEF_SEED 0
  94. #define DEF_MAX_RT_TIME 500
  95. #define DEF_MAX_DA_COUNT 2
  96. #define DEF_SWS_TIMER 1000
  97. #define DEF_MAX_CWND 0xffff
  98. struct cnic_ctx {
  99. u32 cid;
  100. void *ctx;
  101. dma_addr_t mapping;
  102. };
  103. #define BNX2_MAX_CID 0x2000
  104. struct cnic_dma {
  105. int num_pages;
  106. void **pg_arr;
  107. dma_addr_t *pg_map_arr;
  108. int pgtbl_size;
  109. u32 *pgtbl;
  110. dma_addr_t pgtbl_map;
  111. };
  112. struct cnic_id_tbl {
  113. spinlock_t lock;
  114. u32 start;
  115. u32 max;
  116. u32 next;
  117. unsigned long *table;
  118. };
  119. #define CNIC_KWQ16_DATA_SIZE 128
  120. struct kwqe_16_data {
  121. u8 data[CNIC_KWQ16_DATA_SIZE];
  122. };
  123. struct cnic_iscsi {
  124. struct cnic_dma task_array_info;
  125. struct cnic_dma r2tq_info;
  126. struct cnic_dma hq_info;
  127. };
  128. struct cnic_context {
  129. u32 cid;
  130. struct kwqe_16_data *kwqe_data;
  131. dma_addr_t kwqe_data_mapping;
  132. wait_queue_head_t waitq;
  133. int wait_cond;
  134. unsigned long timestamp;
  135. unsigned long ctx_flags;
  136. #define CTX_FL_OFFLD_START 0
  137. #define CTX_FL_DELETE_WAIT 1
  138. #define CTX_FL_CID_ERROR 2
  139. u8 ulp_proto_id;
  140. union {
  141. struct cnic_iscsi *iscsi;
  142. } proto;
  143. };
  144. struct kcq_info {
  145. struct cnic_dma dma;
  146. struct kcqe **kcq;
  147. u16 *hw_prod_idx_ptr;
  148. u16 sw_prod_idx;
  149. u16 *status_idx_ptr;
  150. u32 io_addr;
  151. u16 (*next_idx)(u16);
  152. u16 (*hw_idx)(u16);
  153. };
  154. struct cnic_uio_dev {
  155. struct uio_info cnic_uinfo;
  156. u32 uio_dev;
  157. int l2_ring_size;
  158. void *l2_ring;
  159. dma_addr_t l2_ring_map;
  160. int l2_buf_size;
  161. void *l2_buf;
  162. dma_addr_t l2_buf_map;
  163. struct cnic_dev *dev;
  164. struct pci_dev *pdev;
  165. struct list_head list;
  166. };
  167. struct cnic_local {
  168. spinlock_t cnic_ulp_lock;
  169. void *ulp_handle[MAX_CNIC_ULP_TYPE];
  170. unsigned long ulp_flags[MAX_CNIC_ULP_TYPE];
  171. #define ULP_F_INIT 0
  172. #define ULP_F_START 1
  173. #define ULP_F_CALL_PENDING 2
  174. struct cnic_ulp_ops __rcu *ulp_ops[MAX_CNIC_ULP_TYPE];
  175. unsigned long cnic_local_flags;
  176. #define CNIC_LCL_FL_KWQ_INIT 0x0
  177. #define CNIC_LCL_FL_L2_WAIT 0x1
  178. #define CNIC_LCL_FL_RINGS_INITED 0x2
  179. #define CNIC_LCL_FL_STOP_ISCSI 0x4
  180. struct cnic_dev *dev;
  181. struct cnic_eth_dev *ethdev;
  182. struct cnic_uio_dev *udev;
  183. int l2_rx_ring_size;
  184. int l2_single_buf_size;
  185. u16 *rx_cons_ptr;
  186. u16 *tx_cons_ptr;
  187. u16 rx_cons;
  188. u16 tx_cons;
  189. struct cnic_dma kwq_info;
  190. struct kwqe **kwq;
  191. struct cnic_dma kwq_16_data_info;
  192. u16 max_kwq_idx;
  193. u16 kwq_prod_idx;
  194. u32 kwq_io_addr;
  195. u16 *kwq_con_idx_ptr;
  196. u16 kwq_con_idx;
  197. struct kcq_info kcq1;
  198. struct kcq_info kcq2;
  199. union {
  200. void *gen;
  201. struct status_block_msix *bnx2;
  202. struct host_hc_status_block_e1x *bnx2x_e1x;
  203. /* index values - which counter to update */
  204. #define SM_RX_ID 0
  205. #define SM_TX_ID 1
  206. } status_blk;
  207. struct host_sp_status_block *bnx2x_def_status_blk;
  208. u32 status_blk_num;
  209. u32 bnx2x_igu_sb_id;
  210. u32 int_num;
  211. u32 last_status_idx;
  212. struct tasklet_struct cnic_irq_task;
  213. struct kcqe *completed_kcq[MAX_COMPLETED_KCQE];
  214. struct cnic_sock *csk_tbl;
  215. struct cnic_id_tbl csk_port_tbl;
  216. struct cnic_dma gbl_buf_info;
  217. struct cnic_iscsi *iscsi_tbl;
  218. struct cnic_context *ctx_tbl;
  219. struct cnic_id_tbl cid_tbl;
  220. atomic_t iscsi_conn;
  221. u32 iscsi_start_cid;
  222. u32 fcoe_init_cid;
  223. u32 fcoe_start_cid;
  224. struct cnic_id_tbl fcoe_cid_tbl;
  225. u32 max_cid_space;
  226. /* per connection parameters */
  227. int num_iscsi_tasks;
  228. int num_ccells;
  229. int task_array_size;
  230. int r2tq_size;
  231. int hq_size;
  232. int num_cqs;
  233. struct delayed_work delete_task;
  234. struct cnic_ctx *ctx_arr;
  235. int ctx_blks;
  236. int ctx_blk_size;
  237. unsigned long ctx_align;
  238. int cids_per_blk;
  239. u32 chip_id;
  240. int func;
  241. u32 pfid;
  242. u8 port_mode;
  243. u32 shmem_base;
  244. struct cnic_ops *cnic_ops;
  245. int (*start_hw)(struct cnic_dev *);
  246. void (*stop_hw)(struct cnic_dev *);
  247. void (*setup_pgtbl)(struct cnic_dev *,
  248. struct cnic_dma *);
  249. int (*alloc_resc)(struct cnic_dev *);
  250. void (*free_resc)(struct cnic_dev *);
  251. int (*start_cm)(struct cnic_dev *);
  252. void (*stop_cm)(struct cnic_dev *);
  253. void (*enable_int)(struct cnic_dev *);
  254. void (*disable_int_sync)(struct cnic_dev *);
  255. void (*ack_int)(struct cnic_dev *);
  256. void (*arm_int)(struct cnic_dev *, u32 index);
  257. void (*close_conn)(struct cnic_sock *, u32 opcode);
  258. };
  259. struct bnx2x_bd_chain_next {
  260. u32 addr_lo;
  261. u32 addr_hi;
  262. u8 reserved[8];
  263. };
  264. #define ISCSI_DEFAULT_MAX_OUTSTANDING_R2T (1)
  265. #define ISCSI_RAMROD_CMD_ID_UPDATE_CONN (ISCSI_KCQE_OPCODE_UPDATE_CONN)
  266. #define ISCSI_RAMROD_CMD_ID_INIT (ISCSI_KCQE_OPCODE_INIT)
  267. #define CDU_REGION_NUMBER_XCM_AG 2
  268. #define CDU_REGION_NUMBER_UCM_AG 4
  269. #define CDU_VALID_DATA(_cid, _region, _type) \
  270. (((_cid) << 8) | (((_region)&0xf)<<4) | (((_type)&0xf)))
  271. #define CDU_CRC8(_cid, _region, _type) \
  272. (calc_crc8(CDU_VALID_DATA(_cid, _region, _type), 0xff))
  273. #define CDU_RSRVD_VALUE_TYPE_A(_cid, _region, _type) \
  274. (0x80 | ((CDU_CRC8(_cid, _region, _type)) & 0x7f))
  275. #define BNX2X_CONTEXT_MEM_SIZE 1024
  276. #define BNX2X_FCOE_CID 16
  277. #define BNX2X_ISCSI_START_CID 18
  278. #define BNX2X_ISCSI_NUM_CONNECTIONS 128
  279. #define BNX2X_ISCSI_TASK_CONTEXT_SIZE 128
  280. #define BNX2X_ISCSI_MAX_PENDING_R2TS 4
  281. #define BNX2X_ISCSI_R2TQE_SIZE 8
  282. #define BNX2X_ISCSI_HQ_BD_SIZE 64
  283. #define BNX2X_ISCSI_GLB_BUF_SIZE 64
  284. #define BNX2X_ISCSI_PBL_NOT_CACHED 0xff
  285. #define BNX2X_ISCSI_PDU_HEADER_NOT_CACHED 0xff
  286. #define BNX2X_FCOE_NUM_CONNECTIONS 1024
  287. #define BNX2X_FCOE_L5_CID_BASE MAX_ISCSI_TBL_SZ
  288. #define BNX2X_CHIP_NUM_57710 0x164e
  289. #define BNX2X_CHIP_NUM_57711 0x164f
  290. #define BNX2X_CHIP_NUM_57711E 0x1650
  291. #define BNX2X_CHIP_NUM_57712 0x1662
  292. #define BNX2X_CHIP_NUM_57712E 0x1663
  293. #define BNX2X_CHIP_NUM_57713 0x1651
  294. #define BNX2X_CHIP_NUM_57713E 0x1652
  295. #define BNX2X_CHIP_NUM_57800 0x168a
  296. #define BNX2X_CHIP_NUM_57810 0x168e
  297. #define BNX2X_CHIP_NUM_57840 0x168d
  298. #define BNX2X_CHIP_NUM(x) (x >> 16)
  299. #define BNX2X_CHIP_IS_57710(x) \
  300. (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57710)
  301. #define BNX2X_CHIP_IS_57711(x) \
  302. (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57711)
  303. #define BNX2X_CHIP_IS_57711E(x) \
  304. (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57711E)
  305. #define BNX2X_CHIP_IS_E1H(x) \
  306. (BNX2X_CHIP_IS_57711(x) || BNX2X_CHIP_IS_57711E(x))
  307. #define BNX2X_CHIP_IS_57712(x) \
  308. (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57712)
  309. #define BNX2X_CHIP_IS_57712E(x) \
  310. (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57712E)
  311. #define BNX2X_CHIP_IS_57713(x) \
  312. (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57713)
  313. #define BNX2X_CHIP_IS_57713E(x) \
  314. (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57713E)
  315. #define BNX2X_CHIP_IS_57800(x) \
  316. (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57800)
  317. #define BNX2X_CHIP_IS_57810(x) \
  318. (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57810)
  319. #define BNX2X_CHIP_IS_57840(x) \
  320. (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57840)
  321. #define BNX2X_CHIP_IS_E2(x) \
  322. (BNX2X_CHIP_IS_57712(x) || BNX2X_CHIP_IS_57712E(x) || \
  323. BNX2X_CHIP_IS_57713(x) || BNX2X_CHIP_IS_57713E(x))
  324. #define BNX2X_CHIP_IS_E3(x) \
  325. (BNX2X_CHIP_IS_57800(x) || BNX2X_CHIP_IS_57810(x) || \
  326. BNX2X_CHIP_IS_57840(x))
  327. #define BNX2X_CHIP_IS_E2_PLUS(x) (BNX2X_CHIP_IS_E2(x) || BNX2X_CHIP_IS_E3(x))
  328. #define BNX2X_RX_DESC_CNT (BNX2_PAGE_SIZE / \
  329. sizeof(struct eth_rx_bd))
  330. #define BNX2X_MAX_RX_DESC_CNT (BNX2X_RX_DESC_CNT - 2)
  331. #define BNX2X_RCQ_DESC_CNT (BNX2_PAGE_SIZE / \
  332. sizeof(union eth_rx_cqe))
  333. #define BNX2X_MAX_RCQ_DESC_CNT (BNX2X_RCQ_DESC_CNT - 1)
  334. #define BNX2X_NEXT_RCQE(x) (((x) & BNX2X_MAX_RCQ_DESC_CNT) == \
  335. (BNX2X_MAX_RCQ_DESC_CNT - 1)) ? \
  336. ((x) + 2) : ((x) + 1)
  337. #define BNX2X_DEF_SB_ID HC_SP_SB_ID
  338. #define BNX2X_SHMEM_MF_BLK_OFFSET 0x7e4
  339. #define BNX2X_SHMEM_ADDR(base, field) (base + \
  340. offsetof(struct shmem_region, field))
  341. #define BNX2X_SHMEM2_ADDR(base, field) (base + \
  342. offsetof(struct shmem2_region, field))
  343. #define BNX2X_SHMEM2_HAS(base, field) \
  344. ((base) && \
  345. (CNIC_RD(dev, BNX2X_SHMEM2_ADDR(base, size)) > \
  346. offsetof(struct shmem2_region, field)))
  347. #define BNX2X_MF_CFG_ADDR(base, field) \
  348. ((base) + offsetof(struct mf_cfg, field))
  349. #ifndef ETH_MAX_RX_CLIENTS_E2
  350. #define ETH_MAX_RX_CLIENTS_E2 ETH_MAX_RX_CLIENTS_E1H
  351. #endif
  352. #define CNIC_PORT(cp) ((cp)->pfid & 1)
  353. #define CNIC_FUNC(cp) ((cp)->func)
  354. #define CNIC_PATH(cp) (!BNX2X_CHIP_IS_E2_PLUS(cp->chip_id) ? \
  355. 0 : (CNIC_FUNC(cp) & 1))
  356. #define CNIC_E1HVN(cp) ((cp)->pfid >> 1)
  357. #define BNX2X_HW_CID(cp, x) ((CNIC_PORT(cp) << 23) | \
  358. (CNIC_E1HVN(cp) << 17) | (x))
  359. #define BNX2X_SW_CID(x) (x & 0x1ffff)
  360. #define BNX2X_CL_QZONE_ID(cp, cli) \
  361. (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id) ? cli : \
  362. cli + (CNIC_PORT(cp) * ETH_MAX_RX_CLIENTS_E1H))
  363. #ifndef MAX_STAT_COUNTER_ID
  364. #define MAX_STAT_COUNTER_ID \
  365. (BNX2X_CHIP_IS_E1H((cp)->chip_id) ? MAX_STAT_COUNTER_ID_E1H : \
  366. ((BNX2X_CHIP_IS_E2_PLUS((cp)->chip_id)) ? MAX_STAT_COUNTER_ID_E2 :\
  367. MAX_STAT_COUNTER_ID_E1))
  368. #endif
  369. #define CNIC_SUPPORTS_FCOE(cp) \
  370. (BNX2X_CHIP_IS_E2_PLUS((cp)->chip_id) && \
  371. !((cp)->ethdev->drv_state & CNIC_DRV_STATE_NO_FCOE))
  372. #define CNIC_RAMROD_TMO (HZ / 4)
  373. #endif