bnx2x_stats.c 61 KB

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  1. /* bnx2x_stats.c: Broadcom Everest network driver.
  2. *
  3. * Copyright (c) 2007-2013 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. *
  9. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  10. * Written by: Eliezer Tamir
  11. * Based on code from Michael Chan's bnx2 driver
  12. * UDP CSUM errata workaround by Arik Gendelman
  13. * Slowpath and fastpath rework by Vladislav Zolotarov
  14. * Statistics and Link management by Yitchak Gertner
  15. *
  16. */
  17. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  18. #include "bnx2x_stats.h"
  19. #include "bnx2x_cmn.h"
  20. #include "bnx2x_sriov.h"
  21. /* Statistics */
  22. /*
  23. * General service functions
  24. */
  25. static inline long bnx2x_hilo(u32 *hiref)
  26. {
  27. u32 lo = *(hiref + 1);
  28. #if (BITS_PER_LONG == 64)
  29. u32 hi = *hiref;
  30. return HILO_U64(hi, lo);
  31. #else
  32. return lo;
  33. #endif
  34. }
  35. static inline u16 bnx2x_get_port_stats_dma_len(struct bnx2x *bp)
  36. {
  37. u16 res = 0;
  38. /* 'newest' convention - shmem2 cotains the size of the port stats */
  39. if (SHMEM2_HAS(bp, sizeof_port_stats)) {
  40. u32 size = SHMEM2_RD(bp, sizeof_port_stats);
  41. if (size)
  42. res = size;
  43. /* prevent newer BC from causing buffer overflow */
  44. if (res > sizeof(struct host_port_stats))
  45. res = sizeof(struct host_port_stats);
  46. }
  47. /* Older convention - all BCs support the port stats' fields up until
  48. * the 'not_used' field
  49. */
  50. if (!res) {
  51. res = offsetof(struct host_port_stats, not_used) + 4;
  52. /* if PFC stats are supported by the MFW, DMA them as well */
  53. if (bp->flags & BC_SUPPORTS_PFC_STATS) {
  54. res += offsetof(struct host_port_stats,
  55. pfc_frames_rx_lo) -
  56. offsetof(struct host_port_stats,
  57. pfc_frames_tx_hi) + 4 ;
  58. }
  59. }
  60. res >>= 2;
  61. WARN_ON(res > 2 * DMAE_LEN32_RD_MAX);
  62. return res;
  63. }
  64. /*
  65. * Init service functions
  66. */
  67. static void bnx2x_dp_stats(struct bnx2x *bp)
  68. {
  69. int i;
  70. DP(BNX2X_MSG_STATS, "dumping stats:\n"
  71. "fw_stats_req\n"
  72. " hdr\n"
  73. " cmd_num %d\n"
  74. " reserved0 %d\n"
  75. " drv_stats_counter %d\n"
  76. " reserved1 %d\n"
  77. " stats_counters_addrs %x %x\n",
  78. bp->fw_stats_req->hdr.cmd_num,
  79. bp->fw_stats_req->hdr.reserved0,
  80. bp->fw_stats_req->hdr.drv_stats_counter,
  81. bp->fw_stats_req->hdr.reserved1,
  82. bp->fw_stats_req->hdr.stats_counters_addrs.hi,
  83. bp->fw_stats_req->hdr.stats_counters_addrs.lo);
  84. for (i = 0; i < bp->fw_stats_req->hdr.cmd_num; i++) {
  85. DP(BNX2X_MSG_STATS,
  86. "query[%d]\n"
  87. " kind %d\n"
  88. " index %d\n"
  89. " funcID %d\n"
  90. " reserved %d\n"
  91. " address %x %x\n",
  92. i, bp->fw_stats_req->query[i].kind,
  93. bp->fw_stats_req->query[i].index,
  94. bp->fw_stats_req->query[i].funcID,
  95. bp->fw_stats_req->query[i].reserved,
  96. bp->fw_stats_req->query[i].address.hi,
  97. bp->fw_stats_req->query[i].address.lo);
  98. }
  99. }
  100. /* Post the next statistics ramrod. Protect it with the spin in
  101. * order to ensure the strict order between statistics ramrods
  102. * (each ramrod has a sequence number passed in a
  103. * bp->fw_stats_req->hdr.drv_stats_counter and ramrods must be
  104. * sent in order).
  105. */
  106. static void bnx2x_storm_stats_post(struct bnx2x *bp)
  107. {
  108. if (!bp->stats_pending) {
  109. int rc;
  110. spin_lock_bh(&bp->stats_lock);
  111. if (bp->stats_pending) {
  112. spin_unlock_bh(&bp->stats_lock);
  113. return;
  114. }
  115. bp->fw_stats_req->hdr.drv_stats_counter =
  116. cpu_to_le16(bp->stats_counter++);
  117. DP(BNX2X_MSG_STATS, "Sending statistics ramrod %d\n",
  118. bp->fw_stats_req->hdr.drv_stats_counter);
  119. /* adjust the ramrod to include VF queues statistics */
  120. bnx2x_iov_adjust_stats_req(bp);
  121. bnx2x_dp_stats(bp);
  122. /* send FW stats ramrod */
  123. rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0,
  124. U64_HI(bp->fw_stats_req_mapping),
  125. U64_LO(bp->fw_stats_req_mapping),
  126. NONE_CONNECTION_TYPE);
  127. if (rc == 0)
  128. bp->stats_pending = 1;
  129. spin_unlock_bh(&bp->stats_lock);
  130. }
  131. }
  132. static void bnx2x_hw_stats_post(struct bnx2x *bp)
  133. {
  134. struct dmae_command *dmae = &bp->stats_dmae;
  135. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  136. *stats_comp = DMAE_COMP_VAL;
  137. if (CHIP_REV_IS_SLOW(bp))
  138. return;
  139. /* Update MCP's statistics if possible */
  140. if (bp->func_stx)
  141. memcpy(bnx2x_sp(bp, func_stats), &bp->func_stats,
  142. sizeof(bp->func_stats));
  143. /* loader */
  144. if (bp->executer_idx) {
  145. int loader_idx = PMF_DMAE_C(bp);
  146. u32 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  147. true, DMAE_COMP_GRC);
  148. opcode = bnx2x_dmae_opcode_clr_src_reset(opcode);
  149. memset(dmae, 0, sizeof(struct dmae_command));
  150. dmae->opcode = opcode;
  151. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0]));
  152. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0]));
  153. dmae->dst_addr_lo = (DMAE_REG_CMD_MEM +
  154. sizeof(struct dmae_command) *
  155. (loader_idx + 1)) >> 2;
  156. dmae->dst_addr_hi = 0;
  157. dmae->len = sizeof(struct dmae_command) >> 2;
  158. if (CHIP_IS_E1(bp))
  159. dmae->len--;
  160. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx + 1] >> 2;
  161. dmae->comp_addr_hi = 0;
  162. dmae->comp_val = 1;
  163. *stats_comp = 0;
  164. bnx2x_post_dmae(bp, dmae, loader_idx);
  165. } else if (bp->func_stx) {
  166. *stats_comp = 0;
  167. bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp));
  168. }
  169. }
  170. static int bnx2x_stats_comp(struct bnx2x *bp)
  171. {
  172. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  173. int cnt = 10;
  174. might_sleep();
  175. while (*stats_comp != DMAE_COMP_VAL) {
  176. if (!cnt) {
  177. BNX2X_ERR("timeout waiting for stats finished\n");
  178. break;
  179. }
  180. cnt--;
  181. usleep_range(1000, 2000);
  182. }
  183. return 1;
  184. }
  185. /*
  186. * Statistics service functions
  187. */
  188. static void bnx2x_stats_pmf_update(struct bnx2x *bp)
  189. {
  190. struct dmae_command *dmae;
  191. u32 opcode;
  192. int loader_idx = PMF_DMAE_C(bp);
  193. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  194. /* sanity */
  195. if (!bp->port.pmf || !bp->port.port_stx) {
  196. BNX2X_ERR("BUG!\n");
  197. return;
  198. }
  199. bp->executer_idx = 0;
  200. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, false, 0);
  201. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  202. dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC);
  203. dmae->src_addr_lo = bp->port.port_stx >> 2;
  204. dmae->src_addr_hi = 0;
  205. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  206. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  207. dmae->len = DMAE_LEN32_RD_MAX;
  208. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  209. dmae->comp_addr_hi = 0;
  210. dmae->comp_val = 1;
  211. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  212. dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
  213. dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX;
  214. dmae->src_addr_hi = 0;
  215. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) +
  216. DMAE_LEN32_RD_MAX * 4);
  217. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats) +
  218. DMAE_LEN32_RD_MAX * 4);
  219. dmae->len = bnx2x_get_port_stats_dma_len(bp) - DMAE_LEN32_RD_MAX;
  220. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  221. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  222. dmae->comp_val = DMAE_COMP_VAL;
  223. *stats_comp = 0;
  224. bnx2x_hw_stats_post(bp);
  225. bnx2x_stats_comp(bp);
  226. }
  227. static void bnx2x_port_stats_init(struct bnx2x *bp)
  228. {
  229. struct dmae_command *dmae;
  230. int port = BP_PORT(bp);
  231. u32 opcode;
  232. int loader_idx = PMF_DMAE_C(bp);
  233. u32 mac_addr;
  234. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  235. /* sanity */
  236. if (!bp->link_vars.link_up || !bp->port.pmf) {
  237. BNX2X_ERR("BUG!\n");
  238. return;
  239. }
  240. bp->executer_idx = 0;
  241. /* MCP */
  242. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  243. true, DMAE_COMP_GRC);
  244. if (bp->port.port_stx) {
  245. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  246. dmae->opcode = opcode;
  247. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  248. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  249. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  250. dmae->dst_addr_hi = 0;
  251. dmae->len = bnx2x_get_port_stats_dma_len(bp);
  252. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  253. dmae->comp_addr_hi = 0;
  254. dmae->comp_val = 1;
  255. }
  256. if (bp->func_stx) {
  257. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  258. dmae->opcode = opcode;
  259. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  260. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  261. dmae->dst_addr_lo = bp->func_stx >> 2;
  262. dmae->dst_addr_hi = 0;
  263. dmae->len = sizeof(struct host_func_stats) >> 2;
  264. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  265. dmae->comp_addr_hi = 0;
  266. dmae->comp_val = 1;
  267. }
  268. /* MAC */
  269. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  270. true, DMAE_COMP_GRC);
  271. /* EMAC is special */
  272. if (bp->link_vars.mac_type == MAC_TYPE_EMAC) {
  273. mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0);
  274. /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/
  275. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  276. dmae->opcode = opcode;
  277. dmae->src_addr_lo = (mac_addr +
  278. EMAC_REG_EMAC_RX_STAT_AC) >> 2;
  279. dmae->src_addr_hi = 0;
  280. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  281. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  282. dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT;
  283. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  284. dmae->comp_addr_hi = 0;
  285. dmae->comp_val = 1;
  286. /* EMAC_REG_EMAC_RX_STAT_AC_28 */
  287. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  288. dmae->opcode = opcode;
  289. dmae->src_addr_lo = (mac_addr +
  290. EMAC_REG_EMAC_RX_STAT_AC_28) >> 2;
  291. dmae->src_addr_hi = 0;
  292. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  293. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  294. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  295. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  296. dmae->len = 1;
  297. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  298. dmae->comp_addr_hi = 0;
  299. dmae->comp_val = 1;
  300. /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/
  301. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  302. dmae->opcode = opcode;
  303. dmae->src_addr_lo = (mac_addr +
  304. EMAC_REG_EMAC_TX_STAT_AC) >> 2;
  305. dmae->src_addr_hi = 0;
  306. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  307. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  308. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  309. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  310. dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT;
  311. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  312. dmae->comp_addr_hi = 0;
  313. dmae->comp_val = 1;
  314. } else {
  315. u32 tx_src_addr_lo, rx_src_addr_lo;
  316. u16 rx_len, tx_len;
  317. /* configure the params according to MAC type */
  318. switch (bp->link_vars.mac_type) {
  319. case MAC_TYPE_BMAC:
  320. mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM :
  321. NIG_REG_INGRESS_BMAC0_MEM);
  322. /* BIGMAC_REGISTER_TX_STAT_GTPKT ..
  323. BIGMAC_REGISTER_TX_STAT_GTBYT */
  324. if (CHIP_IS_E1x(bp)) {
  325. tx_src_addr_lo = (mac_addr +
  326. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  327. tx_len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT -
  328. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  329. rx_src_addr_lo = (mac_addr +
  330. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  331. rx_len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ -
  332. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  333. } else {
  334. tx_src_addr_lo = (mac_addr +
  335. BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
  336. tx_len = (8 + BIGMAC2_REGISTER_TX_STAT_GTBYT -
  337. BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
  338. rx_src_addr_lo = (mac_addr +
  339. BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
  340. rx_len = (8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ -
  341. BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
  342. }
  343. break;
  344. case MAC_TYPE_UMAC: /* handled by MSTAT */
  345. case MAC_TYPE_XMAC: /* handled by MSTAT */
  346. default:
  347. mac_addr = port ? GRCBASE_MSTAT1 : GRCBASE_MSTAT0;
  348. tx_src_addr_lo = (mac_addr +
  349. MSTAT_REG_TX_STAT_GTXPOK_LO) >> 2;
  350. rx_src_addr_lo = (mac_addr +
  351. MSTAT_REG_RX_STAT_GR64_LO) >> 2;
  352. tx_len = sizeof(bp->slowpath->
  353. mac_stats.mstat_stats.stats_tx) >> 2;
  354. rx_len = sizeof(bp->slowpath->
  355. mac_stats.mstat_stats.stats_rx) >> 2;
  356. break;
  357. }
  358. /* TX stats */
  359. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  360. dmae->opcode = opcode;
  361. dmae->src_addr_lo = tx_src_addr_lo;
  362. dmae->src_addr_hi = 0;
  363. dmae->len = tx_len;
  364. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  365. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  366. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  367. dmae->comp_addr_hi = 0;
  368. dmae->comp_val = 1;
  369. /* RX stats */
  370. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  371. dmae->opcode = opcode;
  372. dmae->src_addr_hi = 0;
  373. dmae->src_addr_lo = rx_src_addr_lo;
  374. dmae->dst_addr_lo =
  375. U64_LO(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
  376. dmae->dst_addr_hi =
  377. U64_HI(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
  378. dmae->len = rx_len;
  379. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  380. dmae->comp_addr_hi = 0;
  381. dmae->comp_val = 1;
  382. }
  383. /* NIG */
  384. if (!CHIP_IS_E3(bp)) {
  385. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  386. dmae->opcode = opcode;
  387. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 :
  388. NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2;
  389. dmae->src_addr_hi = 0;
  390. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  391. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  392. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  393. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  394. dmae->len = (2*sizeof(u32)) >> 2;
  395. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  396. dmae->comp_addr_hi = 0;
  397. dmae->comp_val = 1;
  398. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  399. dmae->opcode = opcode;
  400. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 :
  401. NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2;
  402. dmae->src_addr_hi = 0;
  403. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  404. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  405. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  406. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  407. dmae->len = (2*sizeof(u32)) >> 2;
  408. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  409. dmae->comp_addr_hi = 0;
  410. dmae->comp_val = 1;
  411. }
  412. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  413. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  414. true, DMAE_COMP_PCI);
  415. dmae->src_addr_lo = (port ? NIG_REG_STAT1_BRB_DISCARD :
  416. NIG_REG_STAT0_BRB_DISCARD) >> 2;
  417. dmae->src_addr_hi = 0;
  418. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats));
  419. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats));
  420. dmae->len = (sizeof(struct nig_stats) - 4*sizeof(u32)) >> 2;
  421. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  422. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  423. dmae->comp_val = DMAE_COMP_VAL;
  424. *stats_comp = 0;
  425. }
  426. static void bnx2x_func_stats_init(struct bnx2x *bp)
  427. {
  428. struct dmae_command *dmae = &bp->stats_dmae;
  429. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  430. /* sanity */
  431. if (!bp->func_stx) {
  432. BNX2X_ERR("BUG!\n");
  433. return;
  434. }
  435. bp->executer_idx = 0;
  436. memset(dmae, 0, sizeof(struct dmae_command));
  437. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  438. true, DMAE_COMP_PCI);
  439. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  440. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  441. dmae->dst_addr_lo = bp->func_stx >> 2;
  442. dmae->dst_addr_hi = 0;
  443. dmae->len = sizeof(struct host_func_stats) >> 2;
  444. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  445. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  446. dmae->comp_val = DMAE_COMP_VAL;
  447. *stats_comp = 0;
  448. }
  449. static void bnx2x_stats_start(struct bnx2x *bp)
  450. {
  451. /* vfs travel through here as part of the statistics FSM, but no action
  452. * is required
  453. */
  454. if (IS_VF(bp))
  455. return;
  456. if (bp->port.pmf)
  457. bnx2x_port_stats_init(bp);
  458. else if (bp->func_stx)
  459. bnx2x_func_stats_init(bp);
  460. bnx2x_hw_stats_post(bp);
  461. bnx2x_storm_stats_post(bp);
  462. }
  463. static void bnx2x_stats_pmf_start(struct bnx2x *bp)
  464. {
  465. bnx2x_stats_comp(bp);
  466. bnx2x_stats_pmf_update(bp);
  467. bnx2x_stats_start(bp);
  468. }
  469. static void bnx2x_stats_restart(struct bnx2x *bp)
  470. {
  471. /* vfs travel through here as part of the statistics FSM, but no action
  472. * is required
  473. */
  474. if (IS_VF(bp))
  475. return;
  476. bnx2x_stats_comp(bp);
  477. bnx2x_stats_start(bp);
  478. }
  479. static void bnx2x_bmac_stats_update(struct bnx2x *bp)
  480. {
  481. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  482. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  483. struct {
  484. u32 lo;
  485. u32 hi;
  486. } diff;
  487. if (CHIP_IS_E1x(bp)) {
  488. struct bmac1_stats *new = bnx2x_sp(bp, mac_stats.bmac1_stats);
  489. /* the macros below will use "bmac1_stats" type */
  490. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  491. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  492. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  493. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  494. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  495. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  496. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  497. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  498. UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
  499. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  500. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  501. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  502. UPDATE_STAT64(tx_stat_gt127,
  503. tx_stat_etherstatspkts65octetsto127octets);
  504. UPDATE_STAT64(tx_stat_gt255,
  505. tx_stat_etherstatspkts128octetsto255octets);
  506. UPDATE_STAT64(tx_stat_gt511,
  507. tx_stat_etherstatspkts256octetsto511octets);
  508. UPDATE_STAT64(tx_stat_gt1023,
  509. tx_stat_etherstatspkts512octetsto1023octets);
  510. UPDATE_STAT64(tx_stat_gt1518,
  511. tx_stat_etherstatspkts1024octetsto1522octets);
  512. UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
  513. UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
  514. UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
  515. UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
  516. UPDATE_STAT64(tx_stat_gterr,
  517. tx_stat_dot3statsinternalmactransmiterrors);
  518. UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
  519. } else {
  520. struct bmac2_stats *new = bnx2x_sp(bp, mac_stats.bmac2_stats);
  521. /* the macros below will use "bmac2_stats" type */
  522. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  523. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  524. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  525. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  526. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  527. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  528. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  529. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  530. UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
  531. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  532. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  533. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  534. UPDATE_STAT64(tx_stat_gt127,
  535. tx_stat_etherstatspkts65octetsto127octets);
  536. UPDATE_STAT64(tx_stat_gt255,
  537. tx_stat_etherstatspkts128octetsto255octets);
  538. UPDATE_STAT64(tx_stat_gt511,
  539. tx_stat_etherstatspkts256octetsto511octets);
  540. UPDATE_STAT64(tx_stat_gt1023,
  541. tx_stat_etherstatspkts512octetsto1023octets);
  542. UPDATE_STAT64(tx_stat_gt1518,
  543. tx_stat_etherstatspkts1024octetsto1522octets);
  544. UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
  545. UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
  546. UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
  547. UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
  548. UPDATE_STAT64(tx_stat_gterr,
  549. tx_stat_dot3statsinternalmactransmiterrors);
  550. UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
  551. /* collect PFC stats */
  552. pstats->pfc_frames_tx_hi = new->tx_stat_gtpp_hi;
  553. pstats->pfc_frames_tx_lo = new->tx_stat_gtpp_lo;
  554. pstats->pfc_frames_rx_hi = new->rx_stat_grpp_hi;
  555. pstats->pfc_frames_rx_lo = new->rx_stat_grpp_lo;
  556. }
  557. estats->pause_frames_received_hi =
  558. pstats->mac_stx[1].rx_stat_mac_xpf_hi;
  559. estats->pause_frames_received_lo =
  560. pstats->mac_stx[1].rx_stat_mac_xpf_lo;
  561. estats->pause_frames_sent_hi =
  562. pstats->mac_stx[1].tx_stat_outxoffsent_hi;
  563. estats->pause_frames_sent_lo =
  564. pstats->mac_stx[1].tx_stat_outxoffsent_lo;
  565. estats->pfc_frames_received_hi =
  566. pstats->pfc_frames_rx_hi;
  567. estats->pfc_frames_received_lo =
  568. pstats->pfc_frames_rx_lo;
  569. estats->pfc_frames_sent_hi =
  570. pstats->pfc_frames_tx_hi;
  571. estats->pfc_frames_sent_lo =
  572. pstats->pfc_frames_tx_lo;
  573. }
  574. static void bnx2x_mstat_stats_update(struct bnx2x *bp)
  575. {
  576. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  577. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  578. struct mstat_stats *new = bnx2x_sp(bp, mac_stats.mstat_stats);
  579. ADD_STAT64(stats_rx.rx_grerb, rx_stat_ifhcinbadoctets);
  580. ADD_STAT64(stats_rx.rx_grfcs, rx_stat_dot3statsfcserrors);
  581. ADD_STAT64(stats_rx.rx_grund, rx_stat_etherstatsundersizepkts);
  582. ADD_STAT64(stats_rx.rx_grovr, rx_stat_dot3statsframestoolong);
  583. ADD_STAT64(stats_rx.rx_grfrg, rx_stat_etherstatsfragments);
  584. ADD_STAT64(stats_rx.rx_grxcf, rx_stat_maccontrolframesreceived);
  585. ADD_STAT64(stats_rx.rx_grxpf, rx_stat_xoffstateentered);
  586. ADD_STAT64(stats_rx.rx_grxpf, rx_stat_mac_xpf);
  587. ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_outxoffsent);
  588. ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_flowcontroldone);
  589. /* collect pfc stats */
  590. ADD_64(pstats->pfc_frames_tx_hi, new->stats_tx.tx_gtxpp_hi,
  591. pstats->pfc_frames_tx_lo, new->stats_tx.tx_gtxpp_lo);
  592. ADD_64(pstats->pfc_frames_rx_hi, new->stats_rx.rx_grxpp_hi,
  593. pstats->pfc_frames_rx_lo, new->stats_rx.rx_grxpp_lo);
  594. ADD_STAT64(stats_tx.tx_gt64, tx_stat_etherstatspkts64octets);
  595. ADD_STAT64(stats_tx.tx_gt127,
  596. tx_stat_etherstatspkts65octetsto127octets);
  597. ADD_STAT64(stats_tx.tx_gt255,
  598. tx_stat_etherstatspkts128octetsto255octets);
  599. ADD_STAT64(stats_tx.tx_gt511,
  600. tx_stat_etherstatspkts256octetsto511octets);
  601. ADD_STAT64(stats_tx.tx_gt1023,
  602. tx_stat_etherstatspkts512octetsto1023octets);
  603. ADD_STAT64(stats_tx.tx_gt1518,
  604. tx_stat_etherstatspkts1024octetsto1522octets);
  605. ADD_STAT64(stats_tx.tx_gt2047, tx_stat_mac_2047);
  606. ADD_STAT64(stats_tx.tx_gt4095, tx_stat_mac_4095);
  607. ADD_STAT64(stats_tx.tx_gt9216, tx_stat_mac_9216);
  608. ADD_STAT64(stats_tx.tx_gt16383, tx_stat_mac_16383);
  609. ADD_STAT64(stats_tx.tx_gterr,
  610. tx_stat_dot3statsinternalmactransmiterrors);
  611. ADD_STAT64(stats_tx.tx_gtufl, tx_stat_mac_ufl);
  612. estats->etherstatspkts1024octetsto1522octets_hi =
  613. pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_hi;
  614. estats->etherstatspkts1024octetsto1522octets_lo =
  615. pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_lo;
  616. estats->etherstatspktsover1522octets_hi =
  617. pstats->mac_stx[1].tx_stat_mac_2047_hi;
  618. estats->etherstatspktsover1522octets_lo =
  619. pstats->mac_stx[1].tx_stat_mac_2047_lo;
  620. ADD_64(estats->etherstatspktsover1522octets_hi,
  621. pstats->mac_stx[1].tx_stat_mac_4095_hi,
  622. estats->etherstatspktsover1522octets_lo,
  623. pstats->mac_stx[1].tx_stat_mac_4095_lo);
  624. ADD_64(estats->etherstatspktsover1522octets_hi,
  625. pstats->mac_stx[1].tx_stat_mac_9216_hi,
  626. estats->etherstatspktsover1522octets_lo,
  627. pstats->mac_stx[1].tx_stat_mac_9216_lo);
  628. ADD_64(estats->etherstatspktsover1522octets_hi,
  629. pstats->mac_stx[1].tx_stat_mac_16383_hi,
  630. estats->etherstatspktsover1522octets_lo,
  631. pstats->mac_stx[1].tx_stat_mac_16383_lo);
  632. estats->pause_frames_received_hi =
  633. pstats->mac_stx[1].rx_stat_mac_xpf_hi;
  634. estats->pause_frames_received_lo =
  635. pstats->mac_stx[1].rx_stat_mac_xpf_lo;
  636. estats->pause_frames_sent_hi =
  637. pstats->mac_stx[1].tx_stat_outxoffsent_hi;
  638. estats->pause_frames_sent_lo =
  639. pstats->mac_stx[1].tx_stat_outxoffsent_lo;
  640. estats->pfc_frames_received_hi =
  641. pstats->pfc_frames_rx_hi;
  642. estats->pfc_frames_received_lo =
  643. pstats->pfc_frames_rx_lo;
  644. estats->pfc_frames_sent_hi =
  645. pstats->pfc_frames_tx_hi;
  646. estats->pfc_frames_sent_lo =
  647. pstats->pfc_frames_tx_lo;
  648. }
  649. static void bnx2x_emac_stats_update(struct bnx2x *bp)
  650. {
  651. struct emac_stats *new = bnx2x_sp(bp, mac_stats.emac_stats);
  652. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  653. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  654. UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets);
  655. UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets);
  656. UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors);
  657. UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors);
  658. UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors);
  659. UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors);
  660. UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts);
  661. UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong);
  662. UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments);
  663. UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers);
  664. UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived);
  665. UPDATE_EXTEND_STAT(rx_stat_xoffstateentered);
  666. UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived);
  667. UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived);
  668. UPDATE_EXTEND_STAT(tx_stat_outxonsent);
  669. UPDATE_EXTEND_STAT(tx_stat_outxoffsent);
  670. UPDATE_EXTEND_STAT(tx_stat_flowcontroldone);
  671. UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions);
  672. UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes);
  673. UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes);
  674. UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions);
  675. UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions);
  676. UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions);
  677. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets);
  678. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets);
  679. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets);
  680. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets);
  681. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets);
  682. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets);
  683. UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets);
  684. UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors);
  685. estats->pause_frames_received_hi =
  686. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi;
  687. estats->pause_frames_received_lo =
  688. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo;
  689. ADD_64(estats->pause_frames_received_hi,
  690. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi,
  691. estats->pause_frames_received_lo,
  692. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo);
  693. estats->pause_frames_sent_hi =
  694. pstats->mac_stx[1].tx_stat_outxonsent_hi;
  695. estats->pause_frames_sent_lo =
  696. pstats->mac_stx[1].tx_stat_outxonsent_lo;
  697. ADD_64(estats->pause_frames_sent_hi,
  698. pstats->mac_stx[1].tx_stat_outxoffsent_hi,
  699. estats->pause_frames_sent_lo,
  700. pstats->mac_stx[1].tx_stat_outxoffsent_lo);
  701. }
  702. static int bnx2x_hw_stats_update(struct bnx2x *bp)
  703. {
  704. struct nig_stats *new = bnx2x_sp(bp, nig_stats);
  705. struct nig_stats *old = &(bp->port.old_nig_stats);
  706. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  707. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  708. struct {
  709. u32 lo;
  710. u32 hi;
  711. } diff;
  712. switch (bp->link_vars.mac_type) {
  713. case MAC_TYPE_BMAC:
  714. bnx2x_bmac_stats_update(bp);
  715. break;
  716. case MAC_TYPE_EMAC:
  717. bnx2x_emac_stats_update(bp);
  718. break;
  719. case MAC_TYPE_UMAC:
  720. case MAC_TYPE_XMAC:
  721. bnx2x_mstat_stats_update(bp);
  722. break;
  723. case MAC_TYPE_NONE: /* unreached */
  724. DP(BNX2X_MSG_STATS,
  725. "stats updated by DMAE but no MAC active\n");
  726. return -1;
  727. default: /* unreached */
  728. BNX2X_ERR("Unknown MAC type\n");
  729. }
  730. ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo,
  731. new->brb_discard - old->brb_discard);
  732. ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo,
  733. new->brb_truncate - old->brb_truncate);
  734. if (!CHIP_IS_E3(bp)) {
  735. UPDATE_STAT64_NIG(egress_mac_pkt0,
  736. etherstatspkts1024octetsto1522octets);
  737. UPDATE_STAT64_NIG(egress_mac_pkt1,
  738. etherstatspktsover1522octets);
  739. }
  740. memcpy(old, new, sizeof(struct nig_stats));
  741. memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]),
  742. sizeof(struct mac_stx));
  743. estats->brb_drop_hi = pstats->brb_drop_hi;
  744. estats->brb_drop_lo = pstats->brb_drop_lo;
  745. pstats->host_port_stats_counter++;
  746. if (CHIP_IS_E3(bp)) {
  747. u32 lpi_reg = BP_PORT(bp) ? MISC_REG_CPMU_LP_SM_ENT_CNT_P1
  748. : MISC_REG_CPMU_LP_SM_ENT_CNT_P0;
  749. estats->eee_tx_lpi += REG_RD(bp, lpi_reg);
  750. }
  751. if (!BP_NOMCP(bp)) {
  752. u32 nig_timer_max =
  753. SHMEM_RD(bp, port_mb[BP_PORT(bp)].stat_nig_timer);
  754. if (nig_timer_max != estats->nig_timer_max) {
  755. estats->nig_timer_max = nig_timer_max;
  756. BNX2X_ERR("NIG timer max (%u)\n",
  757. estats->nig_timer_max);
  758. }
  759. }
  760. return 0;
  761. }
  762. static int bnx2x_storm_stats_validate_counters(struct bnx2x *bp)
  763. {
  764. struct stats_counter *counters = &bp->fw_stats_data->storm_counters;
  765. u16 cur_stats_counter;
  766. /* Make sure we use the value of the counter
  767. * used for sending the last stats ramrod.
  768. */
  769. spin_lock_bh(&bp->stats_lock);
  770. cur_stats_counter = bp->stats_counter - 1;
  771. spin_unlock_bh(&bp->stats_lock);
  772. /* are storm stats valid? */
  773. if (le16_to_cpu(counters->xstats_counter) != cur_stats_counter) {
  774. DP(BNX2X_MSG_STATS,
  775. "stats not updated by xstorm xstorm counter (0x%x) != stats_counter (0x%x)\n",
  776. le16_to_cpu(counters->xstats_counter), bp->stats_counter);
  777. return -EAGAIN;
  778. }
  779. if (le16_to_cpu(counters->ustats_counter) != cur_stats_counter) {
  780. DP(BNX2X_MSG_STATS,
  781. "stats not updated by ustorm ustorm counter (0x%x) != stats_counter (0x%x)\n",
  782. le16_to_cpu(counters->ustats_counter), bp->stats_counter);
  783. return -EAGAIN;
  784. }
  785. if (le16_to_cpu(counters->cstats_counter) != cur_stats_counter) {
  786. DP(BNX2X_MSG_STATS,
  787. "stats not updated by cstorm cstorm counter (0x%x) != stats_counter (0x%x)\n",
  788. le16_to_cpu(counters->cstats_counter), bp->stats_counter);
  789. return -EAGAIN;
  790. }
  791. if (le16_to_cpu(counters->tstats_counter) != cur_stats_counter) {
  792. DP(BNX2X_MSG_STATS,
  793. "stats not updated by tstorm tstorm counter (0x%x) != stats_counter (0x%x)\n",
  794. le16_to_cpu(counters->tstats_counter), bp->stats_counter);
  795. return -EAGAIN;
  796. }
  797. return 0;
  798. }
  799. static int bnx2x_storm_stats_update(struct bnx2x *bp)
  800. {
  801. struct tstorm_per_port_stats *tport =
  802. &bp->fw_stats_data->port.tstorm_port_statistics;
  803. struct tstorm_per_pf_stats *tfunc =
  804. &bp->fw_stats_data->pf.tstorm_pf_statistics;
  805. struct host_func_stats *fstats = &bp->func_stats;
  806. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  807. struct bnx2x_eth_stats_old *estats_old = &bp->eth_stats_old;
  808. int i;
  809. /* vfs stat counter is managed by pf */
  810. if (IS_PF(bp) && bnx2x_storm_stats_validate_counters(bp))
  811. return -EAGAIN;
  812. estats->error_bytes_received_hi = 0;
  813. estats->error_bytes_received_lo = 0;
  814. for_each_eth_queue(bp, i) {
  815. struct bnx2x_fastpath *fp = &bp->fp[i];
  816. struct tstorm_per_queue_stats *tclient =
  817. &bp->fw_stats_data->queue_stats[i].
  818. tstorm_queue_statistics;
  819. struct tstorm_per_queue_stats *old_tclient =
  820. &bnx2x_fp_stats(bp, fp)->old_tclient;
  821. struct ustorm_per_queue_stats *uclient =
  822. &bp->fw_stats_data->queue_stats[i].
  823. ustorm_queue_statistics;
  824. struct ustorm_per_queue_stats *old_uclient =
  825. &bnx2x_fp_stats(bp, fp)->old_uclient;
  826. struct xstorm_per_queue_stats *xclient =
  827. &bp->fw_stats_data->queue_stats[i].
  828. xstorm_queue_statistics;
  829. struct xstorm_per_queue_stats *old_xclient =
  830. &bnx2x_fp_stats(bp, fp)->old_xclient;
  831. struct bnx2x_eth_q_stats *qstats =
  832. &bnx2x_fp_stats(bp, fp)->eth_q_stats;
  833. struct bnx2x_eth_q_stats_old *qstats_old =
  834. &bnx2x_fp_stats(bp, fp)->eth_q_stats_old;
  835. u32 diff;
  836. DP(BNX2X_MSG_STATS, "queue[%d]: ucast_sent 0x%x, bcast_sent 0x%x mcast_sent 0x%x\n",
  837. i, xclient->ucast_pkts_sent,
  838. xclient->bcast_pkts_sent, xclient->mcast_pkts_sent);
  839. DP(BNX2X_MSG_STATS, "---------------\n");
  840. UPDATE_QSTAT(tclient->rcv_bcast_bytes,
  841. total_broadcast_bytes_received);
  842. UPDATE_QSTAT(tclient->rcv_mcast_bytes,
  843. total_multicast_bytes_received);
  844. UPDATE_QSTAT(tclient->rcv_ucast_bytes,
  845. total_unicast_bytes_received);
  846. /*
  847. * sum to total_bytes_received all
  848. * unicast/multicast/broadcast
  849. */
  850. qstats->total_bytes_received_hi =
  851. qstats->total_broadcast_bytes_received_hi;
  852. qstats->total_bytes_received_lo =
  853. qstats->total_broadcast_bytes_received_lo;
  854. ADD_64(qstats->total_bytes_received_hi,
  855. qstats->total_multicast_bytes_received_hi,
  856. qstats->total_bytes_received_lo,
  857. qstats->total_multicast_bytes_received_lo);
  858. ADD_64(qstats->total_bytes_received_hi,
  859. qstats->total_unicast_bytes_received_hi,
  860. qstats->total_bytes_received_lo,
  861. qstats->total_unicast_bytes_received_lo);
  862. qstats->valid_bytes_received_hi =
  863. qstats->total_bytes_received_hi;
  864. qstats->valid_bytes_received_lo =
  865. qstats->total_bytes_received_lo;
  866. UPDATE_EXTEND_TSTAT(rcv_ucast_pkts,
  867. total_unicast_packets_received);
  868. UPDATE_EXTEND_TSTAT(rcv_mcast_pkts,
  869. total_multicast_packets_received);
  870. UPDATE_EXTEND_TSTAT(rcv_bcast_pkts,
  871. total_broadcast_packets_received);
  872. UPDATE_EXTEND_E_TSTAT(pkts_too_big_discard,
  873. etherstatsoverrsizepkts, 32);
  874. UPDATE_EXTEND_E_TSTAT(no_buff_discard, no_buff_discard, 16);
  875. SUB_EXTEND_USTAT(ucast_no_buff_pkts,
  876. total_unicast_packets_received);
  877. SUB_EXTEND_USTAT(mcast_no_buff_pkts,
  878. total_multicast_packets_received);
  879. SUB_EXTEND_USTAT(bcast_no_buff_pkts,
  880. total_broadcast_packets_received);
  881. UPDATE_EXTEND_E_USTAT(ucast_no_buff_pkts, no_buff_discard);
  882. UPDATE_EXTEND_E_USTAT(mcast_no_buff_pkts, no_buff_discard);
  883. UPDATE_EXTEND_E_USTAT(bcast_no_buff_pkts, no_buff_discard);
  884. UPDATE_QSTAT(xclient->bcast_bytes_sent,
  885. total_broadcast_bytes_transmitted);
  886. UPDATE_QSTAT(xclient->mcast_bytes_sent,
  887. total_multicast_bytes_transmitted);
  888. UPDATE_QSTAT(xclient->ucast_bytes_sent,
  889. total_unicast_bytes_transmitted);
  890. /*
  891. * sum to total_bytes_transmitted all
  892. * unicast/multicast/broadcast
  893. */
  894. qstats->total_bytes_transmitted_hi =
  895. qstats->total_unicast_bytes_transmitted_hi;
  896. qstats->total_bytes_transmitted_lo =
  897. qstats->total_unicast_bytes_transmitted_lo;
  898. ADD_64(qstats->total_bytes_transmitted_hi,
  899. qstats->total_broadcast_bytes_transmitted_hi,
  900. qstats->total_bytes_transmitted_lo,
  901. qstats->total_broadcast_bytes_transmitted_lo);
  902. ADD_64(qstats->total_bytes_transmitted_hi,
  903. qstats->total_multicast_bytes_transmitted_hi,
  904. qstats->total_bytes_transmitted_lo,
  905. qstats->total_multicast_bytes_transmitted_lo);
  906. UPDATE_EXTEND_XSTAT(ucast_pkts_sent,
  907. total_unicast_packets_transmitted);
  908. UPDATE_EXTEND_XSTAT(mcast_pkts_sent,
  909. total_multicast_packets_transmitted);
  910. UPDATE_EXTEND_XSTAT(bcast_pkts_sent,
  911. total_broadcast_packets_transmitted);
  912. UPDATE_EXTEND_TSTAT(checksum_discard,
  913. total_packets_received_checksum_discarded);
  914. UPDATE_EXTEND_TSTAT(ttl0_discard,
  915. total_packets_received_ttl0_discarded);
  916. UPDATE_EXTEND_XSTAT(error_drop_pkts,
  917. total_transmitted_dropped_packets_error);
  918. /* TPA aggregations completed */
  919. UPDATE_EXTEND_E_USTAT(coalesced_events, total_tpa_aggregations);
  920. /* Number of network frames aggregated by TPA */
  921. UPDATE_EXTEND_E_USTAT(coalesced_pkts,
  922. total_tpa_aggregated_frames);
  923. /* Total number of bytes in completed TPA aggregations */
  924. UPDATE_QSTAT(uclient->coalesced_bytes, total_tpa_bytes);
  925. UPDATE_ESTAT_QSTAT_64(total_tpa_bytes);
  926. UPDATE_FSTAT_QSTAT(total_bytes_received);
  927. UPDATE_FSTAT_QSTAT(total_bytes_transmitted);
  928. UPDATE_FSTAT_QSTAT(total_unicast_packets_received);
  929. UPDATE_FSTAT_QSTAT(total_multicast_packets_received);
  930. UPDATE_FSTAT_QSTAT(total_broadcast_packets_received);
  931. UPDATE_FSTAT_QSTAT(total_unicast_packets_transmitted);
  932. UPDATE_FSTAT_QSTAT(total_multicast_packets_transmitted);
  933. UPDATE_FSTAT_QSTAT(total_broadcast_packets_transmitted);
  934. UPDATE_FSTAT_QSTAT(valid_bytes_received);
  935. }
  936. ADD_64(estats->total_bytes_received_hi,
  937. estats->rx_stat_ifhcinbadoctets_hi,
  938. estats->total_bytes_received_lo,
  939. estats->rx_stat_ifhcinbadoctets_lo);
  940. ADD_64_LE(estats->total_bytes_received_hi,
  941. tfunc->rcv_error_bytes.hi,
  942. estats->total_bytes_received_lo,
  943. tfunc->rcv_error_bytes.lo);
  944. ADD_64_LE(estats->error_bytes_received_hi,
  945. tfunc->rcv_error_bytes.hi,
  946. estats->error_bytes_received_lo,
  947. tfunc->rcv_error_bytes.lo);
  948. UPDATE_ESTAT(etherstatsoverrsizepkts, rx_stat_dot3statsframestoolong);
  949. ADD_64(estats->error_bytes_received_hi,
  950. estats->rx_stat_ifhcinbadoctets_hi,
  951. estats->error_bytes_received_lo,
  952. estats->rx_stat_ifhcinbadoctets_lo);
  953. if (bp->port.pmf) {
  954. struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old;
  955. UPDATE_FW_STAT(mac_filter_discard);
  956. UPDATE_FW_STAT(mf_tag_discard);
  957. UPDATE_FW_STAT(brb_truncate_discard);
  958. UPDATE_FW_STAT(mac_discard);
  959. }
  960. fstats->host_func_stats_start = ++fstats->host_func_stats_end;
  961. bp->stats_pending = 0;
  962. return 0;
  963. }
  964. static void bnx2x_net_stats_update(struct bnx2x *bp)
  965. {
  966. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  967. struct net_device_stats *nstats = &bp->dev->stats;
  968. unsigned long tmp;
  969. int i;
  970. nstats->rx_packets =
  971. bnx2x_hilo(&estats->total_unicast_packets_received_hi) +
  972. bnx2x_hilo(&estats->total_multicast_packets_received_hi) +
  973. bnx2x_hilo(&estats->total_broadcast_packets_received_hi);
  974. nstats->tx_packets =
  975. bnx2x_hilo(&estats->total_unicast_packets_transmitted_hi) +
  976. bnx2x_hilo(&estats->total_multicast_packets_transmitted_hi) +
  977. bnx2x_hilo(&estats->total_broadcast_packets_transmitted_hi);
  978. nstats->rx_bytes = bnx2x_hilo(&estats->total_bytes_received_hi);
  979. nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi);
  980. tmp = estats->mac_discard;
  981. for_each_rx_queue(bp, i) {
  982. struct tstorm_per_queue_stats *old_tclient =
  983. &bp->fp_stats[i].old_tclient;
  984. tmp += le32_to_cpu(old_tclient->checksum_discard);
  985. }
  986. nstats->rx_dropped = tmp + bp->net_stats_old.rx_dropped;
  987. nstats->tx_dropped = 0;
  988. nstats->multicast =
  989. bnx2x_hilo(&estats->total_multicast_packets_received_hi);
  990. nstats->collisions =
  991. bnx2x_hilo(&estats->tx_stat_etherstatscollisions_hi);
  992. nstats->rx_length_errors =
  993. bnx2x_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) +
  994. bnx2x_hilo(&estats->etherstatsoverrsizepkts_hi);
  995. nstats->rx_over_errors = bnx2x_hilo(&estats->brb_drop_hi) +
  996. bnx2x_hilo(&estats->brb_truncate_hi);
  997. nstats->rx_crc_errors =
  998. bnx2x_hilo(&estats->rx_stat_dot3statsfcserrors_hi);
  999. nstats->rx_frame_errors =
  1000. bnx2x_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi);
  1001. nstats->rx_fifo_errors = bnx2x_hilo(&estats->no_buff_discard_hi);
  1002. nstats->rx_missed_errors = 0;
  1003. nstats->rx_errors = nstats->rx_length_errors +
  1004. nstats->rx_over_errors +
  1005. nstats->rx_crc_errors +
  1006. nstats->rx_frame_errors +
  1007. nstats->rx_fifo_errors +
  1008. nstats->rx_missed_errors;
  1009. nstats->tx_aborted_errors =
  1010. bnx2x_hilo(&estats->tx_stat_dot3statslatecollisions_hi) +
  1011. bnx2x_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi);
  1012. nstats->tx_carrier_errors =
  1013. bnx2x_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi);
  1014. nstats->tx_fifo_errors = 0;
  1015. nstats->tx_heartbeat_errors = 0;
  1016. nstats->tx_window_errors = 0;
  1017. nstats->tx_errors = nstats->tx_aborted_errors +
  1018. nstats->tx_carrier_errors +
  1019. bnx2x_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi);
  1020. }
  1021. static void bnx2x_drv_stats_update(struct bnx2x *bp)
  1022. {
  1023. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1024. int i;
  1025. for_each_queue(bp, i) {
  1026. struct bnx2x_eth_q_stats *qstats = &bp->fp_stats[i].eth_q_stats;
  1027. struct bnx2x_eth_q_stats_old *qstats_old =
  1028. &bp->fp_stats[i].eth_q_stats_old;
  1029. UPDATE_ESTAT_QSTAT(driver_xoff);
  1030. UPDATE_ESTAT_QSTAT(rx_err_discard_pkt);
  1031. UPDATE_ESTAT_QSTAT(rx_skb_alloc_failed);
  1032. UPDATE_ESTAT_QSTAT(hw_csum_err);
  1033. UPDATE_ESTAT_QSTAT(driver_filtered_tx_pkt);
  1034. }
  1035. }
  1036. static bool bnx2x_edebug_stats_stopped(struct bnx2x *bp)
  1037. {
  1038. u32 val;
  1039. if (SHMEM2_HAS(bp, edebug_driver_if[1])) {
  1040. val = SHMEM2_RD(bp, edebug_driver_if[1]);
  1041. if (val == EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT)
  1042. return true;
  1043. }
  1044. return false;
  1045. }
  1046. static void bnx2x_stats_update(struct bnx2x *bp)
  1047. {
  1048. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1049. if (bnx2x_edebug_stats_stopped(bp))
  1050. return;
  1051. if (IS_PF(bp)) {
  1052. if (*stats_comp != DMAE_COMP_VAL)
  1053. return;
  1054. if (bp->port.pmf)
  1055. bnx2x_hw_stats_update(bp);
  1056. if (bnx2x_storm_stats_update(bp)) {
  1057. if (bp->stats_pending++ == 3) {
  1058. BNX2X_ERR("storm stats were not updated for 3 times\n");
  1059. bnx2x_panic();
  1060. }
  1061. return;
  1062. }
  1063. } else {
  1064. /* vf doesn't collect HW statistics, and doesn't get completions
  1065. * perform only update
  1066. */
  1067. bnx2x_storm_stats_update(bp);
  1068. }
  1069. bnx2x_net_stats_update(bp);
  1070. bnx2x_drv_stats_update(bp);
  1071. /* vf is done */
  1072. if (IS_VF(bp))
  1073. return;
  1074. if (netif_msg_timer(bp)) {
  1075. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1076. netdev_dbg(bp->dev, "brb drops %u brb truncate %u\n",
  1077. estats->brb_drop_lo, estats->brb_truncate_lo);
  1078. }
  1079. bnx2x_hw_stats_post(bp);
  1080. bnx2x_storm_stats_post(bp);
  1081. }
  1082. static void bnx2x_port_stats_stop(struct bnx2x *bp)
  1083. {
  1084. struct dmae_command *dmae;
  1085. u32 opcode;
  1086. int loader_idx = PMF_DMAE_C(bp);
  1087. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1088. bp->executer_idx = 0;
  1089. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, false, 0);
  1090. if (bp->port.port_stx) {
  1091. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1092. if (bp->func_stx)
  1093. dmae->opcode = bnx2x_dmae_opcode_add_comp(
  1094. opcode, DMAE_COMP_GRC);
  1095. else
  1096. dmae->opcode = bnx2x_dmae_opcode_add_comp(
  1097. opcode, DMAE_COMP_PCI);
  1098. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  1099. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  1100. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  1101. dmae->dst_addr_hi = 0;
  1102. dmae->len = bnx2x_get_port_stats_dma_len(bp);
  1103. if (bp->func_stx) {
  1104. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  1105. dmae->comp_addr_hi = 0;
  1106. dmae->comp_val = 1;
  1107. } else {
  1108. dmae->comp_addr_lo =
  1109. U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1110. dmae->comp_addr_hi =
  1111. U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1112. dmae->comp_val = DMAE_COMP_VAL;
  1113. *stats_comp = 0;
  1114. }
  1115. }
  1116. if (bp->func_stx) {
  1117. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1118. dmae->opcode =
  1119. bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
  1120. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  1121. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  1122. dmae->dst_addr_lo = bp->func_stx >> 2;
  1123. dmae->dst_addr_hi = 0;
  1124. dmae->len = sizeof(struct host_func_stats) >> 2;
  1125. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1126. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1127. dmae->comp_val = DMAE_COMP_VAL;
  1128. *stats_comp = 0;
  1129. }
  1130. }
  1131. static void bnx2x_stats_stop(struct bnx2x *bp)
  1132. {
  1133. int update = 0;
  1134. bnx2x_stats_comp(bp);
  1135. if (bp->port.pmf)
  1136. update = (bnx2x_hw_stats_update(bp) == 0);
  1137. update |= (bnx2x_storm_stats_update(bp) == 0);
  1138. if (update) {
  1139. bnx2x_net_stats_update(bp);
  1140. if (bp->port.pmf)
  1141. bnx2x_port_stats_stop(bp);
  1142. bnx2x_hw_stats_post(bp);
  1143. bnx2x_stats_comp(bp);
  1144. }
  1145. }
  1146. static void bnx2x_stats_do_nothing(struct bnx2x *bp)
  1147. {
  1148. }
  1149. static const struct {
  1150. void (*action)(struct bnx2x *bp);
  1151. enum bnx2x_stats_state next_state;
  1152. } bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = {
  1153. /* state event */
  1154. {
  1155. /* DISABLED PMF */ {bnx2x_stats_pmf_update, STATS_STATE_DISABLED},
  1156. /* LINK_UP */ {bnx2x_stats_start, STATS_STATE_ENABLED},
  1157. /* UPDATE */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED},
  1158. /* STOP */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED}
  1159. },
  1160. {
  1161. /* ENABLED PMF */ {bnx2x_stats_pmf_start, STATS_STATE_ENABLED},
  1162. /* LINK_UP */ {bnx2x_stats_restart, STATS_STATE_ENABLED},
  1163. /* UPDATE */ {bnx2x_stats_update, STATS_STATE_ENABLED},
  1164. /* STOP */ {bnx2x_stats_stop, STATS_STATE_DISABLED}
  1165. }
  1166. };
  1167. void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event)
  1168. {
  1169. enum bnx2x_stats_state state;
  1170. if (unlikely(bp->panic))
  1171. return;
  1172. spin_lock_bh(&bp->stats_lock);
  1173. state = bp->stats_state;
  1174. bp->stats_state = bnx2x_stats_stm[state][event].next_state;
  1175. spin_unlock_bh(&bp->stats_lock);
  1176. bnx2x_stats_stm[state][event].action(bp);
  1177. if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
  1178. DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
  1179. state, event, bp->stats_state);
  1180. }
  1181. static void bnx2x_port_stats_base_init(struct bnx2x *bp)
  1182. {
  1183. struct dmae_command *dmae;
  1184. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1185. /* sanity */
  1186. if (!bp->port.pmf || !bp->port.port_stx) {
  1187. BNX2X_ERR("BUG!\n");
  1188. return;
  1189. }
  1190. bp->executer_idx = 0;
  1191. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1192. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  1193. true, DMAE_COMP_PCI);
  1194. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  1195. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  1196. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  1197. dmae->dst_addr_hi = 0;
  1198. dmae->len = bnx2x_get_port_stats_dma_len(bp);
  1199. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1200. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1201. dmae->comp_val = DMAE_COMP_VAL;
  1202. *stats_comp = 0;
  1203. bnx2x_hw_stats_post(bp);
  1204. bnx2x_stats_comp(bp);
  1205. }
  1206. /* This function will prepare the statistics ramrod data the way
  1207. * we will only have to increment the statistics counter and
  1208. * send the ramrod each time we have to.
  1209. */
  1210. static void bnx2x_prep_fw_stats_req(struct bnx2x *bp)
  1211. {
  1212. int i;
  1213. int first_queue_query_index;
  1214. struct stats_query_header *stats_hdr = &bp->fw_stats_req->hdr;
  1215. dma_addr_t cur_data_offset;
  1216. struct stats_query_entry *cur_query_entry;
  1217. stats_hdr->cmd_num = bp->fw_stats_num;
  1218. stats_hdr->drv_stats_counter = 0;
  1219. /* storm_counters struct contains the counters of completed
  1220. * statistics requests per storm which are incremented by FW
  1221. * each time it completes hadning a statistics ramrod. We will
  1222. * check these counters in the timer handler and discard a
  1223. * (statistics) ramrod completion.
  1224. */
  1225. cur_data_offset = bp->fw_stats_data_mapping +
  1226. offsetof(struct bnx2x_fw_stats_data, storm_counters);
  1227. stats_hdr->stats_counters_addrs.hi =
  1228. cpu_to_le32(U64_HI(cur_data_offset));
  1229. stats_hdr->stats_counters_addrs.lo =
  1230. cpu_to_le32(U64_LO(cur_data_offset));
  1231. /* prepare to the first stats ramrod (will be completed with
  1232. * the counters equal to zero) - init counters to somethig different.
  1233. */
  1234. memset(&bp->fw_stats_data->storm_counters, 0xff,
  1235. sizeof(struct stats_counter));
  1236. /**** Port FW statistics data ****/
  1237. cur_data_offset = bp->fw_stats_data_mapping +
  1238. offsetof(struct bnx2x_fw_stats_data, port);
  1239. cur_query_entry = &bp->fw_stats_req->query[BNX2X_PORT_QUERY_IDX];
  1240. cur_query_entry->kind = STATS_TYPE_PORT;
  1241. /* For port query index is a DONT CARE */
  1242. cur_query_entry->index = BP_PORT(bp);
  1243. /* For port query funcID is a DONT CARE */
  1244. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1245. cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
  1246. cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
  1247. /**** PF FW statistics data ****/
  1248. cur_data_offset = bp->fw_stats_data_mapping +
  1249. offsetof(struct bnx2x_fw_stats_data, pf);
  1250. cur_query_entry = &bp->fw_stats_req->query[BNX2X_PF_QUERY_IDX];
  1251. cur_query_entry->kind = STATS_TYPE_PF;
  1252. /* For PF query index is a DONT CARE */
  1253. cur_query_entry->index = BP_PORT(bp);
  1254. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1255. cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
  1256. cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
  1257. /**** FCoE FW statistics data ****/
  1258. if (!NO_FCOE(bp)) {
  1259. cur_data_offset = bp->fw_stats_data_mapping +
  1260. offsetof(struct bnx2x_fw_stats_data, fcoe);
  1261. cur_query_entry =
  1262. &bp->fw_stats_req->query[BNX2X_FCOE_QUERY_IDX];
  1263. cur_query_entry->kind = STATS_TYPE_FCOE;
  1264. /* For FCoE query index is a DONT CARE */
  1265. cur_query_entry->index = BP_PORT(bp);
  1266. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1267. cur_query_entry->address.hi =
  1268. cpu_to_le32(U64_HI(cur_data_offset));
  1269. cur_query_entry->address.lo =
  1270. cpu_to_le32(U64_LO(cur_data_offset));
  1271. }
  1272. /**** Clients' queries ****/
  1273. cur_data_offset = bp->fw_stats_data_mapping +
  1274. offsetof(struct bnx2x_fw_stats_data, queue_stats);
  1275. /* first queue query index depends whether FCoE offloaded request will
  1276. * be included in the ramrod
  1277. */
  1278. if (!NO_FCOE(bp))
  1279. first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX;
  1280. else
  1281. first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX - 1;
  1282. for_each_eth_queue(bp, i) {
  1283. cur_query_entry =
  1284. &bp->fw_stats_req->
  1285. query[first_queue_query_index + i];
  1286. cur_query_entry->kind = STATS_TYPE_QUEUE;
  1287. cur_query_entry->index = bnx2x_stats_id(&bp->fp[i]);
  1288. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1289. cur_query_entry->address.hi =
  1290. cpu_to_le32(U64_HI(cur_data_offset));
  1291. cur_query_entry->address.lo =
  1292. cpu_to_le32(U64_LO(cur_data_offset));
  1293. cur_data_offset += sizeof(struct per_queue_stats);
  1294. }
  1295. /* add FCoE queue query if needed */
  1296. if (!NO_FCOE(bp)) {
  1297. cur_query_entry =
  1298. &bp->fw_stats_req->
  1299. query[first_queue_query_index + i];
  1300. cur_query_entry->kind = STATS_TYPE_QUEUE;
  1301. cur_query_entry->index = bnx2x_stats_id(&bp->fp[FCOE_IDX(bp)]);
  1302. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1303. cur_query_entry->address.hi =
  1304. cpu_to_le32(U64_HI(cur_data_offset));
  1305. cur_query_entry->address.lo =
  1306. cpu_to_le32(U64_LO(cur_data_offset));
  1307. }
  1308. }
  1309. void bnx2x_stats_init(struct bnx2x *bp)
  1310. {
  1311. int /*abs*/port = BP_PORT(bp);
  1312. int mb_idx = BP_FW_MB_IDX(bp);
  1313. int i;
  1314. bp->stats_pending = 0;
  1315. bp->executer_idx = 0;
  1316. bp->stats_counter = 0;
  1317. /* port and func stats for management */
  1318. if (!BP_NOMCP(bp)) {
  1319. bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx);
  1320. bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param);
  1321. } else {
  1322. bp->port.port_stx = 0;
  1323. bp->func_stx = 0;
  1324. }
  1325. DP(BNX2X_MSG_STATS, "port_stx 0x%x func_stx 0x%x\n",
  1326. bp->port.port_stx, bp->func_stx);
  1327. /* pmf should retrieve port statistics from SP on a non-init*/
  1328. if (!bp->stats_init && bp->port.pmf && bp->port.port_stx)
  1329. bnx2x_stats_handle(bp, STATS_EVENT_PMF);
  1330. port = BP_PORT(bp);
  1331. /* port stats */
  1332. memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats));
  1333. bp->port.old_nig_stats.brb_discard =
  1334. REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38);
  1335. bp->port.old_nig_stats.brb_truncate =
  1336. REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38);
  1337. if (!CHIP_IS_E3(bp)) {
  1338. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50,
  1339. &(bp->port.old_nig_stats.egress_mac_pkt0_lo), 2);
  1340. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50,
  1341. &(bp->port.old_nig_stats.egress_mac_pkt1_lo), 2);
  1342. }
  1343. /* function stats */
  1344. for_each_queue(bp, i) {
  1345. struct bnx2x_fp_stats *fp_stats = &bp->fp_stats[i];
  1346. memset(&fp_stats->old_tclient, 0,
  1347. sizeof(fp_stats->old_tclient));
  1348. memset(&fp_stats->old_uclient, 0,
  1349. sizeof(fp_stats->old_uclient));
  1350. memset(&fp_stats->old_xclient, 0,
  1351. sizeof(fp_stats->old_xclient));
  1352. if (bp->stats_init) {
  1353. memset(&fp_stats->eth_q_stats, 0,
  1354. sizeof(fp_stats->eth_q_stats));
  1355. memset(&fp_stats->eth_q_stats_old, 0,
  1356. sizeof(fp_stats->eth_q_stats_old));
  1357. }
  1358. }
  1359. /* Prepare statistics ramrod data */
  1360. bnx2x_prep_fw_stats_req(bp);
  1361. memset(&bp->dev->stats, 0, sizeof(bp->dev->stats));
  1362. if (bp->stats_init) {
  1363. memset(&bp->net_stats_old, 0, sizeof(bp->net_stats_old));
  1364. memset(&bp->fw_stats_old, 0, sizeof(bp->fw_stats_old));
  1365. memset(&bp->eth_stats_old, 0, sizeof(bp->eth_stats_old));
  1366. memset(&bp->eth_stats, 0, sizeof(bp->eth_stats));
  1367. memset(&bp->func_stats, 0, sizeof(bp->func_stats));
  1368. /* Clean SP from previous statistics */
  1369. if (bp->func_stx) {
  1370. memset(bnx2x_sp(bp, func_stats), 0,
  1371. sizeof(struct host_func_stats));
  1372. bnx2x_func_stats_init(bp);
  1373. bnx2x_hw_stats_post(bp);
  1374. bnx2x_stats_comp(bp);
  1375. }
  1376. }
  1377. bp->stats_state = STATS_STATE_DISABLED;
  1378. if (bp->port.pmf && bp->port.port_stx)
  1379. bnx2x_port_stats_base_init(bp);
  1380. /* mark the end of statistics initializiation */
  1381. bp->stats_init = false;
  1382. }
  1383. void bnx2x_save_statistics(struct bnx2x *bp)
  1384. {
  1385. int i;
  1386. struct net_device_stats *nstats = &bp->dev->stats;
  1387. /* save queue statistics */
  1388. for_each_eth_queue(bp, i) {
  1389. struct bnx2x_fastpath *fp = &bp->fp[i];
  1390. struct bnx2x_eth_q_stats *qstats =
  1391. &bnx2x_fp_stats(bp, fp)->eth_q_stats;
  1392. struct bnx2x_eth_q_stats_old *qstats_old =
  1393. &bnx2x_fp_stats(bp, fp)->eth_q_stats_old;
  1394. UPDATE_QSTAT_OLD(total_unicast_bytes_received_hi);
  1395. UPDATE_QSTAT_OLD(total_unicast_bytes_received_lo);
  1396. UPDATE_QSTAT_OLD(total_broadcast_bytes_received_hi);
  1397. UPDATE_QSTAT_OLD(total_broadcast_bytes_received_lo);
  1398. UPDATE_QSTAT_OLD(total_multicast_bytes_received_hi);
  1399. UPDATE_QSTAT_OLD(total_multicast_bytes_received_lo);
  1400. UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_hi);
  1401. UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_lo);
  1402. UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_hi);
  1403. UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_lo);
  1404. UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_hi);
  1405. UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_lo);
  1406. UPDATE_QSTAT_OLD(total_tpa_bytes_hi);
  1407. UPDATE_QSTAT_OLD(total_tpa_bytes_lo);
  1408. }
  1409. /* save net_device_stats statistics */
  1410. bp->net_stats_old.rx_dropped = nstats->rx_dropped;
  1411. /* store port firmware statistics */
  1412. if (bp->port.pmf && IS_MF(bp)) {
  1413. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1414. struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old;
  1415. UPDATE_FW_STAT_OLD(mac_filter_discard);
  1416. UPDATE_FW_STAT_OLD(mf_tag_discard);
  1417. UPDATE_FW_STAT_OLD(brb_truncate_discard);
  1418. UPDATE_FW_STAT_OLD(mac_discard);
  1419. }
  1420. }
  1421. void bnx2x_afex_collect_stats(struct bnx2x *bp, void *void_afex_stats,
  1422. u32 stats_type)
  1423. {
  1424. int i;
  1425. struct afex_stats *afex_stats = (struct afex_stats *)void_afex_stats;
  1426. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1427. struct per_queue_stats *fcoe_q_stats =
  1428. &bp->fw_stats_data->queue_stats[FCOE_IDX(bp)];
  1429. struct tstorm_per_queue_stats *fcoe_q_tstorm_stats =
  1430. &fcoe_q_stats->tstorm_queue_statistics;
  1431. struct ustorm_per_queue_stats *fcoe_q_ustorm_stats =
  1432. &fcoe_q_stats->ustorm_queue_statistics;
  1433. struct xstorm_per_queue_stats *fcoe_q_xstorm_stats =
  1434. &fcoe_q_stats->xstorm_queue_statistics;
  1435. struct fcoe_statistics_params *fw_fcoe_stat =
  1436. &bp->fw_stats_data->fcoe;
  1437. memset(afex_stats, 0, sizeof(struct afex_stats));
  1438. for_each_eth_queue(bp, i) {
  1439. struct bnx2x_eth_q_stats *qstats = &bp->fp_stats[i].eth_q_stats;
  1440. ADD_64(afex_stats->rx_unicast_bytes_hi,
  1441. qstats->total_unicast_bytes_received_hi,
  1442. afex_stats->rx_unicast_bytes_lo,
  1443. qstats->total_unicast_bytes_received_lo);
  1444. ADD_64(afex_stats->rx_broadcast_bytes_hi,
  1445. qstats->total_broadcast_bytes_received_hi,
  1446. afex_stats->rx_broadcast_bytes_lo,
  1447. qstats->total_broadcast_bytes_received_lo);
  1448. ADD_64(afex_stats->rx_multicast_bytes_hi,
  1449. qstats->total_multicast_bytes_received_hi,
  1450. afex_stats->rx_multicast_bytes_lo,
  1451. qstats->total_multicast_bytes_received_lo);
  1452. ADD_64(afex_stats->rx_unicast_frames_hi,
  1453. qstats->total_unicast_packets_received_hi,
  1454. afex_stats->rx_unicast_frames_lo,
  1455. qstats->total_unicast_packets_received_lo);
  1456. ADD_64(afex_stats->rx_broadcast_frames_hi,
  1457. qstats->total_broadcast_packets_received_hi,
  1458. afex_stats->rx_broadcast_frames_lo,
  1459. qstats->total_broadcast_packets_received_lo);
  1460. ADD_64(afex_stats->rx_multicast_frames_hi,
  1461. qstats->total_multicast_packets_received_hi,
  1462. afex_stats->rx_multicast_frames_lo,
  1463. qstats->total_multicast_packets_received_lo);
  1464. /* sum to rx_frames_discarded all discraded
  1465. * packets due to size, ttl0 and checksum
  1466. */
  1467. ADD_64(afex_stats->rx_frames_discarded_hi,
  1468. qstats->total_packets_received_checksum_discarded_hi,
  1469. afex_stats->rx_frames_discarded_lo,
  1470. qstats->total_packets_received_checksum_discarded_lo);
  1471. ADD_64(afex_stats->rx_frames_discarded_hi,
  1472. qstats->total_packets_received_ttl0_discarded_hi,
  1473. afex_stats->rx_frames_discarded_lo,
  1474. qstats->total_packets_received_ttl0_discarded_lo);
  1475. ADD_64(afex_stats->rx_frames_discarded_hi,
  1476. qstats->etherstatsoverrsizepkts_hi,
  1477. afex_stats->rx_frames_discarded_lo,
  1478. qstats->etherstatsoverrsizepkts_lo);
  1479. ADD_64(afex_stats->rx_frames_dropped_hi,
  1480. qstats->no_buff_discard_hi,
  1481. afex_stats->rx_frames_dropped_lo,
  1482. qstats->no_buff_discard_lo);
  1483. ADD_64(afex_stats->tx_unicast_bytes_hi,
  1484. qstats->total_unicast_bytes_transmitted_hi,
  1485. afex_stats->tx_unicast_bytes_lo,
  1486. qstats->total_unicast_bytes_transmitted_lo);
  1487. ADD_64(afex_stats->tx_broadcast_bytes_hi,
  1488. qstats->total_broadcast_bytes_transmitted_hi,
  1489. afex_stats->tx_broadcast_bytes_lo,
  1490. qstats->total_broadcast_bytes_transmitted_lo);
  1491. ADD_64(afex_stats->tx_multicast_bytes_hi,
  1492. qstats->total_multicast_bytes_transmitted_hi,
  1493. afex_stats->tx_multicast_bytes_lo,
  1494. qstats->total_multicast_bytes_transmitted_lo);
  1495. ADD_64(afex_stats->tx_unicast_frames_hi,
  1496. qstats->total_unicast_packets_transmitted_hi,
  1497. afex_stats->tx_unicast_frames_lo,
  1498. qstats->total_unicast_packets_transmitted_lo);
  1499. ADD_64(afex_stats->tx_broadcast_frames_hi,
  1500. qstats->total_broadcast_packets_transmitted_hi,
  1501. afex_stats->tx_broadcast_frames_lo,
  1502. qstats->total_broadcast_packets_transmitted_lo);
  1503. ADD_64(afex_stats->tx_multicast_frames_hi,
  1504. qstats->total_multicast_packets_transmitted_hi,
  1505. afex_stats->tx_multicast_frames_lo,
  1506. qstats->total_multicast_packets_transmitted_lo);
  1507. ADD_64(afex_stats->tx_frames_dropped_hi,
  1508. qstats->total_transmitted_dropped_packets_error_hi,
  1509. afex_stats->tx_frames_dropped_lo,
  1510. qstats->total_transmitted_dropped_packets_error_lo);
  1511. }
  1512. /* now add FCoE statistics which are collected separately
  1513. * (both offloaded and non offloaded)
  1514. */
  1515. if (!NO_FCOE(bp)) {
  1516. ADD_64_LE(afex_stats->rx_unicast_bytes_hi,
  1517. LE32_0,
  1518. afex_stats->rx_unicast_bytes_lo,
  1519. fw_fcoe_stat->rx_stat0.fcoe_rx_byte_cnt);
  1520. ADD_64_LE(afex_stats->rx_unicast_bytes_hi,
  1521. fcoe_q_tstorm_stats->rcv_ucast_bytes.hi,
  1522. afex_stats->rx_unicast_bytes_lo,
  1523. fcoe_q_tstorm_stats->rcv_ucast_bytes.lo);
  1524. ADD_64_LE(afex_stats->rx_broadcast_bytes_hi,
  1525. fcoe_q_tstorm_stats->rcv_bcast_bytes.hi,
  1526. afex_stats->rx_broadcast_bytes_lo,
  1527. fcoe_q_tstorm_stats->rcv_bcast_bytes.lo);
  1528. ADD_64_LE(afex_stats->rx_multicast_bytes_hi,
  1529. fcoe_q_tstorm_stats->rcv_mcast_bytes.hi,
  1530. afex_stats->rx_multicast_bytes_lo,
  1531. fcoe_q_tstorm_stats->rcv_mcast_bytes.lo);
  1532. ADD_64_LE(afex_stats->rx_unicast_frames_hi,
  1533. LE32_0,
  1534. afex_stats->rx_unicast_frames_lo,
  1535. fw_fcoe_stat->rx_stat0.fcoe_rx_pkt_cnt);
  1536. ADD_64_LE(afex_stats->rx_unicast_frames_hi,
  1537. LE32_0,
  1538. afex_stats->rx_unicast_frames_lo,
  1539. fcoe_q_tstorm_stats->rcv_ucast_pkts);
  1540. ADD_64_LE(afex_stats->rx_broadcast_frames_hi,
  1541. LE32_0,
  1542. afex_stats->rx_broadcast_frames_lo,
  1543. fcoe_q_tstorm_stats->rcv_bcast_pkts);
  1544. ADD_64_LE(afex_stats->rx_multicast_frames_hi,
  1545. LE32_0,
  1546. afex_stats->rx_multicast_frames_lo,
  1547. fcoe_q_tstorm_stats->rcv_ucast_pkts);
  1548. ADD_64_LE(afex_stats->rx_frames_discarded_hi,
  1549. LE32_0,
  1550. afex_stats->rx_frames_discarded_lo,
  1551. fcoe_q_tstorm_stats->checksum_discard);
  1552. ADD_64_LE(afex_stats->rx_frames_discarded_hi,
  1553. LE32_0,
  1554. afex_stats->rx_frames_discarded_lo,
  1555. fcoe_q_tstorm_stats->pkts_too_big_discard);
  1556. ADD_64_LE(afex_stats->rx_frames_discarded_hi,
  1557. LE32_0,
  1558. afex_stats->rx_frames_discarded_lo,
  1559. fcoe_q_tstorm_stats->ttl0_discard);
  1560. ADD_64_LE16(afex_stats->rx_frames_dropped_hi,
  1561. LE16_0,
  1562. afex_stats->rx_frames_dropped_lo,
  1563. fcoe_q_tstorm_stats->no_buff_discard);
  1564. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1565. LE32_0,
  1566. afex_stats->rx_frames_dropped_lo,
  1567. fcoe_q_ustorm_stats->ucast_no_buff_pkts);
  1568. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1569. LE32_0,
  1570. afex_stats->rx_frames_dropped_lo,
  1571. fcoe_q_ustorm_stats->mcast_no_buff_pkts);
  1572. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1573. LE32_0,
  1574. afex_stats->rx_frames_dropped_lo,
  1575. fcoe_q_ustorm_stats->bcast_no_buff_pkts);
  1576. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1577. LE32_0,
  1578. afex_stats->rx_frames_dropped_lo,
  1579. fw_fcoe_stat->rx_stat1.fcoe_rx_drop_pkt_cnt);
  1580. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1581. LE32_0,
  1582. afex_stats->rx_frames_dropped_lo,
  1583. fw_fcoe_stat->rx_stat2.fcoe_rx_drop_pkt_cnt);
  1584. ADD_64_LE(afex_stats->tx_unicast_bytes_hi,
  1585. LE32_0,
  1586. afex_stats->tx_unicast_bytes_lo,
  1587. fw_fcoe_stat->tx_stat.fcoe_tx_byte_cnt);
  1588. ADD_64_LE(afex_stats->tx_unicast_bytes_hi,
  1589. fcoe_q_xstorm_stats->ucast_bytes_sent.hi,
  1590. afex_stats->tx_unicast_bytes_lo,
  1591. fcoe_q_xstorm_stats->ucast_bytes_sent.lo);
  1592. ADD_64_LE(afex_stats->tx_broadcast_bytes_hi,
  1593. fcoe_q_xstorm_stats->bcast_bytes_sent.hi,
  1594. afex_stats->tx_broadcast_bytes_lo,
  1595. fcoe_q_xstorm_stats->bcast_bytes_sent.lo);
  1596. ADD_64_LE(afex_stats->tx_multicast_bytes_hi,
  1597. fcoe_q_xstorm_stats->mcast_bytes_sent.hi,
  1598. afex_stats->tx_multicast_bytes_lo,
  1599. fcoe_q_xstorm_stats->mcast_bytes_sent.lo);
  1600. ADD_64_LE(afex_stats->tx_unicast_frames_hi,
  1601. LE32_0,
  1602. afex_stats->tx_unicast_frames_lo,
  1603. fw_fcoe_stat->tx_stat.fcoe_tx_pkt_cnt);
  1604. ADD_64_LE(afex_stats->tx_unicast_frames_hi,
  1605. LE32_0,
  1606. afex_stats->tx_unicast_frames_lo,
  1607. fcoe_q_xstorm_stats->ucast_pkts_sent);
  1608. ADD_64_LE(afex_stats->tx_broadcast_frames_hi,
  1609. LE32_0,
  1610. afex_stats->tx_broadcast_frames_lo,
  1611. fcoe_q_xstorm_stats->bcast_pkts_sent);
  1612. ADD_64_LE(afex_stats->tx_multicast_frames_hi,
  1613. LE32_0,
  1614. afex_stats->tx_multicast_frames_lo,
  1615. fcoe_q_xstorm_stats->mcast_pkts_sent);
  1616. ADD_64_LE(afex_stats->tx_frames_dropped_hi,
  1617. LE32_0,
  1618. afex_stats->tx_frames_dropped_lo,
  1619. fcoe_q_xstorm_stats->error_drop_pkts);
  1620. }
  1621. /* if port stats are requested, add them to the PMF
  1622. * stats, as anyway they will be accumulated by the
  1623. * MCP before sent to the switch
  1624. */
  1625. if ((bp->port.pmf) && (stats_type == VICSTATST_UIF_INDEX)) {
  1626. ADD_64(afex_stats->rx_frames_dropped_hi,
  1627. 0,
  1628. afex_stats->rx_frames_dropped_lo,
  1629. estats->mac_filter_discard);
  1630. ADD_64(afex_stats->rx_frames_dropped_hi,
  1631. 0,
  1632. afex_stats->rx_frames_dropped_lo,
  1633. estats->brb_truncate_discard);
  1634. ADD_64(afex_stats->rx_frames_discarded_hi,
  1635. 0,
  1636. afex_stats->rx_frames_discarded_lo,
  1637. estats->mac_discard);
  1638. }
  1639. }