bnx2x_sriov.c 86 KB

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  1. /* bnx2x_sriov.c: Broadcom Everest network driver.
  2. *
  3. * Copyright 2009-2013 Broadcom Corporation
  4. *
  5. * Unless you and Broadcom execute a separate written software license
  6. * agreement governing use of this software, this software is licensed to you
  7. * under the terms of the GNU General Public License version 2, available
  8. * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
  9. *
  10. * Notwithstanding the above, under no circumstances may you combine this
  11. * software in any way with any other Broadcom software provided under a
  12. * license other than the GPL, without Broadcom's express prior written
  13. * consent.
  14. *
  15. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  16. * Written by: Shmulik Ravid <shmulikr@broadcom.com>
  17. * Ariel Elior <ariele@broadcom.com>
  18. *
  19. */
  20. #include "bnx2x.h"
  21. #include "bnx2x_init.h"
  22. #include "bnx2x_cmn.h"
  23. #include <linux/crc32.h>
  24. /* General service functions */
  25. static void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid,
  26. u16 pf_id)
  27. {
  28. REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid),
  29. pf_id);
  30. REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_VF_TO_PF_OFFSET(abs_fid),
  31. pf_id);
  32. REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_VF_TO_PF_OFFSET(abs_fid),
  33. pf_id);
  34. REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_VF_TO_PF_OFFSET(abs_fid),
  35. pf_id);
  36. }
  37. static void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid,
  38. u8 enable)
  39. {
  40. REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(abs_fid),
  41. enable);
  42. REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_FUNC_EN_OFFSET(abs_fid),
  43. enable);
  44. REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_FUNC_EN_OFFSET(abs_fid),
  45. enable);
  46. REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_FUNC_EN_OFFSET(abs_fid),
  47. enable);
  48. }
  49. int bnx2x_vf_idx_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
  50. {
  51. int idx;
  52. for_each_vf(bp, idx)
  53. if (bnx2x_vf(bp, idx, abs_vfid) == abs_vfid)
  54. break;
  55. return idx;
  56. }
  57. static
  58. struct bnx2x_virtf *bnx2x_vf_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
  59. {
  60. u16 idx = (u16)bnx2x_vf_idx_by_abs_fid(bp, abs_vfid);
  61. return (idx < BNX2X_NR_VIRTFN(bp)) ? BP_VF(bp, idx) : NULL;
  62. }
  63. static void bnx2x_vf_igu_ack_sb(struct bnx2x *bp, struct bnx2x_virtf *vf,
  64. u8 igu_sb_id, u8 segment, u16 index, u8 op,
  65. u8 update)
  66. {
  67. /* acking a VF sb through the PF - use the GRC */
  68. u32 ctl;
  69. u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA;
  70. u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;
  71. u32 func_encode = vf->abs_vfid;
  72. u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + igu_sb_id;
  73. struct igu_regular cmd_data = {0};
  74. cmd_data.sb_id_and_flags =
  75. ((index << IGU_REGULAR_SB_INDEX_SHIFT) |
  76. (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
  77. (update << IGU_REGULAR_BUPDATE_SHIFT) |
  78. (op << IGU_REGULAR_ENABLE_INT_SHIFT));
  79. ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT |
  80. func_encode << IGU_CTRL_REG_FID_SHIFT |
  81. IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT;
  82. DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
  83. cmd_data.sb_id_and_flags, igu_addr_data);
  84. REG_WR(bp, igu_addr_data, cmd_data.sb_id_and_flags);
  85. mmiowb();
  86. barrier();
  87. DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
  88. ctl, igu_addr_ctl);
  89. REG_WR(bp, igu_addr_ctl, ctl);
  90. mmiowb();
  91. barrier();
  92. }
  93. /* VFOP - VF slow-path operation support */
  94. #define BNX2X_VFOP_FILTER_ADD_CNT_MAX 0x10000
  95. /* VFOP operations states */
  96. enum bnx2x_vfop_qctor_state {
  97. BNX2X_VFOP_QCTOR_INIT,
  98. BNX2X_VFOP_QCTOR_SETUP,
  99. BNX2X_VFOP_QCTOR_INT_EN
  100. };
  101. enum bnx2x_vfop_qdtor_state {
  102. BNX2X_VFOP_QDTOR_HALT,
  103. BNX2X_VFOP_QDTOR_TERMINATE,
  104. BNX2X_VFOP_QDTOR_CFCDEL,
  105. BNX2X_VFOP_QDTOR_DONE
  106. };
  107. enum bnx2x_vfop_vlan_mac_state {
  108. BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE,
  109. BNX2X_VFOP_VLAN_MAC_CLEAR,
  110. BNX2X_VFOP_VLAN_MAC_CHK_DONE,
  111. BNX2X_VFOP_MAC_CONFIG_LIST,
  112. BNX2X_VFOP_VLAN_CONFIG_LIST,
  113. BNX2X_VFOP_VLAN_CONFIG_LIST_0
  114. };
  115. enum bnx2x_vfop_qsetup_state {
  116. BNX2X_VFOP_QSETUP_CTOR,
  117. BNX2X_VFOP_QSETUP_VLAN0,
  118. BNX2X_VFOP_QSETUP_DONE
  119. };
  120. enum bnx2x_vfop_mcast_state {
  121. BNX2X_VFOP_MCAST_DEL,
  122. BNX2X_VFOP_MCAST_ADD,
  123. BNX2X_VFOP_MCAST_CHK_DONE
  124. };
  125. enum bnx2x_vfop_qflr_state {
  126. BNX2X_VFOP_QFLR_CLR_VLAN,
  127. BNX2X_VFOP_QFLR_CLR_MAC,
  128. BNX2X_VFOP_QFLR_TERMINATE,
  129. BNX2X_VFOP_QFLR_DONE
  130. };
  131. enum bnx2x_vfop_flr_state {
  132. BNX2X_VFOP_FLR_QUEUES,
  133. BNX2X_VFOP_FLR_HW
  134. };
  135. enum bnx2x_vfop_close_state {
  136. BNX2X_VFOP_CLOSE_QUEUES,
  137. BNX2X_VFOP_CLOSE_HW
  138. };
  139. enum bnx2x_vfop_rxmode_state {
  140. BNX2X_VFOP_RXMODE_CONFIG,
  141. BNX2X_VFOP_RXMODE_DONE
  142. };
  143. enum bnx2x_vfop_qteardown_state {
  144. BNX2X_VFOP_QTEARDOWN_RXMODE,
  145. BNX2X_VFOP_QTEARDOWN_CLR_VLAN,
  146. BNX2X_VFOP_QTEARDOWN_CLR_MAC,
  147. BNX2X_VFOP_QTEARDOWN_QDTOR,
  148. BNX2X_VFOP_QTEARDOWN_DONE
  149. };
  150. #define bnx2x_vfop_reset_wq(vf) atomic_set(&vf->op_in_progress, 0)
  151. void bnx2x_vfop_qctor_dump_tx(struct bnx2x *bp, struct bnx2x_virtf *vf,
  152. struct bnx2x_queue_init_params *init_params,
  153. struct bnx2x_queue_setup_params *setup_params,
  154. u16 q_idx, u16 sb_idx)
  155. {
  156. DP(BNX2X_MSG_IOV,
  157. "VF[%d] Q_SETUP: txq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, flags=0x%lx, traffic-type=%d",
  158. vf->abs_vfid,
  159. q_idx,
  160. sb_idx,
  161. init_params->tx.sb_cq_index,
  162. init_params->tx.hc_rate,
  163. setup_params->flags,
  164. setup_params->txq_params.traffic_type);
  165. }
  166. void bnx2x_vfop_qctor_dump_rx(struct bnx2x *bp, struct bnx2x_virtf *vf,
  167. struct bnx2x_queue_init_params *init_params,
  168. struct bnx2x_queue_setup_params *setup_params,
  169. u16 q_idx, u16 sb_idx)
  170. {
  171. struct bnx2x_rxq_setup_params *rxq_params = &setup_params->rxq_params;
  172. DP(BNX2X_MSG_IOV, "VF[%d] Q_SETUP: rxq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, mtu=%d, buf-size=%d\n"
  173. "sge-size=%d, max_sge_pkt=%d, tpa-agg-size=%d, flags=0x%lx, drop-flags=0x%x, cache-log=%d\n",
  174. vf->abs_vfid,
  175. q_idx,
  176. sb_idx,
  177. init_params->rx.sb_cq_index,
  178. init_params->rx.hc_rate,
  179. setup_params->gen_params.mtu,
  180. rxq_params->buf_sz,
  181. rxq_params->sge_buf_sz,
  182. rxq_params->max_sges_pkt,
  183. rxq_params->tpa_agg_sz,
  184. setup_params->flags,
  185. rxq_params->drop_flags,
  186. rxq_params->cache_line_log);
  187. }
  188. void bnx2x_vfop_qctor_prep(struct bnx2x *bp,
  189. struct bnx2x_virtf *vf,
  190. struct bnx2x_vf_queue *q,
  191. struct bnx2x_vfop_qctor_params *p,
  192. unsigned long q_type)
  193. {
  194. struct bnx2x_queue_init_params *init_p = &p->qstate.params.init;
  195. struct bnx2x_queue_setup_params *setup_p = &p->prep_qsetup;
  196. /* INIT */
  197. /* Enable host coalescing in the transition to INIT state */
  198. if (test_bit(BNX2X_Q_FLG_HC, &init_p->rx.flags))
  199. __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->rx.flags);
  200. if (test_bit(BNX2X_Q_FLG_HC, &init_p->tx.flags))
  201. __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->tx.flags);
  202. /* FW SB ID */
  203. init_p->rx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
  204. init_p->tx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
  205. /* context */
  206. init_p->cxts[0] = q->cxt;
  207. /* SETUP */
  208. /* Setup-op general parameters */
  209. setup_p->gen_params.spcl_id = vf->sp_cl_id;
  210. setup_p->gen_params.stat_id = vfq_stat_id(vf, q);
  211. /* Setup-op pause params:
  212. * Nothing to do, the pause thresholds are set by default to 0 which
  213. * effectively turns off the feature for this queue. We don't want
  214. * one queue (VF) to interfering with another queue (another VF)
  215. */
  216. if (vf->cfg_flags & VF_CFG_FW_FC)
  217. BNX2X_ERR("No support for pause to VFs (abs_vfid: %d)\n",
  218. vf->abs_vfid);
  219. /* Setup-op flags:
  220. * collect statistics, zero statistics, local-switching, security,
  221. * OV for Flex10, RSS and MCAST for leading
  222. */
  223. if (test_bit(BNX2X_Q_FLG_STATS, &setup_p->flags))
  224. __set_bit(BNX2X_Q_FLG_ZERO_STATS, &setup_p->flags);
  225. /* for VFs, enable tx switching, bd coherency, and mac address
  226. * anti-spoofing
  227. */
  228. __set_bit(BNX2X_Q_FLG_TX_SWITCH, &setup_p->flags);
  229. __set_bit(BNX2X_Q_FLG_TX_SEC, &setup_p->flags);
  230. __set_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);
  231. if (vfq_is_leading(q)) {
  232. __set_bit(BNX2X_Q_FLG_LEADING_RSS, &setup_p->flags);
  233. __set_bit(BNX2X_Q_FLG_MCAST, &setup_p->flags);
  234. }
  235. /* Setup-op rx parameters */
  236. if (test_bit(BNX2X_Q_TYPE_HAS_RX, &q_type)) {
  237. struct bnx2x_rxq_setup_params *rxq_p = &setup_p->rxq_params;
  238. rxq_p->cl_qzone_id = vfq_qzone_id(vf, q);
  239. rxq_p->fw_sb_id = vf_igu_sb(vf, q->sb_idx);
  240. rxq_p->rss_engine_id = FW_VF_HANDLE(vf->abs_vfid);
  241. if (test_bit(BNX2X_Q_FLG_TPA, &setup_p->flags))
  242. rxq_p->max_tpa_queues = BNX2X_VF_MAX_TPA_AGG_QUEUES;
  243. }
  244. /* Setup-op tx parameters */
  245. if (test_bit(BNX2X_Q_TYPE_HAS_TX, &q_type)) {
  246. setup_p->txq_params.tss_leading_cl_id = vf->leading_rss;
  247. setup_p->txq_params.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
  248. }
  249. }
  250. /* VFOP queue construction */
  251. static void bnx2x_vfop_qctor(struct bnx2x *bp, struct bnx2x_virtf *vf)
  252. {
  253. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  254. struct bnx2x_vfop_args_qctor *args = &vfop->args.qctor;
  255. struct bnx2x_queue_state_params *q_params = &vfop->op_p->qctor.qstate;
  256. enum bnx2x_vfop_qctor_state state = vfop->state;
  257. bnx2x_vfop_reset_wq(vf);
  258. if (vfop->rc < 0)
  259. goto op_err;
  260. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  261. switch (state) {
  262. case BNX2X_VFOP_QCTOR_INIT:
  263. /* has this queue already been opened? */
  264. if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
  265. BNX2X_Q_LOGICAL_STATE_ACTIVE) {
  266. DP(BNX2X_MSG_IOV,
  267. "Entered qctor but queue was already up. Aborting gracefully\n");
  268. goto op_done;
  269. }
  270. /* next state */
  271. vfop->state = BNX2X_VFOP_QCTOR_SETUP;
  272. q_params->cmd = BNX2X_Q_CMD_INIT;
  273. vfop->rc = bnx2x_queue_state_change(bp, q_params);
  274. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  275. case BNX2X_VFOP_QCTOR_SETUP:
  276. /* next state */
  277. vfop->state = BNX2X_VFOP_QCTOR_INT_EN;
  278. /* copy pre-prepared setup params to the queue-state params */
  279. vfop->op_p->qctor.qstate.params.setup =
  280. vfop->op_p->qctor.prep_qsetup;
  281. q_params->cmd = BNX2X_Q_CMD_SETUP;
  282. vfop->rc = bnx2x_queue_state_change(bp, q_params);
  283. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  284. case BNX2X_VFOP_QCTOR_INT_EN:
  285. /* enable interrupts */
  286. bnx2x_vf_igu_ack_sb(bp, vf, vf_igu_sb(vf, args->sb_idx),
  287. USTORM_ID, 0, IGU_INT_ENABLE, 0);
  288. goto op_done;
  289. default:
  290. bnx2x_vfop_default(state);
  291. }
  292. op_err:
  293. BNX2X_ERR("QCTOR[%d:%d] error: cmd %d, rc %d\n",
  294. vf->abs_vfid, args->qid, q_params->cmd, vfop->rc);
  295. op_done:
  296. bnx2x_vfop_end(bp, vf, vfop);
  297. op_pending:
  298. return;
  299. }
  300. static int bnx2x_vfop_qctor_cmd(struct bnx2x *bp,
  301. struct bnx2x_virtf *vf,
  302. struct bnx2x_vfop_cmd *cmd,
  303. int qid)
  304. {
  305. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  306. if (vfop) {
  307. vf->op_params.qctor.qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
  308. vfop->args.qctor.qid = qid;
  309. vfop->args.qctor.sb_idx = bnx2x_vfq(vf, qid, sb_idx);
  310. bnx2x_vfop_opset(BNX2X_VFOP_QCTOR_INIT,
  311. bnx2x_vfop_qctor, cmd->done);
  312. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qctor,
  313. cmd->block);
  314. }
  315. return -ENOMEM;
  316. }
  317. /* VFOP queue destruction */
  318. static void bnx2x_vfop_qdtor(struct bnx2x *bp, struct bnx2x_virtf *vf)
  319. {
  320. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  321. struct bnx2x_vfop_args_qdtor *qdtor = &vfop->args.qdtor;
  322. struct bnx2x_queue_state_params *q_params = &vfop->op_p->qctor.qstate;
  323. enum bnx2x_vfop_qdtor_state state = vfop->state;
  324. bnx2x_vfop_reset_wq(vf);
  325. if (vfop->rc < 0)
  326. goto op_err;
  327. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  328. switch (state) {
  329. case BNX2X_VFOP_QDTOR_HALT:
  330. /* has this queue already been stopped? */
  331. if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
  332. BNX2X_Q_LOGICAL_STATE_STOPPED) {
  333. DP(BNX2X_MSG_IOV,
  334. "Entered qdtor but queue was already stopped. Aborting gracefully\n");
  335. goto op_done;
  336. }
  337. /* next state */
  338. vfop->state = BNX2X_VFOP_QDTOR_TERMINATE;
  339. q_params->cmd = BNX2X_Q_CMD_HALT;
  340. vfop->rc = bnx2x_queue_state_change(bp, q_params);
  341. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  342. case BNX2X_VFOP_QDTOR_TERMINATE:
  343. /* next state */
  344. vfop->state = BNX2X_VFOP_QDTOR_CFCDEL;
  345. q_params->cmd = BNX2X_Q_CMD_TERMINATE;
  346. vfop->rc = bnx2x_queue_state_change(bp, q_params);
  347. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  348. case BNX2X_VFOP_QDTOR_CFCDEL:
  349. /* next state */
  350. vfop->state = BNX2X_VFOP_QDTOR_DONE;
  351. q_params->cmd = BNX2X_Q_CMD_CFC_DEL;
  352. vfop->rc = bnx2x_queue_state_change(bp, q_params);
  353. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  354. op_err:
  355. BNX2X_ERR("QDTOR[%d:%d] error: cmd %d, rc %d\n",
  356. vf->abs_vfid, qdtor->qid, q_params->cmd, vfop->rc);
  357. op_done:
  358. case BNX2X_VFOP_QDTOR_DONE:
  359. /* invalidate the context */
  360. qdtor->cxt->ustorm_ag_context.cdu_usage = 0;
  361. qdtor->cxt->xstorm_ag_context.cdu_reserved = 0;
  362. bnx2x_vfop_end(bp, vf, vfop);
  363. return;
  364. default:
  365. bnx2x_vfop_default(state);
  366. }
  367. op_pending:
  368. return;
  369. }
  370. static int bnx2x_vfop_qdtor_cmd(struct bnx2x *bp,
  371. struct bnx2x_virtf *vf,
  372. struct bnx2x_vfop_cmd *cmd,
  373. int qid)
  374. {
  375. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  376. if (vfop) {
  377. struct bnx2x_queue_state_params *qstate =
  378. &vf->op_params.qctor.qstate;
  379. memset(qstate, 0, sizeof(*qstate));
  380. qstate->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
  381. vfop->args.qdtor.qid = qid;
  382. vfop->args.qdtor.cxt = bnx2x_vfq(vf, qid, cxt);
  383. bnx2x_vfop_opset(BNX2X_VFOP_QDTOR_HALT,
  384. bnx2x_vfop_qdtor, cmd->done);
  385. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qdtor,
  386. cmd->block);
  387. }
  388. DP(BNX2X_MSG_IOV, "VF[%d] failed to add a vfop.\n", vf->abs_vfid);
  389. return -ENOMEM;
  390. }
  391. static void
  392. bnx2x_vf_set_igu_info(struct bnx2x *bp, u8 igu_sb_id, u8 abs_vfid)
  393. {
  394. struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
  395. if (vf) {
  396. if (!vf_sb_count(vf))
  397. vf->igu_base_id = igu_sb_id;
  398. ++vf_sb_count(vf);
  399. }
  400. }
  401. /* VFOP MAC/VLAN helpers */
  402. static inline void bnx2x_vfop_credit(struct bnx2x *bp,
  403. struct bnx2x_vfop *vfop,
  404. struct bnx2x_vlan_mac_obj *obj)
  405. {
  406. struct bnx2x_vfop_args_filters *args = &vfop->args.filters;
  407. /* update credit only if there is no error
  408. * and a valid credit counter
  409. */
  410. if (!vfop->rc && args->credit) {
  411. int cnt = 0;
  412. struct list_head *pos;
  413. list_for_each(pos, &obj->head)
  414. cnt++;
  415. atomic_set(args->credit, cnt);
  416. }
  417. }
  418. static int bnx2x_vfop_set_user_req(struct bnx2x *bp,
  419. struct bnx2x_vfop_filter *pos,
  420. struct bnx2x_vlan_mac_data *user_req)
  421. {
  422. user_req->cmd = pos->add ? BNX2X_VLAN_MAC_ADD :
  423. BNX2X_VLAN_MAC_DEL;
  424. switch (pos->type) {
  425. case BNX2X_VFOP_FILTER_MAC:
  426. memcpy(user_req->u.mac.mac, pos->mac, ETH_ALEN);
  427. break;
  428. case BNX2X_VFOP_FILTER_VLAN:
  429. user_req->u.vlan.vlan = pos->vid;
  430. break;
  431. default:
  432. BNX2X_ERR("Invalid filter type, skipping\n");
  433. return 1;
  434. }
  435. return 0;
  436. }
  437. static int
  438. bnx2x_vfop_config_vlan0(struct bnx2x *bp,
  439. struct bnx2x_vlan_mac_ramrod_params *vlan_mac,
  440. bool add)
  441. {
  442. int rc;
  443. vlan_mac->user_req.cmd = add ? BNX2X_VLAN_MAC_ADD :
  444. BNX2X_VLAN_MAC_DEL;
  445. vlan_mac->user_req.u.vlan.vlan = 0;
  446. rc = bnx2x_config_vlan_mac(bp, vlan_mac);
  447. if (rc == -EEXIST)
  448. rc = 0;
  449. return rc;
  450. }
  451. static int bnx2x_vfop_config_list(struct bnx2x *bp,
  452. struct bnx2x_vfop_filters *filters,
  453. struct bnx2x_vlan_mac_ramrod_params *vlan_mac)
  454. {
  455. struct bnx2x_vfop_filter *pos, *tmp;
  456. struct list_head rollback_list, *filters_list = &filters->head;
  457. struct bnx2x_vlan_mac_data *user_req = &vlan_mac->user_req;
  458. int rc = 0, cnt = 0;
  459. INIT_LIST_HEAD(&rollback_list);
  460. list_for_each_entry_safe(pos, tmp, filters_list, link) {
  461. if (bnx2x_vfop_set_user_req(bp, pos, user_req))
  462. continue;
  463. rc = bnx2x_config_vlan_mac(bp, vlan_mac);
  464. if (rc >= 0) {
  465. cnt += pos->add ? 1 : -1;
  466. list_del(&pos->link);
  467. list_add(&pos->link, &rollback_list);
  468. rc = 0;
  469. } else if (rc == -EEXIST) {
  470. rc = 0;
  471. } else {
  472. BNX2X_ERR("Failed to add a new vlan_mac command\n");
  473. break;
  474. }
  475. }
  476. /* rollback if error or too many rules added */
  477. if (rc || cnt > filters->add_cnt) {
  478. BNX2X_ERR("error or too many rules added. Performing rollback\n");
  479. list_for_each_entry_safe(pos, tmp, &rollback_list, link) {
  480. pos->add = !pos->add; /* reverse op */
  481. bnx2x_vfop_set_user_req(bp, pos, user_req);
  482. bnx2x_config_vlan_mac(bp, vlan_mac);
  483. list_del(&pos->link);
  484. }
  485. cnt = 0;
  486. if (!rc)
  487. rc = -EINVAL;
  488. }
  489. filters->add_cnt = cnt;
  490. return rc;
  491. }
  492. /* VFOP set VLAN/MAC */
  493. static void bnx2x_vfop_vlan_mac(struct bnx2x *bp, struct bnx2x_virtf *vf)
  494. {
  495. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  496. struct bnx2x_vlan_mac_ramrod_params *vlan_mac = &vfop->op_p->vlan_mac;
  497. struct bnx2x_vlan_mac_obj *obj = vlan_mac->vlan_mac_obj;
  498. struct bnx2x_vfop_filters *filters = vfop->args.filters.multi_filter;
  499. enum bnx2x_vfop_vlan_mac_state state = vfop->state;
  500. if (vfop->rc < 0)
  501. goto op_err;
  502. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  503. bnx2x_vfop_reset_wq(vf);
  504. switch (state) {
  505. case BNX2X_VFOP_VLAN_MAC_CLEAR:
  506. /* next state */
  507. vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
  508. /* do delete */
  509. vfop->rc = obj->delete_all(bp, obj,
  510. &vlan_mac->user_req.vlan_mac_flags,
  511. &vlan_mac->ramrod_flags);
  512. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  513. case BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE:
  514. /* next state */
  515. vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
  516. /* do config */
  517. vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
  518. if (vfop->rc == -EEXIST)
  519. vfop->rc = 0;
  520. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  521. case BNX2X_VFOP_VLAN_MAC_CHK_DONE:
  522. vfop->rc = !!obj->raw.check_pending(&obj->raw);
  523. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  524. case BNX2X_VFOP_MAC_CONFIG_LIST:
  525. /* next state */
  526. vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
  527. /* do list config */
  528. vfop->rc = bnx2x_vfop_config_list(bp, filters, vlan_mac);
  529. if (vfop->rc)
  530. goto op_err;
  531. set_bit(RAMROD_CONT, &vlan_mac->ramrod_flags);
  532. vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
  533. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  534. case BNX2X_VFOP_VLAN_CONFIG_LIST:
  535. /* next state */
  536. vfop->state = BNX2X_VFOP_VLAN_CONFIG_LIST_0;
  537. /* remove vlan0 - could be no-op */
  538. vfop->rc = bnx2x_vfop_config_vlan0(bp, vlan_mac, false);
  539. if (vfop->rc)
  540. goto op_err;
  541. /* Do vlan list config. if this operation fails we try to
  542. * restore vlan0 to keep the queue is working order
  543. */
  544. vfop->rc = bnx2x_vfop_config_list(bp, filters, vlan_mac);
  545. if (!vfop->rc) {
  546. set_bit(RAMROD_CONT, &vlan_mac->ramrod_flags);
  547. vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
  548. }
  549. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT); /* fall-through */
  550. case BNX2X_VFOP_VLAN_CONFIG_LIST_0:
  551. /* next state */
  552. vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
  553. if (list_empty(&obj->head))
  554. /* add vlan0 */
  555. vfop->rc = bnx2x_vfop_config_vlan0(bp, vlan_mac, true);
  556. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  557. default:
  558. bnx2x_vfop_default(state);
  559. }
  560. op_err:
  561. BNX2X_ERR("VLAN-MAC error: rc %d\n", vfop->rc);
  562. op_done:
  563. kfree(filters);
  564. bnx2x_vfop_credit(bp, vfop, obj);
  565. bnx2x_vfop_end(bp, vf, vfop);
  566. op_pending:
  567. return;
  568. }
  569. struct bnx2x_vfop_vlan_mac_flags {
  570. bool drv_only;
  571. bool dont_consume;
  572. bool single_cmd;
  573. bool add;
  574. };
  575. static void
  576. bnx2x_vfop_vlan_mac_prep_ramrod(struct bnx2x_vlan_mac_ramrod_params *ramrod,
  577. struct bnx2x_vfop_vlan_mac_flags *flags)
  578. {
  579. struct bnx2x_vlan_mac_data *ureq = &ramrod->user_req;
  580. memset(ramrod, 0, sizeof(*ramrod));
  581. /* ramrod flags */
  582. if (flags->drv_only)
  583. set_bit(RAMROD_DRV_CLR_ONLY, &ramrod->ramrod_flags);
  584. if (flags->single_cmd)
  585. set_bit(RAMROD_EXEC, &ramrod->ramrod_flags);
  586. /* mac_vlan flags */
  587. if (flags->dont_consume)
  588. set_bit(BNX2X_DONT_CONSUME_CAM_CREDIT, &ureq->vlan_mac_flags);
  589. /* cmd */
  590. ureq->cmd = flags->add ? BNX2X_VLAN_MAC_ADD : BNX2X_VLAN_MAC_DEL;
  591. }
  592. static inline void
  593. bnx2x_vfop_mac_prep_ramrod(struct bnx2x_vlan_mac_ramrod_params *ramrod,
  594. struct bnx2x_vfop_vlan_mac_flags *flags)
  595. {
  596. bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, flags);
  597. set_bit(BNX2X_ETH_MAC, &ramrod->user_req.vlan_mac_flags);
  598. }
  599. static int bnx2x_vfop_mac_delall_cmd(struct bnx2x *bp,
  600. struct bnx2x_virtf *vf,
  601. struct bnx2x_vfop_cmd *cmd,
  602. int qid, bool drv_only)
  603. {
  604. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  605. if (vfop) {
  606. struct bnx2x_vfop_args_filters filters = {
  607. .multi_filter = NULL, /* single */
  608. .credit = NULL, /* consume credit */
  609. };
  610. struct bnx2x_vfop_vlan_mac_flags flags = {
  611. .drv_only = drv_only,
  612. .dont_consume = (filters.credit != NULL),
  613. .single_cmd = true,
  614. .add = false /* don't care */,
  615. };
  616. struct bnx2x_vlan_mac_ramrod_params *ramrod =
  617. &vf->op_params.vlan_mac;
  618. /* set ramrod params */
  619. bnx2x_vfop_mac_prep_ramrod(ramrod, &flags);
  620. /* set object */
  621. ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
  622. /* set extra args */
  623. vfop->args.filters = filters;
  624. bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CLEAR,
  625. bnx2x_vfop_vlan_mac, cmd->done);
  626. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
  627. cmd->block);
  628. }
  629. return -ENOMEM;
  630. }
  631. int bnx2x_vfop_mac_list_cmd(struct bnx2x *bp,
  632. struct bnx2x_virtf *vf,
  633. struct bnx2x_vfop_cmd *cmd,
  634. struct bnx2x_vfop_filters *macs,
  635. int qid, bool drv_only)
  636. {
  637. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  638. if (vfop) {
  639. struct bnx2x_vfop_args_filters filters = {
  640. .multi_filter = macs,
  641. .credit = NULL, /* consume credit */
  642. };
  643. struct bnx2x_vfop_vlan_mac_flags flags = {
  644. .drv_only = drv_only,
  645. .dont_consume = (filters.credit != NULL),
  646. .single_cmd = false,
  647. .add = false, /* don't care since only the items in the
  648. * filters list affect the sp operation,
  649. * not the list itself
  650. */
  651. };
  652. struct bnx2x_vlan_mac_ramrod_params *ramrod =
  653. &vf->op_params.vlan_mac;
  654. /* set ramrod params */
  655. bnx2x_vfop_mac_prep_ramrod(ramrod, &flags);
  656. /* set object */
  657. ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
  658. /* set extra args */
  659. filters.multi_filter->add_cnt = BNX2X_VFOP_FILTER_ADD_CNT_MAX;
  660. vfop->args.filters = filters;
  661. bnx2x_vfop_opset(BNX2X_VFOP_MAC_CONFIG_LIST,
  662. bnx2x_vfop_vlan_mac, cmd->done);
  663. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
  664. cmd->block);
  665. }
  666. return -ENOMEM;
  667. }
  668. int bnx2x_vfop_vlan_set_cmd(struct bnx2x *bp,
  669. struct bnx2x_virtf *vf,
  670. struct bnx2x_vfop_cmd *cmd,
  671. int qid, u16 vid, bool add)
  672. {
  673. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  674. if (vfop) {
  675. struct bnx2x_vfop_args_filters filters = {
  676. .multi_filter = NULL, /* single command */
  677. .credit = &bnx2x_vfq(vf, qid, vlan_count),
  678. };
  679. struct bnx2x_vfop_vlan_mac_flags flags = {
  680. .drv_only = false,
  681. .dont_consume = (filters.credit != NULL),
  682. .single_cmd = true,
  683. .add = add,
  684. };
  685. struct bnx2x_vlan_mac_ramrod_params *ramrod =
  686. &vf->op_params.vlan_mac;
  687. /* set ramrod params */
  688. bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
  689. ramrod->user_req.u.vlan.vlan = vid;
  690. /* set object */
  691. ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
  692. /* set extra args */
  693. vfop->args.filters = filters;
  694. bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE,
  695. bnx2x_vfop_vlan_mac, cmd->done);
  696. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
  697. cmd->block);
  698. }
  699. return -ENOMEM;
  700. }
  701. static int bnx2x_vfop_vlan_delall_cmd(struct bnx2x *bp,
  702. struct bnx2x_virtf *vf,
  703. struct bnx2x_vfop_cmd *cmd,
  704. int qid, bool drv_only)
  705. {
  706. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  707. if (vfop) {
  708. struct bnx2x_vfop_args_filters filters = {
  709. .multi_filter = NULL, /* single command */
  710. .credit = &bnx2x_vfq(vf, qid, vlan_count),
  711. };
  712. struct bnx2x_vfop_vlan_mac_flags flags = {
  713. .drv_only = drv_only,
  714. .dont_consume = (filters.credit != NULL),
  715. .single_cmd = true,
  716. .add = false, /* don't care */
  717. };
  718. struct bnx2x_vlan_mac_ramrod_params *ramrod =
  719. &vf->op_params.vlan_mac;
  720. /* set ramrod params */
  721. bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
  722. /* set object */
  723. ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
  724. /* set extra args */
  725. vfop->args.filters = filters;
  726. bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CLEAR,
  727. bnx2x_vfop_vlan_mac, cmd->done);
  728. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
  729. cmd->block);
  730. }
  731. return -ENOMEM;
  732. }
  733. int bnx2x_vfop_vlan_list_cmd(struct bnx2x *bp,
  734. struct bnx2x_virtf *vf,
  735. struct bnx2x_vfop_cmd *cmd,
  736. struct bnx2x_vfop_filters *vlans,
  737. int qid, bool drv_only)
  738. {
  739. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  740. if (vfop) {
  741. struct bnx2x_vfop_args_filters filters = {
  742. .multi_filter = vlans,
  743. .credit = &bnx2x_vfq(vf, qid, vlan_count),
  744. };
  745. struct bnx2x_vfop_vlan_mac_flags flags = {
  746. .drv_only = drv_only,
  747. .dont_consume = (filters.credit != NULL),
  748. .single_cmd = false,
  749. .add = false, /* don't care */
  750. };
  751. struct bnx2x_vlan_mac_ramrod_params *ramrod =
  752. &vf->op_params.vlan_mac;
  753. /* set ramrod params */
  754. bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
  755. /* set object */
  756. ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
  757. /* set extra args */
  758. filters.multi_filter->add_cnt = vf_vlan_rules_cnt(vf) -
  759. atomic_read(filters.credit);
  760. vfop->args.filters = filters;
  761. bnx2x_vfop_opset(BNX2X_VFOP_VLAN_CONFIG_LIST,
  762. bnx2x_vfop_vlan_mac, cmd->done);
  763. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
  764. cmd->block);
  765. }
  766. return -ENOMEM;
  767. }
  768. /* VFOP queue setup (queue constructor + set vlan 0) */
  769. static void bnx2x_vfop_qsetup(struct bnx2x *bp, struct bnx2x_virtf *vf)
  770. {
  771. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  772. int qid = vfop->args.qctor.qid;
  773. enum bnx2x_vfop_qsetup_state state = vfop->state;
  774. struct bnx2x_vfop_cmd cmd = {
  775. .done = bnx2x_vfop_qsetup,
  776. .block = false,
  777. };
  778. if (vfop->rc < 0)
  779. goto op_err;
  780. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  781. switch (state) {
  782. case BNX2X_VFOP_QSETUP_CTOR:
  783. /* init the queue ctor command */
  784. vfop->state = BNX2X_VFOP_QSETUP_VLAN0;
  785. vfop->rc = bnx2x_vfop_qctor_cmd(bp, vf, &cmd, qid);
  786. if (vfop->rc)
  787. goto op_err;
  788. return;
  789. case BNX2X_VFOP_QSETUP_VLAN0:
  790. /* skip if non-leading or FPGA/EMU*/
  791. if (qid)
  792. goto op_done;
  793. /* init the queue set-vlan command (for vlan 0) */
  794. vfop->state = BNX2X_VFOP_QSETUP_DONE;
  795. vfop->rc = bnx2x_vfop_vlan_set_cmd(bp, vf, &cmd, qid, 0, true);
  796. if (vfop->rc)
  797. goto op_err;
  798. return;
  799. op_err:
  800. BNX2X_ERR("QSETUP[%d:%d] error: rc %d\n", vf->abs_vfid, qid, vfop->rc);
  801. op_done:
  802. case BNX2X_VFOP_QSETUP_DONE:
  803. bnx2x_vfop_end(bp, vf, vfop);
  804. return;
  805. default:
  806. bnx2x_vfop_default(state);
  807. }
  808. }
  809. int bnx2x_vfop_qsetup_cmd(struct bnx2x *bp,
  810. struct bnx2x_virtf *vf,
  811. struct bnx2x_vfop_cmd *cmd,
  812. int qid)
  813. {
  814. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  815. if (vfop) {
  816. vfop->args.qctor.qid = qid;
  817. bnx2x_vfop_opset(BNX2X_VFOP_QSETUP_CTOR,
  818. bnx2x_vfop_qsetup, cmd->done);
  819. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qsetup,
  820. cmd->block);
  821. }
  822. return -ENOMEM;
  823. }
  824. /* VFOP queue FLR handling (clear vlans, clear macs, queue destructor) */
  825. static void bnx2x_vfop_qflr(struct bnx2x *bp, struct bnx2x_virtf *vf)
  826. {
  827. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  828. int qid = vfop->args.qx.qid;
  829. enum bnx2x_vfop_qflr_state state = vfop->state;
  830. struct bnx2x_queue_state_params *qstate;
  831. struct bnx2x_vfop_cmd cmd;
  832. bnx2x_vfop_reset_wq(vf);
  833. if (vfop->rc < 0)
  834. goto op_err;
  835. DP(BNX2X_MSG_IOV, "VF[%d] STATE: %d\n", vf->abs_vfid, state);
  836. cmd.done = bnx2x_vfop_qflr;
  837. cmd.block = false;
  838. switch (state) {
  839. case BNX2X_VFOP_QFLR_CLR_VLAN:
  840. /* vlan-clear-all: driver-only, don't consume credit */
  841. vfop->state = BNX2X_VFOP_QFLR_CLR_MAC;
  842. vfop->rc = bnx2x_vfop_vlan_delall_cmd(bp, vf, &cmd, qid, true);
  843. if (vfop->rc)
  844. goto op_err;
  845. return;
  846. case BNX2X_VFOP_QFLR_CLR_MAC:
  847. /* mac-clear-all: driver only consume credit */
  848. vfop->state = BNX2X_VFOP_QFLR_TERMINATE;
  849. vfop->rc = bnx2x_vfop_mac_delall_cmd(bp, vf, &cmd, qid, true);
  850. DP(BNX2X_MSG_IOV,
  851. "VF[%d] vfop->rc after bnx2x_vfop_mac_delall_cmd was %d",
  852. vf->abs_vfid, vfop->rc);
  853. if (vfop->rc)
  854. goto op_err;
  855. return;
  856. case BNX2X_VFOP_QFLR_TERMINATE:
  857. qstate = &vfop->op_p->qctor.qstate;
  858. memset(qstate , 0, sizeof(*qstate));
  859. qstate->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
  860. vfop->state = BNX2X_VFOP_QFLR_DONE;
  861. DP(BNX2X_MSG_IOV, "VF[%d] qstate during flr was %d\n",
  862. vf->abs_vfid, qstate->q_obj->state);
  863. if (qstate->q_obj->state != BNX2X_Q_STATE_RESET) {
  864. qstate->q_obj->state = BNX2X_Q_STATE_STOPPED;
  865. qstate->cmd = BNX2X_Q_CMD_TERMINATE;
  866. vfop->rc = bnx2x_queue_state_change(bp, qstate);
  867. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_VERIFY_PEND);
  868. } else {
  869. goto op_done;
  870. }
  871. op_err:
  872. BNX2X_ERR("QFLR[%d:%d] error: rc %d\n",
  873. vf->abs_vfid, qid, vfop->rc);
  874. op_done:
  875. case BNX2X_VFOP_QFLR_DONE:
  876. bnx2x_vfop_end(bp, vf, vfop);
  877. return;
  878. default:
  879. bnx2x_vfop_default(state);
  880. }
  881. op_pending:
  882. return;
  883. }
  884. static int bnx2x_vfop_qflr_cmd(struct bnx2x *bp,
  885. struct bnx2x_virtf *vf,
  886. struct bnx2x_vfop_cmd *cmd,
  887. int qid)
  888. {
  889. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  890. if (vfop) {
  891. vfop->args.qx.qid = qid;
  892. bnx2x_vfop_opset(BNX2X_VFOP_QFLR_CLR_VLAN,
  893. bnx2x_vfop_qflr, cmd->done);
  894. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qflr,
  895. cmd->block);
  896. }
  897. return -ENOMEM;
  898. }
  899. /* VFOP multi-casts */
  900. static void bnx2x_vfop_mcast(struct bnx2x *bp, struct bnx2x_virtf *vf)
  901. {
  902. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  903. struct bnx2x_mcast_ramrod_params *mcast = &vfop->op_p->mcast;
  904. struct bnx2x_raw_obj *raw = &mcast->mcast_obj->raw;
  905. struct bnx2x_vfop_args_mcast *args = &vfop->args.mc_list;
  906. enum bnx2x_vfop_mcast_state state = vfop->state;
  907. int i;
  908. bnx2x_vfop_reset_wq(vf);
  909. if (vfop->rc < 0)
  910. goto op_err;
  911. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  912. switch (state) {
  913. case BNX2X_VFOP_MCAST_DEL:
  914. /* clear existing mcasts */
  915. vfop->state = BNX2X_VFOP_MCAST_ADD;
  916. vfop->rc = bnx2x_config_mcast(bp, mcast, BNX2X_MCAST_CMD_DEL);
  917. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  918. case BNX2X_VFOP_MCAST_ADD:
  919. if (raw->check_pending(raw))
  920. goto op_pending;
  921. if (args->mc_num) {
  922. /* update mcast list on the ramrod params */
  923. INIT_LIST_HEAD(&mcast->mcast_list);
  924. for (i = 0; i < args->mc_num; i++)
  925. list_add_tail(&(args->mc[i].link),
  926. &mcast->mcast_list);
  927. /* add new mcasts */
  928. vfop->state = BNX2X_VFOP_MCAST_CHK_DONE;
  929. vfop->rc = bnx2x_config_mcast(bp, mcast,
  930. BNX2X_MCAST_CMD_ADD);
  931. }
  932. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  933. case BNX2X_VFOP_MCAST_CHK_DONE:
  934. vfop->rc = raw->check_pending(raw) ? 1 : 0;
  935. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  936. default:
  937. bnx2x_vfop_default(state);
  938. }
  939. op_err:
  940. BNX2X_ERR("MCAST CONFIG error: rc %d\n", vfop->rc);
  941. op_done:
  942. kfree(args->mc);
  943. bnx2x_vfop_end(bp, vf, vfop);
  944. op_pending:
  945. return;
  946. }
  947. int bnx2x_vfop_mcast_cmd(struct bnx2x *bp,
  948. struct bnx2x_virtf *vf,
  949. struct bnx2x_vfop_cmd *cmd,
  950. bnx2x_mac_addr_t *mcasts,
  951. int mcast_num, bool drv_only)
  952. {
  953. struct bnx2x_vfop *vfop = NULL;
  954. size_t mc_sz = mcast_num * sizeof(struct bnx2x_mcast_list_elem);
  955. struct bnx2x_mcast_list_elem *mc = mc_sz ? kzalloc(mc_sz, GFP_KERNEL) :
  956. NULL;
  957. if (!mc_sz || mc) {
  958. vfop = bnx2x_vfop_add(bp, vf);
  959. if (vfop) {
  960. int i;
  961. struct bnx2x_mcast_ramrod_params *ramrod =
  962. &vf->op_params.mcast;
  963. /* set ramrod params */
  964. memset(ramrod, 0, sizeof(*ramrod));
  965. ramrod->mcast_obj = &vf->mcast_obj;
  966. if (drv_only)
  967. set_bit(RAMROD_DRV_CLR_ONLY,
  968. &ramrod->ramrod_flags);
  969. /* copy mcasts pointers */
  970. vfop->args.mc_list.mc_num = mcast_num;
  971. vfop->args.mc_list.mc = mc;
  972. for (i = 0; i < mcast_num; i++)
  973. mc[i].mac = mcasts[i];
  974. bnx2x_vfop_opset(BNX2X_VFOP_MCAST_DEL,
  975. bnx2x_vfop_mcast, cmd->done);
  976. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_mcast,
  977. cmd->block);
  978. } else {
  979. kfree(mc);
  980. }
  981. }
  982. return -ENOMEM;
  983. }
  984. /* VFOP rx-mode */
  985. static void bnx2x_vfop_rxmode(struct bnx2x *bp, struct bnx2x_virtf *vf)
  986. {
  987. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  988. struct bnx2x_rx_mode_ramrod_params *ramrod = &vfop->op_p->rx_mode;
  989. enum bnx2x_vfop_rxmode_state state = vfop->state;
  990. bnx2x_vfop_reset_wq(vf);
  991. if (vfop->rc < 0)
  992. goto op_err;
  993. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  994. switch (state) {
  995. case BNX2X_VFOP_RXMODE_CONFIG:
  996. /* next state */
  997. vfop->state = BNX2X_VFOP_RXMODE_DONE;
  998. vfop->rc = bnx2x_config_rx_mode(bp, ramrod);
  999. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  1000. op_err:
  1001. BNX2X_ERR("RXMODE error: rc %d\n", vfop->rc);
  1002. op_done:
  1003. case BNX2X_VFOP_RXMODE_DONE:
  1004. bnx2x_vfop_end(bp, vf, vfop);
  1005. return;
  1006. default:
  1007. bnx2x_vfop_default(state);
  1008. }
  1009. op_pending:
  1010. return;
  1011. }
  1012. int bnx2x_vfop_rxmode_cmd(struct bnx2x *bp,
  1013. struct bnx2x_virtf *vf,
  1014. struct bnx2x_vfop_cmd *cmd,
  1015. int qid, unsigned long accept_flags)
  1016. {
  1017. struct bnx2x_vf_queue *vfq = vfq_get(vf, qid);
  1018. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  1019. if (vfop) {
  1020. struct bnx2x_rx_mode_ramrod_params *ramrod =
  1021. &vf->op_params.rx_mode;
  1022. memset(ramrod, 0, sizeof(*ramrod));
  1023. /* Prepare ramrod parameters */
  1024. ramrod->cid = vfq->cid;
  1025. ramrod->cl_id = vfq_cl_id(vf, vfq);
  1026. ramrod->rx_mode_obj = &bp->rx_mode_obj;
  1027. ramrod->func_id = FW_VF_HANDLE(vf->abs_vfid);
  1028. ramrod->rx_accept_flags = accept_flags;
  1029. ramrod->tx_accept_flags = accept_flags;
  1030. ramrod->pstate = &vf->filter_state;
  1031. ramrod->state = BNX2X_FILTER_RX_MODE_PENDING;
  1032. set_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
  1033. set_bit(RAMROD_RX, &ramrod->ramrod_flags);
  1034. set_bit(RAMROD_TX, &ramrod->ramrod_flags);
  1035. ramrod->rdata =
  1036. bnx2x_vf_sp(bp, vf, rx_mode_rdata.e2);
  1037. ramrod->rdata_mapping =
  1038. bnx2x_vf_sp_map(bp, vf, rx_mode_rdata.e2);
  1039. bnx2x_vfop_opset(BNX2X_VFOP_RXMODE_CONFIG,
  1040. bnx2x_vfop_rxmode, cmd->done);
  1041. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_rxmode,
  1042. cmd->block);
  1043. }
  1044. return -ENOMEM;
  1045. }
  1046. /* VFOP queue tear-down ('drop all' rx-mode, clear vlans, clear macs,
  1047. * queue destructor)
  1048. */
  1049. static void bnx2x_vfop_qdown(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1050. {
  1051. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  1052. int qid = vfop->args.qx.qid;
  1053. enum bnx2x_vfop_qteardown_state state = vfop->state;
  1054. struct bnx2x_vfop_cmd cmd;
  1055. if (vfop->rc < 0)
  1056. goto op_err;
  1057. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  1058. cmd.done = bnx2x_vfop_qdown;
  1059. cmd.block = false;
  1060. switch (state) {
  1061. case BNX2X_VFOP_QTEARDOWN_RXMODE:
  1062. /* Drop all */
  1063. vfop->state = BNX2X_VFOP_QTEARDOWN_CLR_VLAN;
  1064. vfop->rc = bnx2x_vfop_rxmode_cmd(bp, vf, &cmd, qid, 0);
  1065. if (vfop->rc)
  1066. goto op_err;
  1067. return;
  1068. case BNX2X_VFOP_QTEARDOWN_CLR_VLAN:
  1069. /* vlan-clear-all: don't consume credit */
  1070. vfop->state = BNX2X_VFOP_QTEARDOWN_CLR_MAC;
  1071. vfop->rc = bnx2x_vfop_vlan_delall_cmd(bp, vf, &cmd, qid, false);
  1072. if (vfop->rc)
  1073. goto op_err;
  1074. return;
  1075. case BNX2X_VFOP_QTEARDOWN_CLR_MAC:
  1076. /* mac-clear-all: consume credit */
  1077. vfop->state = BNX2X_VFOP_QTEARDOWN_QDTOR;
  1078. vfop->rc = bnx2x_vfop_mac_delall_cmd(bp, vf, &cmd, qid, false);
  1079. if (vfop->rc)
  1080. goto op_err;
  1081. return;
  1082. case BNX2X_VFOP_QTEARDOWN_QDTOR:
  1083. /* run the queue destruction flow */
  1084. DP(BNX2X_MSG_IOV, "case: BNX2X_VFOP_QTEARDOWN_QDTOR\n");
  1085. vfop->state = BNX2X_VFOP_QTEARDOWN_DONE;
  1086. DP(BNX2X_MSG_IOV, "new state: BNX2X_VFOP_QTEARDOWN_DONE\n");
  1087. vfop->rc = bnx2x_vfop_qdtor_cmd(bp, vf, &cmd, qid);
  1088. DP(BNX2X_MSG_IOV, "returned from cmd\n");
  1089. if (vfop->rc)
  1090. goto op_err;
  1091. return;
  1092. op_err:
  1093. BNX2X_ERR("QTEARDOWN[%d:%d] error: rc %d\n",
  1094. vf->abs_vfid, qid, vfop->rc);
  1095. case BNX2X_VFOP_QTEARDOWN_DONE:
  1096. bnx2x_vfop_end(bp, vf, vfop);
  1097. return;
  1098. default:
  1099. bnx2x_vfop_default(state);
  1100. }
  1101. }
  1102. int bnx2x_vfop_qdown_cmd(struct bnx2x *bp,
  1103. struct bnx2x_virtf *vf,
  1104. struct bnx2x_vfop_cmd *cmd,
  1105. int qid)
  1106. {
  1107. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  1108. if (vfop) {
  1109. vfop->args.qx.qid = qid;
  1110. bnx2x_vfop_opset(BNX2X_VFOP_QTEARDOWN_RXMODE,
  1111. bnx2x_vfop_qdown, cmd->done);
  1112. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qdown,
  1113. cmd->block);
  1114. }
  1115. return -ENOMEM;
  1116. }
  1117. /* VF enable primitives
  1118. * when pretend is required the caller is responsible
  1119. * for calling pretend prior to calling these routines
  1120. */
  1121. /* internal vf enable - until vf is enabled internally all transactions
  1122. * are blocked. this routine should always be called last with pretend.
  1123. */
  1124. static void bnx2x_vf_enable_internal(struct bnx2x *bp, u8 enable)
  1125. {
  1126. REG_WR(bp, PGLUE_B_REG_INTERNAL_VFID_ENABLE, enable ? 1 : 0);
  1127. }
  1128. /* clears vf error in all semi blocks */
  1129. static void bnx2x_vf_semi_clear_err(struct bnx2x *bp, u8 abs_vfid)
  1130. {
  1131. REG_WR(bp, TSEM_REG_VFPF_ERR_NUM, abs_vfid);
  1132. REG_WR(bp, USEM_REG_VFPF_ERR_NUM, abs_vfid);
  1133. REG_WR(bp, CSEM_REG_VFPF_ERR_NUM, abs_vfid);
  1134. REG_WR(bp, XSEM_REG_VFPF_ERR_NUM, abs_vfid);
  1135. }
  1136. static void bnx2x_vf_pglue_clear_err(struct bnx2x *bp, u8 abs_vfid)
  1137. {
  1138. u32 was_err_group = (2 * BP_PATH(bp) + abs_vfid) >> 5;
  1139. u32 was_err_reg = 0;
  1140. switch (was_err_group) {
  1141. case 0:
  1142. was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR;
  1143. break;
  1144. case 1:
  1145. was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_63_32_CLR;
  1146. break;
  1147. case 2:
  1148. was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_95_64_CLR;
  1149. break;
  1150. case 3:
  1151. was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR;
  1152. break;
  1153. }
  1154. REG_WR(bp, was_err_reg, 1 << (abs_vfid & 0x1f));
  1155. }
  1156. static void bnx2x_vf_igu_reset(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1157. {
  1158. int i;
  1159. u32 val;
  1160. /* Set VF masks and configuration - pretend */
  1161. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
  1162. REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_LSB, 0);
  1163. REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_MSB, 0);
  1164. REG_WR(bp, IGU_REG_SB_MASK_LSB, 0);
  1165. REG_WR(bp, IGU_REG_SB_MASK_MSB, 0);
  1166. REG_WR(bp, IGU_REG_PBA_STATUS_LSB, 0);
  1167. REG_WR(bp, IGU_REG_PBA_STATUS_MSB, 0);
  1168. val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
  1169. val |= (IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_MSI_MSIX_EN);
  1170. if (vf->cfg_flags & VF_CFG_INT_SIMD)
  1171. val |= IGU_VF_CONF_SINGLE_ISR_EN;
  1172. val &= ~IGU_VF_CONF_PARENT_MASK;
  1173. val |= BP_FUNC(bp) << IGU_VF_CONF_PARENT_SHIFT; /* parent PF */
  1174. REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
  1175. DP(BNX2X_MSG_IOV,
  1176. "value in IGU_REG_VF_CONFIGURATION of vf %d after write %x\n",
  1177. vf->abs_vfid, REG_RD(bp, IGU_REG_VF_CONFIGURATION));
  1178. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  1179. /* iterate over all queues, clear sb consumer */
  1180. for (i = 0; i < vf_sb_count(vf); i++) {
  1181. u8 igu_sb_id = vf_igu_sb(vf, i);
  1182. /* zero prod memory */
  1183. REG_WR(bp, IGU_REG_PROD_CONS_MEMORY + igu_sb_id * 4, 0);
  1184. /* clear sb state machine */
  1185. bnx2x_igu_clear_sb_gen(bp, vf->abs_vfid, igu_sb_id,
  1186. false /* VF */);
  1187. /* disable + update */
  1188. bnx2x_vf_igu_ack_sb(bp, vf, igu_sb_id, USTORM_ID, 0,
  1189. IGU_INT_DISABLE, 1);
  1190. }
  1191. }
  1192. void bnx2x_vf_enable_access(struct bnx2x *bp, u8 abs_vfid)
  1193. {
  1194. /* set the VF-PF association in the FW */
  1195. storm_memset_vf_to_pf(bp, FW_VF_HANDLE(abs_vfid), BP_FUNC(bp));
  1196. storm_memset_func_en(bp, FW_VF_HANDLE(abs_vfid), 1);
  1197. /* clear vf errors*/
  1198. bnx2x_vf_semi_clear_err(bp, abs_vfid);
  1199. bnx2x_vf_pglue_clear_err(bp, abs_vfid);
  1200. /* internal vf-enable - pretend */
  1201. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, abs_vfid));
  1202. DP(BNX2X_MSG_IOV, "enabling internal access for vf %x\n", abs_vfid);
  1203. bnx2x_vf_enable_internal(bp, true);
  1204. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  1205. }
  1206. static void bnx2x_vf_enable_traffic(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1207. {
  1208. /* Reset vf in IGU interrupts are still disabled */
  1209. bnx2x_vf_igu_reset(bp, vf);
  1210. /* pretend to enable the vf with the PBF */
  1211. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
  1212. REG_WR(bp, PBF_REG_DISABLE_VF, 0);
  1213. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  1214. }
  1215. static u8 bnx2x_vf_is_pcie_pending(struct bnx2x *bp, u8 abs_vfid)
  1216. {
  1217. struct pci_dev *dev;
  1218. struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
  1219. if (!vf)
  1220. goto unknown_dev;
  1221. dev = pci_get_bus_and_slot(vf->bus, vf->devfn);
  1222. if (dev)
  1223. return bnx2x_is_pcie_pending(dev);
  1224. unknown_dev:
  1225. BNX2X_ERR("Unknown device\n");
  1226. return false;
  1227. }
  1228. int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid)
  1229. {
  1230. /* Wait 100ms */
  1231. msleep(100);
  1232. /* Verify no pending pci transactions */
  1233. if (bnx2x_vf_is_pcie_pending(bp, abs_vfid))
  1234. BNX2X_ERR("PCIE Transactions still pending\n");
  1235. return 0;
  1236. }
  1237. /* must be called after the number of PF queues and the number of VFs are
  1238. * both known
  1239. */
  1240. static void
  1241. bnx2x_iov_static_resc(struct bnx2x *bp, struct vf_pf_resc_request *resc)
  1242. {
  1243. u16 vlan_count = 0;
  1244. /* will be set only during VF-ACQUIRE */
  1245. resc->num_rxqs = 0;
  1246. resc->num_txqs = 0;
  1247. /* no credit calculcis for macs (just yet) */
  1248. resc->num_mac_filters = 1;
  1249. /* divvy up vlan rules */
  1250. vlan_count = bp->vlans_pool.check(&bp->vlans_pool);
  1251. vlan_count = 1 << ilog2(vlan_count);
  1252. resc->num_vlan_filters = vlan_count / BNX2X_NR_VIRTFN(bp);
  1253. /* no real limitation */
  1254. resc->num_mc_filters = 0;
  1255. /* num_sbs already set */
  1256. }
  1257. /* FLR routines: */
  1258. static void bnx2x_vf_free_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1259. {
  1260. /* reset the state variables */
  1261. bnx2x_iov_static_resc(bp, &vf->alloc_resc);
  1262. vf->state = VF_FREE;
  1263. }
  1264. static void bnx2x_vf_flr_clnup_hw(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1265. {
  1266. u32 poll_cnt = bnx2x_flr_clnup_poll_count(bp);
  1267. /* DQ usage counter */
  1268. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
  1269. bnx2x_flr_clnup_poll_hw_counter(bp, DORQ_REG_VF_USAGE_CNT,
  1270. "DQ VF usage counter timed out",
  1271. poll_cnt);
  1272. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  1273. /* FW cleanup command - poll for the results */
  1274. if (bnx2x_send_final_clnup(bp, (u8)FW_VF_HANDLE(vf->abs_vfid),
  1275. poll_cnt))
  1276. BNX2X_ERR("VF[%d] Final cleanup timed-out\n", vf->abs_vfid);
  1277. /* verify TX hw is flushed */
  1278. bnx2x_tx_hw_flushed(bp, poll_cnt);
  1279. }
  1280. static void bnx2x_vfop_flr(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1281. {
  1282. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  1283. struct bnx2x_vfop_args_qx *qx = &vfop->args.qx;
  1284. enum bnx2x_vfop_flr_state state = vfop->state;
  1285. struct bnx2x_vfop_cmd cmd = {
  1286. .done = bnx2x_vfop_flr,
  1287. .block = false,
  1288. };
  1289. if (vfop->rc < 0)
  1290. goto op_err;
  1291. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  1292. switch (state) {
  1293. case BNX2X_VFOP_FLR_QUEUES:
  1294. /* the cleanup operations are valid if and only if the VF
  1295. * was first acquired.
  1296. */
  1297. if (++(qx->qid) < vf_rxq_count(vf)) {
  1298. vfop->rc = bnx2x_vfop_qflr_cmd(bp, vf, &cmd,
  1299. qx->qid);
  1300. if (vfop->rc)
  1301. goto op_err;
  1302. return;
  1303. }
  1304. /* remove multicasts */
  1305. vfop->state = BNX2X_VFOP_FLR_HW;
  1306. vfop->rc = bnx2x_vfop_mcast_cmd(bp, vf, &cmd, NULL,
  1307. 0, true);
  1308. if (vfop->rc)
  1309. goto op_err;
  1310. return;
  1311. case BNX2X_VFOP_FLR_HW:
  1312. /* dispatch final cleanup and wait for HW queues to flush */
  1313. bnx2x_vf_flr_clnup_hw(bp, vf);
  1314. /* release VF resources */
  1315. bnx2x_vf_free_resc(bp, vf);
  1316. /* re-open the mailbox */
  1317. bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
  1318. goto op_done;
  1319. default:
  1320. bnx2x_vfop_default(state);
  1321. }
  1322. op_err:
  1323. BNX2X_ERR("VF[%d] FLR error: rc %d\n", vf->abs_vfid, vfop->rc);
  1324. op_done:
  1325. vf->flr_clnup_stage = VF_FLR_ACK;
  1326. bnx2x_vfop_end(bp, vf, vfop);
  1327. bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
  1328. }
  1329. static int bnx2x_vfop_flr_cmd(struct bnx2x *bp,
  1330. struct bnx2x_virtf *vf,
  1331. vfop_handler_t done)
  1332. {
  1333. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  1334. if (vfop) {
  1335. vfop->args.qx.qid = -1; /* loop */
  1336. bnx2x_vfop_opset(BNX2X_VFOP_FLR_QUEUES,
  1337. bnx2x_vfop_flr, done);
  1338. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_flr, false);
  1339. }
  1340. return -ENOMEM;
  1341. }
  1342. static void bnx2x_vf_flr_clnup(struct bnx2x *bp, struct bnx2x_virtf *prev_vf)
  1343. {
  1344. int i = prev_vf ? prev_vf->index + 1 : 0;
  1345. struct bnx2x_virtf *vf;
  1346. /* find next VF to cleanup */
  1347. next_vf_to_clean:
  1348. for (;
  1349. i < BNX2X_NR_VIRTFN(bp) &&
  1350. (bnx2x_vf(bp, i, state) != VF_RESET ||
  1351. bnx2x_vf(bp, i, flr_clnup_stage) != VF_FLR_CLN);
  1352. i++)
  1353. ;
  1354. DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. num of vfs: %d\n", i,
  1355. BNX2X_NR_VIRTFN(bp));
  1356. if (i < BNX2X_NR_VIRTFN(bp)) {
  1357. vf = BP_VF(bp, i);
  1358. /* lock the vf pf channel */
  1359. bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
  1360. /* invoke the VF FLR SM */
  1361. if (bnx2x_vfop_flr_cmd(bp, vf, bnx2x_vf_flr_clnup)) {
  1362. BNX2X_ERR("VF[%d]: FLR cleanup failed -ENOMEM\n",
  1363. vf->abs_vfid);
  1364. /* mark the VF to be ACKED and continue */
  1365. vf->flr_clnup_stage = VF_FLR_ACK;
  1366. goto next_vf_to_clean;
  1367. }
  1368. return;
  1369. }
  1370. /* we are done, update vf records */
  1371. for_each_vf(bp, i) {
  1372. vf = BP_VF(bp, i);
  1373. if (vf->flr_clnup_stage != VF_FLR_ACK)
  1374. continue;
  1375. vf->flr_clnup_stage = VF_FLR_EPILOG;
  1376. }
  1377. /* Acknowledge the handled VFs.
  1378. * we are acknowledge all the vfs which an flr was requested for, even
  1379. * if amongst them there are such that we never opened, since the mcp
  1380. * will interrupt us immediately again if we only ack some of the bits,
  1381. * resulting in an endless loop. This can happen for example in KVM
  1382. * where an 'all ones' flr request is sometimes given by hyper visor
  1383. */
  1384. DP(BNX2X_MSG_MCP, "DRV_STATUS_VF_DISABLED ACK for vfs 0x%x 0x%x\n",
  1385. bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
  1386. for (i = 0; i < FLRD_VFS_DWORDS; i++)
  1387. SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i],
  1388. bp->vfdb->flrd_vfs[i]);
  1389. bnx2x_fw_command(bp, DRV_MSG_CODE_VF_DISABLED_DONE, 0);
  1390. /* clear the acked bits - better yet if the MCP implemented
  1391. * write to clear semantics
  1392. */
  1393. for (i = 0; i < FLRD_VFS_DWORDS; i++)
  1394. SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i], 0);
  1395. }
  1396. void bnx2x_vf_handle_flr_event(struct bnx2x *bp)
  1397. {
  1398. int i;
  1399. /* Read FLR'd VFs */
  1400. for (i = 0; i < FLRD_VFS_DWORDS; i++)
  1401. bp->vfdb->flrd_vfs[i] = SHMEM2_RD(bp, mcp_vf_disabled[i]);
  1402. DP(BNX2X_MSG_MCP,
  1403. "DRV_STATUS_VF_DISABLED received for vfs 0x%x 0x%x\n",
  1404. bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
  1405. for_each_vf(bp, i) {
  1406. struct bnx2x_virtf *vf = BP_VF(bp, i);
  1407. u32 reset = 0;
  1408. if (vf->abs_vfid < 32)
  1409. reset = bp->vfdb->flrd_vfs[0] & (1 << vf->abs_vfid);
  1410. else
  1411. reset = bp->vfdb->flrd_vfs[1] &
  1412. (1 << (vf->abs_vfid - 32));
  1413. if (reset) {
  1414. /* set as reset and ready for cleanup */
  1415. vf->state = VF_RESET;
  1416. vf->flr_clnup_stage = VF_FLR_CLN;
  1417. DP(BNX2X_MSG_IOV,
  1418. "Initiating Final cleanup for VF %d\n",
  1419. vf->abs_vfid);
  1420. }
  1421. }
  1422. /* do the FLR cleanup for all marked VFs*/
  1423. bnx2x_vf_flr_clnup(bp, NULL);
  1424. }
  1425. /* IOV global initialization routines */
  1426. void bnx2x_iov_init_dq(struct bnx2x *bp)
  1427. {
  1428. if (!IS_SRIOV(bp))
  1429. return;
  1430. /* Set the DQ such that the CID reflect the abs_vfid */
  1431. REG_WR(bp, DORQ_REG_VF_NORM_VF_BASE, 0);
  1432. REG_WR(bp, DORQ_REG_MAX_RVFID_SIZE, ilog2(BNX2X_MAX_NUM_OF_VFS));
  1433. /* Set VFs starting CID. If its > 0 the preceding CIDs are belong to
  1434. * the PF L2 queues
  1435. */
  1436. REG_WR(bp, DORQ_REG_VF_NORM_CID_BASE, BNX2X_FIRST_VF_CID);
  1437. /* The VF window size is the log2 of the max number of CIDs per VF */
  1438. REG_WR(bp, DORQ_REG_VF_NORM_CID_WND_SIZE, BNX2X_VF_CID_WND);
  1439. /* The VF doorbell size 0 - *B, 4 - 128B. We set it here to match
  1440. * the Pf doorbell size although the 2 are independent.
  1441. */
  1442. REG_WR(bp, DORQ_REG_VF_NORM_CID_OFST,
  1443. BNX2X_DB_SHIFT - BNX2X_DB_MIN_SHIFT);
  1444. /* No security checks for now -
  1445. * configure single rule (out of 16) mask = 0x1, value = 0x0,
  1446. * CID range 0 - 0x1ffff
  1447. */
  1448. REG_WR(bp, DORQ_REG_VF_TYPE_MASK_0, 1);
  1449. REG_WR(bp, DORQ_REG_VF_TYPE_VALUE_0, 0);
  1450. REG_WR(bp, DORQ_REG_VF_TYPE_MIN_MCID_0, 0);
  1451. REG_WR(bp, DORQ_REG_VF_TYPE_MAX_MCID_0, 0x1ffff);
  1452. /* set the number of VF alllowed doorbells to the full DQ range */
  1453. REG_WR(bp, DORQ_REG_VF_NORM_MAX_CID_COUNT, 0x20000);
  1454. /* set the VF doorbell threshold */
  1455. REG_WR(bp, DORQ_REG_VF_USAGE_CT_LIMIT, 4);
  1456. }
  1457. void bnx2x_iov_init_dmae(struct bnx2x *bp)
  1458. {
  1459. DP(BNX2X_MSG_IOV, "SRIOV is %s\n", IS_SRIOV(bp) ? "ON" : "OFF");
  1460. if (!IS_SRIOV(bp))
  1461. return;
  1462. REG_WR(bp, DMAE_REG_BACKWARD_COMP_EN, 0);
  1463. }
  1464. static int bnx2x_vf_bus(struct bnx2x *bp, int vfid)
  1465. {
  1466. struct pci_dev *dev = bp->pdev;
  1467. struct bnx2x_sriov *iov = &bp->vfdb->sriov;
  1468. return dev->bus->number + ((dev->devfn + iov->offset +
  1469. iov->stride * vfid) >> 8);
  1470. }
  1471. static int bnx2x_vf_devfn(struct bnx2x *bp, int vfid)
  1472. {
  1473. struct pci_dev *dev = bp->pdev;
  1474. struct bnx2x_sriov *iov = &bp->vfdb->sriov;
  1475. return (dev->devfn + iov->offset + iov->stride * vfid) & 0xff;
  1476. }
  1477. static void bnx2x_vf_set_bars(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1478. {
  1479. int i, n;
  1480. struct pci_dev *dev = bp->pdev;
  1481. struct bnx2x_sriov *iov = &bp->vfdb->sriov;
  1482. for (i = 0, n = 0; i < PCI_SRIOV_NUM_BARS; i += 2, n++) {
  1483. u64 start = pci_resource_start(dev, PCI_IOV_RESOURCES + i);
  1484. u32 size = pci_resource_len(dev, PCI_IOV_RESOURCES + i);
  1485. size /= iov->total;
  1486. vf->bars[n].bar = start + size * vf->abs_vfid;
  1487. vf->bars[n].size = size;
  1488. }
  1489. }
  1490. static int bnx2x_ari_enabled(struct pci_dev *dev)
  1491. {
  1492. return dev->bus->self && dev->bus->self->ari_enabled;
  1493. }
  1494. static void
  1495. bnx2x_get_vf_igu_cam_info(struct bnx2x *bp)
  1496. {
  1497. int sb_id;
  1498. u32 val;
  1499. u8 fid;
  1500. /* IGU in normal mode - read CAM */
  1501. for (sb_id = 0; sb_id < IGU_REG_MAPPING_MEMORY_SIZE; sb_id++) {
  1502. val = REG_RD(bp, IGU_REG_MAPPING_MEMORY + sb_id * 4);
  1503. if (!(val & IGU_REG_MAPPING_MEMORY_VALID))
  1504. continue;
  1505. fid = GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID);
  1506. if (!(fid & IGU_FID_ENCODE_IS_PF))
  1507. bnx2x_vf_set_igu_info(bp, sb_id,
  1508. (fid & IGU_FID_VF_NUM_MASK));
  1509. DP(BNX2X_MSG_IOV, "%s[%d], igu_sb_id=%d, msix=%d\n",
  1510. ((fid & IGU_FID_ENCODE_IS_PF) ? "PF" : "VF"),
  1511. ((fid & IGU_FID_ENCODE_IS_PF) ? (fid & IGU_FID_PF_NUM_MASK) :
  1512. (fid & IGU_FID_VF_NUM_MASK)), sb_id,
  1513. GET_FIELD((val), IGU_REG_MAPPING_MEMORY_VECTOR));
  1514. }
  1515. }
  1516. static void __bnx2x_iov_free_vfdb(struct bnx2x *bp)
  1517. {
  1518. if (bp->vfdb) {
  1519. kfree(bp->vfdb->vfqs);
  1520. kfree(bp->vfdb->vfs);
  1521. kfree(bp->vfdb);
  1522. }
  1523. bp->vfdb = NULL;
  1524. }
  1525. static int bnx2x_sriov_pci_cfg_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
  1526. {
  1527. int pos;
  1528. struct pci_dev *dev = bp->pdev;
  1529. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
  1530. if (!pos) {
  1531. BNX2X_ERR("failed to find SRIOV capability in device\n");
  1532. return -ENODEV;
  1533. }
  1534. iov->pos = pos;
  1535. DP(BNX2X_MSG_IOV, "sriov ext pos %d\n", pos);
  1536. pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
  1537. pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &iov->total);
  1538. pci_read_config_word(dev, pos + PCI_SRIOV_INITIAL_VF, &iov->initial);
  1539. pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
  1540. pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
  1541. pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
  1542. pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
  1543. pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
  1544. return 0;
  1545. }
  1546. static int bnx2x_sriov_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
  1547. {
  1548. u32 val;
  1549. /* read the SRIOV capability structure
  1550. * The fields can be read via configuration read or
  1551. * directly from the device (starting at offset PCICFG_OFFSET)
  1552. */
  1553. if (bnx2x_sriov_pci_cfg_info(bp, iov))
  1554. return -ENODEV;
  1555. /* get the number of SRIOV bars */
  1556. iov->nres = 0;
  1557. /* read the first_vfid */
  1558. val = REG_RD(bp, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF);
  1559. iov->first_vf_in_pf = ((val & GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK)
  1560. * 8) - (BNX2X_MAX_NUM_OF_VFS * BP_PATH(bp));
  1561. DP(BNX2X_MSG_IOV,
  1562. "IOV info[%d]: first vf %d, nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
  1563. BP_FUNC(bp),
  1564. iov->first_vf_in_pf, iov->nres, iov->cap, iov->ctrl, iov->total,
  1565. iov->initial, iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
  1566. return 0;
  1567. }
  1568. static u8 bnx2x_iov_get_max_queue_count(struct bnx2x *bp)
  1569. {
  1570. int i;
  1571. u8 queue_count = 0;
  1572. if (IS_SRIOV(bp))
  1573. for_each_vf(bp, i)
  1574. queue_count += bnx2x_vf(bp, i, alloc_resc.num_sbs);
  1575. return queue_count;
  1576. }
  1577. /* must be called after PF bars are mapped */
  1578. int bnx2x_iov_init_one(struct bnx2x *bp, int int_mode_param,
  1579. int num_vfs_param)
  1580. {
  1581. int err, i, qcount;
  1582. struct bnx2x_sriov *iov;
  1583. struct pci_dev *dev = bp->pdev;
  1584. bp->vfdb = NULL;
  1585. /* verify is pf */
  1586. if (IS_VF(bp))
  1587. return 0;
  1588. /* verify sriov capability is present in configuration space */
  1589. if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV))
  1590. return 0;
  1591. /* verify chip revision */
  1592. if (CHIP_IS_E1x(bp))
  1593. return 0;
  1594. /* check if SRIOV support is turned off */
  1595. if (!num_vfs_param)
  1596. return 0;
  1597. /* SRIOV assumes that num of PF CIDs < BNX2X_FIRST_VF_CID */
  1598. if (BNX2X_L2_MAX_CID(bp) >= BNX2X_FIRST_VF_CID) {
  1599. BNX2X_ERR("PF cids %d are overspilling into vf space (starts at %d). Abort SRIOV\n",
  1600. BNX2X_L2_MAX_CID(bp), BNX2X_FIRST_VF_CID);
  1601. return 0;
  1602. }
  1603. /* SRIOV can be enabled only with MSIX */
  1604. if (int_mode_param == BNX2X_INT_MODE_MSI ||
  1605. int_mode_param == BNX2X_INT_MODE_INTX)
  1606. BNX2X_ERR("Forced MSI/INTx mode is incompatible with SRIOV\n");
  1607. err = -EIO;
  1608. /* verify ari is enabled */
  1609. if (!bnx2x_ari_enabled(bp->pdev)) {
  1610. BNX2X_ERR("ARI not supported, SRIOV can not be enabled\n");
  1611. return err;
  1612. }
  1613. /* verify igu is in normal mode */
  1614. if (CHIP_INT_MODE_IS_BC(bp)) {
  1615. BNX2X_ERR("IGU not normal mode, SRIOV can not be enabled\n");
  1616. return err;
  1617. }
  1618. /* allocate the vfs database */
  1619. bp->vfdb = kzalloc(sizeof(*(bp->vfdb)), GFP_KERNEL);
  1620. if (!bp->vfdb) {
  1621. BNX2X_ERR("failed to allocate vf database\n");
  1622. err = -ENOMEM;
  1623. goto failed;
  1624. }
  1625. /* get the sriov info - Linux already collected all the pertinent
  1626. * information, however the sriov structure is for the private use
  1627. * of the pci module. Also we want this information regardless
  1628. * of the hyper-visor.
  1629. */
  1630. iov = &(bp->vfdb->sriov);
  1631. err = bnx2x_sriov_info(bp, iov);
  1632. if (err)
  1633. goto failed;
  1634. /* SR-IOV capability was enabled but there are no VFs*/
  1635. if (iov->total == 0)
  1636. goto failed;
  1637. /* calculate the actual number of VFs */
  1638. iov->nr_virtfn = min_t(u16, iov->total, (u16)num_vfs_param);
  1639. /* allocate the vf array */
  1640. bp->vfdb->vfs = kzalloc(sizeof(struct bnx2x_virtf) *
  1641. BNX2X_NR_VIRTFN(bp), GFP_KERNEL);
  1642. if (!bp->vfdb->vfs) {
  1643. BNX2X_ERR("failed to allocate vf array\n");
  1644. err = -ENOMEM;
  1645. goto failed;
  1646. }
  1647. /* Initial VF init - index and abs_vfid - nr_virtfn must be set */
  1648. for_each_vf(bp, i) {
  1649. bnx2x_vf(bp, i, index) = i;
  1650. bnx2x_vf(bp, i, abs_vfid) = iov->first_vf_in_pf + i;
  1651. bnx2x_vf(bp, i, state) = VF_FREE;
  1652. INIT_LIST_HEAD(&bnx2x_vf(bp, i, op_list_head));
  1653. mutex_init(&bnx2x_vf(bp, i, op_mutex));
  1654. bnx2x_vf(bp, i, op_current) = CHANNEL_TLV_NONE;
  1655. }
  1656. /* re-read the IGU CAM for VFs - index and abs_vfid must be set */
  1657. bnx2x_get_vf_igu_cam_info(bp);
  1658. /* get the total queue count and allocate the global queue arrays */
  1659. qcount = bnx2x_iov_get_max_queue_count(bp);
  1660. /* allocate the queue arrays for all VFs */
  1661. bp->vfdb->vfqs = kzalloc(qcount * sizeof(struct bnx2x_vf_queue),
  1662. GFP_KERNEL);
  1663. if (!bp->vfdb->vfqs) {
  1664. BNX2X_ERR("failed to allocate vf queue array\n");
  1665. err = -ENOMEM;
  1666. goto failed;
  1667. }
  1668. return 0;
  1669. failed:
  1670. DP(BNX2X_MSG_IOV, "Failed err=%d\n", err);
  1671. __bnx2x_iov_free_vfdb(bp);
  1672. return err;
  1673. }
  1674. void bnx2x_iov_remove_one(struct bnx2x *bp)
  1675. {
  1676. /* if SRIOV is not enabled there's nothing to do */
  1677. if (!IS_SRIOV(bp))
  1678. return;
  1679. DP(BNX2X_MSG_IOV, "about to call disable sriov\n");
  1680. pci_disable_sriov(bp->pdev);
  1681. DP(BNX2X_MSG_IOV, "sriov disabled\n");
  1682. /* free vf database */
  1683. __bnx2x_iov_free_vfdb(bp);
  1684. }
  1685. void bnx2x_iov_free_mem(struct bnx2x *bp)
  1686. {
  1687. int i;
  1688. if (!IS_SRIOV(bp))
  1689. return;
  1690. /* free vfs hw contexts */
  1691. for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
  1692. struct hw_dma *cxt = &bp->vfdb->context[i];
  1693. BNX2X_PCI_FREE(cxt->addr, cxt->mapping, cxt->size);
  1694. }
  1695. BNX2X_PCI_FREE(BP_VFDB(bp)->sp_dma.addr,
  1696. BP_VFDB(bp)->sp_dma.mapping,
  1697. BP_VFDB(bp)->sp_dma.size);
  1698. BNX2X_PCI_FREE(BP_VF_MBX_DMA(bp)->addr,
  1699. BP_VF_MBX_DMA(bp)->mapping,
  1700. BP_VF_MBX_DMA(bp)->size);
  1701. BNX2X_PCI_FREE(BP_VF_BULLETIN_DMA(bp)->addr,
  1702. BP_VF_BULLETIN_DMA(bp)->mapping,
  1703. BP_VF_BULLETIN_DMA(bp)->size);
  1704. }
  1705. int bnx2x_iov_alloc_mem(struct bnx2x *bp)
  1706. {
  1707. size_t tot_size;
  1708. int i, rc = 0;
  1709. if (!IS_SRIOV(bp))
  1710. return rc;
  1711. /* allocate vfs hw contexts */
  1712. tot_size = (BP_VFDB(bp)->sriov.first_vf_in_pf + BNX2X_NR_VIRTFN(bp)) *
  1713. BNX2X_CIDS_PER_VF * sizeof(union cdu_context);
  1714. for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
  1715. struct hw_dma *cxt = BP_VF_CXT_PAGE(bp, i);
  1716. cxt->size = min_t(size_t, tot_size, CDU_ILT_PAGE_SZ);
  1717. if (cxt->size) {
  1718. BNX2X_PCI_ALLOC(cxt->addr, &cxt->mapping, cxt->size);
  1719. } else {
  1720. cxt->addr = NULL;
  1721. cxt->mapping = 0;
  1722. }
  1723. tot_size -= cxt->size;
  1724. }
  1725. /* allocate vfs ramrods dma memory - client_init and set_mac */
  1726. tot_size = BNX2X_NR_VIRTFN(bp) * sizeof(struct bnx2x_vf_sp);
  1727. BNX2X_PCI_ALLOC(BP_VFDB(bp)->sp_dma.addr, &BP_VFDB(bp)->sp_dma.mapping,
  1728. tot_size);
  1729. BP_VFDB(bp)->sp_dma.size = tot_size;
  1730. /* allocate mailboxes */
  1731. tot_size = BNX2X_NR_VIRTFN(bp) * MBX_MSG_ALIGNED_SIZE;
  1732. BNX2X_PCI_ALLOC(BP_VF_MBX_DMA(bp)->addr, &BP_VF_MBX_DMA(bp)->mapping,
  1733. tot_size);
  1734. BP_VF_MBX_DMA(bp)->size = tot_size;
  1735. /* allocate local bulletin boards */
  1736. tot_size = BNX2X_NR_VIRTFN(bp) * BULLETIN_CONTENT_SIZE;
  1737. BNX2X_PCI_ALLOC(BP_VF_BULLETIN_DMA(bp)->addr,
  1738. &BP_VF_BULLETIN_DMA(bp)->mapping, tot_size);
  1739. BP_VF_BULLETIN_DMA(bp)->size = tot_size;
  1740. return 0;
  1741. alloc_mem_err:
  1742. return -ENOMEM;
  1743. }
  1744. static void bnx2x_vfq_init(struct bnx2x *bp, struct bnx2x_virtf *vf,
  1745. struct bnx2x_vf_queue *q)
  1746. {
  1747. u8 cl_id = vfq_cl_id(vf, q);
  1748. u8 func_id = FW_VF_HANDLE(vf->abs_vfid);
  1749. unsigned long q_type = 0;
  1750. set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type);
  1751. set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type);
  1752. /* Queue State object */
  1753. bnx2x_init_queue_obj(bp, &q->sp_obj,
  1754. cl_id, &q->cid, 1, func_id,
  1755. bnx2x_vf_sp(bp, vf, q_data),
  1756. bnx2x_vf_sp_map(bp, vf, q_data),
  1757. q_type);
  1758. DP(BNX2X_MSG_IOV,
  1759. "initialized vf %d's queue object. func id set to %d\n",
  1760. vf->abs_vfid, q->sp_obj.func_id);
  1761. /* mac/vlan objects are per queue, but only those
  1762. * that belong to the leading queue are initialized
  1763. */
  1764. if (vfq_is_leading(q)) {
  1765. /* mac */
  1766. bnx2x_init_mac_obj(bp, &q->mac_obj,
  1767. cl_id, q->cid, func_id,
  1768. bnx2x_vf_sp(bp, vf, mac_rdata),
  1769. bnx2x_vf_sp_map(bp, vf, mac_rdata),
  1770. BNX2X_FILTER_MAC_PENDING,
  1771. &vf->filter_state,
  1772. BNX2X_OBJ_TYPE_RX_TX,
  1773. &bp->macs_pool);
  1774. /* vlan */
  1775. bnx2x_init_vlan_obj(bp, &q->vlan_obj,
  1776. cl_id, q->cid, func_id,
  1777. bnx2x_vf_sp(bp, vf, vlan_rdata),
  1778. bnx2x_vf_sp_map(bp, vf, vlan_rdata),
  1779. BNX2X_FILTER_VLAN_PENDING,
  1780. &vf->filter_state,
  1781. BNX2X_OBJ_TYPE_RX_TX,
  1782. &bp->vlans_pool);
  1783. /* mcast */
  1784. bnx2x_init_mcast_obj(bp, &vf->mcast_obj, cl_id,
  1785. q->cid, func_id, func_id,
  1786. bnx2x_vf_sp(bp, vf, mcast_rdata),
  1787. bnx2x_vf_sp_map(bp, vf, mcast_rdata),
  1788. BNX2X_FILTER_MCAST_PENDING,
  1789. &vf->filter_state,
  1790. BNX2X_OBJ_TYPE_RX_TX);
  1791. vf->leading_rss = cl_id;
  1792. }
  1793. }
  1794. /* called by bnx2x_nic_load */
  1795. int bnx2x_iov_nic_init(struct bnx2x *bp)
  1796. {
  1797. int vfid, qcount, i;
  1798. if (!IS_SRIOV(bp)) {
  1799. DP(BNX2X_MSG_IOV, "vfdb was not allocated\n");
  1800. return 0;
  1801. }
  1802. DP(BNX2X_MSG_IOV, "num of vfs: %d\n", (bp)->vfdb->sriov.nr_virtfn);
  1803. /* initialize vf database */
  1804. for_each_vf(bp, vfid) {
  1805. struct bnx2x_virtf *vf = BP_VF(bp, vfid);
  1806. int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vfid) *
  1807. BNX2X_CIDS_PER_VF;
  1808. union cdu_context *base_cxt = (union cdu_context *)
  1809. BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
  1810. (base_vf_cid & (ILT_PAGE_CIDS-1));
  1811. DP(BNX2X_MSG_IOV,
  1812. "VF[%d] Max IGU SBs: %d, base vf cid 0x%x, base cid 0x%x, base cxt %p\n",
  1813. vf->abs_vfid, vf_sb_count(vf), base_vf_cid,
  1814. BNX2X_FIRST_VF_CID + base_vf_cid, base_cxt);
  1815. /* init statically provisioned resources */
  1816. bnx2x_iov_static_resc(bp, &vf->alloc_resc);
  1817. /* queues are initialized during VF-ACQUIRE */
  1818. /* reserve the vf vlan credit */
  1819. bp->vlans_pool.get(&bp->vlans_pool, vf_vlan_rules_cnt(vf));
  1820. vf->filter_state = 0;
  1821. vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id);
  1822. /* init mcast object - This object will be re-initialized
  1823. * during VF-ACQUIRE with the proper cl_id and cid.
  1824. * It needs to be initialized here so that it can be safely
  1825. * handled by a subsequent FLR flow.
  1826. */
  1827. bnx2x_init_mcast_obj(bp, &vf->mcast_obj, 0xFF,
  1828. 0xFF, 0xFF, 0xFF,
  1829. bnx2x_vf_sp(bp, vf, mcast_rdata),
  1830. bnx2x_vf_sp_map(bp, vf, mcast_rdata),
  1831. BNX2X_FILTER_MCAST_PENDING,
  1832. &vf->filter_state,
  1833. BNX2X_OBJ_TYPE_RX_TX);
  1834. /* set the mailbox message addresses */
  1835. BP_VF_MBX(bp, vfid)->msg = (struct bnx2x_vf_mbx_msg *)
  1836. (((u8 *)BP_VF_MBX_DMA(bp)->addr) + vfid *
  1837. MBX_MSG_ALIGNED_SIZE);
  1838. BP_VF_MBX(bp, vfid)->msg_mapping = BP_VF_MBX_DMA(bp)->mapping +
  1839. vfid * MBX_MSG_ALIGNED_SIZE;
  1840. /* Enable vf mailbox */
  1841. bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
  1842. }
  1843. /* Final VF init */
  1844. qcount = 0;
  1845. for_each_vf(bp, i) {
  1846. struct bnx2x_virtf *vf = BP_VF(bp, i);
  1847. /* fill in the BDF and bars */
  1848. vf->bus = bnx2x_vf_bus(bp, i);
  1849. vf->devfn = bnx2x_vf_devfn(bp, i);
  1850. bnx2x_vf_set_bars(bp, vf);
  1851. DP(BNX2X_MSG_IOV,
  1852. "VF info[%d]: bus 0x%x, devfn 0x%x, bar0 [0x%x, %d], bar1 [0x%x, %d], bar2 [0x%x, %d]\n",
  1853. vf->abs_vfid, vf->bus, vf->devfn,
  1854. (unsigned)vf->bars[0].bar, vf->bars[0].size,
  1855. (unsigned)vf->bars[1].bar, vf->bars[1].size,
  1856. (unsigned)vf->bars[2].bar, vf->bars[2].size);
  1857. /* set local queue arrays */
  1858. vf->vfqs = &bp->vfdb->vfqs[qcount];
  1859. qcount += bnx2x_vf(bp, i, alloc_resc.num_sbs);
  1860. }
  1861. return 0;
  1862. }
  1863. /* called by bnx2x_chip_cleanup */
  1864. int bnx2x_iov_chip_cleanup(struct bnx2x *bp)
  1865. {
  1866. int i;
  1867. if (!IS_SRIOV(bp))
  1868. return 0;
  1869. /* release all the VFs */
  1870. for_each_vf(bp, i)
  1871. bnx2x_vf_release(bp, BP_VF(bp, i), true); /* blocking */
  1872. return 0;
  1873. }
  1874. /* called by bnx2x_init_hw_func, returns the next ilt line */
  1875. int bnx2x_iov_init_ilt(struct bnx2x *bp, u16 line)
  1876. {
  1877. int i;
  1878. struct bnx2x_ilt *ilt = BP_ILT(bp);
  1879. if (!IS_SRIOV(bp))
  1880. return line;
  1881. /* set vfs ilt lines */
  1882. for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
  1883. struct hw_dma *hw_cxt = BP_VF_CXT_PAGE(bp, i);
  1884. ilt->lines[line+i].page = hw_cxt->addr;
  1885. ilt->lines[line+i].page_mapping = hw_cxt->mapping;
  1886. ilt->lines[line+i].size = hw_cxt->size; /* doesn't matter */
  1887. }
  1888. return line + i;
  1889. }
  1890. static u8 bnx2x_iov_is_vf_cid(struct bnx2x *bp, u16 cid)
  1891. {
  1892. return ((cid >= BNX2X_FIRST_VF_CID) &&
  1893. ((cid - BNX2X_FIRST_VF_CID) < BNX2X_VF_CIDS));
  1894. }
  1895. static
  1896. void bnx2x_vf_handle_classification_eqe(struct bnx2x *bp,
  1897. struct bnx2x_vf_queue *vfq,
  1898. union event_ring_elem *elem)
  1899. {
  1900. unsigned long ramrod_flags = 0;
  1901. int rc = 0;
  1902. /* Always push next commands out, don't wait here */
  1903. set_bit(RAMROD_CONT, &ramrod_flags);
  1904. switch (elem->message.data.eth_event.echo >> BNX2X_SWCID_SHIFT) {
  1905. case BNX2X_FILTER_MAC_PENDING:
  1906. rc = vfq->mac_obj.complete(bp, &vfq->mac_obj, elem,
  1907. &ramrod_flags);
  1908. break;
  1909. case BNX2X_FILTER_VLAN_PENDING:
  1910. rc = vfq->vlan_obj.complete(bp, &vfq->vlan_obj, elem,
  1911. &ramrod_flags);
  1912. break;
  1913. default:
  1914. BNX2X_ERR("Unsupported classification command: %d\n",
  1915. elem->message.data.eth_event.echo);
  1916. return;
  1917. }
  1918. if (rc < 0)
  1919. BNX2X_ERR("Failed to schedule new commands: %d\n", rc);
  1920. else if (rc > 0)
  1921. DP(BNX2X_MSG_IOV, "Scheduled next pending commands...\n");
  1922. }
  1923. static
  1924. void bnx2x_vf_handle_mcast_eqe(struct bnx2x *bp,
  1925. struct bnx2x_virtf *vf)
  1926. {
  1927. struct bnx2x_mcast_ramrod_params rparam = {NULL};
  1928. int rc;
  1929. rparam.mcast_obj = &vf->mcast_obj;
  1930. vf->mcast_obj.raw.clear_pending(&vf->mcast_obj.raw);
  1931. /* If there are pending mcast commands - send them */
  1932. if (vf->mcast_obj.check_pending(&vf->mcast_obj)) {
  1933. rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
  1934. if (rc < 0)
  1935. BNX2X_ERR("Failed to send pending mcast commands: %d\n",
  1936. rc);
  1937. }
  1938. }
  1939. static
  1940. void bnx2x_vf_handle_filters_eqe(struct bnx2x *bp,
  1941. struct bnx2x_virtf *vf)
  1942. {
  1943. smp_mb__before_clear_bit();
  1944. clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
  1945. smp_mb__after_clear_bit();
  1946. }
  1947. int bnx2x_iov_eq_sp_event(struct bnx2x *bp, union event_ring_elem *elem)
  1948. {
  1949. struct bnx2x_virtf *vf;
  1950. int qidx = 0, abs_vfid;
  1951. u8 opcode;
  1952. u16 cid = 0xffff;
  1953. if (!IS_SRIOV(bp))
  1954. return 1;
  1955. /* first get the cid - the only events we handle here are cfc-delete
  1956. * and set-mac completion
  1957. */
  1958. opcode = elem->message.opcode;
  1959. switch (opcode) {
  1960. case EVENT_RING_OPCODE_CFC_DEL:
  1961. cid = SW_CID((__force __le32)
  1962. elem->message.data.cfc_del_event.cid);
  1963. DP(BNX2X_MSG_IOV, "checking cfc-del comp cid=%d\n", cid);
  1964. break;
  1965. case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
  1966. case EVENT_RING_OPCODE_MULTICAST_RULES:
  1967. case EVENT_RING_OPCODE_FILTERS_RULES:
  1968. cid = (elem->message.data.eth_event.echo &
  1969. BNX2X_SWCID_MASK);
  1970. DP(BNX2X_MSG_IOV, "checking filtering comp cid=%d\n", cid);
  1971. break;
  1972. case EVENT_RING_OPCODE_VF_FLR:
  1973. abs_vfid = elem->message.data.vf_flr_event.vf_id;
  1974. DP(BNX2X_MSG_IOV, "Got VF FLR notification abs_vfid=%d\n",
  1975. abs_vfid);
  1976. goto get_vf;
  1977. case EVENT_RING_OPCODE_MALICIOUS_VF:
  1978. abs_vfid = elem->message.data.malicious_vf_event.vf_id;
  1979. DP(BNX2X_MSG_IOV, "Got VF MALICIOUS notification abs_vfid=%d\n",
  1980. abs_vfid);
  1981. goto get_vf;
  1982. default:
  1983. return 1;
  1984. }
  1985. /* check if the cid is the VF range */
  1986. if (!bnx2x_iov_is_vf_cid(bp, cid)) {
  1987. DP(BNX2X_MSG_IOV, "cid is outside vf range: %d\n", cid);
  1988. return 1;
  1989. }
  1990. /* extract vf and rxq index from vf_cid - relies on the following:
  1991. * 1. vfid on cid reflects the true abs_vfid
  1992. * 2. the max number of VFs (per path) is 64
  1993. */
  1994. qidx = cid & ((1 << BNX2X_VF_CID_WND)-1);
  1995. abs_vfid = (cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
  1996. get_vf:
  1997. vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
  1998. if (!vf) {
  1999. BNX2X_ERR("EQ completion for unknown VF, cid %d, abs_vfid %d\n",
  2000. cid, abs_vfid);
  2001. return 0;
  2002. }
  2003. switch (opcode) {
  2004. case EVENT_RING_OPCODE_CFC_DEL:
  2005. DP(BNX2X_MSG_IOV, "got VF [%d:%d] cfc delete ramrod\n",
  2006. vf->abs_vfid, qidx);
  2007. vfq_get(vf, qidx)->sp_obj.complete_cmd(bp,
  2008. &vfq_get(vf,
  2009. qidx)->sp_obj,
  2010. BNX2X_Q_CMD_CFC_DEL);
  2011. break;
  2012. case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
  2013. DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mac/vlan ramrod\n",
  2014. vf->abs_vfid, qidx);
  2015. bnx2x_vf_handle_classification_eqe(bp, vfq_get(vf, qidx), elem);
  2016. break;
  2017. case EVENT_RING_OPCODE_MULTICAST_RULES:
  2018. DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mcast ramrod\n",
  2019. vf->abs_vfid, qidx);
  2020. bnx2x_vf_handle_mcast_eqe(bp, vf);
  2021. break;
  2022. case EVENT_RING_OPCODE_FILTERS_RULES:
  2023. DP(BNX2X_MSG_IOV, "got VF [%d:%d] set rx-mode ramrod\n",
  2024. vf->abs_vfid, qidx);
  2025. bnx2x_vf_handle_filters_eqe(bp, vf);
  2026. break;
  2027. case EVENT_RING_OPCODE_VF_FLR:
  2028. DP(BNX2X_MSG_IOV, "got VF [%d] FLR notification\n",
  2029. vf->abs_vfid);
  2030. /* Do nothing for now */
  2031. break;
  2032. case EVENT_RING_OPCODE_MALICIOUS_VF:
  2033. DP(BNX2X_MSG_IOV, "got VF [%d] MALICIOUS notification\n",
  2034. vf->abs_vfid);
  2035. /* Do nothing for now */
  2036. break;
  2037. }
  2038. /* SRIOV: reschedule any 'in_progress' operations */
  2039. bnx2x_iov_sp_event(bp, cid, false);
  2040. return 0;
  2041. }
  2042. static struct bnx2x_virtf *bnx2x_vf_by_cid(struct bnx2x *bp, int vf_cid)
  2043. {
  2044. /* extract the vf from vf_cid - relies on the following:
  2045. * 1. vfid on cid reflects the true abs_vfid
  2046. * 2. the max number of VFs (per path) is 64
  2047. */
  2048. int abs_vfid = (vf_cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
  2049. return bnx2x_vf_by_abs_fid(bp, abs_vfid);
  2050. }
  2051. void bnx2x_iov_set_queue_sp_obj(struct bnx2x *bp, int vf_cid,
  2052. struct bnx2x_queue_sp_obj **q_obj)
  2053. {
  2054. struct bnx2x_virtf *vf;
  2055. if (!IS_SRIOV(bp))
  2056. return;
  2057. vf = bnx2x_vf_by_cid(bp, vf_cid);
  2058. if (vf) {
  2059. /* extract queue index from vf_cid - relies on the following:
  2060. * 1. vfid on cid reflects the true abs_vfid
  2061. * 2. the max number of VFs (per path) is 64
  2062. */
  2063. int q_index = vf_cid & ((1 << BNX2X_VF_CID_WND)-1);
  2064. *q_obj = &bnx2x_vfq(vf, q_index, sp_obj);
  2065. } else {
  2066. BNX2X_ERR("No vf matching cid %d\n", vf_cid);
  2067. }
  2068. }
  2069. void bnx2x_iov_sp_event(struct bnx2x *bp, int vf_cid, bool queue_work)
  2070. {
  2071. struct bnx2x_virtf *vf;
  2072. /* check if the cid is the VF range */
  2073. if (!IS_SRIOV(bp) || !bnx2x_iov_is_vf_cid(bp, vf_cid))
  2074. return;
  2075. vf = bnx2x_vf_by_cid(bp, vf_cid);
  2076. if (vf) {
  2077. /* set in_progress flag */
  2078. atomic_set(&vf->op_in_progress, 1);
  2079. if (queue_work)
  2080. queue_delayed_work(bnx2x_wq, &bp->sp_task, 0);
  2081. }
  2082. }
  2083. void bnx2x_iov_adjust_stats_req(struct bnx2x *bp)
  2084. {
  2085. int i;
  2086. int first_queue_query_index, num_queues_req;
  2087. dma_addr_t cur_data_offset;
  2088. struct stats_query_entry *cur_query_entry;
  2089. u8 stats_count = 0;
  2090. bool is_fcoe = false;
  2091. if (!IS_SRIOV(bp))
  2092. return;
  2093. if (!NO_FCOE(bp))
  2094. is_fcoe = true;
  2095. /* fcoe adds one global request and one queue request */
  2096. num_queues_req = BNX2X_NUM_ETH_QUEUES(bp) + is_fcoe;
  2097. first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX -
  2098. (is_fcoe ? 0 : 1);
  2099. DP(BNX2X_MSG_IOV,
  2100. "BNX2X_NUM_ETH_QUEUES %d, is_fcoe %d, first_queue_query_index %d => determined the last non virtual statistics query index is %d. Will add queries on top of that\n",
  2101. BNX2X_NUM_ETH_QUEUES(bp), is_fcoe, first_queue_query_index,
  2102. first_queue_query_index + num_queues_req);
  2103. cur_data_offset = bp->fw_stats_data_mapping +
  2104. offsetof(struct bnx2x_fw_stats_data, queue_stats) +
  2105. num_queues_req * sizeof(struct per_queue_stats);
  2106. cur_query_entry = &bp->fw_stats_req->
  2107. query[first_queue_query_index + num_queues_req];
  2108. for_each_vf(bp, i) {
  2109. int j;
  2110. struct bnx2x_virtf *vf = BP_VF(bp, i);
  2111. if (vf->state != VF_ENABLED) {
  2112. DP(BNX2X_MSG_IOV,
  2113. "vf %d not enabled so no stats for it\n",
  2114. vf->abs_vfid);
  2115. continue;
  2116. }
  2117. DP(BNX2X_MSG_IOV, "add addresses for vf %d\n", vf->abs_vfid);
  2118. for_each_vfq(vf, j) {
  2119. struct bnx2x_vf_queue *rxq = vfq_get(vf, j);
  2120. /* collect stats fro active queues only */
  2121. if (bnx2x_get_q_logical_state(bp, &rxq->sp_obj) ==
  2122. BNX2X_Q_LOGICAL_STATE_STOPPED)
  2123. continue;
  2124. /* create stats query entry for this queue */
  2125. cur_query_entry->kind = STATS_TYPE_QUEUE;
  2126. cur_query_entry->index = vfq_cl_id(vf, rxq);
  2127. cur_query_entry->funcID =
  2128. cpu_to_le16(FW_VF_HANDLE(vf->abs_vfid));
  2129. cur_query_entry->address.hi =
  2130. cpu_to_le32(U64_HI(vf->fw_stat_map));
  2131. cur_query_entry->address.lo =
  2132. cpu_to_le32(U64_LO(vf->fw_stat_map));
  2133. DP(BNX2X_MSG_IOV,
  2134. "added address %x %x for vf %d queue %d client %d\n",
  2135. cur_query_entry->address.hi,
  2136. cur_query_entry->address.lo, cur_query_entry->funcID,
  2137. j, cur_query_entry->index);
  2138. cur_query_entry++;
  2139. cur_data_offset += sizeof(struct per_queue_stats);
  2140. stats_count++;
  2141. }
  2142. }
  2143. bp->fw_stats_req->hdr.cmd_num = bp->fw_stats_num + stats_count;
  2144. }
  2145. void bnx2x_iov_sp_task(struct bnx2x *bp)
  2146. {
  2147. int i;
  2148. if (!IS_SRIOV(bp))
  2149. return;
  2150. /* Iterate over all VFs and invoke state transition for VFs with
  2151. * 'in-progress' slow-path operations
  2152. */
  2153. DP(BNX2X_MSG_IOV, "searching for pending vf operations\n");
  2154. for_each_vf(bp, i) {
  2155. struct bnx2x_virtf *vf = BP_VF(bp, i);
  2156. if (!list_empty(&vf->op_list_head) &&
  2157. atomic_read(&vf->op_in_progress)) {
  2158. DP(BNX2X_MSG_IOV, "running pending op for vf %d\n", i);
  2159. bnx2x_vfop_cur(bp, vf)->transition(bp, vf);
  2160. }
  2161. }
  2162. }
  2163. static inline
  2164. struct bnx2x_virtf *__vf_from_stat_id(struct bnx2x *bp, u8 stat_id)
  2165. {
  2166. int i;
  2167. struct bnx2x_virtf *vf = NULL;
  2168. for_each_vf(bp, i) {
  2169. vf = BP_VF(bp, i);
  2170. if (stat_id >= vf->igu_base_id &&
  2171. stat_id < vf->igu_base_id + vf_sb_count(vf))
  2172. break;
  2173. }
  2174. return vf;
  2175. }
  2176. /* VF API helpers */
  2177. static void bnx2x_vf_qtbl_set_q(struct bnx2x *bp, u8 abs_vfid, u8 qid,
  2178. u8 enable)
  2179. {
  2180. u32 reg = PXP_REG_HST_ZONE_PERMISSION_TABLE + qid * 4;
  2181. u32 val = enable ? (abs_vfid | (1 << 6)) : 0;
  2182. REG_WR(bp, reg, val);
  2183. }
  2184. static void bnx2x_vf_clr_qtbl(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2185. {
  2186. int i;
  2187. for_each_vfq(vf, i)
  2188. bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
  2189. vfq_qzone_id(vf, vfq_get(vf, i)), false);
  2190. }
  2191. static void bnx2x_vf_igu_disable(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2192. {
  2193. u32 val;
  2194. /* clear the VF configuration - pretend */
  2195. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
  2196. val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
  2197. val &= ~(IGU_VF_CONF_MSI_MSIX_EN | IGU_VF_CONF_SINGLE_ISR_EN |
  2198. IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_PARENT_MASK);
  2199. REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
  2200. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  2201. }
  2202. u8 bnx2x_vf_max_queue_cnt(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2203. {
  2204. return min_t(u8, min_t(u8, vf_sb_count(vf), BNX2X_CIDS_PER_VF),
  2205. BNX2X_VF_MAX_QUEUES);
  2206. }
  2207. static
  2208. int bnx2x_vf_chk_avail_resc(struct bnx2x *bp, struct bnx2x_virtf *vf,
  2209. struct vf_pf_resc_request *req_resc)
  2210. {
  2211. u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
  2212. u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
  2213. return ((req_resc->num_rxqs <= rxq_cnt) &&
  2214. (req_resc->num_txqs <= txq_cnt) &&
  2215. (req_resc->num_sbs <= vf_sb_count(vf)) &&
  2216. (req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) &&
  2217. (req_resc->num_vlan_filters <= vf_vlan_rules_cnt(vf)));
  2218. }
  2219. /* CORE VF API */
  2220. int bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf,
  2221. struct vf_pf_resc_request *resc)
  2222. {
  2223. int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vf->index) *
  2224. BNX2X_CIDS_PER_VF;
  2225. union cdu_context *base_cxt = (union cdu_context *)
  2226. BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
  2227. (base_vf_cid & (ILT_PAGE_CIDS-1));
  2228. int i;
  2229. /* if state is 'acquired' the VF was not released or FLR'd, in
  2230. * this case the returned resources match the acquired already
  2231. * acquired resources. Verify that the requested numbers do
  2232. * not exceed the already acquired numbers.
  2233. */
  2234. if (vf->state == VF_ACQUIRED) {
  2235. DP(BNX2X_MSG_IOV, "VF[%d] Trying to re-acquire resources (VF was not released or FLR'd)\n",
  2236. vf->abs_vfid);
  2237. if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
  2238. BNX2X_ERR("VF[%d] When re-acquiring resources, requested numbers must be <= then previously acquired numbers\n",
  2239. vf->abs_vfid);
  2240. return -EINVAL;
  2241. }
  2242. return 0;
  2243. }
  2244. /* Otherwise vf state must be 'free' or 'reset' */
  2245. if (vf->state != VF_FREE && vf->state != VF_RESET) {
  2246. BNX2X_ERR("VF[%d] Can not acquire a VF with state %d\n",
  2247. vf->abs_vfid, vf->state);
  2248. return -EINVAL;
  2249. }
  2250. /* static allocation:
  2251. * the global maximum number are fixed per VF. fail the request if
  2252. * requested number exceed these globals
  2253. */
  2254. if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
  2255. DP(BNX2X_MSG_IOV,
  2256. "cannot fulfill vf resource request. Placing maximal available values in response\n");
  2257. /* set the max resource in the vf */
  2258. return -ENOMEM;
  2259. }
  2260. /* Set resources counters - 0 request means max available */
  2261. vf_sb_count(vf) = resc->num_sbs;
  2262. vf_rxq_count(vf) = resc->num_rxqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
  2263. vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
  2264. if (resc->num_mac_filters)
  2265. vf_mac_rules_cnt(vf) = resc->num_mac_filters;
  2266. if (resc->num_vlan_filters)
  2267. vf_vlan_rules_cnt(vf) = resc->num_vlan_filters;
  2268. DP(BNX2X_MSG_IOV,
  2269. "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n",
  2270. vf_sb_count(vf), vf_rxq_count(vf),
  2271. vf_txq_count(vf), vf_mac_rules_cnt(vf),
  2272. vf_vlan_rules_cnt(vf));
  2273. /* Initialize the queues */
  2274. if (!vf->vfqs) {
  2275. DP(BNX2X_MSG_IOV, "vf->vfqs was not allocated\n");
  2276. return -EINVAL;
  2277. }
  2278. for_each_vfq(vf, i) {
  2279. struct bnx2x_vf_queue *q = vfq_get(vf, i);
  2280. if (!q) {
  2281. DP(BNX2X_MSG_IOV, "q number %d was not allocated\n", i);
  2282. return -EINVAL;
  2283. }
  2284. q->index = i;
  2285. q->cxt = &((base_cxt + i)->eth);
  2286. q->cid = BNX2X_FIRST_VF_CID + base_vf_cid + i;
  2287. DP(BNX2X_MSG_IOV, "VFQ[%d:%d]: index %d, cid 0x%x, cxt %p\n",
  2288. vf->abs_vfid, i, q->index, q->cid, q->cxt);
  2289. /* init SP objects */
  2290. bnx2x_vfq_init(bp, vf, q);
  2291. }
  2292. vf->state = VF_ACQUIRED;
  2293. return 0;
  2294. }
  2295. int bnx2x_vf_init(struct bnx2x *bp, struct bnx2x_virtf *vf, dma_addr_t *sb_map)
  2296. {
  2297. struct bnx2x_func_init_params func_init = {0};
  2298. u16 flags = 0;
  2299. int i;
  2300. /* the sb resources are initialized at this point, do the
  2301. * FW/HW initializations
  2302. */
  2303. for_each_vf_sb(vf, i)
  2304. bnx2x_init_sb(bp, (dma_addr_t)sb_map[i], vf->abs_vfid, true,
  2305. vf_igu_sb(vf, i), vf_igu_sb(vf, i));
  2306. /* Sanity checks */
  2307. if (vf->state != VF_ACQUIRED) {
  2308. DP(BNX2X_MSG_IOV, "VF[%d] is not in VF_ACQUIRED, but %d\n",
  2309. vf->abs_vfid, vf->state);
  2310. return -EINVAL;
  2311. }
  2312. /* FLR cleanup epilogue */
  2313. if (bnx2x_vf_flr_clnup_epilog(bp, vf->abs_vfid))
  2314. return -EBUSY;
  2315. /* reset IGU VF statistics: MSIX */
  2316. REG_WR(bp, IGU_REG_STATISTIC_NUM_MESSAGE_SENT + vf->abs_vfid * 4 , 0);
  2317. /* vf init */
  2318. if (vf->cfg_flags & VF_CFG_STATS)
  2319. flags |= (FUNC_FLG_STATS | FUNC_FLG_SPQ);
  2320. if (vf->cfg_flags & VF_CFG_TPA)
  2321. flags |= FUNC_FLG_TPA;
  2322. if (is_vf_multi(vf))
  2323. flags |= FUNC_FLG_RSS;
  2324. /* function setup */
  2325. func_init.func_flgs = flags;
  2326. func_init.pf_id = BP_FUNC(bp);
  2327. func_init.func_id = FW_VF_HANDLE(vf->abs_vfid);
  2328. func_init.fw_stat_map = vf->fw_stat_map;
  2329. func_init.spq_map = vf->spq_map;
  2330. func_init.spq_prod = 0;
  2331. bnx2x_func_init(bp, &func_init);
  2332. /* Enable the vf */
  2333. bnx2x_vf_enable_access(bp, vf->abs_vfid);
  2334. bnx2x_vf_enable_traffic(bp, vf);
  2335. /* queue protection table */
  2336. for_each_vfq(vf, i)
  2337. bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
  2338. vfq_qzone_id(vf, vfq_get(vf, i)), true);
  2339. vf->state = VF_ENABLED;
  2340. /* update vf bulletin board */
  2341. bnx2x_post_vf_bulletin(bp, vf->index);
  2342. return 0;
  2343. }
  2344. /* VFOP close (teardown the queues, delete mcasts and close HW) */
  2345. static void bnx2x_vfop_close(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2346. {
  2347. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  2348. struct bnx2x_vfop_args_qx *qx = &vfop->args.qx;
  2349. enum bnx2x_vfop_close_state state = vfop->state;
  2350. struct bnx2x_vfop_cmd cmd = {
  2351. .done = bnx2x_vfop_close,
  2352. .block = false,
  2353. };
  2354. if (vfop->rc < 0)
  2355. goto op_err;
  2356. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  2357. switch (state) {
  2358. case BNX2X_VFOP_CLOSE_QUEUES:
  2359. if (++(qx->qid) < vf_rxq_count(vf)) {
  2360. vfop->rc = bnx2x_vfop_qdown_cmd(bp, vf, &cmd, qx->qid);
  2361. if (vfop->rc)
  2362. goto op_err;
  2363. return;
  2364. }
  2365. /* remove multicasts */
  2366. vfop->state = BNX2X_VFOP_CLOSE_HW;
  2367. vfop->rc = bnx2x_vfop_mcast_cmd(bp, vf, &cmd, NULL, 0, false);
  2368. if (vfop->rc)
  2369. goto op_err;
  2370. return;
  2371. case BNX2X_VFOP_CLOSE_HW:
  2372. /* disable the interrupts */
  2373. DP(BNX2X_MSG_IOV, "disabling igu\n");
  2374. bnx2x_vf_igu_disable(bp, vf);
  2375. /* disable the VF */
  2376. DP(BNX2X_MSG_IOV, "clearing qtbl\n");
  2377. bnx2x_vf_clr_qtbl(bp, vf);
  2378. goto op_done;
  2379. default:
  2380. bnx2x_vfop_default(state);
  2381. }
  2382. op_err:
  2383. BNX2X_ERR("VF[%d] CLOSE error: rc %d\n", vf->abs_vfid, vfop->rc);
  2384. op_done:
  2385. vf->state = VF_ACQUIRED;
  2386. DP(BNX2X_MSG_IOV, "set state to acquired\n");
  2387. bnx2x_vfop_end(bp, vf, vfop);
  2388. }
  2389. int bnx2x_vfop_close_cmd(struct bnx2x *bp,
  2390. struct bnx2x_virtf *vf,
  2391. struct bnx2x_vfop_cmd *cmd)
  2392. {
  2393. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  2394. if (vfop) {
  2395. vfop->args.qx.qid = -1; /* loop */
  2396. bnx2x_vfop_opset(BNX2X_VFOP_CLOSE_QUEUES,
  2397. bnx2x_vfop_close, cmd->done);
  2398. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_close,
  2399. cmd->block);
  2400. }
  2401. return -ENOMEM;
  2402. }
  2403. /* VF release can be called either: 1. the VF was acquired but
  2404. * not enabled 2. the vf was enabled or in the process of being
  2405. * enabled
  2406. */
  2407. static void bnx2x_vfop_release(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2408. {
  2409. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  2410. struct bnx2x_vfop_cmd cmd = {
  2411. .done = bnx2x_vfop_release,
  2412. .block = false,
  2413. };
  2414. DP(BNX2X_MSG_IOV, "vfop->rc %d\n", vfop->rc);
  2415. if (vfop->rc < 0)
  2416. goto op_err;
  2417. DP(BNX2X_MSG_IOV, "VF[%d] STATE: %s\n", vf->abs_vfid,
  2418. vf->state == VF_FREE ? "Free" :
  2419. vf->state == VF_ACQUIRED ? "Acquired" :
  2420. vf->state == VF_ENABLED ? "Enabled" :
  2421. vf->state == VF_RESET ? "Reset" :
  2422. "Unknown");
  2423. switch (vf->state) {
  2424. case VF_ENABLED:
  2425. vfop->rc = bnx2x_vfop_close_cmd(bp, vf, &cmd);
  2426. if (vfop->rc)
  2427. goto op_err;
  2428. return;
  2429. case VF_ACQUIRED:
  2430. DP(BNX2X_MSG_IOV, "about to free resources\n");
  2431. bnx2x_vf_free_resc(bp, vf);
  2432. DP(BNX2X_MSG_IOV, "vfop->rc %d\n", vfop->rc);
  2433. goto op_done;
  2434. case VF_FREE:
  2435. case VF_RESET:
  2436. /* do nothing */
  2437. goto op_done;
  2438. default:
  2439. bnx2x_vfop_default(vf->state);
  2440. }
  2441. op_err:
  2442. BNX2X_ERR("VF[%d] RELEASE error: rc %d\n", vf->abs_vfid, vfop->rc);
  2443. op_done:
  2444. bnx2x_vfop_end(bp, vf, vfop);
  2445. }
  2446. int bnx2x_vfop_release_cmd(struct bnx2x *bp,
  2447. struct bnx2x_virtf *vf,
  2448. struct bnx2x_vfop_cmd *cmd)
  2449. {
  2450. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  2451. if (vfop) {
  2452. bnx2x_vfop_opset(-1, /* use vf->state */
  2453. bnx2x_vfop_release, cmd->done);
  2454. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_release,
  2455. cmd->block);
  2456. }
  2457. return -ENOMEM;
  2458. }
  2459. /* VF release ~ VF close + VF release-resources
  2460. * Release is the ultimate SW shutdown and is called whenever an
  2461. * irrecoverable error is encountered.
  2462. */
  2463. void bnx2x_vf_release(struct bnx2x *bp, struct bnx2x_virtf *vf, bool block)
  2464. {
  2465. struct bnx2x_vfop_cmd cmd = {
  2466. .done = NULL,
  2467. .block = block,
  2468. };
  2469. int rc;
  2470. bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
  2471. rc = bnx2x_vfop_release_cmd(bp, vf, &cmd);
  2472. if (rc)
  2473. WARN(rc,
  2474. "VF[%d] Failed to allocate resources for release op- rc=%d\n",
  2475. vf->abs_vfid, rc);
  2476. }
  2477. static inline void bnx2x_vf_get_sbdf(struct bnx2x *bp,
  2478. struct bnx2x_virtf *vf, u32 *sbdf)
  2479. {
  2480. *sbdf = vf->devfn | (vf->bus << 8);
  2481. }
  2482. static inline void bnx2x_vf_get_bars(struct bnx2x *bp, struct bnx2x_virtf *vf,
  2483. struct bnx2x_vf_bar_info *bar_info)
  2484. {
  2485. int n;
  2486. bar_info->nr_bars = bp->vfdb->sriov.nres;
  2487. for (n = 0; n < bar_info->nr_bars; n++)
  2488. bar_info->bars[n] = vf->bars[n];
  2489. }
  2490. void bnx2x_lock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
  2491. enum channel_tlvs tlv)
  2492. {
  2493. /* lock the channel */
  2494. mutex_lock(&vf->op_mutex);
  2495. /* record the locking op */
  2496. vf->op_current = tlv;
  2497. /* log the lock */
  2498. DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel locked by %d\n",
  2499. vf->abs_vfid, tlv);
  2500. }
  2501. void bnx2x_unlock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
  2502. enum channel_tlvs expected_tlv)
  2503. {
  2504. WARN(expected_tlv != vf->op_current,
  2505. "lock mismatch: expected %d found %d", expected_tlv,
  2506. vf->op_current);
  2507. /* lock the channel */
  2508. mutex_unlock(&vf->op_mutex);
  2509. /* log the unlock */
  2510. DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel unlocked by %d\n",
  2511. vf->abs_vfid, vf->op_current);
  2512. /* record the locking op */
  2513. vf->op_current = CHANNEL_TLV_NONE;
  2514. }
  2515. void bnx2x_enable_sriov(struct bnx2x *bp)
  2516. {
  2517. int rc = 0;
  2518. /* disbale sriov in case it is still enabled */
  2519. pci_disable_sriov(bp->pdev);
  2520. DP(BNX2X_MSG_IOV, "sriov disabled\n");
  2521. /* enable sriov */
  2522. DP(BNX2X_MSG_IOV, "vf num (%d)\n", (bp->vfdb->sriov.nr_virtfn));
  2523. rc = pci_enable_sriov(bp->pdev, (bp->vfdb->sriov.nr_virtfn));
  2524. if (rc)
  2525. BNX2X_ERR("pci_enable_sriov failed with %d\n", rc);
  2526. else
  2527. DP(BNX2X_MSG_IOV, "sriov enabled\n");
  2528. }
  2529. /* New mac for VF. Consider these cases:
  2530. * 1. VF hasn't been acquired yet - save the mac in local bulletin board and
  2531. * supply at acquire.
  2532. * 2. VF has already been acquired but has not yet initialized - store in local
  2533. * bulletin board. mac will be posted on VF bulletin board after VF init. VF
  2534. * will configure this mac when it is ready.
  2535. * 3. VF has already initialized but has not yet setup a queue - post the new
  2536. * mac on VF's bulletin board right now. VF will configure this mac when it
  2537. * is ready.
  2538. * 4. VF has already set a queue - delete any macs already configured for this
  2539. * queue and manually config the new mac.
  2540. * In any event, once this function has been called refuse any attempts by the
  2541. * VF to configure any mac for itself except for this mac. In case of a race
  2542. * where the VF fails to see the new post on its bulletin board before sending a
  2543. * mac configuration request, the PF will simply fail the request and VF can try
  2544. * again after consulting its bulletin board
  2545. */
  2546. int bnx2x_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
  2547. {
  2548. struct bnx2x *bp = netdev_priv(dev);
  2549. int rc, q_logical_state, vfidx = queue;
  2550. struct bnx2x_virtf *vf = BP_VF(bp, vfidx);
  2551. struct pf_vf_bulletin_content *bulletin = BP_VF_BULLETIN(bp, vfidx);
  2552. /* if SRIOV is disabled there is nothing to do (and somewhere, someone
  2553. * has erred).
  2554. */
  2555. if (!IS_SRIOV(bp)) {
  2556. BNX2X_ERR("bnx2x_set_vf_mac called though sriov is disabled\n");
  2557. return -EINVAL;
  2558. }
  2559. if (!is_valid_ether_addr(mac)) {
  2560. BNX2X_ERR("mac address invalid\n");
  2561. return -EINVAL;
  2562. }
  2563. /* update PF's copy of the VF's bulletin. will no longer accept mac
  2564. * configuration requests from vf unless match this mac
  2565. */
  2566. bulletin->valid_bitmap |= 1 << MAC_ADDR_VALID;
  2567. memcpy(bulletin->mac, mac, ETH_ALEN);
  2568. /* Post update on VF's bulletin board */
  2569. rc = bnx2x_post_vf_bulletin(bp, vfidx);
  2570. if (rc) {
  2571. BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);
  2572. return rc;
  2573. }
  2574. /* is vf initialized and queue set up? */
  2575. q_logical_state =
  2576. bnx2x_get_q_logical_state(bp, &bnx2x_vfq(vf, 0, sp_obj));
  2577. if (vf->state == VF_ENABLED &&
  2578. q_logical_state == BNX2X_Q_LOGICAL_STATE_ACTIVE) {
  2579. /* configure the mac in device on this vf's queue */
  2580. unsigned long flags = 0;
  2581. struct bnx2x_vlan_mac_obj *mac_obj = &bnx2x_vfq(vf, 0, mac_obj);
  2582. /* must lock vfpf channel to protect against vf flows */
  2583. bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
  2584. /* remove existing eth macs */
  2585. rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_ETH_MAC, true);
  2586. if (rc) {
  2587. BNX2X_ERR("failed to delete eth macs\n");
  2588. return -EINVAL;
  2589. }
  2590. /* remove existing uc list macs */
  2591. rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_UC_LIST_MAC, true);
  2592. if (rc) {
  2593. BNX2X_ERR("failed to delete uc_list macs\n");
  2594. return -EINVAL;
  2595. }
  2596. /* configure the new mac to device */
  2597. __set_bit(RAMROD_COMP_WAIT, &flags);
  2598. bnx2x_set_mac_one(bp, (u8 *)&bulletin->mac, mac_obj, true,
  2599. BNX2X_ETH_MAC, &flags);
  2600. bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
  2601. }
  2602. return rc;
  2603. }
  2604. /* crc is the first field in the bulletin board. compute the crc over the
  2605. * entire bulletin board excluding the crc field itself
  2606. */
  2607. u32 bnx2x_crc_vf_bulletin(struct bnx2x *bp,
  2608. struct pf_vf_bulletin_content *bulletin)
  2609. {
  2610. return crc32(BULLETIN_CRC_SEED,
  2611. ((u8 *)bulletin) + sizeof(bulletin->crc),
  2612. bulletin->length - sizeof(bulletin->crc));
  2613. }
  2614. /* Check for new posts on the bulletin board */
  2615. enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp)
  2616. {
  2617. struct pf_vf_bulletin_content bulletin = bp->pf2vf_bulletin->content;
  2618. int attempts;
  2619. /* bulletin board hasn't changed since last sample */
  2620. if (bp->old_bulletin.version == bulletin.version)
  2621. return PFVF_BULLETIN_UNCHANGED;
  2622. /* validate crc of new bulletin board */
  2623. if (bp->old_bulletin.version != bp->pf2vf_bulletin->content.version) {
  2624. /* sampling structure in mid post may result with corrupted data
  2625. * validate crc to ensure coherency.
  2626. */
  2627. for (attempts = 0; attempts < BULLETIN_ATTEMPTS; attempts++) {
  2628. bulletin = bp->pf2vf_bulletin->content;
  2629. if (bulletin.crc == bnx2x_crc_vf_bulletin(bp,
  2630. &bulletin))
  2631. break;
  2632. BNX2X_ERR("bad crc on bulletin board. contained %x computed %x\n",
  2633. bulletin.crc,
  2634. bnx2x_crc_vf_bulletin(bp, &bulletin));
  2635. }
  2636. if (attempts >= BULLETIN_ATTEMPTS) {
  2637. BNX2X_ERR("pf to vf bulletin board crc was wrong %d consecutive times. Aborting\n",
  2638. attempts);
  2639. return PFVF_BULLETIN_CRC_ERR;
  2640. }
  2641. }
  2642. /* the mac address in bulletin board is valid and is new */
  2643. if (bulletin.valid_bitmap & 1 << MAC_ADDR_VALID &&
  2644. memcmp(bulletin.mac, bp->old_bulletin.mac, ETH_ALEN)) {
  2645. /* update new mac to net device */
  2646. memcpy(bp->dev->dev_addr, bulletin.mac, ETH_ALEN);
  2647. }
  2648. /* copy new bulletin board to bp */
  2649. bp->old_bulletin = bulletin;
  2650. return PFVF_BULLETIN_UPDATED;
  2651. }
  2652. void bnx2x_vf_map_doorbells(struct bnx2x *bp)
  2653. {
  2654. /* vf doorbells are embedded within the regview */
  2655. bp->doorbells = bp->regview + PXP_VF_ADDR_DB_START;
  2656. }
  2657. int bnx2x_vf_pci_alloc(struct bnx2x *bp)
  2658. {
  2659. /* allocate vf2pf mailbox for vf to pf channel */
  2660. BNX2X_PCI_ALLOC(bp->vf2pf_mbox, &bp->vf2pf_mbox_mapping,
  2661. sizeof(struct bnx2x_vf_mbx_msg));
  2662. /* allocate pf 2 vf bulletin board */
  2663. BNX2X_PCI_ALLOC(bp->pf2vf_bulletin, &bp->pf2vf_bulletin_mapping,
  2664. sizeof(union pf_vf_bulletin));
  2665. return 0;
  2666. alloc_mem_err:
  2667. BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping,
  2668. sizeof(struct bnx2x_vf_mbx_msg));
  2669. BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping,
  2670. sizeof(union pf_vf_bulletin));
  2671. return -ENOMEM;
  2672. }