mv88e6xxx.h 2.9 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495
  1. /*
  2. * net/dsa/mv88e6xxx.h - Marvell 88e6xxx switch chip support
  3. * Copyright (c) 2008 Marvell Semiconductor
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. */
  10. #ifndef __MV88E6XXX_H
  11. #define __MV88E6XXX_H
  12. #define REG_PORT(p) (0x10 + (p))
  13. #define REG_GLOBAL 0x1b
  14. #define REG_GLOBAL2 0x1c
  15. struct mv88e6xxx_priv_state {
  16. /* When using multi-chip addressing, this mutex protects
  17. * access to the indirect access registers. (In single-chip
  18. * mode, this mutex is effectively useless.)
  19. */
  20. struct mutex smi_mutex;
  21. #ifdef CONFIG_NET_DSA_MV88E6XXX_NEED_PPU
  22. /* Handles automatic disabling and re-enabling of the PHY
  23. * polling unit.
  24. */
  25. struct mutex ppu_mutex;
  26. int ppu_disabled;
  27. struct work_struct ppu_work;
  28. struct timer_list ppu_timer;
  29. #endif
  30. /* This mutex serialises access to the statistics unit.
  31. * Hold this mutex over snapshot + dump sequences.
  32. */
  33. struct mutex stats_mutex;
  34. int id; /* switch product id */
  35. };
  36. struct mv88e6xxx_hw_stat {
  37. char string[ETH_GSTRING_LEN];
  38. int sizeof_stat;
  39. int reg;
  40. };
  41. int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg);
  42. int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg);
  43. int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,
  44. int reg, u16 val);
  45. int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val);
  46. int mv88e6xxx_config_prio(struct dsa_switch *ds);
  47. int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr);
  48. int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr);
  49. int mv88e6xxx_phy_read(struct dsa_switch *ds, int addr, int regnum);
  50. int mv88e6xxx_phy_write(struct dsa_switch *ds, int addr, int regnum, u16 val);
  51. void mv88e6xxx_ppu_state_init(struct dsa_switch *ds);
  52. int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum);
  53. int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr,
  54. int regnum, u16 val);
  55. void mv88e6xxx_poll_link(struct dsa_switch *ds);
  56. void mv88e6xxx_get_strings(struct dsa_switch *ds,
  57. int nr_stats, struct mv88e6xxx_hw_stat *stats,
  58. int port, uint8_t *data);
  59. void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds,
  60. int nr_stats, struct mv88e6xxx_hw_stat *stats,
  61. int port, uint64_t *data);
  62. extern struct dsa_switch_driver mv88e6131_switch_driver;
  63. extern struct dsa_switch_driver mv88e6123_61_65_switch_driver;
  64. #define REG_READ(addr, reg) \
  65. ({ \
  66. int __ret; \
  67. \
  68. __ret = mv88e6xxx_reg_read(ds, addr, reg); \
  69. if (__ret < 0) \
  70. return __ret; \
  71. __ret; \
  72. })
  73. #define REG_WRITE(addr, reg, val) \
  74. ({ \
  75. int __ret; \
  76. \
  77. __ret = mv88e6xxx_reg_write(ds, addr, reg, val); \
  78. if (__ret < 0) \
  79. return __ret; \
  80. })
  81. #endif