peak_pci.c 19 KB

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  1. /*
  2. * Copyright (C) 2007, 2011 Wolfgang Grandegger <wg@grandegger.com>
  3. * Copyright (C) 2012 Stephane Grosjean <s.grosjean@peak-system.com>
  4. *
  5. * Derived from the PCAN project file driver/src/pcan_pci.c:
  6. *
  7. * Copyright (C) 2001-2006 PEAK System-Technik GmbH
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the version 2 of the GNU General Public License
  11. * as published by the Free Software Foundation
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/netdevice.h>
  22. #include <linux/delay.h>
  23. #include <linux/pci.h>
  24. #include <linux/io.h>
  25. #include <linux/i2c.h>
  26. #include <linux/i2c-algo-bit.h>
  27. #include <linux/can.h>
  28. #include <linux/can/dev.h>
  29. #include "sja1000.h"
  30. MODULE_AUTHOR("Stephane Grosjean <s.grosjean@peak-system.com>");
  31. MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCI family cards");
  32. MODULE_SUPPORTED_DEVICE("PEAK PCAN PCI/PCIe/PCIeC miniPCI CAN cards");
  33. MODULE_SUPPORTED_DEVICE("PEAK PCAN miniPCIe/cPCI PC/104+ PCI/104e CAN Cards");
  34. MODULE_LICENSE("GPL v2");
  35. #define DRV_NAME "peak_pci"
  36. struct peak_pciec_card;
  37. struct peak_pci_chan {
  38. void __iomem *cfg_base; /* Common for all channels */
  39. struct net_device *prev_dev; /* Chain of network devices */
  40. u16 icr_mask; /* Interrupt mask for fast ack */
  41. struct peak_pciec_card *pciec_card; /* only for PCIeC LEDs */
  42. };
  43. #define PEAK_PCI_CAN_CLOCK (16000000 / 2)
  44. #define PEAK_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK)
  45. #define PEAK_PCI_OCR OCR_TX0_PUSHPULL
  46. /*
  47. * Important PITA registers
  48. */
  49. #define PITA_ICR 0x00 /* Interrupt control register */
  50. #define PITA_GPIOICR 0x18 /* GPIO interface control register */
  51. #define PITA_MISC 0x1C /* Miscellaneous register */
  52. #define PEAK_PCI_CFG_SIZE 0x1000 /* Size of the config PCI bar */
  53. #define PEAK_PCI_CHAN_SIZE 0x0400 /* Size used by the channel */
  54. #define PEAK_PCI_VENDOR_ID 0x001C /* The PCI device and vendor IDs */
  55. #define PEAK_PCI_DEVICE_ID 0x0001 /* for PCI/PCIe slot cards */
  56. #define PEAK_PCIEC_DEVICE_ID 0x0002 /* for ExpressCard slot cards */
  57. #define PEAK_PCIE_DEVICE_ID 0x0003 /* for nextgen PCIe slot cards */
  58. #define PEAK_CPCI_DEVICE_ID 0x0004 /* for nextgen cPCI slot cards */
  59. #define PEAK_MPCI_DEVICE_ID 0x0005 /* for nextgen miniPCI slot cards */
  60. #define PEAK_PC_104P_DEVICE_ID 0x0006 /* PCAN-PC/104+ cards */
  61. #define PEAK_PCI_104E_DEVICE_ID 0x0007 /* PCAN-PCI/104 Express cards */
  62. #define PEAK_MPCIE_DEVICE_ID 0x0008 /* The miniPCIe slot cards */
  63. #define PEAK_PCI_CHAN_MAX 4
  64. static const u16 peak_pci_icr_masks[PEAK_PCI_CHAN_MAX] = {
  65. 0x02, 0x01, 0x40, 0x80
  66. };
  67. static DEFINE_PCI_DEVICE_TABLE(peak_pci_tbl) = {
  68. {PEAK_PCI_VENDOR_ID, PEAK_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  69. {PEAK_PCI_VENDOR_ID, PEAK_PCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  70. {PEAK_PCI_VENDOR_ID, PEAK_MPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  71. {PEAK_PCI_VENDOR_ID, PEAK_MPCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  72. {PEAK_PCI_VENDOR_ID, PEAK_PC_104P_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  73. {PEAK_PCI_VENDOR_ID, PEAK_PCI_104E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  74. {PEAK_PCI_VENDOR_ID, PEAK_CPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  75. #ifdef CONFIG_CAN_PEAK_PCIEC
  76. {PEAK_PCI_VENDOR_ID, PEAK_PCIEC_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  77. #endif
  78. {0,}
  79. };
  80. MODULE_DEVICE_TABLE(pci, peak_pci_tbl);
  81. #ifdef CONFIG_CAN_PEAK_PCIEC
  82. /*
  83. * PCAN-ExpressCard needs I2C bit-banging configuration option.
  84. */
  85. /* GPIOICR byte access offsets */
  86. #define PITA_GPOUT 0x18 /* GPx output value */
  87. #define PITA_GPIN 0x19 /* GPx input value */
  88. #define PITA_GPOEN 0x1A /* configure GPx as ouput pin */
  89. /* I2C GP bits */
  90. #define PITA_GPIN_SCL 0x01 /* Serial Clock Line */
  91. #define PITA_GPIN_SDA 0x04 /* Serial DAta line */
  92. #define PCA9553_1_SLAVEADDR (0xC4 >> 1)
  93. /* PCA9553 LS0 fields values */
  94. enum {
  95. PCA9553_LOW,
  96. PCA9553_HIGHZ,
  97. PCA9553_PWM0,
  98. PCA9553_PWM1
  99. };
  100. /* LEDs control */
  101. #define PCA9553_ON PCA9553_LOW
  102. #define PCA9553_OFF PCA9553_HIGHZ
  103. #define PCA9553_SLOW PCA9553_PWM0
  104. #define PCA9553_FAST PCA9553_PWM1
  105. #define PCA9553_LED(c) (1 << (c))
  106. #define PCA9553_LED_STATE(s, c) ((s) << ((c) << 1))
  107. #define PCA9553_LED_ON(c) PCA9553_LED_STATE(PCA9553_ON, c)
  108. #define PCA9553_LED_OFF(c) PCA9553_LED_STATE(PCA9553_OFF, c)
  109. #define PCA9553_LED_SLOW(c) PCA9553_LED_STATE(PCA9553_SLOW, c)
  110. #define PCA9553_LED_FAST(c) PCA9553_LED_STATE(PCA9553_FAST, c)
  111. #define PCA9553_LED_MASK(c) PCA9553_LED_STATE(0x03, c)
  112. #define PCA9553_LED_OFF_ALL (PCA9553_LED_OFF(0) | PCA9553_LED_OFF(1))
  113. #define PCA9553_LS0_INIT 0x40 /* initial value (!= from 0x00) */
  114. struct peak_pciec_chan {
  115. struct net_device *netdev;
  116. unsigned long prev_rx_bytes;
  117. unsigned long prev_tx_bytes;
  118. };
  119. struct peak_pciec_card {
  120. void __iomem *cfg_base; /* Common for all channels */
  121. void __iomem *reg_base; /* first channel base address */
  122. u8 led_cache; /* leds state cache */
  123. /* PCIExpressCard i2c data */
  124. struct i2c_algo_bit_data i2c_bit;
  125. struct i2c_adapter led_chip;
  126. struct delayed_work led_work; /* led delayed work */
  127. int chan_count;
  128. struct peak_pciec_chan channel[PEAK_PCI_CHAN_MAX];
  129. };
  130. /* "normal" pci register write callback is overloaded for leds control */
  131. static void peak_pci_write_reg(const struct sja1000_priv *priv,
  132. int port, u8 val);
  133. static inline void pita_set_scl_highz(struct peak_pciec_card *card)
  134. {
  135. u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SCL;
  136. writeb(gp_outen, card->cfg_base + PITA_GPOEN);
  137. }
  138. static inline void pita_set_sda_highz(struct peak_pciec_card *card)
  139. {
  140. u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SDA;
  141. writeb(gp_outen, card->cfg_base + PITA_GPOEN);
  142. }
  143. static void peak_pciec_init_pita_gpio(struct peak_pciec_card *card)
  144. {
  145. /* raise SCL & SDA GPIOs to high-Z */
  146. pita_set_scl_highz(card);
  147. pita_set_sda_highz(card);
  148. }
  149. static void pita_setsda(void *data, int state)
  150. {
  151. struct peak_pciec_card *card = (struct peak_pciec_card *)data;
  152. u8 gp_out, gp_outen;
  153. /* set output sda always to 0 */
  154. gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SDA;
  155. writeb(gp_out, card->cfg_base + PITA_GPOUT);
  156. /* control output sda with GPOEN */
  157. gp_outen = readb(card->cfg_base + PITA_GPOEN);
  158. if (state)
  159. gp_outen &= ~PITA_GPIN_SDA;
  160. else
  161. gp_outen |= PITA_GPIN_SDA;
  162. writeb(gp_outen, card->cfg_base + PITA_GPOEN);
  163. }
  164. static void pita_setscl(void *data, int state)
  165. {
  166. struct peak_pciec_card *card = (struct peak_pciec_card *)data;
  167. u8 gp_out, gp_outen;
  168. /* set output scl always to 0 */
  169. gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SCL;
  170. writeb(gp_out, card->cfg_base + PITA_GPOUT);
  171. /* control output scl with GPOEN */
  172. gp_outen = readb(card->cfg_base + PITA_GPOEN);
  173. if (state)
  174. gp_outen &= ~PITA_GPIN_SCL;
  175. else
  176. gp_outen |= PITA_GPIN_SCL;
  177. writeb(gp_outen, card->cfg_base + PITA_GPOEN);
  178. }
  179. static int pita_getsda(void *data)
  180. {
  181. struct peak_pciec_card *card = (struct peak_pciec_card *)data;
  182. /* set tristate */
  183. pita_set_sda_highz(card);
  184. return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SDA) ? 1 : 0;
  185. }
  186. static int pita_getscl(void *data)
  187. {
  188. struct peak_pciec_card *card = (struct peak_pciec_card *)data;
  189. /* set tristate */
  190. pita_set_scl_highz(card);
  191. return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SCL) ? 1 : 0;
  192. }
  193. /*
  194. * write commands to the LED chip though the I2C-bus of the PCAN-PCIeC
  195. */
  196. static int peak_pciec_write_pca9553(struct peak_pciec_card *card,
  197. u8 offset, u8 data)
  198. {
  199. u8 buffer[2] = {
  200. offset,
  201. data
  202. };
  203. struct i2c_msg msg = {
  204. .addr = PCA9553_1_SLAVEADDR,
  205. .len = 2,
  206. .buf = buffer,
  207. };
  208. int ret;
  209. /* cache led mask */
  210. if ((offset == 5) && (data == card->led_cache))
  211. return 0;
  212. ret = i2c_transfer(&card->led_chip, &msg, 1);
  213. if (ret < 0)
  214. return ret;
  215. if (offset == 5)
  216. card->led_cache = data;
  217. return 0;
  218. }
  219. /*
  220. * delayed work callback used to control the LEDs
  221. */
  222. static void peak_pciec_led_work(struct work_struct *work)
  223. {
  224. struct peak_pciec_card *card =
  225. container_of(work, struct peak_pciec_card, led_work.work);
  226. struct net_device *netdev;
  227. u8 new_led = card->led_cache;
  228. int i, up_count = 0;
  229. /* first check what is to do */
  230. for (i = 0; i < card->chan_count; i++) {
  231. /* default is: not configured */
  232. new_led &= ~PCA9553_LED_MASK(i);
  233. new_led |= PCA9553_LED_ON(i);
  234. netdev = card->channel[i].netdev;
  235. if (!netdev || !(netdev->flags & IFF_UP))
  236. continue;
  237. up_count++;
  238. /* no activity (but configured) */
  239. new_led &= ~PCA9553_LED_MASK(i);
  240. new_led |= PCA9553_LED_SLOW(i);
  241. /* if bytes counters changed, set fast blinking led */
  242. if (netdev->stats.rx_bytes != card->channel[i].prev_rx_bytes) {
  243. card->channel[i].prev_rx_bytes = netdev->stats.rx_bytes;
  244. new_led &= ~PCA9553_LED_MASK(i);
  245. new_led |= PCA9553_LED_FAST(i);
  246. }
  247. if (netdev->stats.tx_bytes != card->channel[i].prev_tx_bytes) {
  248. card->channel[i].prev_tx_bytes = netdev->stats.tx_bytes;
  249. new_led &= ~PCA9553_LED_MASK(i);
  250. new_led |= PCA9553_LED_FAST(i);
  251. }
  252. }
  253. /* check if LS0 settings changed, only update i2c if so */
  254. peak_pciec_write_pca9553(card, 5, new_led);
  255. /* restart timer (except if no more configured channels) */
  256. if (up_count)
  257. schedule_delayed_work(&card->led_work, HZ);
  258. }
  259. /*
  260. * set LEDs blinking state
  261. */
  262. static void peak_pciec_set_leds(struct peak_pciec_card *card, u8 led_mask, u8 s)
  263. {
  264. u8 new_led = card->led_cache;
  265. int i;
  266. /* first check what is to do */
  267. for (i = 0; i < card->chan_count; i++)
  268. if (led_mask & PCA9553_LED(i)) {
  269. new_led &= ~PCA9553_LED_MASK(i);
  270. new_led |= PCA9553_LED_STATE(s, i);
  271. }
  272. /* check if LS0 settings changed, only update i2c if so */
  273. peak_pciec_write_pca9553(card, 5, new_led);
  274. }
  275. /*
  276. * start one second delayed work to control LEDs
  277. */
  278. static void peak_pciec_start_led_work(struct peak_pciec_card *card)
  279. {
  280. schedule_delayed_work(&card->led_work, HZ);
  281. }
  282. /*
  283. * stop LEDs delayed work
  284. */
  285. static void peak_pciec_stop_led_work(struct peak_pciec_card *card)
  286. {
  287. cancel_delayed_work_sync(&card->led_work);
  288. }
  289. /*
  290. * initialize the PCA9553 4-bit I2C-bus LED chip
  291. */
  292. static int peak_pciec_init_leds(struct peak_pciec_card *card)
  293. {
  294. int err;
  295. /* prescaler for frequency 0: "SLOW" = 1 Hz = "44" */
  296. err = peak_pciec_write_pca9553(card, 1, 44 / 1);
  297. if (err)
  298. return err;
  299. /* duty cycle 0: 50% */
  300. err = peak_pciec_write_pca9553(card, 2, 0x80);
  301. if (err)
  302. return err;
  303. /* prescaler for frequency 1: "FAST" = 5 Hz */
  304. err = peak_pciec_write_pca9553(card, 3, 44 / 5);
  305. if (err)
  306. return err;
  307. /* duty cycle 1: 50% */
  308. err = peak_pciec_write_pca9553(card, 4, 0x80);
  309. if (err)
  310. return err;
  311. /* switch LEDs to initial state */
  312. return peak_pciec_write_pca9553(card, 5, PCA9553_LS0_INIT);
  313. }
  314. /*
  315. * restore LEDs state to off peak_pciec_leds_exit
  316. */
  317. static void peak_pciec_leds_exit(struct peak_pciec_card *card)
  318. {
  319. /* switch LEDs to off */
  320. peak_pciec_write_pca9553(card, 5, PCA9553_LED_OFF_ALL);
  321. }
  322. /*
  323. * normal write sja1000 register method overloaded to catch when controller
  324. * is started or stopped, to control leds
  325. */
  326. static void peak_pciec_write_reg(const struct sja1000_priv *priv,
  327. int port, u8 val)
  328. {
  329. struct peak_pci_chan *chan = priv->priv;
  330. struct peak_pciec_card *card = chan->pciec_card;
  331. int c = (priv->reg_base - card->reg_base) / PEAK_PCI_CHAN_SIZE;
  332. /* sja1000 register changes control the leds state */
  333. if (port == REG_MOD)
  334. switch (val) {
  335. case MOD_RM:
  336. /* Reset Mode: set led on */
  337. peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_ON);
  338. break;
  339. case 0x00:
  340. /* Normal Mode: led slow blinking and start led timer */
  341. peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_SLOW);
  342. peak_pciec_start_led_work(card);
  343. break;
  344. default:
  345. break;
  346. }
  347. /* call base function */
  348. peak_pci_write_reg(priv, port, val);
  349. }
  350. static struct i2c_algo_bit_data peak_pciec_i2c_bit_ops = {
  351. .setsda = pita_setsda,
  352. .setscl = pita_setscl,
  353. .getsda = pita_getsda,
  354. .getscl = pita_getscl,
  355. .udelay = 10,
  356. .timeout = HZ,
  357. };
  358. static int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev)
  359. {
  360. struct sja1000_priv *priv = netdev_priv(dev);
  361. struct peak_pci_chan *chan = priv->priv;
  362. struct peak_pciec_card *card;
  363. int err;
  364. /* copy i2c object address from 1st channel */
  365. if (chan->prev_dev) {
  366. struct sja1000_priv *prev_priv = netdev_priv(chan->prev_dev);
  367. struct peak_pci_chan *prev_chan = prev_priv->priv;
  368. card = prev_chan->pciec_card;
  369. if (!card)
  370. return -ENODEV;
  371. /* channel is the first one: do the init part */
  372. } else {
  373. /* create the bit banging I2C adapter structure */
  374. card = kzalloc(sizeof(struct peak_pciec_card), GFP_KERNEL);
  375. if (!card)
  376. return -ENOMEM;
  377. card->cfg_base = chan->cfg_base;
  378. card->reg_base = priv->reg_base;
  379. card->led_chip.owner = THIS_MODULE;
  380. card->led_chip.dev.parent = &pdev->dev;
  381. card->led_chip.algo_data = &card->i2c_bit;
  382. strncpy(card->led_chip.name, "peak_i2c",
  383. sizeof(card->led_chip.name));
  384. card->i2c_bit = peak_pciec_i2c_bit_ops;
  385. card->i2c_bit.udelay = 10;
  386. card->i2c_bit.timeout = HZ;
  387. card->i2c_bit.data = card;
  388. peak_pciec_init_pita_gpio(card);
  389. err = i2c_bit_add_bus(&card->led_chip);
  390. if (err) {
  391. dev_err(&pdev->dev, "i2c init failed\n");
  392. goto pciec_init_err_1;
  393. }
  394. err = peak_pciec_init_leds(card);
  395. if (err) {
  396. dev_err(&pdev->dev, "leds hardware init failed\n");
  397. goto pciec_init_err_2;
  398. }
  399. INIT_DELAYED_WORK(&card->led_work, peak_pciec_led_work);
  400. /* PCAN-ExpressCard needs its own callback for leds */
  401. priv->write_reg = peak_pciec_write_reg;
  402. }
  403. chan->pciec_card = card;
  404. card->channel[card->chan_count++].netdev = dev;
  405. return 0;
  406. pciec_init_err_2:
  407. i2c_del_adapter(&card->led_chip);
  408. pciec_init_err_1:
  409. peak_pciec_init_pita_gpio(card);
  410. kfree(card);
  411. return err;
  412. }
  413. static void peak_pciec_remove(struct peak_pciec_card *card)
  414. {
  415. peak_pciec_stop_led_work(card);
  416. peak_pciec_leds_exit(card);
  417. i2c_del_adapter(&card->led_chip);
  418. peak_pciec_init_pita_gpio(card);
  419. kfree(card);
  420. }
  421. #else /* CONFIG_CAN_PEAK_PCIEC */
  422. /*
  423. * Placebo functions when PCAN-ExpressCard support is not selected
  424. */
  425. static inline int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev)
  426. {
  427. return -ENODEV;
  428. }
  429. static inline void peak_pciec_remove(struct peak_pciec_card *card)
  430. {
  431. }
  432. #endif /* CONFIG_CAN_PEAK_PCIEC */
  433. static u8 peak_pci_read_reg(const struct sja1000_priv *priv, int port)
  434. {
  435. return readb(priv->reg_base + (port << 2));
  436. }
  437. static void peak_pci_write_reg(const struct sja1000_priv *priv,
  438. int port, u8 val)
  439. {
  440. writeb(val, priv->reg_base + (port << 2));
  441. }
  442. static void peak_pci_post_irq(const struct sja1000_priv *priv)
  443. {
  444. struct peak_pci_chan *chan = priv->priv;
  445. u16 icr;
  446. /* Select and clear in PITA stored interrupt */
  447. icr = readw(chan->cfg_base + PITA_ICR);
  448. if (icr & chan->icr_mask)
  449. writew(chan->icr_mask, chan->cfg_base + PITA_ICR);
  450. }
  451. static int peak_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  452. {
  453. struct sja1000_priv *priv;
  454. struct peak_pci_chan *chan;
  455. struct net_device *dev;
  456. void __iomem *cfg_base, *reg_base;
  457. u16 sub_sys_id, icr;
  458. int i, err, channels;
  459. err = pci_enable_device(pdev);
  460. if (err)
  461. return err;
  462. err = pci_request_regions(pdev, DRV_NAME);
  463. if (err)
  464. goto failure_disable_pci;
  465. err = pci_read_config_word(pdev, 0x2e, &sub_sys_id);
  466. if (err)
  467. goto failure_release_regions;
  468. dev_dbg(&pdev->dev, "probing device %04x:%04x:%04x\n",
  469. pdev->vendor, pdev->device, sub_sys_id);
  470. err = pci_write_config_word(pdev, 0x44, 0);
  471. if (err)
  472. goto failure_release_regions;
  473. if (sub_sys_id >= 12)
  474. channels = 4;
  475. else if (sub_sys_id >= 10)
  476. channels = 3;
  477. else if (sub_sys_id >= 4)
  478. channels = 2;
  479. else
  480. channels = 1;
  481. cfg_base = pci_iomap(pdev, 0, PEAK_PCI_CFG_SIZE);
  482. if (!cfg_base) {
  483. dev_err(&pdev->dev, "failed to map PCI resource #0\n");
  484. err = -ENOMEM;
  485. goto failure_release_regions;
  486. }
  487. reg_base = pci_iomap(pdev, 1, PEAK_PCI_CHAN_SIZE * channels);
  488. if (!reg_base) {
  489. dev_err(&pdev->dev, "failed to map PCI resource #1\n");
  490. err = -ENOMEM;
  491. goto failure_unmap_cfg_base;
  492. }
  493. /* Set GPIO control register */
  494. writew(0x0005, cfg_base + PITA_GPIOICR + 2);
  495. /* Enable all channels of this card */
  496. writeb(0x00, cfg_base + PITA_GPIOICR);
  497. /* Toggle reset */
  498. writeb(0x05, cfg_base + PITA_MISC + 3);
  499. mdelay(5);
  500. /* Leave parport mux mode */
  501. writeb(0x04, cfg_base + PITA_MISC + 3);
  502. icr = readw(cfg_base + PITA_ICR + 2);
  503. for (i = 0; i < channels; i++) {
  504. dev = alloc_sja1000dev(sizeof(struct peak_pci_chan));
  505. if (!dev) {
  506. err = -ENOMEM;
  507. goto failure_remove_channels;
  508. }
  509. priv = netdev_priv(dev);
  510. chan = priv->priv;
  511. chan->cfg_base = cfg_base;
  512. priv->reg_base = reg_base + i * PEAK_PCI_CHAN_SIZE;
  513. priv->read_reg = peak_pci_read_reg;
  514. priv->write_reg = peak_pci_write_reg;
  515. priv->post_irq = peak_pci_post_irq;
  516. priv->can.clock.freq = PEAK_PCI_CAN_CLOCK;
  517. priv->ocr = PEAK_PCI_OCR;
  518. priv->cdr = PEAK_PCI_CDR;
  519. /* Neither a slave nor a single device distributes the clock */
  520. if (channels == 1 || i > 0)
  521. priv->cdr |= CDR_CLK_OFF;
  522. /* Setup interrupt handling */
  523. priv->irq_flags = IRQF_SHARED;
  524. dev->irq = pdev->irq;
  525. chan->icr_mask = peak_pci_icr_masks[i];
  526. icr |= chan->icr_mask;
  527. SET_NETDEV_DEV(dev, &pdev->dev);
  528. /* Create chain of SJA1000 devices */
  529. chan->prev_dev = pci_get_drvdata(pdev);
  530. pci_set_drvdata(pdev, dev);
  531. /*
  532. * PCAN-ExpressCard needs some additional i2c init.
  533. * This must be done *before* register_sja1000dev() but
  534. * *after* devices linkage
  535. */
  536. if (pdev->device == PEAK_PCIEC_DEVICE_ID) {
  537. err = peak_pciec_probe(pdev, dev);
  538. if (err) {
  539. dev_err(&pdev->dev,
  540. "failed to probe device (err %d)\n",
  541. err);
  542. goto failure_free_dev;
  543. }
  544. }
  545. err = register_sja1000dev(dev);
  546. if (err) {
  547. dev_err(&pdev->dev, "failed to register device\n");
  548. goto failure_free_dev;
  549. }
  550. dev_info(&pdev->dev,
  551. "%s at reg_base=0x%p cfg_base=0x%p irq=%d\n",
  552. dev->name, priv->reg_base, chan->cfg_base, dev->irq);
  553. }
  554. /* Enable interrupts */
  555. writew(icr, cfg_base + PITA_ICR + 2);
  556. return 0;
  557. failure_free_dev:
  558. pci_set_drvdata(pdev, chan->prev_dev);
  559. free_sja1000dev(dev);
  560. failure_remove_channels:
  561. /* Disable interrupts */
  562. writew(0x0, cfg_base + PITA_ICR + 2);
  563. chan = NULL;
  564. for (dev = pci_get_drvdata(pdev); dev; dev = chan->prev_dev) {
  565. unregister_sja1000dev(dev);
  566. free_sja1000dev(dev);
  567. priv = netdev_priv(dev);
  568. chan = priv->priv;
  569. }
  570. /* free any PCIeC resources too */
  571. if (chan && chan->pciec_card)
  572. peak_pciec_remove(chan->pciec_card);
  573. pci_iounmap(pdev, reg_base);
  574. failure_unmap_cfg_base:
  575. pci_iounmap(pdev, cfg_base);
  576. failure_release_regions:
  577. pci_release_regions(pdev);
  578. failure_disable_pci:
  579. pci_disable_device(pdev);
  580. return err;
  581. }
  582. static void peak_pci_remove(struct pci_dev *pdev)
  583. {
  584. struct net_device *dev = pci_get_drvdata(pdev); /* Last device */
  585. struct sja1000_priv *priv = netdev_priv(dev);
  586. struct peak_pci_chan *chan = priv->priv;
  587. void __iomem *cfg_base = chan->cfg_base;
  588. void __iomem *reg_base = priv->reg_base;
  589. /* Disable interrupts */
  590. writew(0x0, cfg_base + PITA_ICR + 2);
  591. /* Loop over all registered devices */
  592. while (1) {
  593. dev_info(&pdev->dev, "removing device %s\n", dev->name);
  594. unregister_sja1000dev(dev);
  595. free_sja1000dev(dev);
  596. dev = chan->prev_dev;
  597. if (!dev) {
  598. /* do that only for first channel */
  599. if (chan->pciec_card)
  600. peak_pciec_remove(chan->pciec_card);
  601. break;
  602. }
  603. priv = netdev_priv(dev);
  604. chan = priv->priv;
  605. }
  606. pci_iounmap(pdev, reg_base);
  607. pci_iounmap(pdev, cfg_base);
  608. pci_release_regions(pdev);
  609. pci_disable_device(pdev);
  610. pci_set_drvdata(pdev, NULL);
  611. }
  612. static struct pci_driver peak_pci_driver = {
  613. .name = DRV_NAME,
  614. .id_table = peak_pci_tbl,
  615. .probe = peak_pci_probe,
  616. .remove = peak_pci_remove,
  617. };
  618. module_pci_driver(peak_pci_driver);