etoms.c 22 KB

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  1. /*
  2. * Etoms Et61x151 GPL Linux driver by Michel Xhaard (09/09/2004)
  3. *
  4. * V4L2 by Jean-Francois Moine <http://moinejf.free.fr>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  21. #define MODULE_NAME "etoms"
  22. #include "gspca.h"
  23. MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>");
  24. MODULE_DESCRIPTION("Etoms USB Camera Driver");
  25. MODULE_LICENSE("GPL");
  26. /* specific webcam descriptor */
  27. struct sd {
  28. struct gspca_dev gspca_dev; /* !! must be the first item */
  29. unsigned char autogain;
  30. char sensor;
  31. #define SENSOR_PAS106 0
  32. #define SENSOR_TAS5130CXX 1
  33. signed char ag_cnt;
  34. #define AG_CNT_START 13
  35. };
  36. static const struct v4l2_pix_format vga_mode[] = {
  37. {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  38. .bytesperline = 320,
  39. .sizeimage = 320 * 240,
  40. .colorspace = V4L2_COLORSPACE_SRGB,
  41. .priv = 1},
  42. /* {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  43. .bytesperline = 640,
  44. .sizeimage = 640 * 480,
  45. .colorspace = V4L2_COLORSPACE_SRGB,
  46. .priv = 0}, */
  47. };
  48. static const struct v4l2_pix_format sif_mode[] = {
  49. {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  50. .bytesperline = 176,
  51. .sizeimage = 176 * 144,
  52. .colorspace = V4L2_COLORSPACE_SRGB,
  53. .priv = 1},
  54. {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  55. .bytesperline = 352,
  56. .sizeimage = 352 * 288,
  57. .colorspace = V4L2_COLORSPACE_SRGB,
  58. .priv = 0},
  59. };
  60. #define ETOMS_ALT_SIZE_1000 12
  61. #define ET_GPIO_DIR_CTRL 0x04 /* Control IO bit[0..5] (0 in 1 out) */
  62. #define ET_GPIO_OUT 0x05 /* Only IO data */
  63. #define ET_GPIO_IN 0x06 /* Read Only IO data */
  64. #define ET_RESET_ALL 0x03
  65. #define ET_ClCK 0x01
  66. #define ET_CTRL 0x02 /* enable i2c OutClck Powerdown mode */
  67. #define ET_COMP 0x12 /* Compression register */
  68. #define ET_MAXQt 0x13
  69. #define ET_MINQt 0x14
  70. #define ET_COMP_VAL0 0x02
  71. #define ET_COMP_VAL1 0x03
  72. #define ET_REG1d 0x1d
  73. #define ET_REG1e 0x1e
  74. #define ET_REG1f 0x1f
  75. #define ET_REG20 0x20
  76. #define ET_REG21 0x21
  77. #define ET_REG22 0x22
  78. #define ET_REG23 0x23
  79. #define ET_REG24 0x24
  80. #define ET_REG25 0x25
  81. /* base registers for luma calculation */
  82. #define ET_LUMA_CENTER 0x39
  83. #define ET_G_RED 0x4d
  84. #define ET_G_GREEN1 0x4e
  85. #define ET_G_BLUE 0x4f
  86. #define ET_G_GREEN2 0x50
  87. #define ET_G_GR_H 0x51
  88. #define ET_G_GB_H 0x52
  89. #define ET_O_RED 0x34
  90. #define ET_O_GREEN1 0x35
  91. #define ET_O_BLUE 0x36
  92. #define ET_O_GREEN2 0x37
  93. #define ET_SYNCHRO 0x68
  94. #define ET_STARTX 0x69
  95. #define ET_STARTY 0x6a
  96. #define ET_WIDTH_LOW 0x6b
  97. #define ET_HEIGTH_LOW 0x6c
  98. #define ET_W_H_HEIGTH 0x6d
  99. #define ET_REG6e 0x6e /* OBW */
  100. #define ET_REG6f 0x6f /* OBW */
  101. #define ET_REG70 0x70 /* OBW_AWB */
  102. #define ET_REG71 0x71 /* OBW_AWB */
  103. #define ET_REG72 0x72 /* OBW_AWB */
  104. #define ET_REG73 0x73 /* Clkdelay ns */
  105. #define ET_REG74 0x74 /* test pattern */
  106. #define ET_REG75 0x75 /* test pattern */
  107. #define ET_I2C_CLK 0x8c
  108. #define ET_PXL_CLK 0x60
  109. #define ET_I2C_BASE 0x89
  110. #define ET_I2C_COUNT 0x8a
  111. #define ET_I2C_PREFETCH 0x8b
  112. #define ET_I2C_REG 0x88
  113. #define ET_I2C_DATA7 0x87
  114. #define ET_I2C_DATA6 0x86
  115. #define ET_I2C_DATA5 0x85
  116. #define ET_I2C_DATA4 0x84
  117. #define ET_I2C_DATA3 0x83
  118. #define ET_I2C_DATA2 0x82
  119. #define ET_I2C_DATA1 0x81
  120. #define ET_I2C_DATA0 0x80
  121. #define PAS106_REG2 0x02 /* pxlClk = systemClk/(reg2) */
  122. #define PAS106_REG3 0x03 /* line/frame H [11..4] */
  123. #define PAS106_REG4 0x04 /* line/frame L [3..0] */
  124. #define PAS106_REG5 0x05 /* exposure time line offset(default 5) */
  125. #define PAS106_REG6 0x06 /* exposure time pixel offset(default 6) */
  126. #define PAS106_REG7 0x07 /* signbit Dac (default 0) */
  127. #define PAS106_REG9 0x09
  128. #define PAS106_REG0e 0x0e /* global gain [4..0](default 0x0e) */
  129. #define PAS106_REG13 0x13 /* end i2c write */
  130. static const __u8 GainRGBG[] = { 0x80, 0x80, 0x80, 0x80, 0x00, 0x00 };
  131. static const __u8 I2c2[] = { 0x08, 0x08, 0x08, 0x08, 0x0d };
  132. static const __u8 I2c3[] = { 0x12, 0x05 };
  133. static const __u8 I2c4[] = { 0x41, 0x08 };
  134. /* read 'len' bytes to gspca_dev->usb_buf */
  135. static void reg_r(struct gspca_dev *gspca_dev,
  136. __u16 index,
  137. __u16 len)
  138. {
  139. struct usb_device *dev = gspca_dev->dev;
  140. #ifdef GSPCA_DEBUG
  141. if (len > USB_BUF_SZ) {
  142. pr_err("reg_r: buffer overflow\n");
  143. return;
  144. }
  145. #endif
  146. usb_control_msg(dev,
  147. usb_rcvctrlpipe(dev, 0),
  148. 0,
  149. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,
  150. 0,
  151. index, gspca_dev->usb_buf, len, 500);
  152. PDEBUG(D_USBI, "reg read [%02x] -> %02x ..",
  153. index, gspca_dev->usb_buf[0]);
  154. }
  155. static void reg_w_val(struct gspca_dev *gspca_dev,
  156. __u16 index,
  157. __u8 val)
  158. {
  159. struct usb_device *dev = gspca_dev->dev;
  160. gspca_dev->usb_buf[0] = val;
  161. usb_control_msg(dev,
  162. usb_sndctrlpipe(dev, 0),
  163. 0,
  164. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,
  165. 0,
  166. index, gspca_dev->usb_buf, 1, 500);
  167. }
  168. static void reg_w(struct gspca_dev *gspca_dev,
  169. __u16 index,
  170. const __u8 *buffer,
  171. __u16 len)
  172. {
  173. struct usb_device *dev = gspca_dev->dev;
  174. #ifdef GSPCA_DEBUG
  175. if (len > USB_BUF_SZ) {
  176. pr_err("reg_w: buffer overflow\n");
  177. return;
  178. }
  179. PDEBUG(D_USBO, "reg write [%02x] = %02x..", index, *buffer);
  180. #endif
  181. memcpy(gspca_dev->usb_buf, buffer, len);
  182. usb_control_msg(dev,
  183. usb_sndctrlpipe(dev, 0),
  184. 0,
  185. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,
  186. 0, index, gspca_dev->usb_buf, len, 500);
  187. }
  188. static int i2c_w(struct gspca_dev *gspca_dev,
  189. __u8 reg,
  190. const __u8 *buffer,
  191. int len, __u8 mode)
  192. {
  193. /* buffer should be [D0..D7] */
  194. __u8 ptchcount;
  195. /* set the base address */
  196. reg_w_val(gspca_dev, ET_I2C_BASE, 0x40);
  197. /* sensor base for the pas106 */
  198. /* set count and prefetch */
  199. ptchcount = ((len & 0x07) << 4) | (mode & 0x03);
  200. reg_w_val(gspca_dev, ET_I2C_COUNT, ptchcount);
  201. /* set the register base */
  202. reg_w_val(gspca_dev, ET_I2C_REG, reg);
  203. while (--len >= 0)
  204. reg_w_val(gspca_dev, ET_I2C_DATA0 + len, buffer[len]);
  205. return 0;
  206. }
  207. static int i2c_r(struct gspca_dev *gspca_dev,
  208. __u8 reg)
  209. {
  210. /* set the base address */
  211. reg_w_val(gspca_dev, ET_I2C_BASE, 0x40);
  212. /* sensor base for the pas106 */
  213. /* set count and prefetch (cnd: 4 bits - mode: 4 bits) */
  214. reg_w_val(gspca_dev, ET_I2C_COUNT, 0x11);
  215. reg_w_val(gspca_dev, ET_I2C_REG, reg); /* set the register base */
  216. reg_w_val(gspca_dev, ET_I2C_PREFETCH, 0x02); /* prefetch */
  217. reg_w_val(gspca_dev, ET_I2C_PREFETCH, 0x00);
  218. reg_r(gspca_dev, ET_I2C_DATA0, 1); /* read one byte */
  219. return 0;
  220. }
  221. static int Et_WaitStatus(struct gspca_dev *gspca_dev)
  222. {
  223. int retry = 10;
  224. while (retry--) {
  225. reg_r(gspca_dev, ET_ClCK, 1);
  226. if (gspca_dev->usb_buf[0] != 0)
  227. return 1;
  228. }
  229. return 0;
  230. }
  231. static int et_video(struct gspca_dev *gspca_dev,
  232. int on)
  233. {
  234. int ret;
  235. reg_w_val(gspca_dev, ET_GPIO_OUT,
  236. on ? 0x10 /* startvideo - set Bit5 */
  237. : 0); /* stopvideo */
  238. ret = Et_WaitStatus(gspca_dev);
  239. if (ret != 0)
  240. PDEBUG(D_ERR, "timeout video on/off");
  241. return ret;
  242. }
  243. static void Et_init2(struct gspca_dev *gspca_dev)
  244. {
  245. __u8 value;
  246. static const __u8 FormLine[] = { 0x84, 0x03, 0x14, 0xf4, 0x01, 0x05 };
  247. PDEBUG(D_STREAM, "Open Init2 ET");
  248. reg_w_val(gspca_dev, ET_GPIO_DIR_CTRL, 0x2f);
  249. reg_w_val(gspca_dev, ET_GPIO_OUT, 0x10);
  250. reg_r(gspca_dev, ET_GPIO_IN, 1);
  251. reg_w_val(gspca_dev, ET_ClCK, 0x14); /* 0x14 // 0x16 enabled pattern */
  252. reg_w_val(gspca_dev, ET_CTRL, 0x1b);
  253. /* compression et subsampling */
  254. if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv)
  255. value = ET_COMP_VAL1; /* 320 */
  256. else
  257. value = ET_COMP_VAL0; /* 640 */
  258. reg_w_val(gspca_dev, ET_COMP, value);
  259. reg_w_val(gspca_dev, ET_MAXQt, 0x1f);
  260. reg_w_val(gspca_dev, ET_MINQt, 0x04);
  261. /* undocumented registers */
  262. reg_w_val(gspca_dev, ET_REG1d, 0xff);
  263. reg_w_val(gspca_dev, ET_REG1e, 0xff);
  264. reg_w_val(gspca_dev, ET_REG1f, 0xff);
  265. reg_w_val(gspca_dev, ET_REG20, 0x35);
  266. reg_w_val(gspca_dev, ET_REG21, 0x01);
  267. reg_w_val(gspca_dev, ET_REG22, 0x00);
  268. reg_w_val(gspca_dev, ET_REG23, 0xff);
  269. reg_w_val(gspca_dev, ET_REG24, 0xff);
  270. reg_w_val(gspca_dev, ET_REG25, 0x0f);
  271. /* colors setting */
  272. reg_w_val(gspca_dev, 0x30, 0x11); /* 0x30 */
  273. reg_w_val(gspca_dev, 0x31, 0x40);
  274. reg_w_val(gspca_dev, 0x32, 0x00);
  275. reg_w_val(gspca_dev, ET_O_RED, 0x00); /* 0x34 */
  276. reg_w_val(gspca_dev, ET_O_GREEN1, 0x00);
  277. reg_w_val(gspca_dev, ET_O_BLUE, 0x00);
  278. reg_w_val(gspca_dev, ET_O_GREEN2, 0x00);
  279. /*************/
  280. reg_w_val(gspca_dev, ET_G_RED, 0x80); /* 0x4d */
  281. reg_w_val(gspca_dev, ET_G_GREEN1, 0x80);
  282. reg_w_val(gspca_dev, ET_G_BLUE, 0x80);
  283. reg_w_val(gspca_dev, ET_G_GREEN2, 0x80);
  284. reg_w_val(gspca_dev, ET_G_GR_H, 0x00);
  285. reg_w_val(gspca_dev, ET_G_GB_H, 0x00); /* 0x52 */
  286. /* Window control registers */
  287. reg_w_val(gspca_dev, 0x61, 0x80); /* use cmc_out */
  288. reg_w_val(gspca_dev, 0x62, 0x02);
  289. reg_w_val(gspca_dev, 0x63, 0x03);
  290. reg_w_val(gspca_dev, 0x64, 0x14);
  291. reg_w_val(gspca_dev, 0x65, 0x0e);
  292. reg_w_val(gspca_dev, 0x66, 0x02);
  293. reg_w_val(gspca_dev, 0x67, 0x02);
  294. /**************************************/
  295. reg_w_val(gspca_dev, ET_SYNCHRO, 0x8f); /* 0x68 */
  296. reg_w_val(gspca_dev, ET_STARTX, 0x69); /* 0x6a //0x69 */
  297. reg_w_val(gspca_dev, ET_STARTY, 0x0d); /* 0x0d //0x0c */
  298. reg_w_val(gspca_dev, ET_WIDTH_LOW, 0x80);
  299. reg_w_val(gspca_dev, ET_HEIGTH_LOW, 0xe0);
  300. reg_w_val(gspca_dev, ET_W_H_HEIGTH, 0x60); /* 6d */
  301. reg_w_val(gspca_dev, ET_REG6e, 0x86);
  302. reg_w_val(gspca_dev, ET_REG6f, 0x01);
  303. reg_w_val(gspca_dev, ET_REG70, 0x26);
  304. reg_w_val(gspca_dev, ET_REG71, 0x7a);
  305. reg_w_val(gspca_dev, ET_REG72, 0x01);
  306. /* Clock Pattern registers ***************** */
  307. reg_w_val(gspca_dev, ET_REG73, 0x00);
  308. reg_w_val(gspca_dev, ET_REG74, 0x18); /* 0x28 */
  309. reg_w_val(gspca_dev, ET_REG75, 0x0f); /* 0x01 */
  310. /**********************************************/
  311. reg_w_val(gspca_dev, 0x8a, 0x20);
  312. reg_w_val(gspca_dev, 0x8d, 0x0f);
  313. reg_w_val(gspca_dev, 0x8e, 0x08);
  314. /**************************************/
  315. reg_w_val(gspca_dev, 0x03, 0x08);
  316. reg_w_val(gspca_dev, ET_PXL_CLK, 0x03);
  317. reg_w_val(gspca_dev, 0x81, 0xff);
  318. reg_w_val(gspca_dev, 0x80, 0x00);
  319. reg_w_val(gspca_dev, 0x81, 0xff);
  320. reg_w_val(gspca_dev, 0x80, 0x20);
  321. reg_w_val(gspca_dev, 0x03, 0x01);
  322. reg_w_val(gspca_dev, 0x03, 0x00);
  323. reg_w_val(gspca_dev, 0x03, 0x08);
  324. /********************************************/
  325. /* reg_r(gspca_dev, ET_I2C_BASE, 1);
  326. always 0x40 as the pas106 ??? */
  327. /* set the sensor */
  328. if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv)
  329. value = 0x04; /* 320 */
  330. else /* 640 */
  331. value = 0x1e; /* 0x17 * setting PixelClock
  332. * 0x03 mean 24/(3+1) = 6 Mhz
  333. * 0x05 -> 24/(5+1) = 4 Mhz
  334. * 0x0b -> 24/(11+1) = 2 Mhz
  335. * 0x17 -> 24/(23+1) = 1 Mhz
  336. */
  337. reg_w_val(gspca_dev, ET_PXL_CLK, value);
  338. /* now set by fifo the FormatLine setting */
  339. reg_w(gspca_dev, 0x62, FormLine, 6);
  340. /* set exposure times [ 0..0x78] 0->longvalue 0x78->shortvalue */
  341. reg_w_val(gspca_dev, 0x81, 0x47); /* 0x47; */
  342. reg_w_val(gspca_dev, 0x80, 0x40); /* 0x40; */
  343. /* Pedro change */
  344. /* Brightness change Brith+ decrease value */
  345. /* Brigth- increase value */
  346. /* original value = 0x70; */
  347. reg_w_val(gspca_dev, 0x81, 0x30); /* 0x20; - set brightness */
  348. reg_w_val(gspca_dev, 0x80, 0x20); /* 0x20; */
  349. }
  350. static void setbrightness(struct gspca_dev *gspca_dev, s32 val)
  351. {
  352. int i;
  353. for (i = 0; i < 4; i++)
  354. reg_w_val(gspca_dev, ET_O_RED + i, val);
  355. }
  356. static void setcontrast(struct gspca_dev *gspca_dev, s32 val)
  357. {
  358. __u8 RGBG[] = { 0x80, 0x80, 0x80, 0x80, 0x00, 0x00 };
  359. memset(RGBG, val, sizeof(RGBG) - 2);
  360. reg_w(gspca_dev, ET_G_RED, RGBG, 6);
  361. }
  362. static void setcolors(struct gspca_dev *gspca_dev, s32 val)
  363. {
  364. struct sd *sd = (struct sd *) gspca_dev;
  365. __u8 I2cc[] = { 0x05, 0x02, 0x02, 0x05, 0x0d };
  366. __u8 i2cflags = 0x01;
  367. /* __u8 green = 0; */
  368. I2cc[3] = val; /* red */
  369. I2cc[0] = 15 - val; /* blue */
  370. /* green = 15 - ((((7*I2cc[0]) >> 2 ) + I2cc[3]) >> 1); */
  371. /* I2cc[1] = I2cc[2] = green; */
  372. if (sd->sensor == SENSOR_PAS106) {
  373. i2c_w(gspca_dev, PAS106_REG13, &i2cflags, 1, 3);
  374. i2c_w(gspca_dev, PAS106_REG9, I2cc, sizeof I2cc, 1);
  375. }
  376. /* PDEBUG(D_CONF , "Etoms red %d blue %d green %d",
  377. I2cc[3], I2cc[0], green); */
  378. }
  379. static s32 getcolors(struct gspca_dev *gspca_dev)
  380. {
  381. struct sd *sd = (struct sd *) gspca_dev;
  382. if (sd->sensor == SENSOR_PAS106) {
  383. /* i2c_r(gspca_dev, PAS106_REG9); * blue */
  384. i2c_r(gspca_dev, PAS106_REG9 + 3); /* red */
  385. return gspca_dev->usb_buf[0] & 0x0f;
  386. }
  387. return 0;
  388. }
  389. static void setautogain(struct gspca_dev *gspca_dev)
  390. {
  391. struct sd *sd = (struct sd *) gspca_dev;
  392. if (sd->autogain)
  393. sd->ag_cnt = AG_CNT_START;
  394. else
  395. sd->ag_cnt = -1;
  396. }
  397. static void Et_init1(struct gspca_dev *gspca_dev)
  398. {
  399. __u8 value;
  400. /* __u8 I2c0 [] = {0x0a, 0x12, 0x05, 0x22, 0xac, 0x00, 0x01, 0x00}; */
  401. __u8 I2c0[] = { 0x0a, 0x12, 0x05, 0x6d, 0xcd, 0x00, 0x01, 0x00 };
  402. /* try 1/120 0x6d 0xcd 0x40 */
  403. /* __u8 I2c0 [] = {0x0a, 0x12, 0x05, 0xfe, 0xfe, 0xc0, 0x01, 0x00};
  404. * 1/60000 hmm ?? */
  405. PDEBUG(D_STREAM, "Open Init1 ET");
  406. reg_w_val(gspca_dev, ET_GPIO_DIR_CTRL, 7);
  407. reg_r(gspca_dev, ET_GPIO_IN, 1);
  408. reg_w_val(gspca_dev, ET_RESET_ALL, 1);
  409. reg_w_val(gspca_dev, ET_RESET_ALL, 0);
  410. reg_w_val(gspca_dev, ET_ClCK, 0x10);
  411. reg_w_val(gspca_dev, ET_CTRL, 0x19);
  412. /* compression et subsampling */
  413. if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv)
  414. value = ET_COMP_VAL1;
  415. else
  416. value = ET_COMP_VAL0;
  417. PDEBUG(D_STREAM, "Open mode %d Compression %d",
  418. gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv,
  419. value);
  420. reg_w_val(gspca_dev, ET_COMP, value);
  421. reg_w_val(gspca_dev, ET_MAXQt, 0x1d);
  422. reg_w_val(gspca_dev, ET_MINQt, 0x02);
  423. /* undocumented registers */
  424. reg_w_val(gspca_dev, ET_REG1d, 0xff);
  425. reg_w_val(gspca_dev, ET_REG1e, 0xff);
  426. reg_w_val(gspca_dev, ET_REG1f, 0xff);
  427. reg_w_val(gspca_dev, ET_REG20, 0x35);
  428. reg_w_val(gspca_dev, ET_REG21, 0x01);
  429. reg_w_val(gspca_dev, ET_REG22, 0x00);
  430. reg_w_val(gspca_dev, ET_REG23, 0xf7);
  431. reg_w_val(gspca_dev, ET_REG24, 0xff);
  432. reg_w_val(gspca_dev, ET_REG25, 0x07);
  433. /* colors setting */
  434. reg_w_val(gspca_dev, ET_G_RED, 0x80);
  435. reg_w_val(gspca_dev, ET_G_GREEN1, 0x80);
  436. reg_w_val(gspca_dev, ET_G_BLUE, 0x80);
  437. reg_w_val(gspca_dev, ET_G_GREEN2, 0x80);
  438. reg_w_val(gspca_dev, ET_G_GR_H, 0x00);
  439. reg_w_val(gspca_dev, ET_G_GB_H, 0x00);
  440. /* Window control registers */
  441. reg_w_val(gspca_dev, ET_SYNCHRO, 0xf0);
  442. reg_w_val(gspca_dev, ET_STARTX, 0x56); /* 0x56 */
  443. reg_w_val(gspca_dev, ET_STARTY, 0x05); /* 0x04 */
  444. reg_w_val(gspca_dev, ET_WIDTH_LOW, 0x60);
  445. reg_w_val(gspca_dev, ET_HEIGTH_LOW, 0x20);
  446. reg_w_val(gspca_dev, ET_W_H_HEIGTH, 0x50);
  447. reg_w_val(gspca_dev, ET_REG6e, 0x86);
  448. reg_w_val(gspca_dev, ET_REG6f, 0x01);
  449. reg_w_val(gspca_dev, ET_REG70, 0x86);
  450. reg_w_val(gspca_dev, ET_REG71, 0x14);
  451. reg_w_val(gspca_dev, ET_REG72, 0x00);
  452. /* Clock Pattern registers */
  453. reg_w_val(gspca_dev, ET_REG73, 0x00);
  454. reg_w_val(gspca_dev, ET_REG74, 0x00);
  455. reg_w_val(gspca_dev, ET_REG75, 0x0a);
  456. reg_w_val(gspca_dev, ET_I2C_CLK, 0x04);
  457. reg_w_val(gspca_dev, ET_PXL_CLK, 0x01);
  458. /* set the sensor */
  459. if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) {
  460. I2c0[0] = 0x06;
  461. i2c_w(gspca_dev, PAS106_REG2, I2c0, sizeof I2c0, 1);
  462. i2c_w(gspca_dev, PAS106_REG9, I2c2, sizeof I2c2, 1);
  463. value = 0x06;
  464. i2c_w(gspca_dev, PAS106_REG2, &value, 1, 1);
  465. i2c_w(gspca_dev, PAS106_REG3, I2c3, sizeof I2c3, 1);
  466. /* value = 0x1f; */
  467. value = 0x04;
  468. i2c_w(gspca_dev, PAS106_REG0e, &value, 1, 1);
  469. } else {
  470. I2c0[0] = 0x0a;
  471. i2c_w(gspca_dev, PAS106_REG2, I2c0, sizeof I2c0, 1);
  472. i2c_w(gspca_dev, PAS106_REG9, I2c2, sizeof I2c2, 1);
  473. value = 0x0a;
  474. i2c_w(gspca_dev, PAS106_REG2, &value, 1, 1);
  475. i2c_w(gspca_dev, PAS106_REG3, I2c3, sizeof I2c3, 1);
  476. value = 0x04;
  477. /* value = 0x10; */
  478. i2c_w(gspca_dev, PAS106_REG0e, &value, 1, 1);
  479. /* bit 2 enable bit 1:2 select 0 1 2 3
  480. value = 0x07; * curve 0 *
  481. i2c_w(gspca_dev, PAS106_REG0f, &value, 1, 1);
  482. */
  483. }
  484. /* value = 0x01; */
  485. /* value = 0x22; */
  486. /* i2c_w(gspca_dev, PAS106_REG5, &value, 1, 1); */
  487. /* magnetude and sign bit for DAC */
  488. i2c_w(gspca_dev, PAS106_REG7, I2c4, sizeof I2c4, 1);
  489. /* now set by fifo the whole colors setting */
  490. reg_w(gspca_dev, ET_G_RED, GainRGBG, 6);
  491. setcolors(gspca_dev, getcolors(gspca_dev));
  492. }
  493. /* this function is called at probe time */
  494. static int sd_config(struct gspca_dev *gspca_dev,
  495. const struct usb_device_id *id)
  496. {
  497. struct sd *sd = (struct sd *) gspca_dev;
  498. struct cam *cam;
  499. cam = &gspca_dev->cam;
  500. sd->sensor = id->driver_info;
  501. if (sd->sensor == SENSOR_PAS106) {
  502. cam->cam_mode = sif_mode;
  503. cam->nmodes = ARRAY_SIZE(sif_mode);
  504. } else {
  505. cam->cam_mode = vga_mode;
  506. cam->nmodes = ARRAY_SIZE(vga_mode);
  507. }
  508. sd->ag_cnt = -1;
  509. return 0;
  510. }
  511. /* this function is called at probe and resume time */
  512. static int sd_init(struct gspca_dev *gspca_dev)
  513. {
  514. struct sd *sd = (struct sd *) gspca_dev;
  515. if (sd->sensor == SENSOR_PAS106)
  516. Et_init1(gspca_dev);
  517. else
  518. Et_init2(gspca_dev);
  519. reg_w_val(gspca_dev, ET_RESET_ALL, 0x08);
  520. et_video(gspca_dev, 0); /* video off */
  521. return 0;
  522. }
  523. /* -- start the camera -- */
  524. static int sd_start(struct gspca_dev *gspca_dev)
  525. {
  526. struct sd *sd = (struct sd *) gspca_dev;
  527. if (sd->sensor == SENSOR_PAS106)
  528. Et_init1(gspca_dev);
  529. else
  530. Et_init2(gspca_dev);
  531. setautogain(gspca_dev);
  532. reg_w_val(gspca_dev, ET_RESET_ALL, 0x08);
  533. et_video(gspca_dev, 1); /* video on */
  534. return 0;
  535. }
  536. static void sd_stopN(struct gspca_dev *gspca_dev)
  537. {
  538. et_video(gspca_dev, 0); /* video off */
  539. }
  540. static __u8 Et_getgainG(struct gspca_dev *gspca_dev)
  541. {
  542. struct sd *sd = (struct sd *) gspca_dev;
  543. if (sd->sensor == SENSOR_PAS106) {
  544. i2c_r(gspca_dev, PAS106_REG0e);
  545. PDEBUG(D_CONF, "Etoms gain G %d", gspca_dev->usb_buf[0]);
  546. return gspca_dev->usb_buf[0];
  547. }
  548. return 0x1f;
  549. }
  550. static void Et_setgainG(struct gspca_dev *gspca_dev, __u8 gain)
  551. {
  552. struct sd *sd = (struct sd *) gspca_dev;
  553. if (sd->sensor == SENSOR_PAS106) {
  554. __u8 i2cflags = 0x01;
  555. i2c_w(gspca_dev, PAS106_REG13, &i2cflags, 1, 3);
  556. i2c_w(gspca_dev, PAS106_REG0e, &gain, 1, 1);
  557. }
  558. }
  559. #define BLIMIT(bright) \
  560. (u8)((bright > 0x1f) ? 0x1f : ((bright < 4) ? 3 : bright))
  561. #define LIMIT(color) \
  562. (u8)((color > 0xff) ? 0xff : ((color < 0) ? 0 : color))
  563. static void do_autogain(struct gspca_dev *gspca_dev)
  564. {
  565. struct sd *sd = (struct sd *) gspca_dev;
  566. __u8 luma;
  567. __u8 luma_mean = 128;
  568. __u8 luma_delta = 20;
  569. __u8 spring = 4;
  570. int Gbright;
  571. __u8 r, g, b;
  572. if (sd->ag_cnt < 0)
  573. return;
  574. if (--sd->ag_cnt >= 0)
  575. return;
  576. sd->ag_cnt = AG_CNT_START;
  577. Gbright = Et_getgainG(gspca_dev);
  578. reg_r(gspca_dev, ET_LUMA_CENTER, 4);
  579. g = (gspca_dev->usb_buf[0] + gspca_dev->usb_buf[3]) >> 1;
  580. r = gspca_dev->usb_buf[1];
  581. b = gspca_dev->usb_buf[2];
  582. r = ((r << 8) - (r << 4) - (r << 3)) >> 10;
  583. b = ((b << 7) >> 10);
  584. g = ((g << 9) + (g << 7) + (g << 5)) >> 10;
  585. luma = LIMIT(r + g + b);
  586. PDEBUG(D_FRAM, "Etoms luma G %d", luma);
  587. if (luma < luma_mean - luma_delta || luma > luma_mean + luma_delta) {
  588. Gbright += (luma_mean - luma) >> spring;
  589. Gbright = BLIMIT(Gbright);
  590. PDEBUG(D_FRAM, "Etoms Gbright %d", Gbright);
  591. Et_setgainG(gspca_dev, (__u8) Gbright);
  592. }
  593. }
  594. #undef BLIMIT
  595. #undef LIMIT
  596. static void sd_pkt_scan(struct gspca_dev *gspca_dev,
  597. u8 *data, /* isoc packet */
  598. int len) /* iso packet length */
  599. {
  600. int seqframe;
  601. seqframe = data[0] & 0x3f;
  602. len = (int) (((data[0] & 0xc0) << 2) | data[1]);
  603. if (seqframe == 0x3f) {
  604. PDEBUG(D_FRAM,
  605. "header packet found datalength %d !!", len);
  606. PDEBUG(D_FRAM, "G %d R %d G %d B %d",
  607. data[2], data[3], data[4], data[5]);
  608. data += 30;
  609. /* don't change datalength as the chips provided it */
  610. gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
  611. gspca_frame_add(gspca_dev, FIRST_PACKET, data, len);
  612. return;
  613. }
  614. if (len) {
  615. data += 8;
  616. gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
  617. } else { /* Drop Packet */
  618. gspca_dev->last_packet_type = DISCARD_PACKET;
  619. }
  620. }
  621. static int sd_s_ctrl(struct v4l2_ctrl *ctrl)
  622. {
  623. struct gspca_dev *gspca_dev =
  624. container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
  625. struct sd *sd = (struct sd *)gspca_dev;
  626. gspca_dev->usb_err = 0;
  627. if (!gspca_dev->streaming)
  628. return 0;
  629. switch (ctrl->id) {
  630. case V4L2_CID_BRIGHTNESS:
  631. setbrightness(gspca_dev, ctrl->val);
  632. break;
  633. case V4L2_CID_CONTRAST:
  634. setcontrast(gspca_dev, ctrl->val);
  635. break;
  636. case V4L2_CID_SATURATION:
  637. setcolors(gspca_dev, ctrl->val);
  638. break;
  639. case V4L2_CID_AUTOGAIN:
  640. sd->autogain = ctrl->val;
  641. setautogain(gspca_dev);
  642. break;
  643. }
  644. return gspca_dev->usb_err;
  645. }
  646. static const struct v4l2_ctrl_ops sd_ctrl_ops = {
  647. .s_ctrl = sd_s_ctrl,
  648. };
  649. static int sd_init_controls(struct gspca_dev *gspca_dev)
  650. {
  651. struct sd *sd = (struct sd *)gspca_dev;
  652. struct v4l2_ctrl_handler *hdl = &gspca_dev->ctrl_handler;
  653. gspca_dev->vdev.ctrl_handler = hdl;
  654. v4l2_ctrl_handler_init(hdl, 4);
  655. v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
  656. V4L2_CID_BRIGHTNESS, 1, 127, 1, 63);
  657. v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
  658. V4L2_CID_CONTRAST, 0, 255, 1, 127);
  659. if (sd->sensor == SENSOR_PAS106)
  660. v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
  661. V4L2_CID_SATURATION, 0, 15, 1, 7);
  662. v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
  663. V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
  664. if (hdl->error) {
  665. pr_err("Could not initialize controls\n");
  666. return hdl->error;
  667. }
  668. return 0;
  669. }
  670. /* sub-driver description */
  671. static const struct sd_desc sd_desc = {
  672. .name = MODULE_NAME,
  673. .config = sd_config,
  674. .init = sd_init,
  675. .init_controls = sd_init_controls,
  676. .start = sd_start,
  677. .stopN = sd_stopN,
  678. .pkt_scan = sd_pkt_scan,
  679. .dq_callback = do_autogain,
  680. };
  681. /* -- module initialisation -- */
  682. static const struct usb_device_id device_table[] = {
  683. {USB_DEVICE(0x102c, 0x6151), .driver_info = SENSOR_PAS106},
  684. #if !defined CONFIG_USB_ET61X251 && !defined CONFIG_USB_ET61X251_MODULE
  685. {USB_DEVICE(0x102c, 0x6251), .driver_info = SENSOR_TAS5130CXX},
  686. #endif
  687. {}
  688. };
  689. MODULE_DEVICE_TABLE(usb, device_table);
  690. /* -- device connect -- */
  691. static int sd_probe(struct usb_interface *intf,
  692. const struct usb_device_id *id)
  693. {
  694. return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
  695. THIS_MODULE);
  696. }
  697. static struct usb_driver sd_driver = {
  698. .name = MODULE_NAME,
  699. .id_table = device_table,
  700. .probe = sd_probe,
  701. .disconnect = gspca_disconnect,
  702. #ifdef CONFIG_PM
  703. .suspend = gspca_suspend,
  704. .resume = gspca_resume,
  705. .reset_resume = gspca_resume,
  706. #endif
  707. };
  708. module_usb_driver(sd_driver);