ispccdc.c 71 KB

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  1. /*
  2. * ispccdc.c
  3. *
  4. * TI OMAP3 ISP - CCDC module
  5. *
  6. * Copyright (C) 2009-2010 Nokia Corporation
  7. * Copyright (C) 2009 Texas Instruments, Inc.
  8. *
  9. * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10. * Sakari Ailus <sakari.ailus@iki.fi>
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  24. * 02110-1301 USA
  25. */
  26. #include <linux/module.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/delay.h>
  29. #include <linux/device.h>
  30. #include <linux/dma-mapping.h>
  31. #include <linux/mm.h>
  32. #include <linux/omap-iommu.h>
  33. #include <linux/sched.h>
  34. #include <linux/slab.h>
  35. #include <media/v4l2-event.h>
  36. #include "isp.h"
  37. #include "ispreg.h"
  38. #include "ispccdc.h"
  39. #define CCDC_MIN_WIDTH 32
  40. #define CCDC_MIN_HEIGHT 32
  41. static struct v4l2_mbus_framefmt *
  42. __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  43. unsigned int pad, enum v4l2_subdev_format_whence which);
  44. static const unsigned int ccdc_fmts[] = {
  45. V4L2_MBUS_FMT_Y8_1X8,
  46. V4L2_MBUS_FMT_Y10_1X10,
  47. V4L2_MBUS_FMT_Y12_1X12,
  48. V4L2_MBUS_FMT_SGRBG8_1X8,
  49. V4L2_MBUS_FMT_SRGGB8_1X8,
  50. V4L2_MBUS_FMT_SBGGR8_1X8,
  51. V4L2_MBUS_FMT_SGBRG8_1X8,
  52. V4L2_MBUS_FMT_SGRBG10_1X10,
  53. V4L2_MBUS_FMT_SRGGB10_1X10,
  54. V4L2_MBUS_FMT_SBGGR10_1X10,
  55. V4L2_MBUS_FMT_SGBRG10_1X10,
  56. V4L2_MBUS_FMT_SGRBG12_1X12,
  57. V4L2_MBUS_FMT_SRGGB12_1X12,
  58. V4L2_MBUS_FMT_SBGGR12_1X12,
  59. V4L2_MBUS_FMT_SGBRG12_1X12,
  60. V4L2_MBUS_FMT_YUYV8_2X8,
  61. V4L2_MBUS_FMT_UYVY8_2X8,
  62. };
  63. /*
  64. * ccdc_print_status - Print current CCDC Module register values.
  65. * @ccdc: Pointer to ISP CCDC device.
  66. *
  67. * Also prints other debug information stored in the CCDC module.
  68. */
  69. #define CCDC_PRINT_REGISTER(isp, name)\
  70. dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
  71. isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
  72. static void ccdc_print_status(struct isp_ccdc_device *ccdc)
  73. {
  74. struct isp_device *isp = to_isp_device(ccdc);
  75. dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
  76. CCDC_PRINT_REGISTER(isp, PCR);
  77. CCDC_PRINT_REGISTER(isp, SYN_MODE);
  78. CCDC_PRINT_REGISTER(isp, HD_VD_WID);
  79. CCDC_PRINT_REGISTER(isp, PIX_LINES);
  80. CCDC_PRINT_REGISTER(isp, HORZ_INFO);
  81. CCDC_PRINT_REGISTER(isp, VERT_START);
  82. CCDC_PRINT_REGISTER(isp, VERT_LINES);
  83. CCDC_PRINT_REGISTER(isp, CULLING);
  84. CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
  85. CCDC_PRINT_REGISTER(isp, SDOFST);
  86. CCDC_PRINT_REGISTER(isp, SDR_ADDR);
  87. CCDC_PRINT_REGISTER(isp, CLAMP);
  88. CCDC_PRINT_REGISTER(isp, DCSUB);
  89. CCDC_PRINT_REGISTER(isp, COLPTN);
  90. CCDC_PRINT_REGISTER(isp, BLKCMP);
  91. CCDC_PRINT_REGISTER(isp, FPC);
  92. CCDC_PRINT_REGISTER(isp, FPC_ADDR);
  93. CCDC_PRINT_REGISTER(isp, VDINT);
  94. CCDC_PRINT_REGISTER(isp, ALAW);
  95. CCDC_PRINT_REGISTER(isp, REC656IF);
  96. CCDC_PRINT_REGISTER(isp, CFG);
  97. CCDC_PRINT_REGISTER(isp, FMTCFG);
  98. CCDC_PRINT_REGISTER(isp, FMT_HORZ);
  99. CCDC_PRINT_REGISTER(isp, FMT_VERT);
  100. CCDC_PRINT_REGISTER(isp, PRGEVEN0);
  101. CCDC_PRINT_REGISTER(isp, PRGEVEN1);
  102. CCDC_PRINT_REGISTER(isp, PRGODD0);
  103. CCDC_PRINT_REGISTER(isp, PRGODD1);
  104. CCDC_PRINT_REGISTER(isp, VP_OUT);
  105. CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
  106. CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
  107. CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
  108. CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
  109. dev_dbg(isp->dev, "--------------------------------------------\n");
  110. }
  111. /*
  112. * omap3isp_ccdc_busy - Get busy state of the CCDC.
  113. * @ccdc: Pointer to ISP CCDC device.
  114. */
  115. int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
  116. {
  117. struct isp_device *isp = to_isp_device(ccdc);
  118. return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
  119. ISPCCDC_PCR_BUSY;
  120. }
  121. /* -----------------------------------------------------------------------------
  122. * Lens Shading Compensation
  123. */
  124. /*
  125. * ccdc_lsc_validate_config - Check that LSC configuration is valid.
  126. * @ccdc: Pointer to ISP CCDC device.
  127. * @lsc_cfg: the LSC configuration to check.
  128. *
  129. * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
  130. */
  131. static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
  132. struct omap3isp_ccdc_lsc_config *lsc_cfg)
  133. {
  134. struct isp_device *isp = to_isp_device(ccdc);
  135. struct v4l2_mbus_framefmt *format;
  136. unsigned int paxel_width, paxel_height;
  137. unsigned int paxel_shift_x, paxel_shift_y;
  138. unsigned int min_width, min_height, min_size;
  139. unsigned int input_width, input_height;
  140. paxel_shift_x = lsc_cfg->gain_mode_m;
  141. paxel_shift_y = lsc_cfg->gain_mode_n;
  142. if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
  143. (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
  144. dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
  145. return -EINVAL;
  146. }
  147. if (lsc_cfg->offset & 3) {
  148. dev_dbg(isp->dev, "CCDC: LSC: Offset must be a multiple of "
  149. "4\n");
  150. return -EINVAL;
  151. }
  152. if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
  153. dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
  154. return -EINVAL;
  155. }
  156. format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
  157. V4L2_SUBDEV_FORMAT_ACTIVE);
  158. input_width = format->width;
  159. input_height = format->height;
  160. /* Calculate minimum bytesize for validation */
  161. paxel_width = 1 << paxel_shift_x;
  162. min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
  163. >> paxel_shift_x) + 1;
  164. paxel_height = 1 << paxel_shift_y;
  165. min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
  166. >> paxel_shift_y) + 1;
  167. min_size = 4 * min_width * min_height;
  168. if (min_size > lsc_cfg->size) {
  169. dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
  170. return -EINVAL;
  171. }
  172. if (lsc_cfg->offset < (min_width * 4)) {
  173. dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
  174. return -EINVAL;
  175. }
  176. if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
  177. dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
  178. return -EINVAL;
  179. }
  180. return 0;
  181. }
  182. /*
  183. * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
  184. * @ccdc: Pointer to ISP CCDC device.
  185. */
  186. static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc, u32 addr)
  187. {
  188. isp_reg_writel(to_isp_device(ccdc), addr,
  189. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
  190. }
  191. /*
  192. * ccdc_lsc_setup_regs - Configures the lens shading compensation module
  193. * @ccdc: Pointer to ISP CCDC device.
  194. */
  195. static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
  196. struct omap3isp_ccdc_lsc_config *cfg)
  197. {
  198. struct isp_device *isp = to_isp_device(ccdc);
  199. int reg;
  200. isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
  201. ISPCCDC_LSC_TABLE_OFFSET);
  202. reg = 0;
  203. reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
  204. reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
  205. reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
  206. isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
  207. reg = 0;
  208. reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
  209. reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
  210. reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
  211. reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
  212. isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
  213. ISPCCDC_LSC_INITIAL);
  214. }
  215. static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
  216. {
  217. struct isp_device *isp = to_isp_device(ccdc);
  218. unsigned int wait;
  219. isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
  220. OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  221. /* timeout 1 ms */
  222. for (wait = 0; wait < 1000; wait++) {
  223. if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
  224. IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
  225. isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
  226. OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  227. return 0;
  228. }
  229. rmb();
  230. udelay(1);
  231. }
  232. return -ETIMEDOUT;
  233. }
  234. /*
  235. * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
  236. * @ccdc: Pointer to ISP CCDC device.
  237. * @enable: 0 Disables LSC, 1 Enables LSC.
  238. */
  239. static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
  240. {
  241. struct isp_device *isp = to_isp_device(ccdc);
  242. const struct v4l2_mbus_framefmt *format =
  243. __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
  244. V4L2_SUBDEV_FORMAT_ACTIVE);
  245. if ((format->code != V4L2_MBUS_FMT_SGRBG10_1X10) &&
  246. (format->code != V4L2_MBUS_FMT_SRGGB10_1X10) &&
  247. (format->code != V4L2_MBUS_FMT_SBGGR10_1X10) &&
  248. (format->code != V4L2_MBUS_FMT_SGBRG10_1X10))
  249. return -EINVAL;
  250. if (enable)
  251. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
  252. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
  253. ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
  254. if (enable) {
  255. if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
  256. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
  257. ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
  258. ccdc->lsc.state = LSC_STATE_STOPPED;
  259. dev_warn(to_device(ccdc), "LSC prefecth timeout\n");
  260. return -ETIMEDOUT;
  261. }
  262. ccdc->lsc.state = LSC_STATE_RUNNING;
  263. } else {
  264. ccdc->lsc.state = LSC_STATE_STOPPING;
  265. }
  266. return 0;
  267. }
  268. static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
  269. {
  270. struct isp_device *isp = to_isp_device(ccdc);
  271. return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
  272. ISPCCDC_LSC_BUSY;
  273. }
  274. /* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
  275. * @ccdc: Pointer to ISP CCDC device
  276. * @req: New configuration request
  277. *
  278. * context: in_interrupt()
  279. */
  280. static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
  281. struct ispccdc_lsc_config_req *req)
  282. {
  283. if (!req->enable)
  284. return -EINVAL;
  285. if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
  286. dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
  287. return -EINVAL;
  288. }
  289. if (ccdc_lsc_busy(ccdc))
  290. return -EBUSY;
  291. ccdc_lsc_setup_regs(ccdc, &req->config);
  292. ccdc_lsc_program_table(ccdc, req->table);
  293. return 0;
  294. }
  295. /*
  296. * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
  297. * @ccdc: Pointer to ISP CCDC device.
  298. *
  299. * Disables LSC, and defers enablement to shadow registers update time.
  300. */
  301. static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
  302. {
  303. struct isp_device *isp = to_isp_device(ccdc);
  304. /*
  305. * From OMAP3 TRM: When this event is pending, the module
  306. * goes into transparent mode (output =input). Normal
  307. * operation can be resumed at the start of the next frame
  308. * after:
  309. * 1) Clearing this event
  310. * 2) Disabling the LSC module
  311. * 3) Enabling it
  312. */
  313. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
  314. ISPCCDC_LSC_ENABLE);
  315. ccdc->lsc.state = LSC_STATE_STOPPED;
  316. }
  317. static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
  318. struct ispccdc_lsc_config_req *req)
  319. {
  320. struct isp_device *isp = to_isp_device(ccdc);
  321. if (req == NULL)
  322. return;
  323. if (req->iovm)
  324. dma_unmap_sg(isp->dev, req->iovm->sgt->sgl,
  325. req->iovm->sgt->nents, DMA_TO_DEVICE);
  326. if (req->table)
  327. omap_iommu_vfree(isp->domain, isp->dev, req->table);
  328. kfree(req);
  329. }
  330. static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
  331. struct list_head *queue)
  332. {
  333. struct ispccdc_lsc_config_req *req, *n;
  334. unsigned long flags;
  335. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  336. list_for_each_entry_safe(req, n, queue, list) {
  337. list_del(&req->list);
  338. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  339. ccdc_lsc_free_request(ccdc, req);
  340. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  341. }
  342. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  343. }
  344. static void ccdc_lsc_free_table_work(struct work_struct *work)
  345. {
  346. struct isp_ccdc_device *ccdc;
  347. struct ispccdc_lsc *lsc;
  348. lsc = container_of(work, struct ispccdc_lsc, table_work);
  349. ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
  350. ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
  351. }
  352. /*
  353. * ccdc_lsc_config - Configure the LSC module from a userspace request
  354. *
  355. * Store the request LSC configuration in the LSC engine request pointer. The
  356. * configuration will be applied to the hardware when the CCDC will be enabled,
  357. * or at the next LSC interrupt if the CCDC is already running.
  358. */
  359. static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
  360. struct omap3isp_ccdc_update_config *config)
  361. {
  362. struct isp_device *isp = to_isp_device(ccdc);
  363. struct ispccdc_lsc_config_req *req;
  364. unsigned long flags;
  365. void *table;
  366. u16 update;
  367. int ret;
  368. update = config->update &
  369. (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
  370. if (!update)
  371. return 0;
  372. if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
  373. dev_dbg(to_device(ccdc), "%s: Both LSC configuration and table "
  374. "need to be supplied\n", __func__);
  375. return -EINVAL;
  376. }
  377. req = kzalloc(sizeof(*req), GFP_KERNEL);
  378. if (req == NULL)
  379. return -ENOMEM;
  380. if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
  381. if (copy_from_user(&req->config, config->lsc_cfg,
  382. sizeof(req->config))) {
  383. ret = -EFAULT;
  384. goto done;
  385. }
  386. req->enable = 1;
  387. req->table = omap_iommu_vmalloc(isp->domain, isp->dev, 0,
  388. req->config.size, IOMMU_FLAG);
  389. if (IS_ERR_VALUE(req->table)) {
  390. req->table = 0;
  391. ret = -ENOMEM;
  392. goto done;
  393. }
  394. req->iovm = omap_find_iovm_area(isp->dev, req->table);
  395. if (req->iovm == NULL) {
  396. ret = -ENOMEM;
  397. goto done;
  398. }
  399. if (!dma_map_sg(isp->dev, req->iovm->sgt->sgl,
  400. req->iovm->sgt->nents, DMA_TO_DEVICE)) {
  401. ret = -ENOMEM;
  402. req->iovm = NULL;
  403. goto done;
  404. }
  405. dma_sync_sg_for_cpu(isp->dev, req->iovm->sgt->sgl,
  406. req->iovm->sgt->nents, DMA_TO_DEVICE);
  407. table = omap_da_to_va(isp->dev, req->table);
  408. if (copy_from_user(table, config->lsc, req->config.size)) {
  409. ret = -EFAULT;
  410. goto done;
  411. }
  412. dma_sync_sg_for_device(isp->dev, req->iovm->sgt->sgl,
  413. req->iovm->sgt->nents, DMA_TO_DEVICE);
  414. }
  415. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  416. if (ccdc->lsc.request) {
  417. list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
  418. schedule_work(&ccdc->lsc.table_work);
  419. }
  420. ccdc->lsc.request = req;
  421. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  422. ret = 0;
  423. done:
  424. if (ret < 0)
  425. ccdc_lsc_free_request(ccdc, req);
  426. return ret;
  427. }
  428. static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
  429. {
  430. unsigned long flags;
  431. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  432. if (ccdc->lsc.active) {
  433. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  434. return 1;
  435. }
  436. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  437. return 0;
  438. }
  439. static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
  440. {
  441. struct ispccdc_lsc *lsc = &ccdc->lsc;
  442. if (lsc->state != LSC_STATE_STOPPED)
  443. return -EINVAL;
  444. if (lsc->active) {
  445. list_add_tail(&lsc->active->list, &lsc->free_queue);
  446. lsc->active = NULL;
  447. }
  448. if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
  449. omap3isp_sbl_disable(to_isp_device(ccdc),
  450. OMAP3_ISP_SBL_CCDC_LSC_READ);
  451. list_add_tail(&lsc->request->list, &lsc->free_queue);
  452. lsc->request = NULL;
  453. goto done;
  454. }
  455. lsc->active = lsc->request;
  456. lsc->request = NULL;
  457. __ccdc_lsc_enable(ccdc, 1);
  458. done:
  459. if (!list_empty(&lsc->free_queue))
  460. schedule_work(&lsc->table_work);
  461. return 0;
  462. }
  463. /* -----------------------------------------------------------------------------
  464. * Parameters configuration
  465. */
  466. /*
  467. * ccdc_configure_clamp - Configure optical-black or digital clamping
  468. * @ccdc: Pointer to ISP CCDC device.
  469. *
  470. * The CCDC performs either optical-black or digital clamp. Configure and enable
  471. * the selected clamp method.
  472. */
  473. static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
  474. {
  475. struct isp_device *isp = to_isp_device(ccdc);
  476. u32 clamp;
  477. if (ccdc->obclamp) {
  478. clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
  479. clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
  480. clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
  481. clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
  482. isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
  483. } else {
  484. isp_reg_writel(isp, ccdc->clamp.dcsubval,
  485. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
  486. }
  487. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
  488. ISPCCDC_CLAMP_CLAMPEN,
  489. ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
  490. }
  491. /*
  492. * ccdc_configure_fpc - Configure Faulty Pixel Correction
  493. * @ccdc: Pointer to ISP CCDC device.
  494. */
  495. static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
  496. {
  497. struct isp_device *isp = to_isp_device(ccdc);
  498. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
  499. if (!ccdc->fpc_en)
  500. return;
  501. isp_reg_writel(isp, ccdc->fpc.fpcaddr, OMAP3_ISP_IOMEM_CCDC,
  502. ISPCCDC_FPC_ADDR);
  503. /* The FPNUM field must be set before enabling FPC. */
  504. isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
  505. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
  506. isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
  507. ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
  508. }
  509. /*
  510. * ccdc_configure_black_comp - Configure Black Level Compensation.
  511. * @ccdc: Pointer to ISP CCDC device.
  512. */
  513. static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
  514. {
  515. struct isp_device *isp = to_isp_device(ccdc);
  516. u32 blcomp;
  517. blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
  518. blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
  519. blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
  520. blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
  521. isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
  522. }
  523. /*
  524. * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
  525. * @ccdc: Pointer to ISP CCDC device.
  526. */
  527. static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
  528. {
  529. struct isp_device *isp = to_isp_device(ccdc);
  530. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
  531. ISPCCDC_SYN_MODE_LPF,
  532. ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
  533. }
  534. /*
  535. * ccdc_configure_alaw - Configure A-law compression.
  536. * @ccdc: Pointer to ISP CCDC device.
  537. */
  538. static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
  539. {
  540. struct isp_device *isp = to_isp_device(ccdc);
  541. const struct isp_format_info *info;
  542. u32 alaw = 0;
  543. info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
  544. switch (info->width) {
  545. case 8:
  546. return;
  547. case 10:
  548. alaw = ISPCCDC_ALAW_GWDI_9_0;
  549. break;
  550. case 11:
  551. alaw = ISPCCDC_ALAW_GWDI_10_1;
  552. break;
  553. case 12:
  554. alaw = ISPCCDC_ALAW_GWDI_11_2;
  555. break;
  556. case 13:
  557. alaw = ISPCCDC_ALAW_GWDI_12_3;
  558. break;
  559. }
  560. if (ccdc->alaw)
  561. alaw |= ISPCCDC_ALAW_CCDTBL;
  562. isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
  563. }
  564. /*
  565. * ccdc_config_imgattr - Configure sensor image specific attributes.
  566. * @ccdc: Pointer to ISP CCDC device.
  567. * @colptn: Color pattern of the sensor.
  568. */
  569. static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
  570. {
  571. struct isp_device *isp = to_isp_device(ccdc);
  572. isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
  573. }
  574. /*
  575. * ccdc_config - Set CCDC configuration from userspace
  576. * @ccdc: Pointer to ISP CCDC device.
  577. * @userspace_add: Structure containing CCDC configuration sent from userspace.
  578. *
  579. * Returns 0 if successful, -EINVAL if the pointer to the configuration
  580. * structure is null, or the copy_from_user function fails to copy user space
  581. * memory to kernel space memory.
  582. */
  583. static int ccdc_config(struct isp_ccdc_device *ccdc,
  584. struct omap3isp_ccdc_update_config *ccdc_struct)
  585. {
  586. struct isp_device *isp = to_isp_device(ccdc);
  587. unsigned long flags;
  588. spin_lock_irqsave(&ccdc->lock, flags);
  589. ccdc->shadow_update = 1;
  590. spin_unlock_irqrestore(&ccdc->lock, flags);
  591. if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
  592. ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
  593. ccdc->update |= OMAP3ISP_CCDC_ALAW;
  594. }
  595. if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
  596. ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
  597. ccdc->update |= OMAP3ISP_CCDC_LPF;
  598. }
  599. if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
  600. if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
  601. sizeof(ccdc->clamp))) {
  602. ccdc->shadow_update = 0;
  603. return -EFAULT;
  604. }
  605. ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
  606. ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
  607. }
  608. if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
  609. if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
  610. sizeof(ccdc->blcomp))) {
  611. ccdc->shadow_update = 0;
  612. return -EFAULT;
  613. }
  614. ccdc->update |= OMAP3ISP_CCDC_BCOMP;
  615. }
  616. ccdc->shadow_update = 0;
  617. if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
  618. u32 table_old = 0;
  619. u32 table_new;
  620. u32 size;
  621. if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
  622. return -EBUSY;
  623. ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
  624. if (ccdc->fpc_en) {
  625. if (copy_from_user(&ccdc->fpc, ccdc_struct->fpc,
  626. sizeof(ccdc->fpc)))
  627. return -EFAULT;
  628. /*
  629. * table_new must be 64-bytes aligned, but it's
  630. * already done by omap_iommu_vmalloc().
  631. */
  632. size = ccdc->fpc.fpnum * 4;
  633. table_new = omap_iommu_vmalloc(isp->domain, isp->dev,
  634. 0, size, IOMMU_FLAG);
  635. if (IS_ERR_VALUE(table_new))
  636. return -ENOMEM;
  637. if (copy_from_user(omap_da_to_va(isp->dev, table_new),
  638. (__force void __user *)
  639. ccdc->fpc.fpcaddr, size)) {
  640. omap_iommu_vfree(isp->domain, isp->dev,
  641. table_new);
  642. return -EFAULT;
  643. }
  644. table_old = ccdc->fpc.fpcaddr;
  645. ccdc->fpc.fpcaddr = table_new;
  646. }
  647. ccdc_configure_fpc(ccdc);
  648. if (table_old != 0)
  649. omap_iommu_vfree(isp->domain, isp->dev, table_old);
  650. }
  651. return ccdc_lsc_config(ccdc, ccdc_struct);
  652. }
  653. static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
  654. {
  655. if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
  656. ccdc_configure_alaw(ccdc);
  657. ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
  658. }
  659. if (ccdc->update & OMAP3ISP_CCDC_LPF) {
  660. ccdc_configure_lpf(ccdc);
  661. ccdc->update &= ~OMAP3ISP_CCDC_LPF;
  662. }
  663. if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
  664. ccdc_configure_clamp(ccdc);
  665. ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
  666. }
  667. if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
  668. ccdc_configure_black_comp(ccdc);
  669. ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
  670. }
  671. }
  672. /*
  673. * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
  674. * @dev: Pointer to ISP device
  675. */
  676. void omap3isp_ccdc_restore_context(struct isp_device *isp)
  677. {
  678. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  679. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
  680. ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
  681. | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
  682. ccdc_apply_controls(ccdc);
  683. ccdc_configure_fpc(ccdc);
  684. }
  685. /* -----------------------------------------------------------------------------
  686. * Format- and pipeline-related configuration helpers
  687. */
  688. /*
  689. * ccdc_config_vp - Configure the Video Port.
  690. * @ccdc: Pointer to ISP CCDC device.
  691. */
  692. static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
  693. {
  694. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  695. struct isp_device *isp = to_isp_device(ccdc);
  696. const struct isp_format_info *info;
  697. unsigned long l3_ick = pipe->l3_ick;
  698. unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
  699. unsigned int div = 0;
  700. u32 fmtcfg_vp;
  701. fmtcfg_vp = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG)
  702. & ~(ISPCCDC_FMTCFG_VPIN_MASK | ISPCCDC_FMTCFG_VPIF_FRQ_MASK);
  703. info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
  704. switch (info->width) {
  705. case 8:
  706. case 10:
  707. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_9_0;
  708. break;
  709. case 11:
  710. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_10_1;
  711. break;
  712. case 12:
  713. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_11_2;
  714. break;
  715. case 13:
  716. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_12_3;
  717. break;
  718. }
  719. if (pipe->input)
  720. div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
  721. else if (pipe->external_rate)
  722. div = l3_ick / pipe->external_rate;
  723. div = clamp(div, 2U, max_div);
  724. fmtcfg_vp |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
  725. isp_reg_writel(isp, fmtcfg_vp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
  726. }
  727. /*
  728. * ccdc_enable_vp - Enable Video Port.
  729. * @ccdc: Pointer to ISP CCDC device.
  730. * @enable: 0 Disables VP, 1 Enables VP
  731. *
  732. * This is needed for outputting image to Preview, H3A and HIST ISP submodules.
  733. */
  734. static void ccdc_enable_vp(struct isp_ccdc_device *ccdc, u8 enable)
  735. {
  736. struct isp_device *isp = to_isp_device(ccdc);
  737. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG,
  738. ISPCCDC_FMTCFG_VPEN, enable ? ISPCCDC_FMTCFG_VPEN : 0);
  739. }
  740. /*
  741. * ccdc_config_outlineoffset - Configure memory saving output line offset
  742. * @ccdc: Pointer to ISP CCDC device.
  743. * @offset: Address offset to start a new line. Must be twice the
  744. * Output width and aligned on 32 byte boundary
  745. * @oddeven: Specifies the odd/even line pattern to be chosen to store the
  746. * output.
  747. * @numlines: Set the value 0-3 for +1-4lines, 4-7 for -1-4lines.
  748. *
  749. * - Configures the output line offset when stored in memory
  750. * - Sets the odd/even line pattern to store the output
  751. * (EVENEVEN (1), ODDEVEN (2), EVENODD (3), ODDODD (4))
  752. * - Configures the number of even and odd line fields in case of rearranging
  753. * the lines.
  754. */
  755. static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
  756. u32 offset, u8 oddeven, u8 numlines)
  757. {
  758. struct isp_device *isp = to_isp_device(ccdc);
  759. isp_reg_writel(isp, offset & 0xffff,
  760. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HSIZE_OFF);
  761. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  762. ISPCCDC_SDOFST_FINV);
  763. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  764. ISPCCDC_SDOFST_FOFST_4L);
  765. switch (oddeven) {
  766. case EVENEVEN:
  767. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  768. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST0_SHIFT);
  769. break;
  770. case ODDEVEN:
  771. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  772. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST1_SHIFT);
  773. break;
  774. case EVENODD:
  775. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  776. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST2_SHIFT);
  777. break;
  778. case ODDODD:
  779. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  780. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST3_SHIFT);
  781. break;
  782. default:
  783. break;
  784. }
  785. }
  786. /*
  787. * ccdc_set_outaddr - Set memory address to save output image
  788. * @ccdc: Pointer to ISP CCDC device.
  789. * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
  790. *
  791. * Sets the memory address where the output will be saved.
  792. */
  793. static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
  794. {
  795. struct isp_device *isp = to_isp_device(ccdc);
  796. isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
  797. }
  798. /*
  799. * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
  800. * @ccdc: Pointer to ISP CCDC device.
  801. * @max_rate: Maximum calculated data rate.
  802. *
  803. * Returns in *max_rate less value between calculated and passed
  804. */
  805. void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
  806. unsigned int *max_rate)
  807. {
  808. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  809. unsigned int rate;
  810. if (pipe == NULL)
  811. return;
  812. /*
  813. * TRM says that for parallel sensors the maximum data rate
  814. * should be 90% form L3/2 clock, otherwise just L3/2.
  815. */
  816. if (ccdc->input == CCDC_INPUT_PARALLEL)
  817. rate = pipe->l3_ick / 2 * 9 / 10;
  818. else
  819. rate = pipe->l3_ick / 2;
  820. *max_rate = min(*max_rate, rate);
  821. }
  822. /*
  823. * ccdc_config_sync_if - Set CCDC sync interface configuration
  824. * @ccdc: Pointer to ISP CCDC device.
  825. * @pdata: Parallel interface platform data (may be NULL)
  826. * @data_size: Data size
  827. */
  828. static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
  829. struct isp_parallel_platform_data *pdata,
  830. unsigned int data_size)
  831. {
  832. struct isp_device *isp = to_isp_device(ccdc);
  833. const struct v4l2_mbus_framefmt *format;
  834. u32 syn_mode = ISPCCDC_SYN_MODE_VDHDEN;
  835. format = &ccdc->formats[CCDC_PAD_SINK];
  836. if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
  837. format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
  838. /* The bridge is enabled for YUV8 formats. Configure the input
  839. * mode accordingly.
  840. */
  841. syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16;
  842. }
  843. switch (data_size) {
  844. case 8:
  845. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
  846. break;
  847. case 10:
  848. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
  849. break;
  850. case 11:
  851. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
  852. break;
  853. case 12:
  854. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
  855. break;
  856. }
  857. if (pdata && pdata->data_pol)
  858. syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
  859. if (pdata && pdata->hs_pol)
  860. syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
  861. if (pdata && pdata->vs_pol)
  862. syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
  863. isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  864. /* The CCDC_CFG.Y8POS bit is used in YCbCr8 input mode only. The
  865. * hardware seems to ignore it in all other input modes.
  866. */
  867. if (format->code == V4L2_MBUS_FMT_UYVY8_2X8)
  868. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  869. ISPCCDC_CFG_Y8POS);
  870. else
  871. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  872. ISPCCDC_CFG_Y8POS);
  873. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
  874. ISPCCDC_REC656IF_R656ON);
  875. }
  876. /* CCDC formats descriptions */
  877. static const u32 ccdc_sgrbg_pattern =
  878. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  879. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  880. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  881. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  882. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  883. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  884. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  885. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  886. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  887. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  888. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  889. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  890. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  891. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  892. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  893. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  894. static const u32 ccdc_srggb_pattern =
  895. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  896. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  897. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  898. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  899. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  900. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  901. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  902. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  903. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  904. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  905. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  906. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  907. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  908. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  909. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  910. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  911. static const u32 ccdc_sbggr_pattern =
  912. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  913. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  914. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  915. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  916. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  917. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  918. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  919. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  920. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  921. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  922. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  923. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  924. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  925. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  926. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  927. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  928. static const u32 ccdc_sgbrg_pattern =
  929. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  930. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  931. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  932. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  933. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  934. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  935. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  936. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  937. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  938. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  939. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  940. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  941. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  942. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  943. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  944. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  945. static void ccdc_configure(struct isp_ccdc_device *ccdc)
  946. {
  947. struct isp_device *isp = to_isp_device(ccdc);
  948. struct isp_parallel_platform_data *pdata = NULL;
  949. struct v4l2_subdev *sensor;
  950. struct v4l2_mbus_framefmt *format;
  951. const struct v4l2_rect *crop;
  952. const struct isp_format_info *fmt_info;
  953. struct v4l2_subdev_format fmt_src;
  954. unsigned int depth_out;
  955. unsigned int depth_in = 0;
  956. struct media_pad *pad;
  957. unsigned long flags;
  958. unsigned int bridge;
  959. unsigned int shift;
  960. u32 syn_mode;
  961. u32 ccdc_pattern;
  962. pad = media_entity_remote_source(&ccdc->pads[CCDC_PAD_SINK]);
  963. sensor = media_entity_to_v4l2_subdev(pad->entity);
  964. if (ccdc->input == CCDC_INPUT_PARALLEL)
  965. pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv)
  966. ->bus.parallel;
  967. /* Compute the lane shifter shift value and enable the bridge when the
  968. * input format is YUV.
  969. */
  970. fmt_src.pad = pad->index;
  971. fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  972. if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
  973. fmt_info = omap3isp_video_format_info(fmt_src.format.code);
  974. depth_in = fmt_info->width;
  975. }
  976. fmt_info = omap3isp_video_format_info
  977. (isp->isp_ccdc.formats[CCDC_PAD_SINK].code);
  978. depth_out = fmt_info->width;
  979. shift = depth_in - depth_out;
  980. if (fmt_info->code == V4L2_MBUS_FMT_YUYV8_2X8)
  981. bridge = ISPCTRL_PAR_BRIDGE_LENDIAN;
  982. else if (fmt_info->code == V4L2_MBUS_FMT_UYVY8_2X8)
  983. bridge = ISPCTRL_PAR_BRIDGE_BENDIAN;
  984. else
  985. bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
  986. omap3isp_configure_bridge(isp, ccdc->input, pdata, shift, bridge);
  987. ccdc_config_sync_if(ccdc, pdata, depth_out);
  988. syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  989. /* Use the raw, unprocessed data when writing to memory. The H3A and
  990. * histogram modules are still fed with lens shading corrected data.
  991. */
  992. syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
  993. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  994. syn_mode |= ISPCCDC_SYN_MODE_WEN;
  995. else
  996. syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
  997. if (ccdc->output & CCDC_OUTPUT_RESIZER)
  998. syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
  999. else
  1000. syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
  1001. /* CCDC_PAD_SINK */
  1002. format = &ccdc->formats[CCDC_PAD_SINK];
  1003. /* Mosaic filter */
  1004. switch (format->code) {
  1005. case V4L2_MBUS_FMT_SRGGB10_1X10:
  1006. case V4L2_MBUS_FMT_SRGGB12_1X12:
  1007. ccdc_pattern = ccdc_srggb_pattern;
  1008. break;
  1009. case V4L2_MBUS_FMT_SBGGR10_1X10:
  1010. case V4L2_MBUS_FMT_SBGGR12_1X12:
  1011. ccdc_pattern = ccdc_sbggr_pattern;
  1012. break;
  1013. case V4L2_MBUS_FMT_SGBRG10_1X10:
  1014. case V4L2_MBUS_FMT_SGBRG12_1X12:
  1015. ccdc_pattern = ccdc_sgbrg_pattern;
  1016. break;
  1017. default:
  1018. /* Use GRBG */
  1019. ccdc_pattern = ccdc_sgrbg_pattern;
  1020. break;
  1021. }
  1022. ccdc_config_imgattr(ccdc, ccdc_pattern);
  1023. /* Generate VD0 on the last line of the image and VD1 on the
  1024. * 2/3 height line.
  1025. */
  1026. isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
  1027. ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
  1028. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
  1029. /* CCDC_PAD_SOURCE_OF */
  1030. format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
  1031. crop = &ccdc->crop;
  1032. isp_reg_writel(isp, (crop->left << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
  1033. ((crop->width - 1) << ISPCCDC_HORZ_INFO_NPH_SHIFT),
  1034. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
  1035. isp_reg_writel(isp, crop->top << ISPCCDC_VERT_START_SLV0_SHIFT,
  1036. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
  1037. isp_reg_writel(isp, (crop->height - 1)
  1038. << ISPCCDC_VERT_LINES_NLV_SHIFT,
  1039. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
  1040. ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value, 0, 0);
  1041. /* The CCDC outputs data in UYVY order by default. Swap bytes to get
  1042. * YUYV.
  1043. */
  1044. if (format->code == V4L2_MBUS_FMT_YUYV8_1X16)
  1045. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  1046. ISPCCDC_CFG_BSWD);
  1047. else
  1048. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  1049. ISPCCDC_CFG_BSWD);
  1050. /* Use PACK8 mode for 1byte per pixel formats. */
  1051. if (omap3isp_video_format_info(format->code)->width <= 8)
  1052. syn_mode |= ISPCCDC_SYN_MODE_PACK8;
  1053. else
  1054. syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
  1055. isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  1056. /* CCDC_PAD_SOURCE_VP */
  1057. format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
  1058. isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
  1059. (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
  1060. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
  1061. isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
  1062. ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
  1063. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
  1064. isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
  1065. (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
  1066. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
  1067. /* Lens shading correction. */
  1068. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1069. if (ccdc->lsc.request == NULL)
  1070. goto unlock;
  1071. WARN_ON(ccdc->lsc.active);
  1072. /* Get last good LSC configuration. If it is not supported for
  1073. * the current active resolution discard it.
  1074. */
  1075. if (ccdc->lsc.active == NULL &&
  1076. __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
  1077. ccdc->lsc.active = ccdc->lsc.request;
  1078. } else {
  1079. list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
  1080. schedule_work(&ccdc->lsc.table_work);
  1081. }
  1082. ccdc->lsc.request = NULL;
  1083. unlock:
  1084. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1085. ccdc_apply_controls(ccdc);
  1086. }
  1087. static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
  1088. {
  1089. struct isp_device *isp = to_isp_device(ccdc);
  1090. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
  1091. ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
  1092. }
  1093. static int ccdc_disable(struct isp_ccdc_device *ccdc)
  1094. {
  1095. unsigned long flags;
  1096. int ret = 0;
  1097. spin_lock_irqsave(&ccdc->lock, flags);
  1098. if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
  1099. ccdc->stopping = CCDC_STOP_REQUEST;
  1100. spin_unlock_irqrestore(&ccdc->lock, flags);
  1101. ret = wait_event_timeout(ccdc->wait,
  1102. ccdc->stopping == CCDC_STOP_FINISHED,
  1103. msecs_to_jiffies(2000));
  1104. if (ret == 0) {
  1105. ret = -ETIMEDOUT;
  1106. dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
  1107. }
  1108. omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
  1109. mutex_lock(&ccdc->ioctl_lock);
  1110. ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
  1111. ccdc->lsc.request = ccdc->lsc.active;
  1112. ccdc->lsc.active = NULL;
  1113. cancel_work_sync(&ccdc->lsc.table_work);
  1114. ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
  1115. mutex_unlock(&ccdc->ioctl_lock);
  1116. ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
  1117. return ret > 0 ? 0 : ret;
  1118. }
  1119. static void ccdc_enable(struct isp_ccdc_device *ccdc)
  1120. {
  1121. if (ccdc_lsc_is_configured(ccdc))
  1122. __ccdc_lsc_enable(ccdc, 1);
  1123. __ccdc_enable(ccdc, 1);
  1124. }
  1125. /* -----------------------------------------------------------------------------
  1126. * Interrupt handling
  1127. */
  1128. /*
  1129. * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
  1130. * @ccdc: Pointer to ISP CCDC device.
  1131. *
  1132. * Returns zero if the CCDC is idle and the image has been written to
  1133. * memory, too.
  1134. */
  1135. static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
  1136. {
  1137. struct isp_device *isp = to_isp_device(ccdc);
  1138. return omap3isp_ccdc_busy(ccdc)
  1139. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
  1140. ISPSBL_CCDC_WR_0_DATA_READY)
  1141. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
  1142. ISPSBL_CCDC_WR_0_DATA_READY)
  1143. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
  1144. ISPSBL_CCDC_WR_0_DATA_READY)
  1145. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
  1146. ISPSBL_CCDC_WR_0_DATA_READY);
  1147. }
  1148. /*
  1149. * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
  1150. * @ccdc: Pointer to ISP CCDC device.
  1151. * @max_wait: Max retry count in us for wait for idle/busy transition.
  1152. */
  1153. static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
  1154. unsigned int max_wait)
  1155. {
  1156. unsigned int wait = 0;
  1157. if (max_wait == 0)
  1158. max_wait = 10000; /* 10 ms */
  1159. for (wait = 0; wait <= max_wait; wait++) {
  1160. if (!ccdc_sbl_busy(ccdc))
  1161. return 0;
  1162. rmb();
  1163. udelay(1);
  1164. }
  1165. return -EBUSY;
  1166. }
  1167. /* __ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
  1168. * @ccdc: Pointer to ISP CCDC device.
  1169. * @event: Pointing which event trigger handler
  1170. *
  1171. * Return 1 when the event and stopping request combination is satisfied,
  1172. * zero otherwise.
  1173. */
  1174. static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
  1175. {
  1176. int rval = 0;
  1177. switch ((ccdc->stopping & 3) | event) {
  1178. case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
  1179. if (ccdc->lsc.state != LSC_STATE_STOPPED)
  1180. __ccdc_lsc_enable(ccdc, 0);
  1181. __ccdc_enable(ccdc, 0);
  1182. ccdc->stopping = CCDC_STOP_EXECUTED;
  1183. return 1;
  1184. case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
  1185. ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
  1186. if (ccdc->lsc.state == LSC_STATE_STOPPED)
  1187. ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
  1188. rval = 1;
  1189. break;
  1190. case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
  1191. ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
  1192. rval = 1;
  1193. break;
  1194. case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
  1195. return 1;
  1196. }
  1197. if (ccdc->stopping == CCDC_STOP_FINISHED) {
  1198. wake_up(&ccdc->wait);
  1199. rval = 1;
  1200. }
  1201. return rval;
  1202. }
  1203. static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
  1204. {
  1205. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  1206. struct video_device *vdev = ccdc->subdev.devnode;
  1207. struct v4l2_event event;
  1208. /* Frame number propagation */
  1209. atomic_inc(&pipe->frame_number);
  1210. memset(&event, 0, sizeof(event));
  1211. event.type = V4L2_EVENT_FRAME_SYNC;
  1212. event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number);
  1213. v4l2_event_queue(vdev, &event);
  1214. }
  1215. /*
  1216. * ccdc_lsc_isr - Handle LSC events
  1217. * @ccdc: Pointer to ISP CCDC device.
  1218. * @events: LSC events
  1219. */
  1220. static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
  1221. {
  1222. unsigned long flags;
  1223. if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
  1224. struct isp_pipeline *pipe =
  1225. to_isp_pipeline(&ccdc->subdev.entity);
  1226. ccdc_lsc_error_handler(ccdc);
  1227. pipe->error = true;
  1228. dev_dbg(to_device(ccdc), "lsc prefetch error\n");
  1229. }
  1230. if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
  1231. return;
  1232. /* LSC_DONE interrupt occur, there are two cases
  1233. * 1. stopping for reconfiguration
  1234. * 2. stopping because of STREAM OFF command
  1235. */
  1236. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1237. if (ccdc->lsc.state == LSC_STATE_STOPPING)
  1238. ccdc->lsc.state = LSC_STATE_STOPPED;
  1239. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
  1240. goto done;
  1241. if (ccdc->lsc.state != LSC_STATE_RECONFIG)
  1242. goto done;
  1243. /* LSC is in STOPPING state, change to the new state */
  1244. ccdc->lsc.state = LSC_STATE_STOPPED;
  1245. /* This is an exception. Start of frame and LSC_DONE interrupt
  1246. * have been received on the same time. Skip this event and wait
  1247. * for better times.
  1248. */
  1249. if (events & IRQ0STATUS_HS_VS_IRQ)
  1250. goto done;
  1251. /* The LSC engine is stopped at this point. Enable it if there's a
  1252. * pending request.
  1253. */
  1254. if (ccdc->lsc.request == NULL)
  1255. goto done;
  1256. ccdc_lsc_enable(ccdc);
  1257. done:
  1258. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1259. }
  1260. static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
  1261. {
  1262. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  1263. struct isp_device *isp = to_isp_device(ccdc);
  1264. struct isp_buffer *buffer;
  1265. int restart = 0;
  1266. /* The CCDC generates VD0 interrupts even when disabled (the datasheet
  1267. * doesn't explicitly state if that's supposed to happen or not, so it
  1268. * can be considered as a hardware bug or as a feature, but we have to
  1269. * deal with it anyway). Disabling the CCDC when no buffer is available
  1270. * would thus not be enough, we need to handle the situation explicitly.
  1271. */
  1272. if (list_empty(&ccdc->video_out.dmaqueue))
  1273. goto done;
  1274. /* We're in continuous mode, and memory writes were disabled due to a
  1275. * buffer underrun. Reenable them now that we have a buffer. The buffer
  1276. * address has been set in ccdc_video_queue.
  1277. */
  1278. if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
  1279. restart = 1;
  1280. ccdc->underrun = 0;
  1281. goto done;
  1282. }
  1283. if (ccdc_sbl_wait_idle(ccdc, 1000)) {
  1284. dev_info(isp->dev, "CCDC won't become idle!\n");
  1285. goto done;
  1286. }
  1287. buffer = omap3isp_video_buffer_next(&ccdc->video_out);
  1288. if (buffer != NULL) {
  1289. ccdc_set_outaddr(ccdc, buffer->isp_addr);
  1290. restart = 1;
  1291. }
  1292. pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
  1293. if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
  1294. isp_pipeline_ready(pipe))
  1295. omap3isp_pipeline_set_stream(pipe,
  1296. ISP_PIPELINE_STREAM_SINGLESHOT);
  1297. done:
  1298. return restart;
  1299. }
  1300. /*
  1301. * ccdc_vd0_isr - Handle VD0 event
  1302. * @ccdc: Pointer to ISP CCDC device.
  1303. *
  1304. * Executes LSC deferred enablement before next frame starts.
  1305. */
  1306. static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
  1307. {
  1308. unsigned long flags;
  1309. int restart = 0;
  1310. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1311. restart = ccdc_isr_buffer(ccdc);
  1312. spin_lock_irqsave(&ccdc->lock, flags);
  1313. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
  1314. spin_unlock_irqrestore(&ccdc->lock, flags);
  1315. return;
  1316. }
  1317. if (!ccdc->shadow_update)
  1318. ccdc_apply_controls(ccdc);
  1319. spin_unlock_irqrestore(&ccdc->lock, flags);
  1320. if (restart)
  1321. ccdc_enable(ccdc);
  1322. }
  1323. /*
  1324. * ccdc_vd1_isr - Handle VD1 event
  1325. * @ccdc: Pointer to ISP CCDC device.
  1326. */
  1327. static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
  1328. {
  1329. unsigned long flags;
  1330. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1331. /*
  1332. * Depending on the CCDC pipeline state, CCDC stopping should be
  1333. * handled differently. In SINGLESHOT we emulate an internal CCDC
  1334. * stopping because the CCDC hw works only in continuous mode.
  1335. * When CONTINUOUS pipeline state is used and the CCDC writes it's
  1336. * data to memory the CCDC and LSC are stopped immediately but
  1337. * without change the CCDC stopping state machine. The CCDC
  1338. * stopping state machine should be used only when user request
  1339. * for stopping is received (SINGLESHOT is an exeption).
  1340. */
  1341. switch (ccdc->state) {
  1342. case ISP_PIPELINE_STREAM_SINGLESHOT:
  1343. ccdc->stopping = CCDC_STOP_REQUEST;
  1344. break;
  1345. case ISP_PIPELINE_STREAM_CONTINUOUS:
  1346. if (ccdc->output & CCDC_OUTPUT_MEMORY) {
  1347. if (ccdc->lsc.state != LSC_STATE_STOPPED)
  1348. __ccdc_lsc_enable(ccdc, 0);
  1349. __ccdc_enable(ccdc, 0);
  1350. }
  1351. break;
  1352. case ISP_PIPELINE_STREAM_STOPPED:
  1353. break;
  1354. }
  1355. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
  1356. goto done;
  1357. if (ccdc->lsc.request == NULL)
  1358. goto done;
  1359. /*
  1360. * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
  1361. * do the appropriate changes in registers
  1362. */
  1363. if (ccdc->lsc.state == LSC_STATE_RUNNING) {
  1364. __ccdc_lsc_enable(ccdc, 0);
  1365. ccdc->lsc.state = LSC_STATE_RECONFIG;
  1366. goto done;
  1367. }
  1368. /* LSC has been in STOPPED state, enable it */
  1369. if (ccdc->lsc.state == LSC_STATE_STOPPED)
  1370. ccdc_lsc_enable(ccdc);
  1371. done:
  1372. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1373. }
  1374. /*
  1375. * omap3isp_ccdc_isr - Configure CCDC during interframe time.
  1376. * @ccdc: Pointer to ISP CCDC device.
  1377. * @events: CCDC events
  1378. */
  1379. int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
  1380. {
  1381. if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
  1382. return 0;
  1383. if (events & IRQ0STATUS_CCDC_VD1_IRQ)
  1384. ccdc_vd1_isr(ccdc);
  1385. ccdc_lsc_isr(ccdc, events);
  1386. if (events & IRQ0STATUS_CCDC_VD0_IRQ)
  1387. ccdc_vd0_isr(ccdc);
  1388. if (events & IRQ0STATUS_HS_VS_IRQ)
  1389. ccdc_hs_vs_isr(ccdc);
  1390. return 0;
  1391. }
  1392. /* -----------------------------------------------------------------------------
  1393. * ISP video operations
  1394. */
  1395. static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
  1396. {
  1397. struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
  1398. if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
  1399. return -ENODEV;
  1400. ccdc_set_outaddr(ccdc, buffer->isp_addr);
  1401. /* We now have a buffer queued on the output, restart the pipeline
  1402. * on the next CCDC interrupt if running in continuous mode (or when
  1403. * starting the stream).
  1404. */
  1405. ccdc->underrun = 1;
  1406. return 0;
  1407. }
  1408. static const struct isp_video_operations ccdc_video_ops = {
  1409. .queue = ccdc_video_queue,
  1410. };
  1411. /* -----------------------------------------------------------------------------
  1412. * V4L2 subdev operations
  1413. */
  1414. /*
  1415. * ccdc_ioctl - CCDC module private ioctl's
  1416. * @sd: ISP CCDC V4L2 subdevice
  1417. * @cmd: ioctl command
  1418. * @arg: ioctl argument
  1419. *
  1420. * Return 0 on success or a negative error code otherwise.
  1421. */
  1422. static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
  1423. {
  1424. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1425. int ret;
  1426. switch (cmd) {
  1427. case VIDIOC_OMAP3ISP_CCDC_CFG:
  1428. mutex_lock(&ccdc->ioctl_lock);
  1429. ret = ccdc_config(ccdc, arg);
  1430. mutex_unlock(&ccdc->ioctl_lock);
  1431. break;
  1432. default:
  1433. return -ENOIOCTLCMD;
  1434. }
  1435. return ret;
  1436. }
  1437. static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
  1438. struct v4l2_event_subscription *sub)
  1439. {
  1440. if (sub->type != V4L2_EVENT_FRAME_SYNC)
  1441. return -EINVAL;
  1442. /* line number is zero at frame start */
  1443. if (sub->id != 0)
  1444. return -EINVAL;
  1445. return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS, NULL);
  1446. }
  1447. static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
  1448. struct v4l2_event_subscription *sub)
  1449. {
  1450. return v4l2_event_unsubscribe(fh, sub);
  1451. }
  1452. /*
  1453. * ccdc_set_stream - Enable/Disable streaming on the CCDC module
  1454. * @sd: ISP CCDC V4L2 subdevice
  1455. * @enable: Enable/disable stream
  1456. *
  1457. * When writing to memory, the CCDC hardware can't be enabled without a memory
  1458. * buffer to write to. As the s_stream operation is called in response to a
  1459. * STREAMON call without any buffer queued yet, just update the enabled field
  1460. * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
  1461. *
  1462. * When not writing to memory enable the CCDC immediately.
  1463. */
  1464. static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
  1465. {
  1466. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1467. struct isp_device *isp = to_isp_device(ccdc);
  1468. int ret = 0;
  1469. if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
  1470. if (enable == ISP_PIPELINE_STREAM_STOPPED)
  1471. return 0;
  1472. omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
  1473. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  1474. ISPCCDC_CFG_VDLC);
  1475. ccdc_configure(ccdc);
  1476. /* TODO: Don't configure the video port if all of its output
  1477. * links are inactive.
  1478. */
  1479. ccdc_config_vp(ccdc);
  1480. ccdc_enable_vp(ccdc, 1);
  1481. ccdc_print_status(ccdc);
  1482. }
  1483. switch (enable) {
  1484. case ISP_PIPELINE_STREAM_CONTINUOUS:
  1485. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1486. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1487. if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
  1488. ccdc_enable(ccdc);
  1489. ccdc->underrun = 0;
  1490. break;
  1491. case ISP_PIPELINE_STREAM_SINGLESHOT:
  1492. if (ccdc->output & CCDC_OUTPUT_MEMORY &&
  1493. ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
  1494. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1495. ccdc_enable(ccdc);
  1496. break;
  1497. case ISP_PIPELINE_STREAM_STOPPED:
  1498. ret = ccdc_disable(ccdc);
  1499. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1500. omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1501. omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
  1502. ccdc->underrun = 0;
  1503. break;
  1504. }
  1505. ccdc->state = enable;
  1506. return ret;
  1507. }
  1508. static struct v4l2_mbus_framefmt *
  1509. __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  1510. unsigned int pad, enum v4l2_subdev_format_whence which)
  1511. {
  1512. if (which == V4L2_SUBDEV_FORMAT_TRY)
  1513. return v4l2_subdev_get_try_format(fh, pad);
  1514. else
  1515. return &ccdc->formats[pad];
  1516. }
  1517. static struct v4l2_rect *
  1518. __ccdc_get_crop(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  1519. enum v4l2_subdev_format_whence which)
  1520. {
  1521. if (which == V4L2_SUBDEV_FORMAT_TRY)
  1522. return v4l2_subdev_get_try_crop(fh, CCDC_PAD_SOURCE_OF);
  1523. else
  1524. return &ccdc->crop;
  1525. }
  1526. /*
  1527. * ccdc_try_format - Try video format on a pad
  1528. * @ccdc: ISP CCDC device
  1529. * @fh : V4L2 subdev file handle
  1530. * @pad: Pad number
  1531. * @fmt: Format
  1532. */
  1533. static void
  1534. ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  1535. unsigned int pad, struct v4l2_mbus_framefmt *fmt,
  1536. enum v4l2_subdev_format_whence which)
  1537. {
  1538. const struct isp_format_info *info;
  1539. enum v4l2_mbus_pixelcode pixelcode;
  1540. unsigned int width = fmt->width;
  1541. unsigned int height = fmt->height;
  1542. struct v4l2_rect *crop;
  1543. unsigned int i;
  1544. switch (pad) {
  1545. case CCDC_PAD_SINK:
  1546. for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
  1547. if (fmt->code == ccdc_fmts[i])
  1548. break;
  1549. }
  1550. /* If not found, use SGRBG10 as default */
  1551. if (i >= ARRAY_SIZE(ccdc_fmts))
  1552. fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
  1553. /* Clamp the input size. */
  1554. fmt->width = clamp_t(u32, width, 32, 4096);
  1555. fmt->height = clamp_t(u32, height, 32, 4096);
  1556. break;
  1557. case CCDC_PAD_SOURCE_OF:
  1558. pixelcode = fmt->code;
  1559. *fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
  1560. /* YUV formats are converted from 2X8 to 1X16 by the bridge and
  1561. * can be byte-swapped.
  1562. */
  1563. if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
  1564. fmt->code == V4L2_MBUS_FMT_UYVY8_2X8) {
  1565. /* Use the user requested format if YUV. */
  1566. if (pixelcode == V4L2_MBUS_FMT_YUYV8_2X8 ||
  1567. pixelcode == V4L2_MBUS_FMT_UYVY8_2X8 ||
  1568. pixelcode == V4L2_MBUS_FMT_YUYV8_1X16 ||
  1569. pixelcode == V4L2_MBUS_FMT_UYVY8_1X16)
  1570. fmt->code = pixelcode;
  1571. if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8)
  1572. fmt->code = V4L2_MBUS_FMT_YUYV8_1X16;
  1573. else if (fmt->code == V4L2_MBUS_FMT_UYVY8_2X8)
  1574. fmt->code = V4L2_MBUS_FMT_UYVY8_1X16;
  1575. }
  1576. /* Hardcode the output size to the crop rectangle size. */
  1577. crop = __ccdc_get_crop(ccdc, fh, which);
  1578. fmt->width = crop->width;
  1579. fmt->height = crop->height;
  1580. break;
  1581. case CCDC_PAD_SOURCE_VP:
  1582. *fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
  1583. /* The video port interface truncates the data to 10 bits. */
  1584. info = omap3isp_video_format_info(fmt->code);
  1585. fmt->code = info->truncated;
  1586. /* YUV formats are not supported by the video port. */
  1587. if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
  1588. fmt->code == V4L2_MBUS_FMT_UYVY8_2X8)
  1589. fmt->code = 0;
  1590. /* The number of lines that can be clocked out from the video
  1591. * port output must be at least one line less than the number
  1592. * of input lines.
  1593. */
  1594. fmt->width = clamp_t(u32, width, 32, fmt->width);
  1595. fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
  1596. break;
  1597. }
  1598. /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
  1599. * stored on 2 bytes.
  1600. */
  1601. fmt->colorspace = V4L2_COLORSPACE_SRGB;
  1602. fmt->field = V4L2_FIELD_NONE;
  1603. }
  1604. /*
  1605. * ccdc_try_crop - Validate a crop rectangle
  1606. * @ccdc: ISP CCDC device
  1607. * @sink: format on the sink pad
  1608. * @crop: crop rectangle to be validated
  1609. */
  1610. static void ccdc_try_crop(struct isp_ccdc_device *ccdc,
  1611. const struct v4l2_mbus_framefmt *sink,
  1612. struct v4l2_rect *crop)
  1613. {
  1614. const struct isp_format_info *info;
  1615. unsigned int max_width;
  1616. /* For Bayer formats, restrict left/top and width/height to even values
  1617. * to keep the Bayer pattern.
  1618. */
  1619. info = omap3isp_video_format_info(sink->code);
  1620. if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) {
  1621. crop->left &= ~1;
  1622. crop->top &= ~1;
  1623. }
  1624. crop->left = clamp_t(u32, crop->left, 0, sink->width - CCDC_MIN_WIDTH);
  1625. crop->top = clamp_t(u32, crop->top, 0, sink->height - CCDC_MIN_HEIGHT);
  1626. /* The data formatter truncates the number of horizontal output pixels
  1627. * to a multiple of 16. To avoid clipping data, allow callers to request
  1628. * an output size bigger than the input size up to the nearest multiple
  1629. * of 16.
  1630. */
  1631. max_width = (sink->width - crop->left + 15) & ~15;
  1632. crop->width = clamp_t(u32, crop->width, CCDC_MIN_WIDTH, max_width)
  1633. & ~15;
  1634. crop->height = clamp_t(u32, crop->height, CCDC_MIN_HEIGHT,
  1635. sink->height - crop->top);
  1636. /* Odd width/height values don't make sense for Bayer formats. */
  1637. if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) {
  1638. crop->width &= ~1;
  1639. crop->height &= ~1;
  1640. }
  1641. }
  1642. /*
  1643. * ccdc_enum_mbus_code - Handle pixel format enumeration
  1644. * @sd : pointer to v4l2 subdev structure
  1645. * @fh : V4L2 subdev file handle
  1646. * @code : pointer to v4l2_subdev_mbus_code_enum structure
  1647. * return -EINVAL or zero on success
  1648. */
  1649. static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
  1650. struct v4l2_subdev_fh *fh,
  1651. struct v4l2_subdev_mbus_code_enum *code)
  1652. {
  1653. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1654. struct v4l2_mbus_framefmt *format;
  1655. switch (code->pad) {
  1656. case CCDC_PAD_SINK:
  1657. if (code->index >= ARRAY_SIZE(ccdc_fmts))
  1658. return -EINVAL;
  1659. code->code = ccdc_fmts[code->index];
  1660. break;
  1661. case CCDC_PAD_SOURCE_OF:
  1662. format = __ccdc_get_format(ccdc, fh, code->pad,
  1663. V4L2_SUBDEV_FORMAT_TRY);
  1664. if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
  1665. format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
  1666. /* In YUV mode the CCDC can swap bytes. */
  1667. if (code->index == 0)
  1668. code->code = V4L2_MBUS_FMT_YUYV8_1X16;
  1669. else if (code->index == 1)
  1670. code->code = V4L2_MBUS_FMT_UYVY8_1X16;
  1671. else
  1672. return -EINVAL;
  1673. } else {
  1674. /* In raw mode, no configurable format confversion is
  1675. * available.
  1676. */
  1677. if (code->index == 0)
  1678. code->code = format->code;
  1679. else
  1680. return -EINVAL;
  1681. }
  1682. break;
  1683. case CCDC_PAD_SOURCE_VP:
  1684. /* The CCDC supports no configurable format conversion
  1685. * compatible with the video port. Enumerate a single output
  1686. * format code.
  1687. */
  1688. if (code->index != 0)
  1689. return -EINVAL;
  1690. format = __ccdc_get_format(ccdc, fh, code->pad,
  1691. V4L2_SUBDEV_FORMAT_TRY);
  1692. /* A pixel code equal to 0 means that the video port doesn't
  1693. * support the input format. Don't enumerate any pixel code.
  1694. */
  1695. if (format->code == 0)
  1696. return -EINVAL;
  1697. code->code = format->code;
  1698. break;
  1699. default:
  1700. return -EINVAL;
  1701. }
  1702. return 0;
  1703. }
  1704. static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
  1705. struct v4l2_subdev_fh *fh,
  1706. struct v4l2_subdev_frame_size_enum *fse)
  1707. {
  1708. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1709. struct v4l2_mbus_framefmt format;
  1710. if (fse->index != 0)
  1711. return -EINVAL;
  1712. format.code = fse->code;
  1713. format.width = 1;
  1714. format.height = 1;
  1715. ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
  1716. fse->min_width = format.width;
  1717. fse->min_height = format.height;
  1718. if (format.code != fse->code)
  1719. return -EINVAL;
  1720. format.code = fse->code;
  1721. format.width = -1;
  1722. format.height = -1;
  1723. ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
  1724. fse->max_width = format.width;
  1725. fse->max_height = format.height;
  1726. return 0;
  1727. }
  1728. /*
  1729. * ccdc_get_selection - Retrieve a selection rectangle on a pad
  1730. * @sd: ISP CCDC V4L2 subdevice
  1731. * @fh: V4L2 subdev file handle
  1732. * @sel: Selection rectangle
  1733. *
  1734. * The only supported rectangles are the crop rectangles on the output formatter
  1735. * source pad.
  1736. *
  1737. * Return 0 on success or a negative error code otherwise.
  1738. */
  1739. static int ccdc_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1740. struct v4l2_subdev_selection *sel)
  1741. {
  1742. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1743. struct v4l2_mbus_framefmt *format;
  1744. if (sel->pad != CCDC_PAD_SOURCE_OF)
  1745. return -EINVAL;
  1746. switch (sel->target) {
  1747. case V4L2_SEL_TGT_CROP_BOUNDS:
  1748. sel->r.left = 0;
  1749. sel->r.top = 0;
  1750. sel->r.width = INT_MAX;
  1751. sel->r.height = INT_MAX;
  1752. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel->which);
  1753. ccdc_try_crop(ccdc, format, &sel->r);
  1754. break;
  1755. case V4L2_SEL_TGT_CROP:
  1756. sel->r = *__ccdc_get_crop(ccdc, fh, sel->which);
  1757. break;
  1758. default:
  1759. return -EINVAL;
  1760. }
  1761. return 0;
  1762. }
  1763. /*
  1764. * ccdc_set_selection - Set a selection rectangle on a pad
  1765. * @sd: ISP CCDC V4L2 subdevice
  1766. * @fh: V4L2 subdev file handle
  1767. * @sel: Selection rectangle
  1768. *
  1769. * The only supported rectangle is the actual crop rectangle on the output
  1770. * formatter source pad.
  1771. *
  1772. * Return 0 on success or a negative error code otherwise.
  1773. */
  1774. static int ccdc_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1775. struct v4l2_subdev_selection *sel)
  1776. {
  1777. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1778. struct v4l2_mbus_framefmt *format;
  1779. if (sel->target != V4L2_SEL_TGT_CROP ||
  1780. sel->pad != CCDC_PAD_SOURCE_OF)
  1781. return -EINVAL;
  1782. /* The crop rectangle can't be changed while streaming. */
  1783. if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
  1784. return -EBUSY;
  1785. /* Modifying the crop rectangle always changes the format on the source
  1786. * pad. If the KEEP_CONFIG flag is set, just return the current crop
  1787. * rectangle.
  1788. */
  1789. if (sel->flags & V4L2_SEL_FLAG_KEEP_CONFIG) {
  1790. sel->r = *__ccdc_get_crop(ccdc, fh, sel->which);
  1791. return 0;
  1792. }
  1793. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel->which);
  1794. ccdc_try_crop(ccdc, format, &sel->r);
  1795. *__ccdc_get_crop(ccdc, fh, sel->which) = sel->r;
  1796. /* Update the source format. */
  1797. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF, sel->which);
  1798. ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format, sel->which);
  1799. return 0;
  1800. }
  1801. /*
  1802. * ccdc_get_format - Retrieve the video format on a pad
  1803. * @sd : ISP CCDC V4L2 subdevice
  1804. * @fh : V4L2 subdev file handle
  1805. * @fmt: Format
  1806. *
  1807. * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
  1808. * to the format type.
  1809. */
  1810. static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1811. struct v4l2_subdev_format *fmt)
  1812. {
  1813. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1814. struct v4l2_mbus_framefmt *format;
  1815. format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
  1816. if (format == NULL)
  1817. return -EINVAL;
  1818. fmt->format = *format;
  1819. return 0;
  1820. }
  1821. /*
  1822. * ccdc_set_format - Set the video format on a pad
  1823. * @sd : ISP CCDC V4L2 subdevice
  1824. * @fh : V4L2 subdev file handle
  1825. * @fmt: Format
  1826. *
  1827. * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
  1828. * to the format type.
  1829. */
  1830. static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1831. struct v4l2_subdev_format *fmt)
  1832. {
  1833. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1834. struct v4l2_mbus_framefmt *format;
  1835. struct v4l2_rect *crop;
  1836. format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
  1837. if (format == NULL)
  1838. return -EINVAL;
  1839. ccdc_try_format(ccdc, fh, fmt->pad, &fmt->format, fmt->which);
  1840. *format = fmt->format;
  1841. /* Propagate the format from sink to source */
  1842. if (fmt->pad == CCDC_PAD_SINK) {
  1843. /* Reset the crop rectangle. */
  1844. crop = __ccdc_get_crop(ccdc, fh, fmt->which);
  1845. crop->left = 0;
  1846. crop->top = 0;
  1847. crop->width = fmt->format.width;
  1848. crop->height = fmt->format.height;
  1849. ccdc_try_crop(ccdc, &fmt->format, crop);
  1850. /* Update the source formats. */
  1851. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF,
  1852. fmt->which);
  1853. *format = fmt->format;
  1854. ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format,
  1855. fmt->which);
  1856. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_VP,
  1857. fmt->which);
  1858. *format = fmt->format;
  1859. ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_VP, format,
  1860. fmt->which);
  1861. }
  1862. return 0;
  1863. }
  1864. /*
  1865. * Decide whether desired output pixel code can be obtained with
  1866. * the lane shifter by shifting the input pixel code.
  1867. * @in: input pixelcode to shifter
  1868. * @out: output pixelcode from shifter
  1869. * @additional_shift: # of bits the sensor's LSB is offset from CAMEXT[0]
  1870. *
  1871. * return true if the combination is possible
  1872. * return false otherwise
  1873. */
  1874. static bool ccdc_is_shiftable(enum v4l2_mbus_pixelcode in,
  1875. enum v4l2_mbus_pixelcode out,
  1876. unsigned int additional_shift)
  1877. {
  1878. const struct isp_format_info *in_info, *out_info;
  1879. if (in == out)
  1880. return true;
  1881. in_info = omap3isp_video_format_info(in);
  1882. out_info = omap3isp_video_format_info(out);
  1883. if ((in_info->flavor == 0) || (out_info->flavor == 0))
  1884. return false;
  1885. if (in_info->flavor != out_info->flavor)
  1886. return false;
  1887. return in_info->width - out_info->width + additional_shift <= 6;
  1888. }
  1889. static int ccdc_link_validate(struct v4l2_subdev *sd,
  1890. struct media_link *link,
  1891. struct v4l2_subdev_format *source_fmt,
  1892. struct v4l2_subdev_format *sink_fmt)
  1893. {
  1894. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1895. unsigned long parallel_shift;
  1896. /* Check if the two ends match */
  1897. if (source_fmt->format.width != sink_fmt->format.width ||
  1898. source_fmt->format.height != sink_fmt->format.height)
  1899. return -EPIPE;
  1900. /* We've got a parallel sensor here. */
  1901. if (ccdc->input == CCDC_INPUT_PARALLEL) {
  1902. struct isp_parallel_platform_data *pdata =
  1903. &((struct isp_v4l2_subdevs_group *)
  1904. media_entity_to_v4l2_subdev(link->source->entity)
  1905. ->host_priv)->bus.parallel;
  1906. parallel_shift = pdata->data_lane_shift * 2;
  1907. } else {
  1908. parallel_shift = 0;
  1909. }
  1910. /* Lane shifter may be used to drop bits on CCDC sink pad */
  1911. if (!ccdc_is_shiftable(source_fmt->format.code,
  1912. sink_fmt->format.code, parallel_shift))
  1913. return -EPIPE;
  1914. return 0;
  1915. }
  1916. /*
  1917. * ccdc_init_formats - Initialize formats on all pads
  1918. * @sd: ISP CCDC V4L2 subdevice
  1919. * @fh: V4L2 subdev file handle
  1920. *
  1921. * Initialize all pad formats with default values. If fh is not NULL, try
  1922. * formats are initialized on the file handle. Otherwise active formats are
  1923. * initialized on the device.
  1924. */
  1925. static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
  1926. {
  1927. struct v4l2_subdev_format format;
  1928. memset(&format, 0, sizeof(format));
  1929. format.pad = CCDC_PAD_SINK;
  1930. format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
  1931. format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
  1932. format.format.width = 4096;
  1933. format.format.height = 4096;
  1934. ccdc_set_format(sd, fh, &format);
  1935. return 0;
  1936. }
  1937. /* V4L2 subdev core operations */
  1938. static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
  1939. .ioctl = ccdc_ioctl,
  1940. .subscribe_event = ccdc_subscribe_event,
  1941. .unsubscribe_event = ccdc_unsubscribe_event,
  1942. };
  1943. /* V4L2 subdev video operations */
  1944. static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
  1945. .s_stream = ccdc_set_stream,
  1946. };
  1947. /* V4L2 subdev pad operations */
  1948. static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
  1949. .enum_mbus_code = ccdc_enum_mbus_code,
  1950. .enum_frame_size = ccdc_enum_frame_size,
  1951. .get_fmt = ccdc_get_format,
  1952. .set_fmt = ccdc_set_format,
  1953. .get_selection = ccdc_get_selection,
  1954. .set_selection = ccdc_set_selection,
  1955. .link_validate = ccdc_link_validate,
  1956. };
  1957. /* V4L2 subdev operations */
  1958. static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
  1959. .core = &ccdc_v4l2_core_ops,
  1960. .video = &ccdc_v4l2_video_ops,
  1961. .pad = &ccdc_v4l2_pad_ops,
  1962. };
  1963. /* V4L2 subdev internal operations */
  1964. static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
  1965. .open = ccdc_init_formats,
  1966. };
  1967. /* -----------------------------------------------------------------------------
  1968. * Media entity operations
  1969. */
  1970. /*
  1971. * ccdc_link_setup - Setup CCDC connections
  1972. * @entity: CCDC media entity
  1973. * @local: Pad at the local end of the link
  1974. * @remote: Pad at the remote end of the link
  1975. * @flags: Link flags
  1976. *
  1977. * return -EINVAL or zero on success
  1978. */
  1979. static int ccdc_link_setup(struct media_entity *entity,
  1980. const struct media_pad *local,
  1981. const struct media_pad *remote, u32 flags)
  1982. {
  1983. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1984. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1985. struct isp_device *isp = to_isp_device(ccdc);
  1986. switch (local->index | media_entity_type(remote->entity)) {
  1987. case CCDC_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
  1988. /* Read from the sensor (parallel interface), CCP2, CSI2a or
  1989. * CSI2c.
  1990. */
  1991. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  1992. ccdc->input = CCDC_INPUT_NONE;
  1993. break;
  1994. }
  1995. if (ccdc->input != CCDC_INPUT_NONE)
  1996. return -EBUSY;
  1997. if (remote->entity == &isp->isp_ccp2.subdev.entity)
  1998. ccdc->input = CCDC_INPUT_CCP2B;
  1999. else if (remote->entity == &isp->isp_csi2a.subdev.entity)
  2000. ccdc->input = CCDC_INPUT_CSI2A;
  2001. else if (remote->entity == &isp->isp_csi2c.subdev.entity)
  2002. ccdc->input = CCDC_INPUT_CSI2C;
  2003. else
  2004. ccdc->input = CCDC_INPUT_PARALLEL;
  2005. break;
  2006. /*
  2007. * The ISP core doesn't support pipelines with multiple video outputs.
  2008. * Revisit this when it will be implemented, and return -EBUSY for now.
  2009. */
  2010. case CCDC_PAD_SOURCE_VP | MEDIA_ENT_T_V4L2_SUBDEV:
  2011. /* Write to preview engine, histogram and H3A. When none of
  2012. * those links are active, the video port can be disabled.
  2013. */
  2014. if (flags & MEDIA_LNK_FL_ENABLED) {
  2015. if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
  2016. return -EBUSY;
  2017. ccdc->output |= CCDC_OUTPUT_PREVIEW;
  2018. } else {
  2019. ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
  2020. }
  2021. break;
  2022. case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_DEVNODE:
  2023. /* Write to memory */
  2024. if (flags & MEDIA_LNK_FL_ENABLED) {
  2025. if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
  2026. return -EBUSY;
  2027. ccdc->output |= CCDC_OUTPUT_MEMORY;
  2028. } else {
  2029. ccdc->output &= ~CCDC_OUTPUT_MEMORY;
  2030. }
  2031. break;
  2032. case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_V4L2_SUBDEV:
  2033. /* Write to resizer */
  2034. if (flags & MEDIA_LNK_FL_ENABLED) {
  2035. if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
  2036. return -EBUSY;
  2037. ccdc->output |= CCDC_OUTPUT_RESIZER;
  2038. } else {
  2039. ccdc->output &= ~CCDC_OUTPUT_RESIZER;
  2040. }
  2041. break;
  2042. default:
  2043. return -EINVAL;
  2044. }
  2045. return 0;
  2046. }
  2047. /* media operations */
  2048. static const struct media_entity_operations ccdc_media_ops = {
  2049. .link_setup = ccdc_link_setup,
  2050. .link_validate = v4l2_subdev_link_validate,
  2051. };
  2052. void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
  2053. {
  2054. v4l2_device_unregister_subdev(&ccdc->subdev);
  2055. omap3isp_video_unregister(&ccdc->video_out);
  2056. }
  2057. int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
  2058. struct v4l2_device *vdev)
  2059. {
  2060. int ret;
  2061. /* Register the subdev and video node. */
  2062. ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
  2063. if (ret < 0)
  2064. goto error;
  2065. ret = omap3isp_video_register(&ccdc->video_out, vdev);
  2066. if (ret < 0)
  2067. goto error;
  2068. return 0;
  2069. error:
  2070. omap3isp_ccdc_unregister_entities(ccdc);
  2071. return ret;
  2072. }
  2073. /* -----------------------------------------------------------------------------
  2074. * ISP CCDC initialisation and cleanup
  2075. */
  2076. /*
  2077. * ccdc_init_entities - Initialize V4L2 subdev and media entity
  2078. * @ccdc: ISP CCDC module
  2079. *
  2080. * Return 0 on success and a negative error code on failure.
  2081. */
  2082. static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
  2083. {
  2084. struct v4l2_subdev *sd = &ccdc->subdev;
  2085. struct media_pad *pads = ccdc->pads;
  2086. struct media_entity *me = &sd->entity;
  2087. int ret;
  2088. ccdc->input = CCDC_INPUT_NONE;
  2089. v4l2_subdev_init(sd, &ccdc_v4l2_ops);
  2090. sd->internal_ops = &ccdc_v4l2_internal_ops;
  2091. strlcpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
  2092. sd->grp_id = 1 << 16; /* group ID for isp subdevs */
  2093. v4l2_set_subdevdata(sd, ccdc);
  2094. sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
  2095. pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  2096. pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
  2097. pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
  2098. me->ops = &ccdc_media_ops;
  2099. ret = media_entity_init(me, CCDC_PADS_NUM, pads, 0);
  2100. if (ret < 0)
  2101. return ret;
  2102. ccdc_init_formats(sd, NULL);
  2103. ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  2104. ccdc->video_out.ops = &ccdc_video_ops;
  2105. ccdc->video_out.isp = to_isp_device(ccdc);
  2106. ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
  2107. ccdc->video_out.bpl_alignment = 32;
  2108. ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
  2109. if (ret < 0)
  2110. goto error_video;
  2111. /* Connect the CCDC subdev to the video node. */
  2112. ret = media_entity_create_link(&ccdc->subdev.entity, CCDC_PAD_SOURCE_OF,
  2113. &ccdc->video_out.video.entity, 0, 0);
  2114. if (ret < 0)
  2115. goto error_link;
  2116. return 0;
  2117. error_link:
  2118. omap3isp_video_cleanup(&ccdc->video_out);
  2119. error_video:
  2120. media_entity_cleanup(me);
  2121. return ret;
  2122. }
  2123. /*
  2124. * omap3isp_ccdc_init - CCDC module initialization.
  2125. * @dev: Device pointer specific to the OMAP3 ISP.
  2126. *
  2127. * TODO: Get the initialisation values from platform data.
  2128. *
  2129. * Return 0 on success or a negative error code otherwise.
  2130. */
  2131. int omap3isp_ccdc_init(struct isp_device *isp)
  2132. {
  2133. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  2134. int ret;
  2135. spin_lock_init(&ccdc->lock);
  2136. init_waitqueue_head(&ccdc->wait);
  2137. mutex_init(&ccdc->ioctl_lock);
  2138. ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
  2139. INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
  2140. ccdc->lsc.state = LSC_STATE_STOPPED;
  2141. INIT_LIST_HEAD(&ccdc->lsc.free_queue);
  2142. spin_lock_init(&ccdc->lsc.req_lock);
  2143. ccdc->clamp.oblen = 0;
  2144. ccdc->clamp.dcsubval = 0;
  2145. ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
  2146. ccdc_apply_controls(ccdc);
  2147. ret = ccdc_init_entities(ccdc);
  2148. if (ret < 0) {
  2149. mutex_destroy(&ccdc->ioctl_lock);
  2150. return ret;
  2151. }
  2152. return 0;
  2153. }
  2154. /*
  2155. * omap3isp_ccdc_cleanup - CCDC module cleanup.
  2156. * @dev: Device pointer specific to the OMAP3 ISP.
  2157. */
  2158. void omap3isp_ccdc_cleanup(struct isp_device *isp)
  2159. {
  2160. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  2161. omap3isp_video_cleanup(&ccdc->video_out);
  2162. media_entity_cleanup(&ccdc->subdev.entity);
  2163. /* Free LSC requests. As the CCDC is stopped there's no active request,
  2164. * so only the pending request and the free queue need to be handled.
  2165. */
  2166. ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
  2167. cancel_work_sync(&ccdc->lsc.table_work);
  2168. ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
  2169. if (ccdc->fpc.fpcaddr != 0)
  2170. omap_iommu_vfree(isp->domain, isp->dev, ccdc->fpc.fpcaddr);
  2171. mutex_destroy(&ccdc->ioctl_lock);
  2172. }