gsc-core.h 15 KB

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  1. /*
  2. * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd.
  3. * http://www.samsung.com
  4. *
  5. * header file for Samsung EXYNOS5 SoC series G-Scaler driver
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #ifndef GSC_CORE_H_
  11. #define GSC_CORE_H_
  12. #include <linux/delay.h>
  13. #include <linux/sched.h>
  14. #include <linux/spinlock.h>
  15. #include <linux/types.h>
  16. #include <linux/videodev2.h>
  17. #include <linux/io.h>
  18. #include <linux/pm_runtime.h>
  19. #include <media/videobuf2-core.h>
  20. #include <media/v4l2-ctrls.h>
  21. #include <media/v4l2-device.h>
  22. #include <media/v4l2-mem2mem.h>
  23. #include <media/v4l2-mediabus.h>
  24. #include <media/videobuf2-dma-contig.h>
  25. #include "gsc-regs.h"
  26. #define CONFIG_VB2_GSC_DMA_CONTIG 1
  27. #define GSC_MODULE_NAME "exynos-gsc"
  28. #define GSC_SHUTDOWN_TIMEOUT ((100*HZ)/1000)
  29. #define GSC_MAX_DEVS 4
  30. #define GSC_M2M_BUF_NUM 0
  31. #define GSC_MAX_CTRL_NUM 10
  32. #define GSC_SC_ALIGN_4 4
  33. #define GSC_SC_ALIGN_2 2
  34. #define DEFAULT_CSC_EQ 1
  35. #define DEFAULT_CSC_RANGE 1
  36. #define GSC_PARAMS (1 << 0)
  37. #define GSC_SRC_FMT (1 << 1)
  38. #define GSC_DST_FMT (1 << 2)
  39. #define GSC_CTX_M2M (1 << 3)
  40. #define GSC_CTX_STOP_REQ (1 << 6)
  41. enum gsc_dev_flags {
  42. /* for global */
  43. ST_SUSPEND,
  44. /* for m2m node */
  45. ST_M2M_OPEN,
  46. ST_M2M_RUN,
  47. ST_M2M_PEND,
  48. ST_M2M_SUSPENDED,
  49. ST_M2M_SUSPENDING,
  50. };
  51. enum gsc_irq {
  52. GSC_IRQ_DONE,
  53. GSC_IRQ_OVERRUN
  54. };
  55. /**
  56. * enum gsc_datapath - the path of data used for G-Scaler
  57. * @GSC_CAMERA: from camera
  58. * @GSC_DMA: from/to DMA
  59. * @GSC_LOCAL: to local path
  60. * @GSC_WRITEBACK: from FIMD
  61. */
  62. enum gsc_datapath {
  63. GSC_CAMERA = 0x1,
  64. GSC_DMA,
  65. GSC_MIXER,
  66. GSC_FIMD,
  67. GSC_WRITEBACK,
  68. };
  69. enum gsc_color_fmt {
  70. GSC_RGB = 0x1,
  71. GSC_YUV420 = 0x2,
  72. GSC_YUV422 = 0x4,
  73. GSC_YUV444 = 0x8,
  74. };
  75. enum gsc_yuv_fmt {
  76. GSC_LSB_Y = 0x10,
  77. GSC_LSB_C,
  78. GSC_CBCR = 0x20,
  79. GSC_CRCB,
  80. };
  81. #define fh_to_ctx(__fh) container_of(__fh, struct gsc_ctx, fh)
  82. #define is_rgb(x) (!!((x) & 0x1))
  83. #define is_yuv420(x) (!!((x) & 0x2))
  84. #define is_yuv422(x) (!!((x) & 0x4))
  85. #define gsc_m2m_active(dev) test_bit(ST_M2M_RUN, &(dev)->state)
  86. #define gsc_m2m_pending(dev) test_bit(ST_M2M_PEND, &(dev)->state)
  87. #define gsc_m2m_opened(dev) test_bit(ST_M2M_OPEN, &(dev)->state)
  88. #define ctrl_to_ctx(__ctrl) \
  89. container_of((__ctrl)->handler, struct gsc_ctx, ctrl_handler)
  90. /**
  91. * struct gsc_fmt - the driver's internal color format data
  92. * @mbus_code: Media Bus pixel code, -1 if not applicable
  93. * @name: format description
  94. * @pixelformat: the fourcc code for this format, 0 if not applicable
  95. * @yorder: Y/C order
  96. * @corder: Chrominance order control
  97. * @num_planes: number of physically non-contiguous data planes
  98. * @nr_comp: number of physically contiguous data planes
  99. * @depth: per plane driver's private 'number of bits per pixel'
  100. * @flags: flags indicating which operation mode format applies to
  101. */
  102. struct gsc_fmt {
  103. enum v4l2_mbus_pixelcode mbus_code;
  104. char *name;
  105. u32 pixelformat;
  106. u32 color;
  107. u32 yorder;
  108. u32 corder;
  109. u16 num_planes;
  110. u16 num_comp;
  111. u8 depth[VIDEO_MAX_PLANES];
  112. u32 flags;
  113. };
  114. /**
  115. * struct gsc_input_buf - the driver's video buffer
  116. * @vb: videobuf2 buffer
  117. * @list : linked list structure for buffer queue
  118. * @idx : index of G-Scaler input buffer
  119. */
  120. struct gsc_input_buf {
  121. struct vb2_buffer vb;
  122. struct list_head list;
  123. int idx;
  124. };
  125. /**
  126. * struct gsc_addr - the G-Scaler physical address set
  127. * @y: luminance plane address
  128. * @cb: Cb plane address
  129. * @cr: Cr plane address
  130. */
  131. struct gsc_addr {
  132. dma_addr_t y;
  133. dma_addr_t cb;
  134. dma_addr_t cr;
  135. };
  136. /* struct gsc_ctrls - the G-Scaler control set
  137. * @rotate: rotation degree
  138. * @hflip: horizontal flip
  139. * @vflip: vertical flip
  140. * @global_alpha: the alpha value of current frame
  141. */
  142. struct gsc_ctrls {
  143. struct v4l2_ctrl *rotate;
  144. struct v4l2_ctrl *hflip;
  145. struct v4l2_ctrl *vflip;
  146. struct v4l2_ctrl *global_alpha;
  147. };
  148. /**
  149. * struct gsc_scaler - the configuration data for G-Scaler inetrnal scaler
  150. * @pre_shfactor: pre sclaer shift factor
  151. * @pre_hratio: horizontal ratio of the prescaler
  152. * @pre_vratio: vertical ratio of the prescaler
  153. * @main_hratio: the main scaler's horizontal ratio
  154. * @main_vratio: the main scaler's vertical ratio
  155. */
  156. struct gsc_scaler {
  157. u32 pre_shfactor;
  158. u32 pre_hratio;
  159. u32 pre_vratio;
  160. u32 main_hratio;
  161. u32 main_vratio;
  162. };
  163. struct gsc_dev;
  164. struct gsc_ctx;
  165. /**
  166. * struct gsc_frame - source/target frame properties
  167. * @f_width: SRC : SRCIMG_WIDTH, DST : OUTPUTDMA_WHOLE_IMG_WIDTH
  168. * @f_height: SRC : SRCIMG_HEIGHT, DST : OUTPUTDMA_WHOLE_IMG_HEIGHT
  169. * @crop: cropped(source)/scaled(destination) size
  170. * @payload: image size in bytes (w x h x bpp)
  171. * @addr: image frame buffer physical addresses
  172. * @fmt: G-Scaler color format pointer
  173. * @colorspace: value indicating v4l2_colorspace
  174. * @alpha: frame's alpha value
  175. */
  176. struct gsc_frame {
  177. u32 f_width;
  178. u32 f_height;
  179. struct v4l2_rect crop;
  180. unsigned long payload[VIDEO_MAX_PLANES];
  181. struct gsc_addr addr;
  182. const struct gsc_fmt *fmt;
  183. u32 colorspace;
  184. u8 alpha;
  185. };
  186. /**
  187. * struct gsc_m2m_device - v4l2 memory-to-memory device data
  188. * @vfd: the video device node for v4l2 m2m mode
  189. * @m2m_dev: v4l2 memory-to-memory device data
  190. * @ctx: hardware context data
  191. * @refcnt: the reference counter
  192. */
  193. struct gsc_m2m_device {
  194. struct video_device *vfd;
  195. struct v4l2_m2m_dev *m2m_dev;
  196. struct gsc_ctx *ctx;
  197. int refcnt;
  198. };
  199. /**
  200. * struct gsc_pix_max - image pixel size limits in various IP configurations
  201. *
  202. * @org_scaler_bypass_w: max pixel width when the scaler is disabled
  203. * @org_scaler_bypass_h: max pixel height when the scaler is disabled
  204. * @org_scaler_input_w: max pixel width when the scaler is enabled
  205. * @org_scaler_input_h: max pixel height when the scaler is enabled
  206. * @real_rot_dis_w: max pixel src cropped height with the rotator is off
  207. * @real_rot_dis_h: max pixel src croppped width with the rotator is off
  208. * @real_rot_en_w: max pixel src cropped width with the rotator is on
  209. * @real_rot_en_h: max pixel src cropped height with the rotator is on
  210. * @target_rot_dis_w: max pixel dst scaled width with the rotator is off
  211. * @target_rot_dis_h: max pixel dst scaled height with the rotator is off
  212. * @target_rot_en_w: max pixel dst scaled width with the rotator is on
  213. * @target_rot_en_h: max pixel dst scaled height with the rotator is on
  214. */
  215. struct gsc_pix_max {
  216. u16 org_scaler_bypass_w;
  217. u16 org_scaler_bypass_h;
  218. u16 org_scaler_input_w;
  219. u16 org_scaler_input_h;
  220. u16 real_rot_dis_w;
  221. u16 real_rot_dis_h;
  222. u16 real_rot_en_w;
  223. u16 real_rot_en_h;
  224. u16 target_rot_dis_w;
  225. u16 target_rot_dis_h;
  226. u16 target_rot_en_w;
  227. u16 target_rot_en_h;
  228. };
  229. /**
  230. * struct gsc_pix_min - image pixel size limits in various IP configurations
  231. *
  232. * @org_w: minimum source pixel width
  233. * @org_h: minimum source pixel height
  234. * @real_w: minimum input crop pixel width
  235. * @real_h: minimum input crop pixel height
  236. * @target_rot_dis_w: minimum output scaled pixel height when rotator is off
  237. * @target_rot_dis_h: minimum output scaled pixel height when rotator is off
  238. * @target_rot_en_w: minimum output scaled pixel height when rotator is on
  239. * @target_rot_en_h: minimum output scaled pixel height when rotator is on
  240. */
  241. struct gsc_pix_min {
  242. u16 org_w;
  243. u16 org_h;
  244. u16 real_w;
  245. u16 real_h;
  246. u16 target_rot_dis_w;
  247. u16 target_rot_dis_h;
  248. u16 target_rot_en_w;
  249. u16 target_rot_en_h;
  250. };
  251. struct gsc_pix_align {
  252. u16 org_h;
  253. u16 org_w;
  254. u16 offset_h;
  255. u16 real_w;
  256. u16 real_h;
  257. u16 target_w;
  258. u16 target_h;
  259. };
  260. /**
  261. * struct gsc_variant - G-Scaler variant information
  262. */
  263. struct gsc_variant {
  264. struct gsc_pix_max *pix_max;
  265. struct gsc_pix_min *pix_min;
  266. struct gsc_pix_align *pix_align;
  267. u16 in_buf_cnt;
  268. u16 out_buf_cnt;
  269. u16 sc_up_max;
  270. u16 sc_down_max;
  271. u16 poly_sc_down_max;
  272. u16 pre_sc_down_max;
  273. u16 local_sc_down;
  274. };
  275. /**
  276. * struct gsc_driverdata - per device type driver data for init time.
  277. *
  278. * @variant: the variant information for this driver.
  279. * @lclk_frequency: G-Scaler clock frequency
  280. * @num_entities: the number of g-scalers
  281. */
  282. struct gsc_driverdata {
  283. struct gsc_variant *variant[GSC_MAX_DEVS];
  284. unsigned long lclk_frequency;
  285. int num_entities;
  286. };
  287. /**
  288. * struct gsc_dev - abstraction for G-Scaler entity
  289. * @slock: the spinlock protecting this data structure
  290. * @lock: the mutex protecting this data structure
  291. * @pdev: pointer to the G-Scaler platform device
  292. * @variant: the IP variant information
  293. * @id: G-Scaler device index (0..GSC_MAX_DEVS)
  294. * @clock: clocks required for G-Scaler operation
  295. * @regs: the mapped hardware registers
  296. * @irq_queue: interrupt handler waitqueue
  297. * @m2m: memory-to-memory V4L2 device information
  298. * @state: flags used to synchronize m2m and capture mode operation
  299. * @alloc_ctx: videobuf2 memory allocator context
  300. * @vdev: video device for G-Scaler instance
  301. */
  302. struct gsc_dev {
  303. spinlock_t slock;
  304. struct mutex lock;
  305. struct platform_device *pdev;
  306. struct gsc_variant *variant;
  307. u16 id;
  308. struct clk *clock;
  309. void __iomem *regs;
  310. wait_queue_head_t irq_queue;
  311. struct gsc_m2m_device m2m;
  312. struct exynos_platform_gscaler *pdata;
  313. unsigned long state;
  314. struct vb2_alloc_ctx *alloc_ctx;
  315. struct video_device vdev;
  316. };
  317. /**
  318. * gsc_ctx - the device context data
  319. * @s_frame: source frame properties
  320. * @d_frame: destination frame properties
  321. * @in_path: input mode (DMA or camera)
  322. * @out_path: output mode (DMA or FIFO)
  323. * @scaler: image scaler properties
  324. * @flags: additional flags for image conversion
  325. * @state: flags to keep track of user configuration
  326. * @gsc_dev: the G-Scaler device this context applies to
  327. * @m2m_ctx: memory-to-memory device context
  328. * @fh: v4l2 file handle
  329. * @ctrl_handler: v4l2 controls handler
  330. * @gsc_ctrls G-Scaler control set
  331. * @ctrls_rdy: true if the control handler is initialized
  332. */
  333. struct gsc_ctx {
  334. struct gsc_frame s_frame;
  335. struct gsc_frame d_frame;
  336. enum gsc_datapath in_path;
  337. enum gsc_datapath out_path;
  338. struct gsc_scaler scaler;
  339. u32 flags;
  340. u32 state;
  341. int rotation;
  342. unsigned int hflip:1;
  343. unsigned int vflip:1;
  344. struct gsc_dev *gsc_dev;
  345. struct v4l2_m2m_ctx *m2m_ctx;
  346. struct v4l2_fh fh;
  347. struct v4l2_ctrl_handler ctrl_handler;
  348. struct gsc_ctrls gsc_ctrls;
  349. bool ctrls_rdy;
  350. };
  351. void gsc_set_prefbuf(struct gsc_dev *gsc, struct gsc_frame *frm);
  352. int gsc_register_m2m_device(struct gsc_dev *gsc);
  353. void gsc_unregister_m2m_device(struct gsc_dev *gsc);
  354. void gsc_m2m_job_finish(struct gsc_ctx *ctx, int vb_state);
  355. u32 get_plane_size(struct gsc_frame *fr, unsigned int plane);
  356. const struct gsc_fmt *get_format(int index);
  357. const struct gsc_fmt *find_fmt(u32 *pixelformat, u32 *mbus_code, u32 index);
  358. int gsc_enum_fmt_mplane(struct v4l2_fmtdesc *f);
  359. int gsc_try_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f);
  360. void gsc_set_frame_size(struct gsc_frame *frame, int width, int height);
  361. int gsc_g_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f);
  362. void gsc_check_crop_change(u32 tmp_w, u32 tmp_h, u32 *w, u32 *h);
  363. int gsc_g_crop(struct gsc_ctx *ctx, struct v4l2_crop *cr);
  364. int gsc_try_crop(struct gsc_ctx *ctx, struct v4l2_crop *cr);
  365. int gsc_cal_prescaler_ratio(struct gsc_variant *var, u32 src, u32 dst,
  366. u32 *ratio);
  367. void gsc_get_prescaler_shfactor(u32 hratio, u32 vratio, u32 *sh);
  368. void gsc_check_src_scale_info(struct gsc_variant *var,
  369. struct gsc_frame *s_frame,
  370. u32 *wratio, u32 tx, u32 ty, u32 *hratio);
  371. int gsc_check_scaler_ratio(struct gsc_variant *var, int sw, int sh, int dw,
  372. int dh, int rot, int out_path);
  373. int gsc_set_scaler_info(struct gsc_ctx *ctx);
  374. int gsc_ctrls_create(struct gsc_ctx *ctx);
  375. void gsc_ctrls_delete(struct gsc_ctx *ctx);
  376. int gsc_prepare_addr(struct gsc_ctx *ctx, struct vb2_buffer *vb,
  377. struct gsc_frame *frame, struct gsc_addr *addr);
  378. static inline void gsc_ctx_state_lock_set(u32 state, struct gsc_ctx *ctx)
  379. {
  380. unsigned long flags;
  381. spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
  382. ctx->state |= state;
  383. spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
  384. }
  385. static inline void gsc_ctx_state_lock_clear(u32 state, struct gsc_ctx *ctx)
  386. {
  387. unsigned long flags;
  388. spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
  389. ctx->state &= ~state;
  390. spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
  391. }
  392. static inline int is_tiled(const struct gsc_fmt *fmt)
  393. {
  394. return fmt->pixelformat == V4L2_PIX_FMT_NV12MT_16X16;
  395. }
  396. static inline void gsc_hw_enable_control(struct gsc_dev *dev, bool on)
  397. {
  398. u32 cfg = readl(dev->regs + GSC_ENABLE);
  399. if (on)
  400. cfg |= GSC_ENABLE_ON;
  401. else
  402. cfg &= ~GSC_ENABLE_ON;
  403. writel(cfg, dev->regs + GSC_ENABLE);
  404. }
  405. static inline int gsc_hw_get_irq_status(struct gsc_dev *dev)
  406. {
  407. u32 cfg = readl(dev->regs + GSC_IRQ);
  408. if (cfg & GSC_IRQ_STATUS_OR_IRQ)
  409. return GSC_IRQ_OVERRUN;
  410. else
  411. return GSC_IRQ_DONE;
  412. }
  413. static inline void gsc_hw_clear_irq(struct gsc_dev *dev, int irq)
  414. {
  415. u32 cfg = readl(dev->regs + GSC_IRQ);
  416. if (irq == GSC_IRQ_OVERRUN)
  417. cfg |= GSC_IRQ_STATUS_OR_IRQ;
  418. else if (irq == GSC_IRQ_DONE)
  419. cfg |= GSC_IRQ_STATUS_FRM_DONE_IRQ;
  420. writel(cfg, dev->regs + GSC_IRQ);
  421. }
  422. static inline void gsc_lock(struct vb2_queue *vq)
  423. {
  424. struct gsc_ctx *ctx = vb2_get_drv_priv(vq);
  425. mutex_lock(&ctx->gsc_dev->lock);
  426. }
  427. static inline void gsc_unlock(struct vb2_queue *vq)
  428. {
  429. struct gsc_ctx *ctx = vb2_get_drv_priv(vq);
  430. mutex_unlock(&ctx->gsc_dev->lock);
  431. }
  432. static inline bool gsc_ctx_state_is_set(u32 mask, struct gsc_ctx *ctx)
  433. {
  434. unsigned long flags;
  435. bool ret;
  436. spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
  437. ret = (ctx->state & mask) == mask;
  438. spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
  439. return ret;
  440. }
  441. static inline struct gsc_frame *ctx_get_frame(struct gsc_ctx *ctx,
  442. enum v4l2_buf_type type)
  443. {
  444. struct gsc_frame *frame;
  445. if (V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE == type) {
  446. frame = &ctx->s_frame;
  447. } else if (V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE == type) {
  448. frame = &ctx->d_frame;
  449. } else {
  450. pr_err("Wrong buffer/video queue type (%d)", type);
  451. return ERR_PTR(-EINVAL);
  452. }
  453. return frame;
  454. }
  455. void gsc_hw_set_sw_reset(struct gsc_dev *dev);
  456. int gsc_wait_reset(struct gsc_dev *dev);
  457. void gsc_hw_set_frm_done_irq_mask(struct gsc_dev *dev, bool mask);
  458. void gsc_hw_set_gsc_irq_enable(struct gsc_dev *dev, bool mask);
  459. void gsc_hw_set_input_buf_masking(struct gsc_dev *dev, u32 shift, bool enable);
  460. void gsc_hw_set_output_buf_masking(struct gsc_dev *dev, u32 shift, bool enable);
  461. void gsc_hw_set_input_addr(struct gsc_dev *dev, struct gsc_addr *addr,
  462. int index);
  463. void gsc_hw_set_output_addr(struct gsc_dev *dev, struct gsc_addr *addr,
  464. int index);
  465. void gsc_hw_set_input_path(struct gsc_ctx *ctx);
  466. void gsc_hw_set_in_size(struct gsc_ctx *ctx);
  467. void gsc_hw_set_in_image_rgb(struct gsc_ctx *ctx);
  468. void gsc_hw_set_in_image_format(struct gsc_ctx *ctx);
  469. void gsc_hw_set_output_path(struct gsc_ctx *ctx);
  470. void gsc_hw_set_out_size(struct gsc_ctx *ctx);
  471. void gsc_hw_set_out_image_rgb(struct gsc_ctx *ctx);
  472. void gsc_hw_set_out_image_format(struct gsc_ctx *ctx);
  473. void gsc_hw_set_prescaler(struct gsc_ctx *ctx);
  474. void gsc_hw_set_mainscaler(struct gsc_ctx *ctx);
  475. void gsc_hw_set_rotation(struct gsc_ctx *ctx);
  476. void gsc_hw_set_global_alpha(struct gsc_ctx *ctx);
  477. void gsc_hw_set_sfr_update(struct gsc_ctx *ctx);
  478. #endif /* GSC_CORE_H_ */