vpbe_venc.c 18 KB

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  1. /*
  2. * Copyright (C) 2010 Texas Instruments Inc
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation version 2.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program; if not, write to the Free Software
  15. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/init.h>
  20. #include <linux/ctype.h>
  21. #include <linux/delay.h>
  22. #include <linux/device.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/videodev2.h>
  26. #include <linux/slab.h>
  27. #include <mach/hardware.h>
  28. #include <mach/mux.h>
  29. #include <linux/platform_data/i2c-davinci.h>
  30. #include <linux/io.h>
  31. #include <media/davinci/vpbe_types.h>
  32. #include <media/davinci/vpbe_venc.h>
  33. #include <media/davinci/vpss.h>
  34. #include <media/v4l2-device.h>
  35. #include "vpbe_venc_regs.h"
  36. #define MODULE_NAME "davinci-vpbe-venc"
  37. static struct platform_device_id vpbe_venc_devtype[] = {
  38. {
  39. .name = DM644X_VPBE_VENC_SUBDEV_NAME,
  40. .driver_data = VPBE_VERSION_1,
  41. }, {
  42. .name = DM365_VPBE_VENC_SUBDEV_NAME,
  43. .driver_data = VPBE_VERSION_2,
  44. }, {
  45. .name = DM355_VPBE_VENC_SUBDEV_NAME,
  46. .driver_data = VPBE_VERSION_3,
  47. },
  48. };
  49. MODULE_DEVICE_TABLE(platform, vpbe_venc_devtype);
  50. static int debug = 2;
  51. module_param(debug, int, 0644);
  52. MODULE_PARM_DESC(debug, "Debug level 0-2");
  53. struct venc_state {
  54. struct v4l2_subdev sd;
  55. struct venc_callback *callback;
  56. struct venc_platform_data *pdata;
  57. struct device *pdev;
  58. u32 output;
  59. v4l2_std_id std;
  60. spinlock_t lock;
  61. void __iomem *venc_base;
  62. void __iomem *vdaccfg_reg;
  63. enum vpbe_version venc_type;
  64. };
  65. static inline struct venc_state *to_state(struct v4l2_subdev *sd)
  66. {
  67. return container_of(sd, struct venc_state, sd);
  68. }
  69. static inline u32 venc_read(struct v4l2_subdev *sd, u32 offset)
  70. {
  71. struct venc_state *venc = to_state(sd);
  72. return readl(venc->venc_base + offset);
  73. }
  74. static inline u32 venc_write(struct v4l2_subdev *sd, u32 offset, u32 val)
  75. {
  76. struct venc_state *venc = to_state(sd);
  77. writel(val, (venc->venc_base + offset));
  78. return val;
  79. }
  80. static inline u32 venc_modify(struct v4l2_subdev *sd, u32 offset,
  81. u32 val, u32 mask)
  82. {
  83. u32 new_val = (venc_read(sd, offset) & ~mask) | (val & mask);
  84. venc_write(sd, offset, new_val);
  85. return new_val;
  86. }
  87. static inline u32 vdaccfg_write(struct v4l2_subdev *sd, u32 val)
  88. {
  89. struct venc_state *venc = to_state(sd);
  90. writel(val, venc->vdaccfg_reg);
  91. val = readl(venc->vdaccfg_reg);
  92. return val;
  93. }
  94. #define VDAC_COMPONENT 0x543
  95. #define VDAC_S_VIDEO 0x210
  96. /* This function sets the dac of the VPBE for various outputs
  97. */
  98. static int venc_set_dac(struct v4l2_subdev *sd, u32 out_index)
  99. {
  100. switch (out_index) {
  101. case 0:
  102. v4l2_dbg(debug, 1, sd, "Setting output to Composite\n");
  103. venc_write(sd, VENC_DACSEL, 0);
  104. break;
  105. case 1:
  106. v4l2_dbg(debug, 1, sd, "Setting output to Component\n");
  107. venc_write(sd, VENC_DACSEL, VDAC_COMPONENT);
  108. break;
  109. case 2:
  110. v4l2_dbg(debug, 1, sd, "Setting output to S-video\n");
  111. venc_write(sd, VENC_DACSEL, VDAC_S_VIDEO);
  112. break;
  113. default:
  114. return -EINVAL;
  115. }
  116. return 0;
  117. }
  118. static void venc_enabledigitaloutput(struct v4l2_subdev *sd, int benable)
  119. {
  120. struct venc_state *venc = to_state(sd);
  121. v4l2_dbg(debug, 2, sd, "venc_enabledigitaloutput\n");
  122. if (benable) {
  123. venc_write(sd, VENC_VMOD, 0);
  124. venc_write(sd, VENC_CVBS, 0);
  125. venc_write(sd, VENC_LCDOUT, 0);
  126. venc_write(sd, VENC_HSPLS, 0);
  127. venc_write(sd, VENC_HSTART, 0);
  128. venc_write(sd, VENC_HVALID, 0);
  129. venc_write(sd, VENC_HINT, 0);
  130. venc_write(sd, VENC_VSPLS, 0);
  131. venc_write(sd, VENC_VSTART, 0);
  132. venc_write(sd, VENC_VVALID, 0);
  133. venc_write(sd, VENC_VINT, 0);
  134. venc_write(sd, VENC_YCCCTL, 0);
  135. venc_write(sd, VENC_DACSEL, 0);
  136. } else {
  137. venc_write(sd, VENC_VMOD, 0);
  138. /* disable VCLK output pin enable */
  139. venc_write(sd, VENC_VIDCTL, 0x141);
  140. /* Disable output sync pins */
  141. venc_write(sd, VENC_SYNCCTL, 0);
  142. /* Disable DCLOCK */
  143. venc_write(sd, VENC_DCLKCTL, 0);
  144. venc_write(sd, VENC_DRGBX1, 0x0000057C);
  145. /* Disable LCD output control (accepting default polarity) */
  146. venc_write(sd, VENC_LCDOUT, 0);
  147. if (venc->venc_type != VPBE_VERSION_3)
  148. venc_write(sd, VENC_CMPNT, 0x100);
  149. venc_write(sd, VENC_HSPLS, 0);
  150. venc_write(sd, VENC_HINT, 0);
  151. venc_write(sd, VENC_HSTART, 0);
  152. venc_write(sd, VENC_HVALID, 0);
  153. venc_write(sd, VENC_VSPLS, 0);
  154. venc_write(sd, VENC_VINT, 0);
  155. venc_write(sd, VENC_VSTART, 0);
  156. venc_write(sd, VENC_VVALID, 0);
  157. venc_write(sd, VENC_HSDLY, 0);
  158. venc_write(sd, VENC_VSDLY, 0);
  159. venc_write(sd, VENC_YCCCTL, 0);
  160. venc_write(sd, VENC_VSTARTA, 0);
  161. /* Set OSD clock and OSD Sync Adavance registers */
  162. venc_write(sd, VENC_OSDCLK0, 1);
  163. venc_write(sd, VENC_OSDCLK1, 2);
  164. }
  165. }
  166. #define VDAC_CONFIG_SD_V3 0x0E21A6B6
  167. #define VDAC_CONFIG_SD_V2 0x081141CF
  168. /*
  169. * setting NTSC mode
  170. */
  171. static int venc_set_ntsc(struct v4l2_subdev *sd)
  172. {
  173. u32 val;
  174. struct venc_state *venc = to_state(sd);
  175. struct venc_platform_data *pdata = venc->pdata;
  176. v4l2_dbg(debug, 2, sd, "venc_set_ntsc\n");
  177. /* Setup clock at VPSS & VENC for SD */
  178. vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1);
  179. if (pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_525_60) < 0)
  180. return -EINVAL;
  181. venc_enabledigitaloutput(sd, 0);
  182. if (venc->venc_type == VPBE_VERSION_3) {
  183. venc_write(sd, VENC_CLKCTL, 0x01);
  184. venc_write(sd, VENC_VIDCTL, 0);
  185. val = vdaccfg_write(sd, VDAC_CONFIG_SD_V3);
  186. } else if (venc->venc_type == VPBE_VERSION_2) {
  187. venc_write(sd, VENC_CLKCTL, 0x01);
  188. venc_write(sd, VENC_VIDCTL, 0);
  189. vdaccfg_write(sd, VDAC_CONFIG_SD_V2);
  190. } else {
  191. /* to set VENC CLK DIV to 1 - final clock is 54 MHz */
  192. venc_modify(sd, VENC_VIDCTL, 0, 1 << 1);
  193. /* Set REC656 Mode */
  194. venc_write(sd, VENC_YCCCTL, 0x1);
  195. venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAFRQ);
  196. venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAUPS);
  197. }
  198. venc_write(sd, VENC_VMOD, 0);
  199. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  200. VENC_VMOD_VIE);
  201. venc_modify(sd, VENC_VMOD, (0 << VENC_VMOD_VMD), VENC_VMOD_VMD);
  202. venc_modify(sd, VENC_VMOD, (0 << VENC_VMOD_TVTYP_SHIFT),
  203. VENC_VMOD_TVTYP);
  204. venc_write(sd, VENC_DACTST, 0x0);
  205. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  206. return 0;
  207. }
  208. /*
  209. * setting PAL mode
  210. */
  211. static int venc_set_pal(struct v4l2_subdev *sd)
  212. {
  213. struct venc_state *venc = to_state(sd);
  214. v4l2_dbg(debug, 2, sd, "venc_set_pal\n");
  215. /* Setup clock at VPSS & VENC for SD */
  216. vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1);
  217. if (venc->pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_625_50) < 0)
  218. return -EINVAL;
  219. venc_enabledigitaloutput(sd, 0);
  220. if (venc->venc_type == VPBE_VERSION_3) {
  221. venc_write(sd, VENC_CLKCTL, 0x1);
  222. venc_write(sd, VENC_VIDCTL, 0);
  223. vdaccfg_write(sd, VDAC_CONFIG_SD_V3);
  224. } else if (venc->venc_type == VPBE_VERSION_2) {
  225. venc_write(sd, VENC_CLKCTL, 0x1);
  226. venc_write(sd, VENC_VIDCTL, 0);
  227. vdaccfg_write(sd, VDAC_CONFIG_SD_V2);
  228. } else {
  229. /* to set VENC CLK DIV to 1 - final clock is 54 MHz */
  230. venc_modify(sd, VENC_VIDCTL, 0, 1 << 1);
  231. /* Set REC656 Mode */
  232. venc_write(sd, VENC_YCCCTL, 0x1);
  233. }
  234. venc_modify(sd, VENC_SYNCCTL, 1 << VENC_SYNCCTL_OVD_SHIFT,
  235. VENC_SYNCCTL_OVD);
  236. venc_write(sd, VENC_VMOD, 0);
  237. venc_modify(sd, VENC_VMOD,
  238. (1 << VENC_VMOD_VIE_SHIFT),
  239. VENC_VMOD_VIE);
  240. venc_modify(sd, VENC_VMOD,
  241. (0 << VENC_VMOD_VMD), VENC_VMOD_VMD);
  242. venc_modify(sd, VENC_VMOD,
  243. (1 << VENC_VMOD_TVTYP_SHIFT),
  244. VENC_VMOD_TVTYP);
  245. venc_write(sd, VENC_DACTST, 0x0);
  246. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  247. return 0;
  248. }
  249. #define VDAC_CONFIG_HD_V2 0x081141EF
  250. /*
  251. * venc_set_480p59_94
  252. *
  253. * This function configures the video encoder to EDTV(525p) component setting.
  254. */
  255. static int venc_set_480p59_94(struct v4l2_subdev *sd)
  256. {
  257. struct venc_state *venc = to_state(sd);
  258. struct venc_platform_data *pdata = venc->pdata;
  259. v4l2_dbg(debug, 2, sd, "venc_set_480p59_94\n");
  260. if (venc->venc_type != VPBE_VERSION_1 &&
  261. venc->venc_type != VPBE_VERSION_2)
  262. return -EINVAL;
  263. /* Setup clock at VPSS & VENC for SD */
  264. if (pdata->setup_clock(VPBE_ENC_CUSTOM_TIMINGS, 27000000) < 0)
  265. return -EINVAL;
  266. venc_enabledigitaloutput(sd, 0);
  267. if (venc->venc_type == VPBE_VERSION_2)
  268. vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
  269. venc_write(sd, VENC_OSDCLK0, 0);
  270. venc_write(sd, VENC_OSDCLK1, 1);
  271. if (venc->venc_type == VPBE_VERSION_1) {
  272. venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ,
  273. VENC_VDPRO_DAFRQ);
  274. venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS,
  275. VENC_VDPRO_DAUPS);
  276. }
  277. venc_write(sd, VENC_VMOD, 0);
  278. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  279. VENC_VMOD_VIE);
  280. venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
  281. venc_modify(sd, VENC_VMOD, (HDTV_525P << VENC_VMOD_TVTYP_SHIFT),
  282. VENC_VMOD_TVTYP);
  283. venc_modify(sd, VENC_VMOD, VENC_VMOD_VDMD_YCBCR8 <<
  284. VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD);
  285. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  286. return 0;
  287. }
  288. /*
  289. * venc_set_625p
  290. *
  291. * This function configures the video encoder to HDTV(625p) component setting
  292. */
  293. static int venc_set_576p50(struct v4l2_subdev *sd)
  294. {
  295. struct venc_state *venc = to_state(sd);
  296. struct venc_platform_data *pdata = venc->pdata;
  297. v4l2_dbg(debug, 2, sd, "venc_set_576p50\n");
  298. if (venc->venc_type != VPBE_VERSION_1 &&
  299. venc->venc_type != VPBE_VERSION_2)
  300. return -EINVAL;
  301. /* Setup clock at VPSS & VENC for SD */
  302. if (pdata->setup_clock(VPBE_ENC_CUSTOM_TIMINGS, 27000000) < 0)
  303. return -EINVAL;
  304. venc_enabledigitaloutput(sd, 0);
  305. if (venc->venc_type == VPBE_VERSION_2)
  306. vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
  307. venc_write(sd, VENC_OSDCLK0, 0);
  308. venc_write(sd, VENC_OSDCLK1, 1);
  309. if (venc->venc_type == VPBE_VERSION_1) {
  310. venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ,
  311. VENC_VDPRO_DAFRQ);
  312. venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS,
  313. VENC_VDPRO_DAUPS);
  314. }
  315. venc_write(sd, VENC_VMOD, 0);
  316. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  317. VENC_VMOD_VIE);
  318. venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
  319. venc_modify(sd, VENC_VMOD, (HDTV_625P << VENC_VMOD_TVTYP_SHIFT),
  320. VENC_VMOD_TVTYP);
  321. venc_modify(sd, VENC_VMOD, VENC_VMOD_VDMD_YCBCR8 <<
  322. VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD);
  323. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  324. return 0;
  325. }
  326. /*
  327. * venc_set_720p60_internal - Setup 720p60 in venc for dm365 only
  328. */
  329. static int venc_set_720p60_internal(struct v4l2_subdev *sd)
  330. {
  331. struct venc_state *venc = to_state(sd);
  332. struct venc_platform_data *pdata = venc->pdata;
  333. if (pdata->setup_clock(VPBE_ENC_CUSTOM_TIMINGS, 74250000) < 0)
  334. return -EINVAL;
  335. venc_enabledigitaloutput(sd, 0);
  336. venc_write(sd, VENC_OSDCLK0, 0);
  337. venc_write(sd, VENC_OSDCLK1, 1);
  338. venc_write(sd, VENC_VMOD, 0);
  339. /* DM365 component HD mode */
  340. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  341. VENC_VMOD_VIE);
  342. venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
  343. venc_modify(sd, VENC_VMOD, (HDTV_720P << VENC_VMOD_TVTYP_SHIFT),
  344. VENC_VMOD_TVTYP);
  345. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  346. venc_write(sd, VENC_XHINTVL, 0);
  347. return 0;
  348. }
  349. /*
  350. * venc_set_1080i30_internal - Setup 1080i30 in venc for dm365 only
  351. */
  352. static int venc_set_1080i30_internal(struct v4l2_subdev *sd)
  353. {
  354. struct venc_state *venc = to_state(sd);
  355. struct venc_platform_data *pdata = venc->pdata;
  356. if (pdata->setup_clock(VPBE_ENC_CUSTOM_TIMINGS, 74250000) < 0)
  357. return -EINVAL;
  358. venc_enabledigitaloutput(sd, 0);
  359. venc_write(sd, VENC_OSDCLK0, 0);
  360. venc_write(sd, VENC_OSDCLK1, 1);
  361. venc_write(sd, VENC_VMOD, 0);
  362. /* DM365 component HD mode */
  363. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  364. VENC_VMOD_VIE);
  365. venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
  366. venc_modify(sd, VENC_VMOD, (HDTV_1080I << VENC_VMOD_TVTYP_SHIFT),
  367. VENC_VMOD_TVTYP);
  368. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  369. venc_write(sd, VENC_XHINTVL, 0);
  370. return 0;
  371. }
  372. static int venc_s_std_output(struct v4l2_subdev *sd, v4l2_std_id norm)
  373. {
  374. v4l2_dbg(debug, 1, sd, "venc_s_std_output\n");
  375. if (norm & V4L2_STD_525_60)
  376. return venc_set_ntsc(sd);
  377. else if (norm & V4L2_STD_625_50)
  378. return venc_set_pal(sd);
  379. return -EINVAL;
  380. }
  381. static int venc_s_dv_timings(struct v4l2_subdev *sd,
  382. struct v4l2_dv_timings *dv_timings)
  383. {
  384. struct venc_state *venc = to_state(sd);
  385. u32 height = dv_timings->bt.height;
  386. int ret;
  387. v4l2_dbg(debug, 1, sd, "venc_s_dv_timings\n");
  388. if (height == 576)
  389. return venc_set_576p50(sd);
  390. else if (height == 480)
  391. return venc_set_480p59_94(sd);
  392. else if ((height == 720) &&
  393. (venc->venc_type == VPBE_VERSION_2)) {
  394. /* TBD setup internal 720p mode here */
  395. ret = venc_set_720p60_internal(sd);
  396. /* for DM365 VPBE, there is DAC inside */
  397. vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
  398. return ret;
  399. } else if ((height == 1080) &&
  400. (venc->venc_type == VPBE_VERSION_2)) {
  401. /* TBD setup internal 1080i mode here */
  402. ret = venc_set_1080i30_internal(sd);
  403. /* for DM365 VPBE, there is DAC inside */
  404. vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
  405. return ret;
  406. }
  407. return -EINVAL;
  408. }
  409. static int venc_s_routing(struct v4l2_subdev *sd, u32 input, u32 output,
  410. u32 config)
  411. {
  412. struct venc_state *venc = to_state(sd);
  413. int ret;
  414. v4l2_dbg(debug, 1, sd, "venc_s_routing\n");
  415. ret = venc_set_dac(sd, output);
  416. if (!ret)
  417. venc->output = output;
  418. return ret;
  419. }
  420. static long venc_ioctl(struct v4l2_subdev *sd,
  421. unsigned int cmd,
  422. void *arg)
  423. {
  424. u32 val;
  425. switch (cmd) {
  426. case VENC_GET_FLD:
  427. val = venc_read(sd, VENC_VSTAT);
  428. *((int *)arg) = ((val & VENC_VSTAT_FIDST) ==
  429. VENC_VSTAT_FIDST);
  430. break;
  431. default:
  432. v4l2_err(sd, "Wrong IOCTL cmd\n");
  433. break;
  434. }
  435. return 0;
  436. }
  437. static const struct v4l2_subdev_core_ops venc_core_ops = {
  438. .ioctl = venc_ioctl,
  439. };
  440. static const struct v4l2_subdev_video_ops venc_video_ops = {
  441. .s_routing = venc_s_routing,
  442. .s_std_output = venc_s_std_output,
  443. .s_dv_timings = venc_s_dv_timings,
  444. };
  445. static const struct v4l2_subdev_ops venc_ops = {
  446. .core = &venc_core_ops,
  447. .video = &venc_video_ops,
  448. };
  449. static int venc_initialize(struct v4l2_subdev *sd)
  450. {
  451. struct venc_state *venc = to_state(sd);
  452. int ret;
  453. /* Set default to output to composite and std to NTSC */
  454. venc->output = 0;
  455. venc->std = V4L2_STD_525_60;
  456. ret = venc_s_routing(sd, 0, venc->output, 0);
  457. if (ret < 0) {
  458. v4l2_err(sd, "Error setting output during init\n");
  459. return -EINVAL;
  460. }
  461. ret = venc_s_std_output(sd, venc->std);
  462. if (ret < 0) {
  463. v4l2_err(sd, "Error setting std during init\n");
  464. return -EINVAL;
  465. }
  466. return ret;
  467. }
  468. static int venc_device_get(struct device *dev, void *data)
  469. {
  470. struct platform_device *pdev = to_platform_device(dev);
  471. struct venc_state **venc = data;
  472. if (strstr(pdev->name, "vpbe-venc") != NULL)
  473. *venc = platform_get_drvdata(pdev);
  474. return 0;
  475. }
  476. struct v4l2_subdev *venc_sub_dev_init(struct v4l2_device *v4l2_dev,
  477. const char *venc_name)
  478. {
  479. struct venc_state *venc;
  480. int err;
  481. err = bus_for_each_dev(&platform_bus_type, NULL, &venc,
  482. venc_device_get);
  483. if (venc == NULL)
  484. return NULL;
  485. v4l2_subdev_init(&venc->sd, &venc_ops);
  486. strcpy(venc->sd.name, venc_name);
  487. if (v4l2_device_register_subdev(v4l2_dev, &venc->sd) < 0) {
  488. v4l2_err(v4l2_dev,
  489. "vpbe unable to register venc sub device\n");
  490. return NULL;
  491. }
  492. if (venc_initialize(&venc->sd)) {
  493. v4l2_err(v4l2_dev,
  494. "vpbe venc initialization failed\n");
  495. return NULL;
  496. }
  497. return &venc->sd;
  498. }
  499. EXPORT_SYMBOL(venc_sub_dev_init);
  500. static int venc_probe(struct platform_device *pdev)
  501. {
  502. const struct platform_device_id *pdev_id;
  503. struct venc_state *venc;
  504. struct resource *res;
  505. int ret;
  506. venc = kzalloc(sizeof(struct venc_state), GFP_KERNEL);
  507. if (venc == NULL)
  508. return -ENOMEM;
  509. pdev_id = platform_get_device_id(pdev);
  510. if (!pdev_id) {
  511. ret = -EINVAL;
  512. goto free_mem;
  513. }
  514. venc->venc_type = pdev_id->driver_data;
  515. venc->pdev = &pdev->dev;
  516. venc->pdata = pdev->dev.platform_data;
  517. if (NULL == venc->pdata) {
  518. dev_err(venc->pdev, "Unable to get platform data for"
  519. " VENC sub device");
  520. ret = -ENOENT;
  521. goto free_mem;
  522. }
  523. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  524. if (!res) {
  525. dev_err(venc->pdev,
  526. "Unable to get VENC register address map\n");
  527. ret = -ENODEV;
  528. goto free_mem;
  529. }
  530. if (!request_mem_region(res->start, resource_size(res), "venc")) {
  531. dev_err(venc->pdev, "Unable to reserve VENC MMIO region\n");
  532. ret = -ENODEV;
  533. goto free_mem;
  534. }
  535. venc->venc_base = ioremap_nocache(res->start, resource_size(res));
  536. if (!venc->venc_base) {
  537. dev_err(venc->pdev, "Unable to map VENC IO space\n");
  538. ret = -ENODEV;
  539. goto release_venc_mem_region;
  540. }
  541. if (venc->venc_type != VPBE_VERSION_1) {
  542. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  543. if (!res) {
  544. dev_err(venc->pdev,
  545. "Unable to get VDAC_CONFIG address map\n");
  546. ret = -ENODEV;
  547. goto unmap_venc_io;
  548. }
  549. if (!request_mem_region(res->start,
  550. resource_size(res), "venc")) {
  551. dev_err(venc->pdev,
  552. "Unable to reserve VDAC_CONFIG MMIO region\n");
  553. ret = -ENODEV;
  554. goto unmap_venc_io;
  555. }
  556. venc->vdaccfg_reg = ioremap_nocache(res->start,
  557. resource_size(res));
  558. if (!venc->vdaccfg_reg) {
  559. dev_err(venc->pdev,
  560. "Unable to map VDAC_CONFIG IO space\n");
  561. ret = -ENODEV;
  562. goto release_vdaccfg_mem_region;
  563. }
  564. }
  565. spin_lock_init(&venc->lock);
  566. platform_set_drvdata(pdev, venc);
  567. dev_notice(venc->pdev, "VENC sub device probe success\n");
  568. return 0;
  569. release_vdaccfg_mem_region:
  570. release_mem_region(res->start, resource_size(res));
  571. unmap_venc_io:
  572. iounmap(venc->venc_base);
  573. release_venc_mem_region:
  574. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  575. release_mem_region(res->start, resource_size(res));
  576. free_mem:
  577. kfree(venc);
  578. return ret;
  579. }
  580. static int venc_remove(struct platform_device *pdev)
  581. {
  582. struct venc_state *venc = platform_get_drvdata(pdev);
  583. struct resource *res;
  584. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  585. iounmap((void *)venc->venc_base);
  586. release_mem_region(res->start, resource_size(res));
  587. if (venc->venc_type != VPBE_VERSION_1) {
  588. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  589. iounmap((void *)venc->vdaccfg_reg);
  590. release_mem_region(res->start, resource_size(res));
  591. }
  592. kfree(venc);
  593. return 0;
  594. }
  595. static struct platform_driver venc_driver = {
  596. .probe = venc_probe,
  597. .remove = venc_remove,
  598. .driver = {
  599. .name = MODULE_NAME,
  600. .owner = THIS_MODULE,
  601. },
  602. .id_table = vpbe_venc_devtype
  603. };
  604. module_platform_driver(venc_driver);
  605. MODULE_LICENSE("GPL");
  606. MODULE_DESCRIPTION("VPBE VENC Driver");
  607. MODULE_AUTHOR("Texas Instruments");