cx18-streams.c 29 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059
  1. /*
  2. * cx18 init/start/stop/exit stream functions
  3. *
  4. * Derived from ivtv-streams.c
  5. *
  6. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  7. * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  22. * 02111-1307 USA
  23. */
  24. #include "cx18-driver.h"
  25. #include "cx18-io.h"
  26. #include "cx18-fileops.h"
  27. #include "cx18-mailbox.h"
  28. #include "cx18-i2c.h"
  29. #include "cx18-queue.h"
  30. #include "cx18-ioctl.h"
  31. #include "cx18-streams.h"
  32. #include "cx18-cards.h"
  33. #include "cx18-scb.h"
  34. #include "cx18-dvb.h"
  35. #define CX18_DSP0_INTERRUPT_MASK 0xd0004C
  36. static struct v4l2_file_operations cx18_v4l2_enc_fops = {
  37. .owner = THIS_MODULE,
  38. .read = cx18_v4l2_read,
  39. .open = cx18_v4l2_open,
  40. .unlocked_ioctl = video_ioctl2,
  41. .release = cx18_v4l2_close,
  42. .poll = cx18_v4l2_enc_poll,
  43. .mmap = cx18_v4l2_mmap,
  44. };
  45. /* offset from 0 to register ts v4l2 minors on */
  46. #define CX18_V4L2_ENC_TS_OFFSET 16
  47. /* offset from 0 to register pcm v4l2 minors on */
  48. #define CX18_V4L2_ENC_PCM_OFFSET 24
  49. /* offset from 0 to register yuv v4l2 minors on */
  50. #define CX18_V4L2_ENC_YUV_OFFSET 32
  51. static struct {
  52. const char *name;
  53. int vfl_type;
  54. int num_offset;
  55. int dma;
  56. } cx18_stream_info[] = {
  57. { /* CX18_ENC_STREAM_TYPE_MPG */
  58. "encoder MPEG",
  59. VFL_TYPE_GRABBER, 0,
  60. PCI_DMA_FROMDEVICE,
  61. },
  62. { /* CX18_ENC_STREAM_TYPE_TS */
  63. "TS",
  64. VFL_TYPE_GRABBER, -1,
  65. PCI_DMA_FROMDEVICE,
  66. },
  67. { /* CX18_ENC_STREAM_TYPE_YUV */
  68. "encoder YUV",
  69. VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
  70. PCI_DMA_FROMDEVICE,
  71. },
  72. { /* CX18_ENC_STREAM_TYPE_VBI */
  73. "encoder VBI",
  74. VFL_TYPE_VBI, 0,
  75. PCI_DMA_FROMDEVICE,
  76. },
  77. { /* CX18_ENC_STREAM_TYPE_PCM */
  78. "encoder PCM audio",
  79. VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
  80. PCI_DMA_FROMDEVICE,
  81. },
  82. { /* CX18_ENC_STREAM_TYPE_IDX */
  83. "encoder IDX",
  84. VFL_TYPE_GRABBER, -1,
  85. PCI_DMA_FROMDEVICE,
  86. },
  87. { /* CX18_ENC_STREAM_TYPE_RAD */
  88. "encoder radio",
  89. VFL_TYPE_RADIO, 0,
  90. PCI_DMA_NONE,
  91. },
  92. };
  93. static void cx18_dma_free(struct videobuf_queue *q,
  94. struct cx18_stream *s, struct cx18_videobuf_buffer *buf)
  95. {
  96. videobuf_waiton(q, &buf->vb, 0, 0);
  97. videobuf_vmalloc_free(&buf->vb);
  98. buf->vb.state = VIDEOBUF_NEEDS_INIT;
  99. }
  100. static int cx18_prepare_buffer(struct videobuf_queue *q,
  101. struct cx18_stream *s,
  102. struct cx18_videobuf_buffer *buf,
  103. u32 pixelformat,
  104. unsigned int width, unsigned int height,
  105. enum v4l2_field field)
  106. {
  107. struct cx18 *cx = s->cx;
  108. int rc = 0;
  109. /* check settings */
  110. buf->bytes_used = 0;
  111. if ((width < 48) || (height < 32))
  112. return -EINVAL;
  113. buf->vb.size = (width * height * 2);
  114. if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
  115. return -EINVAL;
  116. /* alloc + fill struct (if changed) */
  117. if (buf->vb.width != width || buf->vb.height != height ||
  118. buf->vb.field != field || s->pixelformat != pixelformat ||
  119. buf->tvnorm != cx->std) {
  120. buf->vb.width = width;
  121. buf->vb.height = height;
  122. buf->vb.field = field;
  123. buf->tvnorm = cx->std;
  124. s->pixelformat = pixelformat;
  125. /* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
  126. UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
  127. if (s->pixelformat == V4L2_PIX_FMT_HM12)
  128. s->vb_bytes_per_frame = height * 720 * 3 / 2;
  129. else
  130. s->vb_bytes_per_frame = height * 720 * 2;
  131. cx18_dma_free(q, s, buf);
  132. }
  133. if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
  134. return -EINVAL;
  135. if (buf->vb.field == 0)
  136. buf->vb.field = V4L2_FIELD_INTERLACED;
  137. if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
  138. buf->vb.width = width;
  139. buf->vb.height = height;
  140. buf->vb.field = field;
  141. buf->tvnorm = cx->std;
  142. s->pixelformat = pixelformat;
  143. /* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
  144. UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
  145. if (s->pixelformat == V4L2_PIX_FMT_HM12)
  146. s->vb_bytes_per_frame = height * 720 * 3 / 2;
  147. else
  148. s->vb_bytes_per_frame = height * 720 * 2;
  149. rc = videobuf_iolock(q, &buf->vb, NULL);
  150. if (rc != 0)
  151. goto fail;
  152. }
  153. buf->vb.state = VIDEOBUF_PREPARED;
  154. return 0;
  155. fail:
  156. cx18_dma_free(q, s, buf);
  157. return rc;
  158. }
  159. /* VB_MIN_BUFSIZE is lcm(1440 * 480, 1440 * 576)
  160. 1440 is a single line of 4:2:2 YUV at 720 luma samples wide
  161. */
  162. #define VB_MIN_BUFFERS 32
  163. #define VB_MIN_BUFSIZE 4147200
  164. static int buffer_setup(struct videobuf_queue *q,
  165. unsigned int *count, unsigned int *size)
  166. {
  167. struct cx18_stream *s = q->priv_data;
  168. struct cx18 *cx = s->cx;
  169. *size = 2 * cx->cxhdl.width * cx->cxhdl.height;
  170. if (*count == 0)
  171. *count = VB_MIN_BUFFERS;
  172. while (*size * *count > VB_MIN_BUFFERS * VB_MIN_BUFSIZE)
  173. (*count)--;
  174. q->field = V4L2_FIELD_INTERLACED;
  175. q->last = V4L2_FIELD_INTERLACED;
  176. return 0;
  177. }
  178. static int buffer_prepare(struct videobuf_queue *q,
  179. struct videobuf_buffer *vb,
  180. enum v4l2_field field)
  181. {
  182. struct cx18_videobuf_buffer *buf =
  183. container_of(vb, struct cx18_videobuf_buffer, vb);
  184. struct cx18_stream *s = q->priv_data;
  185. struct cx18 *cx = s->cx;
  186. return cx18_prepare_buffer(q, s, buf, s->pixelformat,
  187. cx->cxhdl.width, cx->cxhdl.height, field);
  188. }
  189. static void buffer_release(struct videobuf_queue *q,
  190. struct videobuf_buffer *vb)
  191. {
  192. struct cx18_videobuf_buffer *buf =
  193. container_of(vb, struct cx18_videobuf_buffer, vb);
  194. struct cx18_stream *s = q->priv_data;
  195. cx18_dma_free(q, s, buf);
  196. }
  197. static void buffer_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  198. {
  199. struct cx18_videobuf_buffer *buf =
  200. container_of(vb, struct cx18_videobuf_buffer, vb);
  201. struct cx18_stream *s = q->priv_data;
  202. buf->vb.state = VIDEOBUF_QUEUED;
  203. list_add_tail(&buf->vb.queue, &s->vb_capture);
  204. }
  205. static struct videobuf_queue_ops cx18_videobuf_qops = {
  206. .buf_setup = buffer_setup,
  207. .buf_prepare = buffer_prepare,
  208. .buf_queue = buffer_queue,
  209. .buf_release = buffer_release,
  210. };
  211. static void cx18_stream_init(struct cx18 *cx, int type)
  212. {
  213. struct cx18_stream *s = &cx->streams[type];
  214. struct video_device *video_dev = s->video_dev;
  215. /* we need to keep video_dev, so restore it afterwards */
  216. memset(s, 0, sizeof(*s));
  217. s->video_dev = video_dev;
  218. /* initialize cx18_stream fields */
  219. s->dvb = NULL;
  220. s->cx = cx;
  221. s->type = type;
  222. s->name = cx18_stream_info[type].name;
  223. s->handle = CX18_INVALID_TASK_HANDLE;
  224. s->dma = cx18_stream_info[type].dma;
  225. s->buffers = cx->stream_buffers[type];
  226. s->buf_size = cx->stream_buf_size[type];
  227. INIT_LIST_HEAD(&s->buf_pool);
  228. s->bufs_per_mdl = 1;
  229. s->mdl_size = s->buf_size * s->bufs_per_mdl;
  230. init_waitqueue_head(&s->waitq);
  231. s->id = -1;
  232. spin_lock_init(&s->q_free.lock);
  233. cx18_queue_init(&s->q_free);
  234. spin_lock_init(&s->q_busy.lock);
  235. cx18_queue_init(&s->q_busy);
  236. spin_lock_init(&s->q_full.lock);
  237. cx18_queue_init(&s->q_full);
  238. spin_lock_init(&s->q_idle.lock);
  239. cx18_queue_init(&s->q_idle);
  240. INIT_WORK(&s->out_work_order, cx18_out_work_handler);
  241. INIT_LIST_HEAD(&s->vb_capture);
  242. s->vb_timeout.function = cx18_vb_timeout;
  243. s->vb_timeout.data = (unsigned long)s;
  244. init_timer(&s->vb_timeout);
  245. spin_lock_init(&s->vb_lock);
  246. if (type == CX18_ENC_STREAM_TYPE_YUV) {
  247. spin_lock_init(&s->vbuf_q_lock);
  248. s->vb_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  249. videobuf_queue_vmalloc_init(&s->vbuf_q, &cx18_videobuf_qops,
  250. &cx->pci_dev->dev, &s->vbuf_q_lock,
  251. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  252. V4L2_FIELD_INTERLACED,
  253. sizeof(struct cx18_videobuf_buffer),
  254. s, &cx->serialize_lock);
  255. /* Assume the previous pixel default */
  256. s->pixelformat = V4L2_PIX_FMT_HM12;
  257. s->vb_bytes_per_frame = cx->cxhdl.height * 720 * 3 / 2;
  258. }
  259. }
  260. static int cx18_prep_dev(struct cx18 *cx, int type)
  261. {
  262. struct cx18_stream *s = &cx->streams[type];
  263. u32 cap = cx->v4l2_cap;
  264. int num_offset = cx18_stream_info[type].num_offset;
  265. int num = cx->instance + cx18_first_minor + num_offset;
  266. /*
  267. * These five fields are always initialized.
  268. * For analog capture related streams, if video_dev == NULL then the
  269. * stream is not in use.
  270. * For the TS stream, if dvb == NULL then the stream is not in use.
  271. * In those cases no other fields but these four can be used.
  272. */
  273. s->video_dev = NULL;
  274. s->dvb = NULL;
  275. s->cx = cx;
  276. s->type = type;
  277. s->name = cx18_stream_info[type].name;
  278. /* Check whether the radio is supported */
  279. if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
  280. return 0;
  281. /* Check whether VBI is supported */
  282. if (type == CX18_ENC_STREAM_TYPE_VBI &&
  283. !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
  284. return 0;
  285. /* User explicitly selected 0 buffers for these streams, so don't
  286. create them. */
  287. if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
  288. cx->stream_buffers[type] == 0) {
  289. CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
  290. return 0;
  291. }
  292. cx18_stream_init(cx, type);
  293. /* Allocate the cx18_dvb struct only for the TS on cards with DTV */
  294. if (type == CX18_ENC_STREAM_TYPE_TS) {
  295. if (cx->card->hw_all & CX18_HW_DVB) {
  296. s->dvb = kzalloc(sizeof(struct cx18_dvb), GFP_KERNEL);
  297. if (s->dvb == NULL) {
  298. CX18_ERR("Couldn't allocate cx18_dvb structure"
  299. " for %s\n", s->name);
  300. return -ENOMEM;
  301. }
  302. } else {
  303. /* Don't need buffers for the TS, if there is no DVB */
  304. s->buffers = 0;
  305. }
  306. }
  307. if (num_offset == -1)
  308. return 0;
  309. /* allocate and initialize the v4l2 video device structure */
  310. s->video_dev = video_device_alloc();
  311. if (s->video_dev == NULL) {
  312. CX18_ERR("Couldn't allocate v4l2 video_device for %s\n",
  313. s->name);
  314. return -ENOMEM;
  315. }
  316. snprintf(s->video_dev->name, sizeof(s->video_dev->name), "%s %s",
  317. cx->v4l2_dev.name, s->name);
  318. s->video_dev->num = num;
  319. s->video_dev->v4l2_dev = &cx->v4l2_dev;
  320. s->video_dev->fops = &cx18_v4l2_enc_fops;
  321. s->video_dev->release = video_device_release;
  322. s->video_dev->tvnorms = V4L2_STD_ALL;
  323. s->video_dev->lock = &cx->serialize_lock;
  324. set_bit(V4L2_FL_USE_FH_PRIO, &s->video_dev->flags);
  325. cx18_set_funcs(s->video_dev);
  326. return 0;
  327. }
  328. /* Initialize v4l2 variables and register v4l2 devices */
  329. int cx18_streams_setup(struct cx18 *cx)
  330. {
  331. int type, ret;
  332. /* Setup V4L2 Devices */
  333. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  334. /* Prepare device */
  335. ret = cx18_prep_dev(cx, type);
  336. if (ret < 0)
  337. break;
  338. /* Allocate Stream */
  339. ret = cx18_stream_alloc(&cx->streams[type]);
  340. if (ret < 0)
  341. break;
  342. }
  343. if (type == CX18_MAX_STREAMS)
  344. return 0;
  345. /* One or more streams could not be initialized. Clean 'em all up. */
  346. cx18_streams_cleanup(cx, 0);
  347. return ret;
  348. }
  349. static int cx18_reg_dev(struct cx18 *cx, int type)
  350. {
  351. struct cx18_stream *s = &cx->streams[type];
  352. int vfl_type = cx18_stream_info[type].vfl_type;
  353. const char *name;
  354. int num, ret;
  355. if (type == CX18_ENC_STREAM_TYPE_TS && s->dvb != NULL) {
  356. ret = cx18_dvb_register(s);
  357. if (ret < 0) {
  358. CX18_ERR("DVB failed to register\n");
  359. return ret;
  360. }
  361. }
  362. if (s->video_dev == NULL)
  363. return 0;
  364. num = s->video_dev->num;
  365. /* card number + user defined offset + device offset */
  366. if (type != CX18_ENC_STREAM_TYPE_MPG) {
  367. struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
  368. if (s_mpg->video_dev)
  369. num = s_mpg->video_dev->num
  370. + cx18_stream_info[type].num_offset;
  371. }
  372. video_set_drvdata(s->video_dev, s);
  373. /* Register device. First try the desired minor, then any free one. */
  374. ret = video_register_device_no_warn(s->video_dev, vfl_type, num);
  375. if (ret < 0) {
  376. CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n",
  377. s->name, num);
  378. video_device_release(s->video_dev);
  379. s->video_dev = NULL;
  380. return ret;
  381. }
  382. name = video_device_node_name(s->video_dev);
  383. switch (vfl_type) {
  384. case VFL_TYPE_GRABBER:
  385. CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n",
  386. name, s->name, cx->stream_buffers[type],
  387. cx->stream_buf_size[type] / 1024,
  388. (cx->stream_buf_size[type] * 100 / 1024) % 100);
  389. break;
  390. case VFL_TYPE_RADIO:
  391. CX18_INFO("Registered device %s for %s\n", name, s->name);
  392. break;
  393. case VFL_TYPE_VBI:
  394. if (cx->stream_buffers[type])
  395. CX18_INFO("Registered device %s for %s "
  396. "(%d x %d bytes)\n",
  397. name, s->name, cx->stream_buffers[type],
  398. cx->stream_buf_size[type]);
  399. else
  400. CX18_INFO("Registered device %s for %s\n",
  401. name, s->name);
  402. break;
  403. }
  404. return 0;
  405. }
  406. /* Register v4l2 devices */
  407. int cx18_streams_register(struct cx18 *cx)
  408. {
  409. int type;
  410. int err;
  411. int ret = 0;
  412. /* Register V4L2 devices */
  413. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  414. err = cx18_reg_dev(cx, type);
  415. if (err && ret == 0)
  416. ret = err;
  417. }
  418. if (ret == 0)
  419. return 0;
  420. /* One or more streams could not be initialized. Clean 'em all up. */
  421. cx18_streams_cleanup(cx, 1);
  422. return ret;
  423. }
  424. /* Unregister v4l2 devices */
  425. void cx18_streams_cleanup(struct cx18 *cx, int unregister)
  426. {
  427. struct video_device *vdev;
  428. int type;
  429. /* Teardown all streams */
  430. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  431. /* The TS has a cx18_dvb structure, not a video_device */
  432. if (type == CX18_ENC_STREAM_TYPE_TS) {
  433. if (cx->streams[type].dvb != NULL) {
  434. if (unregister)
  435. cx18_dvb_unregister(&cx->streams[type]);
  436. kfree(cx->streams[type].dvb);
  437. cx->streams[type].dvb = NULL;
  438. cx18_stream_free(&cx->streams[type]);
  439. }
  440. continue;
  441. }
  442. /* No struct video_device, but can have buffers allocated */
  443. if (type == CX18_ENC_STREAM_TYPE_IDX) {
  444. /* If the module params didn't inhibit IDX ... */
  445. if (cx->stream_buffers[type] != 0) {
  446. cx->stream_buffers[type] = 0;
  447. /*
  448. * Before calling cx18_stream_free(),
  449. * check if the IDX stream was actually set up.
  450. * Needed, since the cx18_probe() error path
  451. * exits through here as well as normal clean up
  452. */
  453. if (cx->streams[type].buffers != 0)
  454. cx18_stream_free(&cx->streams[type]);
  455. }
  456. continue;
  457. }
  458. /* If struct video_device exists, can have buffers allocated */
  459. vdev = cx->streams[type].video_dev;
  460. cx->streams[type].video_dev = NULL;
  461. if (vdev == NULL)
  462. continue;
  463. if (type == CX18_ENC_STREAM_TYPE_YUV)
  464. videobuf_mmap_free(&cx->streams[type].vbuf_q);
  465. cx18_stream_free(&cx->streams[type]);
  466. /* Unregister or release device */
  467. if (unregister)
  468. video_unregister_device(vdev);
  469. else
  470. video_device_release(vdev);
  471. }
  472. }
  473. static void cx18_vbi_setup(struct cx18_stream *s)
  474. {
  475. struct cx18 *cx = s->cx;
  476. int raw = cx18_raw_vbi(cx);
  477. u32 data[CX2341X_MBOX_MAX_DATA];
  478. int lines;
  479. if (cx->is_60hz) {
  480. cx->vbi.count = 12;
  481. cx->vbi.start[0] = 10;
  482. cx->vbi.start[1] = 273;
  483. } else { /* PAL/SECAM */
  484. cx->vbi.count = 18;
  485. cx->vbi.start[0] = 6;
  486. cx->vbi.start[1] = 318;
  487. }
  488. /* setup VBI registers */
  489. if (raw)
  490. v4l2_subdev_call(cx->sd_av, vbi, s_raw_fmt, &cx->vbi.in.fmt.vbi);
  491. else
  492. v4l2_subdev_call(cx->sd_av, vbi, s_sliced_fmt, &cx->vbi.in.fmt.sliced);
  493. /*
  494. * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw
  495. * VBI when the first analog capture channel starts, as once it starts
  496. * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup
  497. * (i.e. for the VBI capture channels). We also send it for each
  498. * analog capture channel anyway just to make sure we get the proper
  499. * behavior
  500. */
  501. if (raw) {
  502. lines = cx->vbi.count * 2;
  503. } else {
  504. /*
  505. * For 525/60 systems, according to the VIP 2 & BT.656 std:
  506. * The EAV RP code's Field bit toggles on line 4, a few lines
  507. * after the Vertcal Blank bit has already toggled.
  508. * Tell the encoder to capture 21-4+1=18 lines per field,
  509. * since we want lines 10 through 21.
  510. *
  511. * For 625/50 systems, according to the VIP 2 & BT.656 std:
  512. * The EAV RP code's Field bit toggles on line 1, a few lines
  513. * after the Vertcal Blank bit has already toggled.
  514. * (We've actually set the digitizer so that the Field bit
  515. * toggles on line 2.) Tell the encoder to capture 23-2+1=22
  516. * lines per field, since we want lines 6 through 23.
  517. */
  518. lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2;
  519. }
  520. data[0] = s->handle;
  521. /* Lines per field */
  522. data[1] = (lines / 2) | ((lines / 2) << 16);
  523. /* bytes per line */
  524. data[2] = (raw ? vbi_active_samples
  525. : (cx->is_60hz ? vbi_hblank_samples_60Hz
  526. : vbi_hblank_samples_50Hz));
  527. /* Every X number of frames a VBI interrupt arrives
  528. (frames as in 25 or 30 fps) */
  529. data[3] = 1;
  530. /*
  531. * Set the SAV/EAV RP codes to look for as start/stop points
  532. * when in VIP-1.1 mode
  533. */
  534. if (raw) {
  535. /*
  536. * Start codes for beginning of "active" line in vertical blank
  537. * 0x20 ( VerticalBlank )
  538. * 0x60 ( EvenField VerticalBlank )
  539. */
  540. data[4] = 0x20602060;
  541. /*
  542. * End codes for end of "active" raw lines and regular lines
  543. * 0x30 ( VerticalBlank HorizontalBlank)
  544. * 0x70 ( EvenField VerticalBlank HorizontalBlank)
  545. * 0x90 (Task HorizontalBlank)
  546. * 0xd0 (Task EvenField HorizontalBlank)
  547. */
  548. data[5] = 0x307090d0;
  549. } else {
  550. /*
  551. * End codes for active video, we want data in the hblank region
  552. * 0xb0 (Task 0 VerticalBlank HorizontalBlank)
  553. * 0xf0 (Task EvenField VerticalBlank HorizontalBlank)
  554. *
  555. * Since the V bit is only allowed to toggle in the EAV RP code,
  556. * just before the first active region line, these two
  557. * are problematic:
  558. * 0x90 (Task HorizontalBlank)
  559. * 0xd0 (Task EvenField HorizontalBlank)
  560. *
  561. * We have set the digitzer such that we don't have to worry
  562. * about these problem codes.
  563. */
  564. data[4] = 0xB0F0B0F0;
  565. /*
  566. * Start codes for beginning of active line in vertical blank
  567. * 0xa0 (Task VerticalBlank )
  568. * 0xe0 (Task EvenField VerticalBlank )
  569. */
  570. data[5] = 0xA0E0A0E0;
  571. }
  572. CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
  573. data[0], data[1], data[2], data[3], data[4], data[5]);
  574. cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
  575. }
  576. void cx18_stream_rotate_idx_mdls(struct cx18 *cx)
  577. {
  578. struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
  579. struct cx18_mdl *mdl;
  580. if (!cx18_stream_enabled(s))
  581. return;
  582. /* Return if the firmware is not running low on MDLs */
  583. if ((atomic_read(&s->q_free.depth) + atomic_read(&s->q_busy.depth)) >=
  584. CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN)
  585. return;
  586. /* Return if there are no MDLs to rotate back to the firmware */
  587. if (atomic_read(&s->q_full.depth) < 2)
  588. return;
  589. /*
  590. * Take the oldest IDX MDL still holding data, and discard its index
  591. * entries by scheduling the MDL to go back to the firmware
  592. */
  593. mdl = cx18_dequeue(s, &s->q_full);
  594. if (mdl != NULL)
  595. cx18_enqueue(s, mdl, &s->q_free);
  596. }
  597. static
  598. struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s,
  599. struct cx18_mdl *mdl)
  600. {
  601. struct cx18 *cx = s->cx;
  602. struct cx18_queue *q;
  603. /* Don't give it to the firmware, if we're not running a capture */
  604. if (s->handle == CX18_INVALID_TASK_HANDLE ||
  605. test_bit(CX18_F_S_STOPPING, &s->s_flags) ||
  606. !test_bit(CX18_F_S_STREAMING, &s->s_flags))
  607. return cx18_enqueue(s, mdl, &s->q_free);
  608. q = cx18_enqueue(s, mdl, &s->q_busy);
  609. if (q != &s->q_busy)
  610. return q; /* The firmware has the max MDLs it can handle */
  611. cx18_mdl_sync_for_device(s, mdl);
  612. cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
  613. (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem,
  614. s->bufs_per_mdl, mdl->id, s->mdl_size);
  615. return q;
  616. }
  617. static
  618. void _cx18_stream_load_fw_queue(struct cx18_stream *s)
  619. {
  620. struct cx18_queue *q;
  621. struct cx18_mdl *mdl;
  622. if (atomic_read(&s->q_free.depth) == 0 ||
  623. atomic_read(&s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM)
  624. return;
  625. /* Move from q_free to q_busy notifying the firmware, until the limit */
  626. do {
  627. mdl = cx18_dequeue(s, &s->q_free);
  628. if (mdl == NULL)
  629. break;
  630. q = _cx18_stream_put_mdl_fw(s, mdl);
  631. } while (atomic_read(&s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM
  632. && q == &s->q_busy);
  633. }
  634. void cx18_out_work_handler(struct work_struct *work)
  635. {
  636. struct cx18_stream *s =
  637. container_of(work, struct cx18_stream, out_work_order);
  638. _cx18_stream_load_fw_queue(s);
  639. }
  640. static void cx18_stream_configure_mdls(struct cx18_stream *s)
  641. {
  642. cx18_unload_queues(s);
  643. switch (s->type) {
  644. case CX18_ENC_STREAM_TYPE_YUV:
  645. /*
  646. * Height should be a multiple of 32 lines.
  647. * Set the MDL size to the exact size needed for one frame.
  648. * Use enough buffers per MDL to cover the MDL size
  649. */
  650. if (s->pixelformat == V4L2_PIX_FMT_HM12)
  651. s->mdl_size = 720 * s->cx->cxhdl.height * 3 / 2;
  652. else
  653. s->mdl_size = 720 * s->cx->cxhdl.height * 2;
  654. s->bufs_per_mdl = s->mdl_size / s->buf_size;
  655. if (s->mdl_size % s->buf_size)
  656. s->bufs_per_mdl++;
  657. break;
  658. case CX18_ENC_STREAM_TYPE_VBI:
  659. s->bufs_per_mdl = 1;
  660. if (cx18_raw_vbi(s->cx)) {
  661. s->mdl_size = (s->cx->is_60hz ? 12 : 18)
  662. * 2 * vbi_active_samples;
  663. } else {
  664. /*
  665. * See comment in cx18_vbi_setup() below about the
  666. * extra lines we capture in sliced VBI mode due to
  667. * the lines on which EAV RP codes toggle.
  668. */
  669. s->mdl_size = s->cx->is_60hz
  670. ? (21 - 4 + 1) * 2 * vbi_hblank_samples_60Hz
  671. : (23 - 2 + 1) * 2 * vbi_hblank_samples_50Hz;
  672. }
  673. break;
  674. default:
  675. s->bufs_per_mdl = 1;
  676. s->mdl_size = s->buf_size * s->bufs_per_mdl;
  677. break;
  678. }
  679. cx18_load_queues(s);
  680. }
  681. int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
  682. {
  683. u32 data[MAX_MB_ARGUMENTS];
  684. struct cx18 *cx = s->cx;
  685. int captype = 0;
  686. struct cx18_stream *s_idx;
  687. if (!cx18_stream_enabled(s))
  688. return -EINVAL;
  689. CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
  690. switch (s->type) {
  691. case CX18_ENC_STREAM_TYPE_MPG:
  692. captype = CAPTURE_CHANNEL_TYPE_MPEG;
  693. cx->mpg_data_received = cx->vbi_data_inserted = 0;
  694. cx->dualwatch_jiffies = jiffies;
  695. cx->dualwatch_stereo_mode = v4l2_ctrl_g_ctrl(cx->cxhdl.audio_mode);
  696. cx->search_pack_header = 0;
  697. break;
  698. case CX18_ENC_STREAM_TYPE_IDX:
  699. captype = CAPTURE_CHANNEL_TYPE_INDEX;
  700. break;
  701. case CX18_ENC_STREAM_TYPE_TS:
  702. captype = CAPTURE_CHANNEL_TYPE_TS;
  703. break;
  704. case CX18_ENC_STREAM_TYPE_YUV:
  705. captype = CAPTURE_CHANNEL_TYPE_YUV;
  706. break;
  707. case CX18_ENC_STREAM_TYPE_PCM:
  708. captype = CAPTURE_CHANNEL_TYPE_PCM;
  709. break;
  710. case CX18_ENC_STREAM_TYPE_VBI:
  711. #ifdef CX18_ENCODER_PARSES_SLICED
  712. captype = cx18_raw_vbi(cx) ?
  713. CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
  714. #else
  715. /*
  716. * Currently we set things up so that Sliced VBI from the
  717. * digitizer is handled as Raw VBI by the encoder
  718. */
  719. captype = CAPTURE_CHANNEL_TYPE_VBI;
  720. #endif
  721. cx->vbi.frame = 0;
  722. cx->vbi.inserted_frame = 0;
  723. memset(cx->vbi.sliced_mpeg_size,
  724. 0, sizeof(cx->vbi.sliced_mpeg_size));
  725. break;
  726. default:
  727. return -EINVAL;
  728. }
  729. /* Clear Streamoff flags in case left from last capture */
  730. clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
  731. cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
  732. s->handle = data[0];
  733. cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
  734. /*
  735. * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and
  736. * set up all the parameters, as it is not obvious which parameters the
  737. * firmware shares across capture channel types and which it does not.
  738. *
  739. * Some of the cx18_vapi() calls below apply to only certain capture
  740. * channel types. We're hoping there's no harm in calling most of them
  741. * anyway, as long as the values are all consistent. Setting some
  742. * shared parameters will have no effect once an analog capture channel
  743. * has started streaming.
  744. */
  745. if (captype != CAPTURE_CHANNEL_TYPE_TS) {
  746. cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
  747. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
  748. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
  749. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
  750. /*
  751. * Audio related reset according to
  752. * Documentation/video4linux/cx2341x/fw-encoder-api.txt
  753. */
  754. if (atomic_read(&cx->ana_capturing) == 0)
  755. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2,
  756. s->handle, 12);
  757. /*
  758. * Number of lines for Field 1 & Field 2 according to
  759. * Documentation/video4linux/cx2341x/fw-encoder-api.txt
  760. * Field 1 is 312 for 625 line systems in BT.656
  761. * Field 2 is 313 for 625 line systems in BT.656
  762. */
  763. cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
  764. s->handle, 312, 313);
  765. if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
  766. cx18_vbi_setup(s);
  767. /*
  768. * Select to receive I, P, and B frame index entries, if the
  769. * index stream is enabled. Otherwise disable index entry
  770. * generation.
  771. */
  772. s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
  773. cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 2,
  774. s->handle, cx18_stream_enabled(s_idx) ? 7 : 0);
  775. /* Call out to the common CX2341x API setup for user controls */
  776. cx->cxhdl.priv = s;
  777. cx2341x_handler_setup(&cx->cxhdl);
  778. /*
  779. * When starting a capture and we're set for radio,
  780. * ensure the video is muted, despite the user control.
  781. */
  782. if (!cx->cxhdl.video_mute &&
  783. test_bit(CX18_F_I_RADIO_USER, &cx->i_flags))
  784. cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle,
  785. (v4l2_ctrl_g_ctrl(cx->cxhdl.video_mute_yuv) << 8) | 1);
  786. /* Enable the Video Format Converter for UYVY 4:2:2 support,
  787. * rather than the default HM12 Macroblovk 4:2:0 support.
  788. */
  789. if (captype == CAPTURE_CHANNEL_TYPE_YUV) {
  790. if (s->pixelformat == V4L2_PIX_FMT_UYVY)
  791. cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
  792. s->handle, 1);
  793. else
  794. /* If in doubt, default to HM12 */
  795. cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
  796. s->handle, 0);
  797. }
  798. }
  799. if (atomic_read(&cx->tot_capturing) == 0) {
  800. cx2341x_handler_set_busy(&cx->cxhdl, 1);
  801. clear_bit(CX18_F_I_EOS, &cx->i_flags);
  802. cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
  803. }
  804. cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
  805. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
  806. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
  807. /* Init all the cpu_mdls for this stream */
  808. cx18_stream_configure_mdls(s);
  809. _cx18_stream_load_fw_queue(s);
  810. /* begin_capture */
  811. if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
  812. CX18_DEBUG_WARN("Error starting capture!\n");
  813. /* Ensure we're really not capturing before releasing MDLs */
  814. set_bit(CX18_F_S_STOPPING, &s->s_flags);
  815. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  816. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
  817. else
  818. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  819. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  820. /* FIXME - CX18_F_S_STREAMOFF as well? */
  821. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  822. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  823. s->handle = CX18_INVALID_TASK_HANDLE;
  824. clear_bit(CX18_F_S_STOPPING, &s->s_flags);
  825. if (atomic_read(&cx->tot_capturing) == 0) {
  826. set_bit(CX18_F_I_EOS, &cx->i_flags);
  827. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  828. }
  829. return -EINVAL;
  830. }
  831. /* you're live! sit back and await interrupts :) */
  832. if (captype != CAPTURE_CHANNEL_TYPE_TS)
  833. atomic_inc(&cx->ana_capturing);
  834. atomic_inc(&cx->tot_capturing);
  835. return 0;
  836. }
  837. EXPORT_SYMBOL(cx18_start_v4l2_encode_stream);
  838. void cx18_stop_all_captures(struct cx18 *cx)
  839. {
  840. int i;
  841. for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
  842. struct cx18_stream *s = &cx->streams[i];
  843. if (!cx18_stream_enabled(s))
  844. continue;
  845. if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
  846. cx18_stop_v4l2_encode_stream(s, 0);
  847. }
  848. }
  849. int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
  850. {
  851. struct cx18 *cx = s->cx;
  852. if (!cx18_stream_enabled(s))
  853. return -EINVAL;
  854. /* This function assumes that you are allowed to stop the capture
  855. and that we are actually capturing */
  856. CX18_DEBUG_INFO("Stop Capture\n");
  857. if (atomic_read(&cx->tot_capturing) == 0)
  858. return 0;
  859. set_bit(CX18_F_S_STOPPING, &s->s_flags);
  860. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  861. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
  862. else
  863. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  864. if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
  865. CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
  866. }
  867. if (s->type != CX18_ENC_STREAM_TYPE_TS)
  868. atomic_dec(&cx->ana_capturing);
  869. atomic_dec(&cx->tot_capturing);
  870. /* Clear capture and no-read bits */
  871. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  872. /* Tell the CX23418 it can't use our buffers anymore */
  873. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  874. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  875. s->handle = CX18_INVALID_TASK_HANDLE;
  876. clear_bit(CX18_F_S_STOPPING, &s->s_flags);
  877. if (atomic_read(&cx->tot_capturing) > 0)
  878. return 0;
  879. cx2341x_handler_set_busy(&cx->cxhdl, 0);
  880. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  881. wake_up(&s->waitq);
  882. return 0;
  883. }
  884. EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream);
  885. u32 cx18_find_handle(struct cx18 *cx)
  886. {
  887. int i;
  888. /* find first available handle to be used for global settings */
  889. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  890. struct cx18_stream *s = &cx->streams[i];
  891. if (s->video_dev && (s->handle != CX18_INVALID_TASK_HANDLE))
  892. return s->handle;
  893. }
  894. return CX18_INVALID_TASK_HANDLE;
  895. }
  896. struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
  897. {
  898. int i;
  899. struct cx18_stream *s;
  900. if (handle == CX18_INVALID_TASK_HANDLE)
  901. return NULL;
  902. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  903. s = &cx->streams[i];
  904. if (s->handle != handle)
  905. continue;
  906. if (cx18_stream_enabled(s))
  907. return s;
  908. }
  909. return NULL;
  910. }