mt9v011.c 15 KB

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  1. /*
  2. * mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor
  3. *
  4. * Copyright (c) 2009 Mauro Carvalho Chehab (mchehab@redhat.com)
  5. * This code is placed under the terms of the GNU General Public License v2
  6. */
  7. #include <linux/i2c.h>
  8. #include <linux/slab.h>
  9. #include <linux/videodev2.h>
  10. #include <linux/delay.h>
  11. #include <linux/module.h>
  12. #include <asm/div64.h>
  13. #include <media/v4l2-device.h>
  14. #include <media/v4l2-chip-ident.h>
  15. #include <media/v4l2-ctrls.h>
  16. #include <media/mt9v011.h>
  17. MODULE_DESCRIPTION("Micron mt9v011 sensor driver");
  18. MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
  19. MODULE_LICENSE("GPL");
  20. static int debug;
  21. module_param(debug, int, 0);
  22. MODULE_PARM_DESC(debug, "Debug level (0-2)");
  23. #define R00_MT9V011_CHIP_VERSION 0x00
  24. #define R01_MT9V011_ROWSTART 0x01
  25. #define R02_MT9V011_COLSTART 0x02
  26. #define R03_MT9V011_HEIGHT 0x03
  27. #define R04_MT9V011_WIDTH 0x04
  28. #define R05_MT9V011_HBLANK 0x05
  29. #define R06_MT9V011_VBLANK 0x06
  30. #define R07_MT9V011_OUT_CTRL 0x07
  31. #define R09_MT9V011_SHUTTER_WIDTH 0x09
  32. #define R0A_MT9V011_CLK_SPEED 0x0a
  33. #define R0B_MT9V011_RESTART 0x0b
  34. #define R0C_MT9V011_SHUTTER_DELAY 0x0c
  35. #define R0D_MT9V011_RESET 0x0d
  36. #define R1E_MT9V011_DIGITAL_ZOOM 0x1e
  37. #define R20_MT9V011_READ_MODE 0x20
  38. #define R2B_MT9V011_GREEN_1_GAIN 0x2b
  39. #define R2C_MT9V011_BLUE_GAIN 0x2c
  40. #define R2D_MT9V011_RED_GAIN 0x2d
  41. #define R2E_MT9V011_GREEN_2_GAIN 0x2e
  42. #define R35_MT9V011_GLOBAL_GAIN 0x35
  43. #define RF1_MT9V011_CHIP_ENABLE 0xf1
  44. #define MT9V011_VERSION 0x8232
  45. #define MT9V011_REV_B_VERSION 0x8243
  46. struct mt9v011 {
  47. struct v4l2_subdev sd;
  48. struct v4l2_ctrl_handler ctrls;
  49. unsigned width, height;
  50. unsigned xtal;
  51. unsigned hflip:1;
  52. unsigned vflip:1;
  53. u16 global_gain, exposure;
  54. s16 red_bal, blue_bal;
  55. };
  56. static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd)
  57. {
  58. return container_of(sd, struct mt9v011, sd);
  59. }
  60. static int mt9v011_read(struct v4l2_subdev *sd, unsigned char addr)
  61. {
  62. struct i2c_client *c = v4l2_get_subdevdata(sd);
  63. __be16 buffer;
  64. int rc, val;
  65. rc = i2c_master_send(c, &addr, 1);
  66. if (rc != 1)
  67. v4l2_dbg(0, debug, sd,
  68. "i2c i/o error: rc == %d (should be 1)\n", rc);
  69. msleep(10);
  70. rc = i2c_master_recv(c, (char *)&buffer, 2);
  71. if (rc != 2)
  72. v4l2_dbg(0, debug, sd,
  73. "i2c i/o error: rc == %d (should be 2)\n", rc);
  74. val = be16_to_cpu(buffer);
  75. v4l2_dbg(2, debug, sd, "mt9v011: read 0x%02x = 0x%04x\n", addr, val);
  76. return val;
  77. }
  78. static void mt9v011_write(struct v4l2_subdev *sd, unsigned char addr,
  79. u16 value)
  80. {
  81. struct i2c_client *c = v4l2_get_subdevdata(sd);
  82. unsigned char buffer[3];
  83. int rc;
  84. buffer[0] = addr;
  85. buffer[1] = value >> 8;
  86. buffer[2] = value & 0xff;
  87. v4l2_dbg(2, debug, sd,
  88. "mt9v011: writing 0x%02x 0x%04x\n", buffer[0], value);
  89. rc = i2c_master_send(c, buffer, 3);
  90. if (rc != 3)
  91. v4l2_dbg(0, debug, sd,
  92. "i2c i/o error: rc == %d (should be 3)\n", rc);
  93. }
  94. struct i2c_reg_value {
  95. unsigned char reg;
  96. u16 value;
  97. };
  98. /*
  99. * Values used at the original driver
  100. * Some values are marked as Reserved at the datasheet
  101. */
  102. static const struct i2c_reg_value mt9v011_init_default[] = {
  103. { R0D_MT9V011_RESET, 0x0001 },
  104. { R0D_MT9V011_RESET, 0x0000 },
  105. { R0C_MT9V011_SHUTTER_DELAY, 0x0000 },
  106. { R09_MT9V011_SHUTTER_WIDTH, 0x1fc },
  107. { R0A_MT9V011_CLK_SPEED, 0x0000 },
  108. { R1E_MT9V011_DIGITAL_ZOOM, 0x0000 },
  109. { R07_MT9V011_OUT_CTRL, 0x0002 }, /* chip enable */
  110. };
  111. static u16 calc_mt9v011_gain(s16 lineargain)
  112. {
  113. u16 digitalgain = 0;
  114. u16 analogmult = 0;
  115. u16 analoginit = 0;
  116. if (lineargain < 0)
  117. lineargain = 0;
  118. /* recommended minimum */
  119. lineargain += 0x0020;
  120. if (lineargain > 2047)
  121. lineargain = 2047;
  122. if (lineargain > 1023) {
  123. digitalgain = 3;
  124. analogmult = 3;
  125. analoginit = lineargain / 16;
  126. } else if (lineargain > 511) {
  127. digitalgain = 1;
  128. analogmult = 3;
  129. analoginit = lineargain / 8;
  130. } else if (lineargain > 255) {
  131. analogmult = 3;
  132. analoginit = lineargain / 4;
  133. } else if (lineargain > 127) {
  134. analogmult = 1;
  135. analoginit = lineargain / 2;
  136. } else
  137. analoginit = lineargain;
  138. return analoginit + (analogmult << 7) + (digitalgain << 9);
  139. }
  140. static void set_balance(struct v4l2_subdev *sd)
  141. {
  142. struct mt9v011 *core = to_mt9v011(sd);
  143. u16 green_gain, blue_gain, red_gain;
  144. u16 exposure;
  145. s16 bal;
  146. exposure = core->exposure;
  147. green_gain = calc_mt9v011_gain(core->global_gain);
  148. bal = core->global_gain;
  149. bal += (core->blue_bal * core->global_gain / (1 << 7));
  150. blue_gain = calc_mt9v011_gain(bal);
  151. bal = core->global_gain;
  152. bal += (core->red_bal * core->global_gain / (1 << 7));
  153. red_gain = calc_mt9v011_gain(bal);
  154. mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green_gain);
  155. mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN, green_gain);
  156. mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain);
  157. mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain);
  158. mt9v011_write(sd, R09_MT9V011_SHUTTER_WIDTH, exposure);
  159. }
  160. static void calc_fps(struct v4l2_subdev *sd, u32 *numerator, u32 *denominator)
  161. {
  162. struct mt9v011 *core = to_mt9v011(sd);
  163. unsigned height, width, hblank, vblank, speed;
  164. unsigned row_time, t_time;
  165. u64 frames_per_ms;
  166. unsigned tmp;
  167. height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
  168. width = mt9v011_read(sd, R04_MT9V011_WIDTH);
  169. hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
  170. vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
  171. speed = mt9v011_read(sd, R0A_MT9V011_CLK_SPEED);
  172. row_time = (width + 113 + hblank) * (speed + 2);
  173. t_time = row_time * (height + vblank + 1);
  174. frames_per_ms = core->xtal * 1000l;
  175. do_div(frames_per_ms, t_time);
  176. tmp = frames_per_ms;
  177. v4l2_dbg(1, debug, sd, "Programmed to %u.%03u fps (%d pixel clcks)\n",
  178. tmp / 1000, tmp % 1000, t_time);
  179. if (numerator && denominator) {
  180. *numerator = 1000;
  181. *denominator = (u32)frames_per_ms;
  182. }
  183. }
  184. static u16 calc_speed(struct v4l2_subdev *sd, u32 numerator, u32 denominator)
  185. {
  186. struct mt9v011 *core = to_mt9v011(sd);
  187. unsigned height, width, hblank, vblank;
  188. unsigned row_time, line_time;
  189. u64 t_time, speed;
  190. /* Avoid bogus calculus */
  191. if (!numerator || !denominator)
  192. return 0;
  193. height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
  194. width = mt9v011_read(sd, R04_MT9V011_WIDTH);
  195. hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
  196. vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
  197. row_time = width + 113 + hblank;
  198. line_time = height + vblank + 1;
  199. t_time = core->xtal * ((u64)numerator);
  200. /* round to the closest value */
  201. t_time += denominator / 2;
  202. do_div(t_time, denominator);
  203. speed = t_time;
  204. do_div(speed, row_time * line_time);
  205. /* Avoid having a negative value for speed */
  206. if (speed < 2)
  207. speed = 0;
  208. else
  209. speed -= 2;
  210. /* Avoid speed overflow */
  211. if (speed > 15)
  212. return 15;
  213. return (u16)speed;
  214. }
  215. static void set_res(struct v4l2_subdev *sd)
  216. {
  217. struct mt9v011 *core = to_mt9v011(sd);
  218. unsigned vstart, hstart;
  219. /*
  220. * The mt9v011 doesn't have scaling. So, in order to select the desired
  221. * resolution, we're cropping at the middle of the sensor.
  222. * hblank and vblank should be adjusted, in order to warrant that
  223. * we'll preserve the line timings for 30 fps, no matter what resolution
  224. * is selected.
  225. * NOTE: datasheet says that width (and height) should be filled with
  226. * width-1. However, this doesn't work, since one pixel per line will
  227. * be missing.
  228. */
  229. hstart = 20 + (640 - core->width) / 2;
  230. mt9v011_write(sd, R02_MT9V011_COLSTART, hstart);
  231. mt9v011_write(sd, R04_MT9V011_WIDTH, core->width);
  232. mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width);
  233. vstart = 8 + (480 - core->height) / 2;
  234. mt9v011_write(sd, R01_MT9V011_ROWSTART, vstart);
  235. mt9v011_write(sd, R03_MT9V011_HEIGHT, core->height);
  236. mt9v011_write(sd, R06_MT9V011_VBLANK, 508 - core->height);
  237. calc_fps(sd, NULL, NULL);
  238. };
  239. static void set_read_mode(struct v4l2_subdev *sd)
  240. {
  241. struct mt9v011 *core = to_mt9v011(sd);
  242. unsigned mode = 0x1000;
  243. if (core->hflip)
  244. mode |= 0x4000;
  245. if (core->vflip)
  246. mode |= 0x8000;
  247. mt9v011_write(sd, R20_MT9V011_READ_MODE, mode);
  248. }
  249. static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
  250. {
  251. int i;
  252. for (i = 0; i < ARRAY_SIZE(mt9v011_init_default); i++)
  253. mt9v011_write(sd, mt9v011_init_default[i].reg,
  254. mt9v011_init_default[i].value);
  255. set_balance(sd);
  256. set_res(sd);
  257. set_read_mode(sd);
  258. return 0;
  259. }
  260. static int mt9v011_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index,
  261. enum v4l2_mbus_pixelcode *code)
  262. {
  263. if (index > 0)
  264. return -EINVAL;
  265. *code = V4L2_MBUS_FMT_SGRBG8_1X8;
  266. return 0;
  267. }
  268. static int mt9v011_try_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt)
  269. {
  270. if (fmt->code != V4L2_MBUS_FMT_SGRBG8_1X8)
  271. return -EINVAL;
  272. v4l_bound_align_image(&fmt->width, 48, 639, 1,
  273. &fmt->height, 32, 480, 1, 0);
  274. fmt->field = V4L2_FIELD_NONE;
  275. fmt->colorspace = V4L2_COLORSPACE_SRGB;
  276. return 0;
  277. }
  278. static int mt9v011_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
  279. {
  280. struct v4l2_captureparm *cp = &parms->parm.capture;
  281. if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  282. return -EINVAL;
  283. memset(cp, 0, sizeof(struct v4l2_captureparm));
  284. cp->capability = V4L2_CAP_TIMEPERFRAME;
  285. calc_fps(sd,
  286. &cp->timeperframe.numerator,
  287. &cp->timeperframe.denominator);
  288. return 0;
  289. }
  290. static int mt9v011_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
  291. {
  292. struct v4l2_captureparm *cp = &parms->parm.capture;
  293. struct v4l2_fract *tpf = &cp->timeperframe;
  294. u16 speed;
  295. if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  296. return -EINVAL;
  297. if (cp->extendedmode != 0)
  298. return -EINVAL;
  299. speed = calc_speed(sd, tpf->numerator, tpf->denominator);
  300. mt9v011_write(sd, R0A_MT9V011_CLK_SPEED, speed);
  301. v4l2_dbg(1, debug, sd, "Setting speed to %d\n", speed);
  302. /* Recalculate and update fps info */
  303. calc_fps(sd, &tpf->numerator, &tpf->denominator);
  304. return 0;
  305. }
  306. static int mt9v011_s_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt)
  307. {
  308. struct mt9v011 *core = to_mt9v011(sd);
  309. int rc;
  310. rc = mt9v011_try_mbus_fmt(sd, fmt);
  311. if (rc < 0)
  312. return -EINVAL;
  313. core->width = fmt->width;
  314. core->height = fmt->height;
  315. set_res(sd);
  316. return 0;
  317. }
  318. #ifdef CONFIG_VIDEO_ADV_DEBUG
  319. static int mt9v011_g_register(struct v4l2_subdev *sd,
  320. struct v4l2_dbg_register *reg)
  321. {
  322. struct i2c_client *client = v4l2_get_subdevdata(sd);
  323. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  324. return -EINVAL;
  325. if (!capable(CAP_SYS_ADMIN))
  326. return -EPERM;
  327. reg->val = mt9v011_read(sd, reg->reg & 0xff);
  328. reg->size = 2;
  329. return 0;
  330. }
  331. static int mt9v011_s_register(struct v4l2_subdev *sd,
  332. struct v4l2_dbg_register *reg)
  333. {
  334. struct i2c_client *client = v4l2_get_subdevdata(sd);
  335. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  336. return -EINVAL;
  337. if (!capable(CAP_SYS_ADMIN))
  338. return -EPERM;
  339. mt9v011_write(sd, reg->reg & 0xff, reg->val & 0xffff);
  340. return 0;
  341. }
  342. #endif
  343. static int mt9v011_g_chip_ident(struct v4l2_subdev *sd,
  344. struct v4l2_dbg_chip_ident *chip)
  345. {
  346. u16 version;
  347. struct i2c_client *client = v4l2_get_subdevdata(sd);
  348. version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
  349. return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_MT9V011,
  350. version);
  351. }
  352. static int mt9v011_s_ctrl(struct v4l2_ctrl *ctrl)
  353. {
  354. struct mt9v011 *core =
  355. container_of(ctrl->handler, struct mt9v011, ctrls);
  356. struct v4l2_subdev *sd = &core->sd;
  357. switch (ctrl->id) {
  358. case V4L2_CID_GAIN:
  359. core->global_gain = ctrl->val;
  360. break;
  361. case V4L2_CID_EXPOSURE:
  362. core->exposure = ctrl->val;
  363. break;
  364. case V4L2_CID_RED_BALANCE:
  365. core->red_bal = ctrl->val;
  366. break;
  367. case V4L2_CID_BLUE_BALANCE:
  368. core->blue_bal = ctrl->val;
  369. break;
  370. case V4L2_CID_HFLIP:
  371. core->hflip = ctrl->val;
  372. set_read_mode(sd);
  373. return 0;
  374. case V4L2_CID_VFLIP:
  375. core->vflip = ctrl->val;
  376. set_read_mode(sd);
  377. return 0;
  378. default:
  379. return -EINVAL;
  380. }
  381. set_balance(sd);
  382. return 0;
  383. }
  384. static struct v4l2_ctrl_ops mt9v011_ctrl_ops = {
  385. .s_ctrl = mt9v011_s_ctrl,
  386. };
  387. static const struct v4l2_subdev_core_ops mt9v011_core_ops = {
  388. .reset = mt9v011_reset,
  389. .g_chip_ident = mt9v011_g_chip_ident,
  390. #ifdef CONFIG_VIDEO_ADV_DEBUG
  391. .g_register = mt9v011_g_register,
  392. .s_register = mt9v011_s_register,
  393. #endif
  394. };
  395. static const struct v4l2_subdev_video_ops mt9v011_video_ops = {
  396. .enum_mbus_fmt = mt9v011_enum_mbus_fmt,
  397. .try_mbus_fmt = mt9v011_try_mbus_fmt,
  398. .s_mbus_fmt = mt9v011_s_mbus_fmt,
  399. .g_parm = mt9v011_g_parm,
  400. .s_parm = mt9v011_s_parm,
  401. };
  402. static const struct v4l2_subdev_ops mt9v011_ops = {
  403. .core = &mt9v011_core_ops,
  404. .video = &mt9v011_video_ops,
  405. };
  406. /****************************************************************************
  407. I2C Client & Driver
  408. ****************************************************************************/
  409. static int mt9v011_probe(struct i2c_client *c,
  410. const struct i2c_device_id *id)
  411. {
  412. u16 version;
  413. struct mt9v011 *core;
  414. struct v4l2_subdev *sd;
  415. /* Check if the adapter supports the needed features */
  416. if (!i2c_check_functionality(c->adapter,
  417. I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  418. return -EIO;
  419. core = kzalloc(sizeof(struct mt9v011), GFP_KERNEL);
  420. if (!core)
  421. return -ENOMEM;
  422. sd = &core->sd;
  423. v4l2_i2c_subdev_init(sd, c, &mt9v011_ops);
  424. /* Check if the sensor is really a MT9V011 */
  425. version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
  426. if ((version != MT9V011_VERSION) &&
  427. (version != MT9V011_REV_B_VERSION)) {
  428. v4l2_info(sd, "*** unknown micron chip detected (0x%04x).\n",
  429. version);
  430. kfree(core);
  431. return -EINVAL;
  432. }
  433. v4l2_ctrl_handler_init(&core->ctrls, 5);
  434. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  435. V4L2_CID_GAIN, 0, (1 << 12) - 1 - 0x20, 1, 0x20);
  436. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  437. V4L2_CID_EXPOSURE, 0, 2047, 1, 0x01fc);
  438. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  439. V4L2_CID_RED_BALANCE, -(1 << 9), (1 << 9) - 1, 1, 0);
  440. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  441. V4L2_CID_BLUE_BALANCE, -(1 << 9), (1 << 9) - 1, 1, 0);
  442. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  443. V4L2_CID_HFLIP, 0, 1, 1, 0);
  444. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  445. V4L2_CID_VFLIP, 0, 1, 1, 0);
  446. if (core->ctrls.error) {
  447. int ret = core->ctrls.error;
  448. v4l2_err(sd, "control initialization error %d\n", ret);
  449. v4l2_ctrl_handler_free(&core->ctrls);
  450. kfree(core);
  451. return ret;
  452. }
  453. core->sd.ctrl_handler = &core->ctrls;
  454. core->global_gain = 0x0024;
  455. core->exposure = 0x01fc;
  456. core->width = 640;
  457. core->height = 480;
  458. core->xtal = 27000000; /* Hz */
  459. if (c->dev.platform_data) {
  460. struct mt9v011_platform_data *pdata = c->dev.platform_data;
  461. core->xtal = pdata->xtal;
  462. v4l2_dbg(1, debug, sd, "xtal set to %d.%03d MHz\n",
  463. core->xtal / 1000000, (core->xtal / 1000) % 1000);
  464. }
  465. v4l_info(c, "chip found @ 0x%02x (%s - chip version 0x%04x)\n",
  466. c->addr << 1, c->adapter->name, version);
  467. return 0;
  468. }
  469. static int mt9v011_remove(struct i2c_client *c)
  470. {
  471. struct v4l2_subdev *sd = i2c_get_clientdata(c);
  472. struct mt9v011 *core = to_mt9v011(sd);
  473. v4l2_dbg(1, debug, sd,
  474. "mt9v011.c: removing mt9v011 adapter on address 0x%x\n",
  475. c->addr << 1);
  476. v4l2_device_unregister_subdev(sd);
  477. v4l2_ctrl_handler_free(&core->ctrls);
  478. kfree(to_mt9v011(sd));
  479. return 0;
  480. }
  481. /* ----------------------------------------------------------------------- */
  482. static const struct i2c_device_id mt9v011_id[] = {
  483. { "mt9v011", 0 },
  484. { }
  485. };
  486. MODULE_DEVICE_TABLE(i2c, mt9v011_id);
  487. static struct i2c_driver mt9v011_driver = {
  488. .driver = {
  489. .owner = THIS_MODULE,
  490. .name = "mt9v011",
  491. },
  492. .probe = mt9v011_probe,
  493. .remove = mt9v011_remove,
  494. .id_table = mt9v011_id,
  495. };
  496. module_i2c_driver(mt9v011_driver);