adv7393.c 12 KB

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  1. /*
  2. * adv7393 - ADV7393 Video Encoder Driver
  3. *
  4. * The encoder hardware does not support SECAM.
  5. *
  6. * Copyright (C) 2010-2012 ADVANSEE - http://www.advansee.com/
  7. * Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
  8. *
  9. * Based on ADV7343 driver,
  10. *
  11. * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
  12. *
  13. * This program is free software; you can redistribute it and/or
  14. * modify it under the terms of the GNU General Public License as
  15. * published by the Free Software Foundation version 2.
  16. *
  17. * This program is distributed .as is. WITHOUT ANY WARRANTY of any
  18. * kind, whether express or implied; without even the implied warranty
  19. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/init.h>
  24. #include <linux/ctype.h>
  25. #include <linux/slab.h>
  26. #include <linux/i2c.h>
  27. #include <linux/device.h>
  28. #include <linux/delay.h>
  29. #include <linux/module.h>
  30. #include <linux/videodev2.h>
  31. #include <linux/uaccess.h>
  32. #include <media/adv7393.h>
  33. #include <media/v4l2-device.h>
  34. #include <media/v4l2-chip-ident.h>
  35. #include <media/v4l2-ctrls.h>
  36. #include "adv7393_regs.h"
  37. MODULE_DESCRIPTION("ADV7393 video encoder driver");
  38. MODULE_LICENSE("GPL");
  39. static bool debug;
  40. module_param(debug, bool, 0644);
  41. MODULE_PARM_DESC(debug, "Debug level 0-1");
  42. struct adv7393_state {
  43. struct v4l2_subdev sd;
  44. struct v4l2_ctrl_handler hdl;
  45. u8 reg00;
  46. u8 reg01;
  47. u8 reg02;
  48. u8 reg35;
  49. u8 reg80;
  50. u8 reg82;
  51. u32 output;
  52. v4l2_std_id std;
  53. };
  54. static inline struct adv7393_state *to_state(struct v4l2_subdev *sd)
  55. {
  56. return container_of(sd, struct adv7393_state, sd);
  57. }
  58. static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
  59. {
  60. return &container_of(ctrl->handler, struct adv7393_state, hdl)->sd;
  61. }
  62. static inline int adv7393_write(struct v4l2_subdev *sd, u8 reg, u8 value)
  63. {
  64. struct i2c_client *client = v4l2_get_subdevdata(sd);
  65. return i2c_smbus_write_byte_data(client, reg, value);
  66. }
  67. static const u8 adv7393_init_reg_val[] = {
  68. ADV7393_SOFT_RESET, ADV7393_SOFT_RESET_DEFAULT,
  69. ADV7393_POWER_MODE_REG, ADV7393_POWER_MODE_REG_DEFAULT,
  70. ADV7393_HD_MODE_REG1, ADV7393_HD_MODE_REG1_DEFAULT,
  71. ADV7393_HD_MODE_REG2, ADV7393_HD_MODE_REG2_DEFAULT,
  72. ADV7393_HD_MODE_REG3, ADV7393_HD_MODE_REG3_DEFAULT,
  73. ADV7393_HD_MODE_REG4, ADV7393_HD_MODE_REG4_DEFAULT,
  74. ADV7393_HD_MODE_REG5, ADV7393_HD_MODE_REG5_DEFAULT,
  75. ADV7393_HD_MODE_REG6, ADV7393_HD_MODE_REG6_DEFAULT,
  76. ADV7393_HD_MODE_REG7, ADV7393_HD_MODE_REG7_DEFAULT,
  77. ADV7393_SD_MODE_REG1, ADV7393_SD_MODE_REG1_DEFAULT,
  78. ADV7393_SD_MODE_REG2, ADV7393_SD_MODE_REG2_DEFAULT,
  79. ADV7393_SD_MODE_REG3, ADV7393_SD_MODE_REG3_DEFAULT,
  80. ADV7393_SD_MODE_REG4, ADV7393_SD_MODE_REG4_DEFAULT,
  81. ADV7393_SD_MODE_REG5, ADV7393_SD_MODE_REG5_DEFAULT,
  82. ADV7393_SD_MODE_REG6, ADV7393_SD_MODE_REG6_DEFAULT,
  83. ADV7393_SD_MODE_REG7, ADV7393_SD_MODE_REG7_DEFAULT,
  84. ADV7393_SD_MODE_REG8, ADV7393_SD_MODE_REG8_DEFAULT,
  85. ADV7393_SD_TIMING_REG0, ADV7393_SD_TIMING_REG0_DEFAULT,
  86. ADV7393_SD_HUE_ADJUST, ADV7393_SD_HUE_ADJUST_DEFAULT,
  87. ADV7393_SD_CGMS_WSS0, ADV7393_SD_CGMS_WSS0_DEFAULT,
  88. ADV7393_SD_BRIGHTNESS_WSS, ADV7393_SD_BRIGHTNESS_WSS_DEFAULT,
  89. };
  90. /*
  91. * 2^32
  92. * FSC(reg) = FSC (HZ) * --------
  93. * 27000000
  94. */
  95. static const struct adv7393_std_info stdinfo[] = {
  96. {
  97. /* FSC(Hz) = 4,433,618.75 Hz */
  98. SD_STD_NTSC, 705268427, V4L2_STD_NTSC_443,
  99. }, {
  100. /* FSC(Hz) = 3,579,545.45 Hz */
  101. SD_STD_NTSC, 569408542, V4L2_STD_NTSC,
  102. }, {
  103. /* FSC(Hz) = 3,575,611.00 Hz */
  104. SD_STD_PAL_M, 568782678, V4L2_STD_PAL_M,
  105. }, {
  106. /* FSC(Hz) = 3,582,056.00 Hz */
  107. SD_STD_PAL_N, 569807903, V4L2_STD_PAL_Nc,
  108. }, {
  109. /* FSC(Hz) = 4,433,618.75 Hz */
  110. SD_STD_PAL_N, 705268427, V4L2_STD_PAL_N,
  111. }, {
  112. /* FSC(Hz) = 4,433,618.75 Hz */
  113. SD_STD_PAL_M, 705268427, V4L2_STD_PAL_60,
  114. }, {
  115. /* FSC(Hz) = 4,433,618.75 Hz */
  116. SD_STD_PAL_BDGHI, 705268427, V4L2_STD_PAL,
  117. },
  118. };
  119. static int adv7393_setstd(struct v4l2_subdev *sd, v4l2_std_id std)
  120. {
  121. struct adv7393_state *state = to_state(sd);
  122. const struct adv7393_std_info *std_info;
  123. int num_std;
  124. u8 reg;
  125. u32 val;
  126. int err = 0;
  127. int i;
  128. num_std = ARRAY_SIZE(stdinfo);
  129. for (i = 0; i < num_std; i++) {
  130. if (stdinfo[i].stdid & std)
  131. break;
  132. }
  133. if (i == num_std) {
  134. v4l2_dbg(1, debug, sd,
  135. "Invalid std or std is not supported: %llx\n",
  136. (unsigned long long)std);
  137. return -EINVAL;
  138. }
  139. std_info = &stdinfo[i];
  140. /* Set the standard */
  141. val = state->reg80 & ~SD_STD_MASK;
  142. val |= std_info->standard_val3;
  143. err = adv7393_write(sd, ADV7393_SD_MODE_REG1, val);
  144. if (err < 0)
  145. goto setstd_exit;
  146. state->reg80 = val;
  147. /* Configure the input mode register */
  148. val = state->reg01 & ~INPUT_MODE_MASK;
  149. val |= SD_INPUT_MODE;
  150. err = adv7393_write(sd, ADV7393_MODE_SELECT_REG, val);
  151. if (err < 0)
  152. goto setstd_exit;
  153. state->reg01 = val;
  154. /* Program the sub carrier frequency registers */
  155. val = std_info->fsc_val;
  156. for (reg = ADV7393_FSC_REG0; reg <= ADV7393_FSC_REG3; reg++) {
  157. err = adv7393_write(sd, reg, val);
  158. if (err < 0)
  159. goto setstd_exit;
  160. val >>= 8;
  161. }
  162. val = state->reg82;
  163. /* Pedestal settings */
  164. if (std & (V4L2_STD_NTSC | V4L2_STD_NTSC_443))
  165. val |= SD_PEDESTAL_EN;
  166. else
  167. val &= SD_PEDESTAL_DI;
  168. err = adv7393_write(sd, ADV7393_SD_MODE_REG2, val);
  169. if (err < 0)
  170. goto setstd_exit;
  171. state->reg82 = val;
  172. setstd_exit:
  173. if (err != 0)
  174. v4l2_err(sd, "Error setting std, write failed\n");
  175. return err;
  176. }
  177. static int adv7393_setoutput(struct v4l2_subdev *sd, u32 output_type)
  178. {
  179. struct adv7393_state *state = to_state(sd);
  180. u8 val;
  181. int err = 0;
  182. if (output_type > ADV7393_SVIDEO_ID) {
  183. v4l2_dbg(1, debug, sd,
  184. "Invalid output type or output type not supported:%d\n",
  185. output_type);
  186. return -EINVAL;
  187. }
  188. /* Enable Appropriate DAC */
  189. val = state->reg00 & 0x03;
  190. if (output_type == ADV7393_COMPOSITE_ID)
  191. val |= ADV7393_COMPOSITE_POWER_VALUE;
  192. else if (output_type == ADV7393_COMPONENT_ID)
  193. val |= ADV7393_COMPONENT_POWER_VALUE;
  194. else
  195. val |= ADV7393_SVIDEO_POWER_VALUE;
  196. err = adv7393_write(sd, ADV7393_POWER_MODE_REG, val);
  197. if (err < 0)
  198. goto setoutput_exit;
  199. state->reg00 = val;
  200. /* Enable YUV output */
  201. val = state->reg02 | YUV_OUTPUT_SELECT;
  202. err = adv7393_write(sd, ADV7393_MODE_REG0, val);
  203. if (err < 0)
  204. goto setoutput_exit;
  205. state->reg02 = val;
  206. /* configure SD DAC Output 1 bit */
  207. val = state->reg82;
  208. if (output_type == ADV7393_COMPONENT_ID)
  209. val &= SD_DAC_OUT1_DI;
  210. else
  211. val |= SD_DAC_OUT1_EN;
  212. err = adv7393_write(sd, ADV7393_SD_MODE_REG2, val);
  213. if (err < 0)
  214. goto setoutput_exit;
  215. state->reg82 = val;
  216. /* configure ED/HD Color DAC Swap bit to zero */
  217. val = state->reg35 & HD_DAC_SWAP_DI;
  218. err = adv7393_write(sd, ADV7393_HD_MODE_REG6, val);
  219. if (err < 0)
  220. goto setoutput_exit;
  221. state->reg35 = val;
  222. setoutput_exit:
  223. if (err != 0)
  224. v4l2_err(sd, "Error setting output, write failed\n");
  225. return err;
  226. }
  227. static int adv7393_log_status(struct v4l2_subdev *sd)
  228. {
  229. struct adv7393_state *state = to_state(sd);
  230. v4l2_info(sd, "Standard: %llx\n", (unsigned long long)state->std);
  231. v4l2_info(sd, "Output: %s\n", (state->output == 0) ? "Composite" :
  232. ((state->output == 1) ? "Component" : "S-Video"));
  233. return 0;
  234. }
  235. static int adv7393_s_ctrl(struct v4l2_ctrl *ctrl)
  236. {
  237. struct v4l2_subdev *sd = to_sd(ctrl);
  238. switch (ctrl->id) {
  239. case V4L2_CID_BRIGHTNESS:
  240. return adv7393_write(sd, ADV7393_SD_BRIGHTNESS_WSS,
  241. ctrl->val & SD_BRIGHTNESS_VALUE_MASK);
  242. case V4L2_CID_HUE:
  243. return adv7393_write(sd, ADV7393_SD_HUE_ADJUST,
  244. ctrl->val - ADV7393_HUE_MIN);
  245. case V4L2_CID_GAIN:
  246. return adv7393_write(sd, ADV7393_DAC123_OUTPUT_LEVEL,
  247. ctrl->val);
  248. }
  249. return -EINVAL;
  250. }
  251. static int adv7393_g_chip_ident(struct v4l2_subdev *sd,
  252. struct v4l2_dbg_chip_ident *chip)
  253. {
  254. struct i2c_client *client = v4l2_get_subdevdata(sd);
  255. return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_ADV7393, 0);
  256. }
  257. static const struct v4l2_ctrl_ops adv7393_ctrl_ops = {
  258. .s_ctrl = adv7393_s_ctrl,
  259. };
  260. static const struct v4l2_subdev_core_ops adv7393_core_ops = {
  261. .log_status = adv7393_log_status,
  262. .g_chip_ident = adv7393_g_chip_ident,
  263. .g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
  264. .try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
  265. .s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
  266. .g_ctrl = v4l2_subdev_g_ctrl,
  267. .s_ctrl = v4l2_subdev_s_ctrl,
  268. .queryctrl = v4l2_subdev_queryctrl,
  269. .querymenu = v4l2_subdev_querymenu,
  270. };
  271. static int adv7393_s_std_output(struct v4l2_subdev *sd, v4l2_std_id std)
  272. {
  273. struct adv7393_state *state = to_state(sd);
  274. int err = 0;
  275. if (state->std == std)
  276. return 0;
  277. err = adv7393_setstd(sd, std);
  278. if (!err)
  279. state->std = std;
  280. return err;
  281. }
  282. static int adv7393_s_routing(struct v4l2_subdev *sd,
  283. u32 input, u32 output, u32 config)
  284. {
  285. struct adv7393_state *state = to_state(sd);
  286. int err = 0;
  287. if (state->output == output)
  288. return 0;
  289. err = adv7393_setoutput(sd, output);
  290. if (!err)
  291. state->output = output;
  292. return err;
  293. }
  294. static const struct v4l2_subdev_video_ops adv7393_video_ops = {
  295. .s_std_output = adv7393_s_std_output,
  296. .s_routing = adv7393_s_routing,
  297. };
  298. static const struct v4l2_subdev_ops adv7393_ops = {
  299. .core = &adv7393_core_ops,
  300. .video = &adv7393_video_ops,
  301. };
  302. static int adv7393_initialize(struct v4l2_subdev *sd)
  303. {
  304. struct adv7393_state *state = to_state(sd);
  305. int err = 0;
  306. int i;
  307. for (i = 0; i < ARRAY_SIZE(adv7393_init_reg_val); i += 2) {
  308. err = adv7393_write(sd, adv7393_init_reg_val[i],
  309. adv7393_init_reg_val[i+1]);
  310. if (err) {
  311. v4l2_err(sd, "Error initializing\n");
  312. return err;
  313. }
  314. }
  315. /* Configure for default video standard */
  316. err = adv7393_setoutput(sd, state->output);
  317. if (err < 0) {
  318. v4l2_err(sd, "Error setting output during init\n");
  319. return -EINVAL;
  320. }
  321. err = adv7393_setstd(sd, state->std);
  322. if (err < 0) {
  323. v4l2_err(sd, "Error setting std during init\n");
  324. return -EINVAL;
  325. }
  326. return err;
  327. }
  328. static int adv7393_probe(struct i2c_client *client,
  329. const struct i2c_device_id *id)
  330. {
  331. struct adv7393_state *state;
  332. int err;
  333. if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  334. return -ENODEV;
  335. v4l_info(client, "chip found @ 0x%x (%s)\n",
  336. client->addr << 1, client->adapter->name);
  337. state = kzalloc(sizeof(struct adv7393_state), GFP_KERNEL);
  338. if (state == NULL)
  339. return -ENOMEM;
  340. state->reg00 = ADV7393_POWER_MODE_REG_DEFAULT;
  341. state->reg01 = 0x00;
  342. state->reg02 = 0x20;
  343. state->reg35 = ADV7393_HD_MODE_REG6_DEFAULT;
  344. state->reg80 = ADV7393_SD_MODE_REG1_DEFAULT;
  345. state->reg82 = ADV7393_SD_MODE_REG2_DEFAULT;
  346. state->output = ADV7393_COMPOSITE_ID;
  347. state->std = V4L2_STD_NTSC;
  348. v4l2_i2c_subdev_init(&state->sd, client, &adv7393_ops);
  349. v4l2_ctrl_handler_init(&state->hdl, 3);
  350. v4l2_ctrl_new_std(&state->hdl, &adv7393_ctrl_ops,
  351. V4L2_CID_BRIGHTNESS, ADV7393_BRIGHTNESS_MIN,
  352. ADV7393_BRIGHTNESS_MAX, 1,
  353. ADV7393_BRIGHTNESS_DEF);
  354. v4l2_ctrl_new_std(&state->hdl, &adv7393_ctrl_ops,
  355. V4L2_CID_HUE, ADV7393_HUE_MIN,
  356. ADV7393_HUE_MAX, 1,
  357. ADV7393_HUE_DEF);
  358. v4l2_ctrl_new_std(&state->hdl, &adv7393_ctrl_ops,
  359. V4L2_CID_GAIN, ADV7393_GAIN_MIN,
  360. ADV7393_GAIN_MAX, 1,
  361. ADV7393_GAIN_DEF);
  362. state->sd.ctrl_handler = &state->hdl;
  363. if (state->hdl.error) {
  364. int err = state->hdl.error;
  365. v4l2_ctrl_handler_free(&state->hdl);
  366. kfree(state);
  367. return err;
  368. }
  369. v4l2_ctrl_handler_setup(&state->hdl);
  370. err = adv7393_initialize(&state->sd);
  371. if (err) {
  372. v4l2_ctrl_handler_free(&state->hdl);
  373. kfree(state);
  374. }
  375. return err;
  376. }
  377. static int adv7393_remove(struct i2c_client *client)
  378. {
  379. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  380. struct adv7393_state *state = to_state(sd);
  381. v4l2_device_unregister_subdev(sd);
  382. v4l2_ctrl_handler_free(&state->hdl);
  383. kfree(state);
  384. return 0;
  385. }
  386. static const struct i2c_device_id adv7393_id[] = {
  387. {"adv7393", 0},
  388. {},
  389. };
  390. MODULE_DEVICE_TABLE(i2c, adv7393_id);
  391. static struct i2c_driver adv7393_driver = {
  392. .driver = {
  393. .owner = THIS_MODULE,
  394. .name = "adv7393",
  395. },
  396. .probe = adv7393_probe,
  397. .remove = adv7393_remove,
  398. .id_table = adv7393_id,
  399. };
  400. module_i2c_driver(adv7393_driver);