rtl2830.c 16 KB

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  1. /*
  2. * Realtek RTL2830 DVB-T demodulator driver
  3. *
  4. * Copyright (C) 2011 Antti Palosaari <crope@iki.fi>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. */
  20. /*
  21. * Driver implements own I2C-adapter for tuner I2C access. That's since chip
  22. * have unusual I2C-gate control which closes gate automatically after each
  23. * I2C transfer. Using own I2C adapter we can workaround that.
  24. */
  25. #include "rtl2830_priv.h"
  26. /* write multiple hardware registers */
  27. static int rtl2830_wr(struct rtl2830_priv *priv, u8 reg, const u8 *val, int len)
  28. {
  29. int ret;
  30. u8 buf[1+len];
  31. struct i2c_msg msg[1] = {
  32. {
  33. .addr = priv->cfg.i2c_addr,
  34. .flags = 0,
  35. .len = 1+len,
  36. .buf = buf,
  37. }
  38. };
  39. buf[0] = reg;
  40. memcpy(&buf[1], val, len);
  41. ret = i2c_transfer(priv->i2c, msg, 1);
  42. if (ret == 1) {
  43. ret = 0;
  44. } else {
  45. dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
  46. "len=%d\n", KBUILD_MODNAME, ret, reg, len);
  47. ret = -EREMOTEIO;
  48. }
  49. return ret;
  50. }
  51. /* read multiple hardware registers */
  52. static int rtl2830_rd(struct rtl2830_priv *priv, u8 reg, u8 *val, int len)
  53. {
  54. int ret;
  55. struct i2c_msg msg[2] = {
  56. {
  57. .addr = priv->cfg.i2c_addr,
  58. .flags = 0,
  59. .len = 1,
  60. .buf = &reg,
  61. }, {
  62. .addr = priv->cfg.i2c_addr,
  63. .flags = I2C_M_RD,
  64. .len = len,
  65. .buf = val,
  66. }
  67. };
  68. ret = i2c_transfer(priv->i2c, msg, 2);
  69. if (ret == 2) {
  70. ret = 0;
  71. } else {
  72. dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
  73. "len=%d\n", KBUILD_MODNAME, ret, reg, len);
  74. ret = -EREMOTEIO;
  75. }
  76. return ret;
  77. }
  78. /* write multiple registers */
  79. static int rtl2830_wr_regs(struct rtl2830_priv *priv, u16 reg, const u8 *val,
  80. int len)
  81. {
  82. int ret;
  83. u8 reg2 = (reg >> 0) & 0xff;
  84. u8 page = (reg >> 8) & 0xff;
  85. /* switch bank if needed */
  86. if (page != priv->page) {
  87. ret = rtl2830_wr(priv, 0x00, &page, 1);
  88. if (ret)
  89. return ret;
  90. priv->page = page;
  91. }
  92. return rtl2830_wr(priv, reg2, val, len);
  93. }
  94. /* read multiple registers */
  95. static int rtl2830_rd_regs(struct rtl2830_priv *priv, u16 reg, u8 *val, int len)
  96. {
  97. int ret;
  98. u8 reg2 = (reg >> 0) & 0xff;
  99. u8 page = (reg >> 8) & 0xff;
  100. /* switch bank if needed */
  101. if (page != priv->page) {
  102. ret = rtl2830_wr(priv, 0x00, &page, 1);
  103. if (ret)
  104. return ret;
  105. priv->page = page;
  106. }
  107. return rtl2830_rd(priv, reg2, val, len);
  108. }
  109. /* read single register */
  110. static int rtl2830_rd_reg(struct rtl2830_priv *priv, u16 reg, u8 *val)
  111. {
  112. return rtl2830_rd_regs(priv, reg, val, 1);
  113. }
  114. /* write single register with mask */
  115. static int rtl2830_wr_reg_mask(struct rtl2830_priv *priv, u16 reg, u8 val, u8 mask)
  116. {
  117. int ret;
  118. u8 tmp;
  119. /* no need for read if whole reg is written */
  120. if (mask != 0xff) {
  121. ret = rtl2830_rd_regs(priv, reg, &tmp, 1);
  122. if (ret)
  123. return ret;
  124. val &= mask;
  125. tmp &= ~mask;
  126. val |= tmp;
  127. }
  128. return rtl2830_wr_regs(priv, reg, &val, 1);
  129. }
  130. /* read single register with mask */
  131. static int rtl2830_rd_reg_mask(struct rtl2830_priv *priv, u16 reg, u8 *val, u8 mask)
  132. {
  133. int ret, i;
  134. u8 tmp;
  135. ret = rtl2830_rd_regs(priv, reg, &tmp, 1);
  136. if (ret)
  137. return ret;
  138. tmp &= mask;
  139. /* find position of the first bit */
  140. for (i = 0; i < 8; i++) {
  141. if ((mask >> i) & 0x01)
  142. break;
  143. }
  144. *val = tmp >> i;
  145. return 0;
  146. }
  147. static int rtl2830_init(struct dvb_frontend *fe)
  148. {
  149. struct rtl2830_priv *priv = fe->demodulator_priv;
  150. int ret, i;
  151. struct rtl2830_reg_val_mask tab[] = {
  152. { 0x00d, 0x01, 0x03 },
  153. { 0x00d, 0x10, 0x10 },
  154. { 0x104, 0x00, 0x1e },
  155. { 0x105, 0x80, 0x80 },
  156. { 0x110, 0x02, 0x03 },
  157. { 0x110, 0x08, 0x0c },
  158. { 0x17b, 0x00, 0x40 },
  159. { 0x17d, 0x05, 0x0f },
  160. { 0x17d, 0x50, 0xf0 },
  161. { 0x18c, 0x08, 0x0f },
  162. { 0x18d, 0x00, 0xc0 },
  163. { 0x188, 0x05, 0x0f },
  164. { 0x189, 0x00, 0xfc },
  165. { 0x2d5, 0x02, 0x02 },
  166. { 0x2f1, 0x02, 0x06 },
  167. { 0x2f1, 0x20, 0xf8 },
  168. { 0x16d, 0x00, 0x01 },
  169. { 0x1a6, 0x00, 0x80 },
  170. { 0x106, priv->cfg.vtop, 0x3f },
  171. { 0x107, priv->cfg.krf, 0x3f },
  172. { 0x112, 0x28, 0xff },
  173. { 0x103, priv->cfg.agc_targ_val, 0xff },
  174. { 0x00a, 0x02, 0x07 },
  175. { 0x140, 0x0c, 0x3c },
  176. { 0x140, 0x40, 0xc0 },
  177. { 0x15b, 0x05, 0x07 },
  178. { 0x15b, 0x28, 0x38 },
  179. { 0x15c, 0x05, 0x07 },
  180. { 0x15c, 0x28, 0x38 },
  181. { 0x115, priv->cfg.spec_inv, 0x01 },
  182. { 0x16f, 0x01, 0x07 },
  183. { 0x170, 0x18, 0x38 },
  184. { 0x172, 0x0f, 0x0f },
  185. { 0x173, 0x08, 0x38 },
  186. { 0x175, 0x01, 0x07 },
  187. { 0x176, 0x00, 0xc0 },
  188. };
  189. for (i = 0; i < ARRAY_SIZE(tab); i++) {
  190. ret = rtl2830_wr_reg_mask(priv, tab[i].reg, tab[i].val,
  191. tab[i].mask);
  192. if (ret)
  193. goto err;
  194. }
  195. ret = rtl2830_wr_regs(priv, 0x18f, "\x28\x00", 2);
  196. if (ret)
  197. goto err;
  198. ret = rtl2830_wr_regs(priv, 0x195,
  199. "\x04\x06\x0a\x12\x0a\x12\x1e\x28", 8);
  200. if (ret)
  201. goto err;
  202. /* TODO: spec init */
  203. /* soft reset */
  204. ret = rtl2830_wr_reg_mask(priv, 0x101, 0x04, 0x04);
  205. if (ret)
  206. goto err;
  207. ret = rtl2830_wr_reg_mask(priv, 0x101, 0x00, 0x04);
  208. if (ret)
  209. goto err;
  210. priv->sleeping = false;
  211. return ret;
  212. err:
  213. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  214. return ret;
  215. }
  216. static int rtl2830_sleep(struct dvb_frontend *fe)
  217. {
  218. struct rtl2830_priv *priv = fe->demodulator_priv;
  219. priv->sleeping = true;
  220. return 0;
  221. }
  222. static int rtl2830_get_tune_settings(struct dvb_frontend *fe,
  223. struct dvb_frontend_tune_settings *s)
  224. {
  225. s->min_delay_ms = 500;
  226. s->step_size = fe->ops.info.frequency_stepsize * 2;
  227. s->max_drift = (fe->ops.info.frequency_stepsize * 2) + 1;
  228. return 0;
  229. }
  230. static int rtl2830_set_frontend(struct dvb_frontend *fe)
  231. {
  232. struct rtl2830_priv *priv = fe->demodulator_priv;
  233. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  234. int ret, i;
  235. u64 num;
  236. u8 buf[3], tmp;
  237. u32 if_ctl, if_frequency;
  238. static const u8 bw_params1[3][34] = {
  239. {
  240. 0x1f, 0xf0, 0x1f, 0xf0, 0x1f, 0xfa, 0x00, 0x17, 0x00, 0x41,
  241. 0x00, 0x64, 0x00, 0x67, 0x00, 0x38, 0x1f, 0xde, 0x1f, 0x7a,
  242. 0x1f, 0x47, 0x1f, 0x7c, 0x00, 0x30, 0x01, 0x4b, 0x02, 0x82,
  243. 0x03, 0x73, 0x03, 0xcf, /* 6 MHz */
  244. }, {
  245. 0x1f, 0xfa, 0x1f, 0xda, 0x1f, 0xc1, 0x1f, 0xb3, 0x1f, 0xca,
  246. 0x00, 0x07, 0x00, 0x4d, 0x00, 0x6d, 0x00, 0x40, 0x1f, 0xca,
  247. 0x1f, 0x4d, 0x1f, 0x2a, 0x1f, 0xb2, 0x00, 0xec, 0x02, 0x7e,
  248. 0x03, 0xd0, 0x04, 0x53, /* 7 MHz */
  249. }, {
  250. 0x00, 0x10, 0x00, 0x0e, 0x1f, 0xf7, 0x1f, 0xc9, 0x1f, 0xa0,
  251. 0x1f, 0xa6, 0x1f, 0xec, 0x00, 0x4e, 0x00, 0x7d, 0x00, 0x3a,
  252. 0x1f, 0x98, 0x1f, 0x10, 0x1f, 0x40, 0x00, 0x75, 0x02, 0x5f,
  253. 0x04, 0x24, 0x04, 0xdb, /* 8 MHz */
  254. },
  255. };
  256. static const u8 bw_params2[3][6] = {
  257. {0xc3, 0x0c, 0x44, 0x33, 0x33, 0x30}, /* 6 MHz */
  258. {0xb8, 0xe3, 0x93, 0x99, 0x99, 0x98}, /* 7 MHz */
  259. {0xae, 0xba, 0xf3, 0x26, 0x66, 0x64}, /* 8 MHz */
  260. };
  261. dev_dbg(&priv->i2c->dev,
  262. "%s: frequency=%d bandwidth_hz=%d inversion=%d\n",
  263. __func__, c->frequency, c->bandwidth_hz, c->inversion);
  264. /* program tuner */
  265. if (fe->ops.tuner_ops.set_params)
  266. fe->ops.tuner_ops.set_params(fe);
  267. switch (c->bandwidth_hz) {
  268. case 6000000:
  269. i = 0;
  270. break;
  271. case 7000000:
  272. i = 1;
  273. break;
  274. case 8000000:
  275. i = 2;
  276. break;
  277. default:
  278. dev_dbg(&priv->i2c->dev, "%s: invalid bandwidth\n", __func__);
  279. return -EINVAL;
  280. }
  281. ret = rtl2830_wr_reg_mask(priv, 0x008, i << 1, 0x06);
  282. if (ret)
  283. goto err;
  284. /* program if frequency */
  285. if (fe->ops.tuner_ops.get_if_frequency)
  286. ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
  287. else
  288. ret = -EINVAL;
  289. if (ret < 0)
  290. goto err;
  291. num = if_frequency % priv->cfg.xtal;
  292. num *= 0x400000;
  293. num = div_u64(num, priv->cfg.xtal);
  294. num = -num;
  295. if_ctl = num & 0x3fffff;
  296. dev_dbg(&priv->i2c->dev, "%s: if_frequency=%d if_ctl=%08x\n",
  297. __func__, if_frequency, if_ctl);
  298. ret = rtl2830_rd_reg_mask(priv, 0x119, &tmp, 0xc0); /* b[7:6] */
  299. if (ret)
  300. goto err;
  301. buf[0] = tmp << 6;
  302. buf[0] |= (if_ctl >> 16) & 0x3f;
  303. buf[1] = (if_ctl >> 8) & 0xff;
  304. buf[2] = (if_ctl >> 0) & 0xff;
  305. ret = rtl2830_wr_regs(priv, 0x119, buf, 3);
  306. if (ret)
  307. goto err;
  308. /* 1/2 split I2C write */
  309. ret = rtl2830_wr_regs(priv, 0x11c, &bw_params1[i][0], 17);
  310. if (ret)
  311. goto err;
  312. /* 2/2 split I2C write */
  313. ret = rtl2830_wr_regs(priv, 0x12d, &bw_params1[i][17], 17);
  314. if (ret)
  315. goto err;
  316. ret = rtl2830_wr_regs(priv, 0x19d, bw_params2[i], 6);
  317. if (ret)
  318. goto err;
  319. return ret;
  320. err:
  321. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  322. return ret;
  323. }
  324. static int rtl2830_get_frontend(struct dvb_frontend *fe)
  325. {
  326. struct rtl2830_priv *priv = fe->demodulator_priv;
  327. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  328. int ret;
  329. u8 buf[3];
  330. if (priv->sleeping)
  331. return 0;
  332. ret = rtl2830_rd_regs(priv, 0x33c, buf, 2);
  333. if (ret)
  334. goto err;
  335. ret = rtl2830_rd_reg(priv, 0x351, &buf[2]);
  336. if (ret)
  337. goto err;
  338. dev_dbg(&priv->i2c->dev, "%s: TPS=%*ph\n", __func__, 3, buf);
  339. switch ((buf[0] >> 2) & 3) {
  340. case 0:
  341. c->modulation = QPSK;
  342. break;
  343. case 1:
  344. c->modulation = QAM_16;
  345. break;
  346. case 2:
  347. c->modulation = QAM_64;
  348. break;
  349. }
  350. switch ((buf[2] >> 2) & 1) {
  351. case 0:
  352. c->transmission_mode = TRANSMISSION_MODE_2K;
  353. break;
  354. case 1:
  355. c->transmission_mode = TRANSMISSION_MODE_8K;
  356. }
  357. switch ((buf[2] >> 0) & 3) {
  358. case 0:
  359. c->guard_interval = GUARD_INTERVAL_1_32;
  360. break;
  361. case 1:
  362. c->guard_interval = GUARD_INTERVAL_1_16;
  363. break;
  364. case 2:
  365. c->guard_interval = GUARD_INTERVAL_1_8;
  366. break;
  367. case 3:
  368. c->guard_interval = GUARD_INTERVAL_1_4;
  369. break;
  370. }
  371. switch ((buf[0] >> 4) & 7) {
  372. case 0:
  373. c->hierarchy = HIERARCHY_NONE;
  374. break;
  375. case 1:
  376. c->hierarchy = HIERARCHY_1;
  377. break;
  378. case 2:
  379. c->hierarchy = HIERARCHY_2;
  380. break;
  381. case 3:
  382. c->hierarchy = HIERARCHY_4;
  383. break;
  384. }
  385. switch ((buf[1] >> 3) & 7) {
  386. case 0:
  387. c->code_rate_HP = FEC_1_2;
  388. break;
  389. case 1:
  390. c->code_rate_HP = FEC_2_3;
  391. break;
  392. case 2:
  393. c->code_rate_HP = FEC_3_4;
  394. break;
  395. case 3:
  396. c->code_rate_HP = FEC_5_6;
  397. break;
  398. case 4:
  399. c->code_rate_HP = FEC_7_8;
  400. break;
  401. }
  402. switch ((buf[1] >> 0) & 7) {
  403. case 0:
  404. c->code_rate_LP = FEC_1_2;
  405. break;
  406. case 1:
  407. c->code_rate_LP = FEC_2_3;
  408. break;
  409. case 2:
  410. c->code_rate_LP = FEC_3_4;
  411. break;
  412. case 3:
  413. c->code_rate_LP = FEC_5_6;
  414. break;
  415. case 4:
  416. c->code_rate_LP = FEC_7_8;
  417. break;
  418. }
  419. return 0;
  420. err:
  421. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  422. return ret;
  423. }
  424. static int rtl2830_read_status(struct dvb_frontend *fe, fe_status_t *status)
  425. {
  426. struct rtl2830_priv *priv = fe->demodulator_priv;
  427. int ret;
  428. u8 tmp;
  429. *status = 0;
  430. if (priv->sleeping)
  431. return 0;
  432. ret = rtl2830_rd_reg_mask(priv, 0x351, &tmp, 0x78); /* [6:3] */
  433. if (ret)
  434. goto err;
  435. if (tmp == 11) {
  436. *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
  437. FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
  438. } else if (tmp == 10) {
  439. *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
  440. FE_HAS_VITERBI;
  441. }
  442. return ret;
  443. err:
  444. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  445. return ret;
  446. }
  447. static int rtl2830_read_snr(struct dvb_frontend *fe, u16 *snr)
  448. {
  449. struct rtl2830_priv *priv = fe->demodulator_priv;
  450. int ret, hierarchy, constellation;
  451. u8 buf[2], tmp;
  452. u16 tmp16;
  453. #define CONSTELLATION_NUM 3
  454. #define HIERARCHY_NUM 4
  455. static const u32 snr_constant[CONSTELLATION_NUM][HIERARCHY_NUM] = {
  456. { 70705899, 70705899, 70705899, 70705899 },
  457. { 82433173, 82433173, 87483115, 94445660 },
  458. { 92888734, 92888734, 95487525, 99770748 },
  459. };
  460. if (priv->sleeping)
  461. return 0;
  462. /* reports SNR in resolution of 0.1 dB */
  463. ret = rtl2830_rd_reg(priv, 0x33c, &tmp);
  464. if (ret)
  465. goto err;
  466. constellation = (tmp >> 2) & 0x03; /* [3:2] */
  467. if (constellation > CONSTELLATION_NUM - 1)
  468. goto err;
  469. hierarchy = (tmp >> 4) & 0x07; /* [6:4] */
  470. if (hierarchy > HIERARCHY_NUM - 1)
  471. goto err;
  472. ret = rtl2830_rd_regs(priv, 0x40c, buf, 2);
  473. if (ret)
  474. goto err;
  475. tmp16 = buf[0] << 8 | buf[1];
  476. if (tmp16)
  477. *snr = (snr_constant[constellation][hierarchy] -
  478. intlog10(tmp16)) / ((1 << 24) / 100);
  479. else
  480. *snr = 0;
  481. return 0;
  482. err:
  483. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  484. return ret;
  485. }
  486. static int rtl2830_read_ber(struct dvb_frontend *fe, u32 *ber)
  487. {
  488. struct rtl2830_priv *priv = fe->demodulator_priv;
  489. int ret;
  490. u8 buf[2];
  491. if (priv->sleeping)
  492. return 0;
  493. ret = rtl2830_rd_regs(priv, 0x34e, buf, 2);
  494. if (ret)
  495. goto err;
  496. *ber = buf[0] << 8 | buf[1];
  497. return 0;
  498. err:
  499. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  500. return ret;
  501. }
  502. static int rtl2830_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
  503. {
  504. *ucblocks = 0;
  505. return 0;
  506. }
  507. static int rtl2830_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
  508. {
  509. struct rtl2830_priv *priv = fe->demodulator_priv;
  510. int ret;
  511. u8 buf[2];
  512. u16 if_agc_raw, if_agc;
  513. if (priv->sleeping)
  514. return 0;
  515. ret = rtl2830_rd_regs(priv, 0x359, buf, 2);
  516. if (ret)
  517. goto err;
  518. if_agc_raw = (buf[0] << 8 | buf[1]) & 0x3fff;
  519. if (if_agc_raw & (1 << 9))
  520. if_agc = -(~(if_agc_raw - 1) & 0x1ff);
  521. else
  522. if_agc = if_agc_raw;
  523. *strength = (u8) (55 - if_agc / 182);
  524. *strength |= *strength << 8;
  525. return 0;
  526. err:
  527. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  528. return ret;
  529. }
  530. static struct dvb_frontend_ops rtl2830_ops;
  531. static u32 rtl2830_tuner_i2c_func(struct i2c_adapter *adapter)
  532. {
  533. return I2C_FUNC_I2C;
  534. }
  535. static int rtl2830_tuner_i2c_xfer(struct i2c_adapter *i2c_adap,
  536. struct i2c_msg msg[], int num)
  537. {
  538. struct rtl2830_priv *priv = i2c_get_adapdata(i2c_adap);
  539. int ret;
  540. /* open i2c-gate */
  541. ret = rtl2830_wr_reg_mask(priv, 0x101, 0x08, 0x08);
  542. if (ret)
  543. goto err;
  544. ret = i2c_transfer(priv->i2c, msg, num);
  545. if (ret < 0)
  546. dev_warn(&priv->i2c->dev, "%s: tuner i2c failed=%d\n",
  547. KBUILD_MODNAME, ret);
  548. return ret;
  549. err:
  550. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  551. return ret;
  552. }
  553. static struct i2c_algorithm rtl2830_tuner_i2c_algo = {
  554. .master_xfer = rtl2830_tuner_i2c_xfer,
  555. .functionality = rtl2830_tuner_i2c_func,
  556. };
  557. struct i2c_adapter *rtl2830_get_tuner_i2c_adapter(struct dvb_frontend *fe)
  558. {
  559. struct rtl2830_priv *priv = fe->demodulator_priv;
  560. return &priv->tuner_i2c_adapter;
  561. }
  562. EXPORT_SYMBOL(rtl2830_get_tuner_i2c_adapter);
  563. static void rtl2830_release(struct dvb_frontend *fe)
  564. {
  565. struct rtl2830_priv *priv = fe->demodulator_priv;
  566. i2c_del_adapter(&priv->tuner_i2c_adapter);
  567. kfree(priv);
  568. }
  569. struct dvb_frontend *rtl2830_attach(const struct rtl2830_config *cfg,
  570. struct i2c_adapter *i2c)
  571. {
  572. struct rtl2830_priv *priv = NULL;
  573. int ret = 0;
  574. u8 tmp;
  575. /* allocate memory for the internal state */
  576. priv = kzalloc(sizeof(struct rtl2830_priv), GFP_KERNEL);
  577. if (priv == NULL)
  578. goto err;
  579. /* setup the priv */
  580. priv->i2c = i2c;
  581. memcpy(&priv->cfg, cfg, sizeof(struct rtl2830_config));
  582. /* check if the demod is there */
  583. ret = rtl2830_rd_reg(priv, 0x000, &tmp);
  584. if (ret)
  585. goto err;
  586. /* create dvb_frontend */
  587. memcpy(&priv->fe.ops, &rtl2830_ops, sizeof(struct dvb_frontend_ops));
  588. priv->fe.demodulator_priv = priv;
  589. /* create tuner i2c adapter */
  590. strlcpy(priv->tuner_i2c_adapter.name, "RTL2830 tuner I2C adapter",
  591. sizeof(priv->tuner_i2c_adapter.name));
  592. priv->tuner_i2c_adapter.algo = &rtl2830_tuner_i2c_algo;
  593. priv->tuner_i2c_adapter.algo_data = NULL;
  594. i2c_set_adapdata(&priv->tuner_i2c_adapter, priv);
  595. if (i2c_add_adapter(&priv->tuner_i2c_adapter) < 0) {
  596. dev_err(&i2c->dev,
  597. "%s: tuner i2c bus could not be initialized\n",
  598. KBUILD_MODNAME);
  599. goto err;
  600. }
  601. priv->sleeping = true;
  602. return &priv->fe;
  603. err:
  604. dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret);
  605. kfree(priv);
  606. return NULL;
  607. }
  608. EXPORT_SYMBOL(rtl2830_attach);
  609. static struct dvb_frontend_ops rtl2830_ops = {
  610. .delsys = { SYS_DVBT },
  611. .info = {
  612. .name = "Realtek RTL2830 (DVB-T)",
  613. .caps = FE_CAN_FEC_1_2 |
  614. FE_CAN_FEC_2_3 |
  615. FE_CAN_FEC_3_4 |
  616. FE_CAN_FEC_5_6 |
  617. FE_CAN_FEC_7_8 |
  618. FE_CAN_FEC_AUTO |
  619. FE_CAN_QPSK |
  620. FE_CAN_QAM_16 |
  621. FE_CAN_QAM_64 |
  622. FE_CAN_QAM_AUTO |
  623. FE_CAN_TRANSMISSION_MODE_AUTO |
  624. FE_CAN_GUARD_INTERVAL_AUTO |
  625. FE_CAN_HIERARCHY_AUTO |
  626. FE_CAN_RECOVER |
  627. FE_CAN_MUTE_TS
  628. },
  629. .release = rtl2830_release,
  630. .init = rtl2830_init,
  631. .sleep = rtl2830_sleep,
  632. .get_tune_settings = rtl2830_get_tune_settings,
  633. .set_frontend = rtl2830_set_frontend,
  634. .get_frontend = rtl2830_get_frontend,
  635. .read_status = rtl2830_read_status,
  636. .read_snr = rtl2830_read_snr,
  637. .read_ber = rtl2830_read_ber,
  638. .read_ucblocks = rtl2830_read_ucblocks,
  639. .read_signal_strength = rtl2830_read_signal_strength,
  640. };
  641. MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
  642. MODULE_DESCRIPTION("Realtek RTL2830 DVB-T demodulator driver");
  643. MODULE_LICENSE("GPL");