qib_qp.c 32 KB

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  1. /*
  2. * Copyright (c) 2012 Intel Corporation. All rights reserved.
  3. * Copyright (c) 2006 - 2012 QLogic Corporation. * All rights reserved.
  4. * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. */
  34. #include <linux/err.h>
  35. #include <linux/vmalloc.h>
  36. #include <linux/jhash.h>
  37. #include "qib.h"
  38. #define BITS_PER_PAGE (PAGE_SIZE*BITS_PER_BYTE)
  39. #define BITS_PER_PAGE_MASK (BITS_PER_PAGE-1)
  40. static inline unsigned mk_qpn(struct qib_qpn_table *qpt,
  41. struct qpn_map *map, unsigned off)
  42. {
  43. return (map - qpt->map) * BITS_PER_PAGE + off;
  44. }
  45. static inline unsigned find_next_offset(struct qib_qpn_table *qpt,
  46. struct qpn_map *map, unsigned off,
  47. unsigned n)
  48. {
  49. if (qpt->mask) {
  50. off++;
  51. if (((off & qpt->mask) >> 1) >= n)
  52. off = (off | qpt->mask) + 2;
  53. } else
  54. off = find_next_zero_bit(map->page, BITS_PER_PAGE, off);
  55. return off;
  56. }
  57. /*
  58. * Convert the AETH credit code into the number of credits.
  59. */
  60. static u32 credit_table[31] = {
  61. 0, /* 0 */
  62. 1, /* 1 */
  63. 2, /* 2 */
  64. 3, /* 3 */
  65. 4, /* 4 */
  66. 6, /* 5 */
  67. 8, /* 6 */
  68. 12, /* 7 */
  69. 16, /* 8 */
  70. 24, /* 9 */
  71. 32, /* A */
  72. 48, /* B */
  73. 64, /* C */
  74. 96, /* D */
  75. 128, /* E */
  76. 192, /* F */
  77. 256, /* 10 */
  78. 384, /* 11 */
  79. 512, /* 12 */
  80. 768, /* 13 */
  81. 1024, /* 14 */
  82. 1536, /* 15 */
  83. 2048, /* 16 */
  84. 3072, /* 17 */
  85. 4096, /* 18 */
  86. 6144, /* 19 */
  87. 8192, /* 1A */
  88. 12288, /* 1B */
  89. 16384, /* 1C */
  90. 24576, /* 1D */
  91. 32768 /* 1E */
  92. };
  93. static void get_map_page(struct qib_qpn_table *qpt, struct qpn_map *map)
  94. {
  95. unsigned long page = get_zeroed_page(GFP_KERNEL);
  96. /*
  97. * Free the page if someone raced with us installing it.
  98. */
  99. spin_lock(&qpt->lock);
  100. if (map->page)
  101. free_page(page);
  102. else
  103. map->page = (void *)page;
  104. spin_unlock(&qpt->lock);
  105. }
  106. /*
  107. * Allocate the next available QPN or
  108. * zero/one for QP type IB_QPT_SMI/IB_QPT_GSI.
  109. */
  110. static int alloc_qpn(struct qib_devdata *dd, struct qib_qpn_table *qpt,
  111. enum ib_qp_type type, u8 port)
  112. {
  113. u32 i, offset, max_scan, qpn;
  114. struct qpn_map *map;
  115. u32 ret;
  116. if (type == IB_QPT_SMI || type == IB_QPT_GSI) {
  117. unsigned n;
  118. ret = type == IB_QPT_GSI;
  119. n = 1 << (ret + 2 * (port - 1));
  120. spin_lock(&qpt->lock);
  121. if (qpt->flags & n)
  122. ret = -EINVAL;
  123. else
  124. qpt->flags |= n;
  125. spin_unlock(&qpt->lock);
  126. goto bail;
  127. }
  128. qpn = qpt->last + 2;
  129. if (qpn >= QPN_MAX)
  130. qpn = 2;
  131. if (qpt->mask && ((qpn & qpt->mask) >> 1) >= dd->n_krcv_queues)
  132. qpn = (qpn | qpt->mask) + 2;
  133. offset = qpn & BITS_PER_PAGE_MASK;
  134. map = &qpt->map[qpn / BITS_PER_PAGE];
  135. max_scan = qpt->nmaps - !offset;
  136. for (i = 0;;) {
  137. if (unlikely(!map->page)) {
  138. get_map_page(qpt, map);
  139. if (unlikely(!map->page))
  140. break;
  141. }
  142. do {
  143. if (!test_and_set_bit(offset, map->page)) {
  144. qpt->last = qpn;
  145. ret = qpn;
  146. goto bail;
  147. }
  148. offset = find_next_offset(qpt, map, offset,
  149. dd->n_krcv_queues);
  150. qpn = mk_qpn(qpt, map, offset);
  151. /*
  152. * This test differs from alloc_pidmap().
  153. * If find_next_offset() does find a zero
  154. * bit, we don't need to check for QPN
  155. * wrapping around past our starting QPN.
  156. * We just need to be sure we don't loop
  157. * forever.
  158. */
  159. } while (offset < BITS_PER_PAGE && qpn < QPN_MAX);
  160. /*
  161. * In order to keep the number of pages allocated to a
  162. * minimum, we scan the all existing pages before increasing
  163. * the size of the bitmap table.
  164. */
  165. if (++i > max_scan) {
  166. if (qpt->nmaps == QPNMAP_ENTRIES)
  167. break;
  168. map = &qpt->map[qpt->nmaps++];
  169. offset = 0;
  170. } else if (map < &qpt->map[qpt->nmaps]) {
  171. ++map;
  172. offset = 0;
  173. } else {
  174. map = &qpt->map[0];
  175. offset = 2;
  176. }
  177. qpn = mk_qpn(qpt, map, offset);
  178. }
  179. ret = -ENOMEM;
  180. bail:
  181. return ret;
  182. }
  183. static void free_qpn(struct qib_qpn_table *qpt, u32 qpn)
  184. {
  185. struct qpn_map *map;
  186. map = qpt->map + qpn / BITS_PER_PAGE;
  187. if (map->page)
  188. clear_bit(qpn & BITS_PER_PAGE_MASK, map->page);
  189. }
  190. static inline unsigned qpn_hash(struct qib_ibdev *dev, u32 qpn)
  191. {
  192. return jhash_1word(qpn, dev->qp_rnd) &
  193. (dev->qp_table_size - 1);
  194. }
  195. /*
  196. * Put the QP into the hash table.
  197. * The hash table holds a reference to the QP.
  198. */
  199. static void insert_qp(struct qib_ibdev *dev, struct qib_qp *qp)
  200. {
  201. struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  202. unsigned long flags;
  203. unsigned n = qpn_hash(dev, qp->ibqp.qp_num);
  204. spin_lock_irqsave(&dev->qpt_lock, flags);
  205. atomic_inc(&qp->refcount);
  206. if (qp->ibqp.qp_num == 0)
  207. rcu_assign_pointer(ibp->qp0, qp);
  208. else if (qp->ibqp.qp_num == 1)
  209. rcu_assign_pointer(ibp->qp1, qp);
  210. else {
  211. qp->next = dev->qp_table[n];
  212. rcu_assign_pointer(dev->qp_table[n], qp);
  213. }
  214. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  215. synchronize_rcu();
  216. }
  217. /*
  218. * Remove the QP from the table so it can't be found asynchronously by
  219. * the receive interrupt routine.
  220. */
  221. static void remove_qp(struct qib_ibdev *dev, struct qib_qp *qp)
  222. {
  223. struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  224. unsigned n = qpn_hash(dev, qp->ibqp.qp_num);
  225. unsigned long flags;
  226. spin_lock_irqsave(&dev->qpt_lock, flags);
  227. if (rcu_dereference_protected(ibp->qp0,
  228. lockdep_is_held(&dev->qpt_lock)) == qp) {
  229. atomic_dec(&qp->refcount);
  230. rcu_assign_pointer(ibp->qp0, NULL);
  231. } else if (rcu_dereference_protected(ibp->qp1,
  232. lockdep_is_held(&dev->qpt_lock)) == qp) {
  233. atomic_dec(&qp->refcount);
  234. rcu_assign_pointer(ibp->qp1, NULL);
  235. } else {
  236. struct qib_qp *q;
  237. struct qib_qp __rcu **qpp;
  238. qpp = &dev->qp_table[n];
  239. for (; (q = rcu_dereference_protected(*qpp,
  240. lockdep_is_held(&dev->qpt_lock))) != NULL;
  241. qpp = &q->next)
  242. if (q == qp) {
  243. atomic_dec(&qp->refcount);
  244. rcu_assign_pointer(*qpp,
  245. rcu_dereference_protected(qp->next,
  246. lockdep_is_held(&dev->qpt_lock)));
  247. break;
  248. }
  249. }
  250. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  251. synchronize_rcu();
  252. }
  253. /**
  254. * qib_free_all_qps - check for QPs still in use
  255. * @qpt: the QP table to empty
  256. *
  257. * There should not be any QPs still in use.
  258. * Free memory for table.
  259. */
  260. unsigned qib_free_all_qps(struct qib_devdata *dd)
  261. {
  262. struct qib_ibdev *dev = &dd->verbs_dev;
  263. unsigned long flags;
  264. struct qib_qp *qp;
  265. unsigned n, qp_inuse = 0;
  266. for (n = 0; n < dd->num_pports; n++) {
  267. struct qib_ibport *ibp = &dd->pport[n].ibport_data;
  268. if (!qib_mcast_tree_empty(ibp))
  269. qp_inuse++;
  270. rcu_read_lock();
  271. if (rcu_dereference(ibp->qp0))
  272. qp_inuse++;
  273. if (rcu_dereference(ibp->qp1))
  274. qp_inuse++;
  275. rcu_read_unlock();
  276. }
  277. spin_lock_irqsave(&dev->qpt_lock, flags);
  278. for (n = 0; n < dev->qp_table_size; n++) {
  279. qp = rcu_dereference_protected(dev->qp_table[n],
  280. lockdep_is_held(&dev->qpt_lock));
  281. rcu_assign_pointer(dev->qp_table[n], NULL);
  282. for (; qp; qp = rcu_dereference_protected(qp->next,
  283. lockdep_is_held(&dev->qpt_lock)))
  284. qp_inuse++;
  285. }
  286. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  287. synchronize_rcu();
  288. return qp_inuse;
  289. }
  290. /**
  291. * qib_lookup_qpn - return the QP with the given QPN
  292. * @qpt: the QP table
  293. * @qpn: the QP number to look up
  294. *
  295. * The caller is responsible for decrementing the QP reference count
  296. * when done.
  297. */
  298. struct qib_qp *qib_lookup_qpn(struct qib_ibport *ibp, u32 qpn)
  299. {
  300. struct qib_qp *qp = NULL;
  301. if (unlikely(qpn <= 1)) {
  302. rcu_read_lock();
  303. if (qpn == 0)
  304. qp = rcu_dereference(ibp->qp0);
  305. else
  306. qp = rcu_dereference(ibp->qp1);
  307. } else {
  308. struct qib_ibdev *dev = &ppd_from_ibp(ibp)->dd->verbs_dev;
  309. unsigned n = qpn_hash(dev, qpn);
  310. rcu_read_lock();
  311. for (qp = rcu_dereference(dev->qp_table[n]); qp;
  312. qp = rcu_dereference(qp->next))
  313. if (qp->ibqp.qp_num == qpn)
  314. break;
  315. }
  316. if (qp)
  317. if (unlikely(!atomic_inc_not_zero(&qp->refcount)))
  318. qp = NULL;
  319. rcu_read_unlock();
  320. return qp;
  321. }
  322. /**
  323. * qib_reset_qp - initialize the QP state to the reset state
  324. * @qp: the QP to reset
  325. * @type: the QP type
  326. */
  327. static void qib_reset_qp(struct qib_qp *qp, enum ib_qp_type type)
  328. {
  329. qp->remote_qpn = 0;
  330. qp->qkey = 0;
  331. qp->qp_access_flags = 0;
  332. atomic_set(&qp->s_dma_busy, 0);
  333. qp->s_flags &= QIB_S_SIGNAL_REQ_WR;
  334. qp->s_hdrwords = 0;
  335. qp->s_wqe = NULL;
  336. qp->s_draining = 0;
  337. qp->s_next_psn = 0;
  338. qp->s_last_psn = 0;
  339. qp->s_sending_psn = 0;
  340. qp->s_sending_hpsn = 0;
  341. qp->s_psn = 0;
  342. qp->r_psn = 0;
  343. qp->r_msn = 0;
  344. if (type == IB_QPT_RC) {
  345. qp->s_state = IB_OPCODE_RC_SEND_LAST;
  346. qp->r_state = IB_OPCODE_RC_SEND_LAST;
  347. } else {
  348. qp->s_state = IB_OPCODE_UC_SEND_LAST;
  349. qp->r_state = IB_OPCODE_UC_SEND_LAST;
  350. }
  351. qp->s_ack_state = IB_OPCODE_RC_ACKNOWLEDGE;
  352. qp->r_nak_state = 0;
  353. qp->r_aflags = 0;
  354. qp->r_flags = 0;
  355. qp->s_head = 0;
  356. qp->s_tail = 0;
  357. qp->s_cur = 0;
  358. qp->s_acked = 0;
  359. qp->s_last = 0;
  360. qp->s_ssn = 1;
  361. qp->s_lsn = 0;
  362. qp->s_mig_state = IB_MIG_MIGRATED;
  363. memset(qp->s_ack_queue, 0, sizeof(qp->s_ack_queue));
  364. qp->r_head_ack_queue = 0;
  365. qp->s_tail_ack_queue = 0;
  366. qp->s_num_rd_atomic = 0;
  367. if (qp->r_rq.wq) {
  368. qp->r_rq.wq->head = 0;
  369. qp->r_rq.wq->tail = 0;
  370. }
  371. qp->r_sge.num_sge = 0;
  372. }
  373. static void clear_mr_refs(struct qib_qp *qp, int clr_sends)
  374. {
  375. unsigned n;
  376. if (test_and_clear_bit(QIB_R_REWIND_SGE, &qp->r_aflags))
  377. qib_put_ss(&qp->s_rdma_read_sge);
  378. qib_put_ss(&qp->r_sge);
  379. if (clr_sends) {
  380. while (qp->s_last != qp->s_head) {
  381. struct qib_swqe *wqe = get_swqe_ptr(qp, qp->s_last);
  382. unsigned i;
  383. for (i = 0; i < wqe->wr.num_sge; i++) {
  384. struct qib_sge *sge = &wqe->sg_list[i];
  385. qib_put_mr(sge->mr);
  386. }
  387. if (qp->ibqp.qp_type == IB_QPT_UD ||
  388. qp->ibqp.qp_type == IB_QPT_SMI ||
  389. qp->ibqp.qp_type == IB_QPT_GSI)
  390. atomic_dec(&to_iah(wqe->wr.wr.ud.ah)->refcount);
  391. if (++qp->s_last >= qp->s_size)
  392. qp->s_last = 0;
  393. }
  394. if (qp->s_rdma_mr) {
  395. qib_put_mr(qp->s_rdma_mr);
  396. qp->s_rdma_mr = NULL;
  397. }
  398. }
  399. if (qp->ibqp.qp_type != IB_QPT_RC)
  400. return;
  401. for (n = 0; n < ARRAY_SIZE(qp->s_ack_queue); n++) {
  402. struct qib_ack_entry *e = &qp->s_ack_queue[n];
  403. if (e->opcode == IB_OPCODE_RC_RDMA_READ_REQUEST &&
  404. e->rdma_sge.mr) {
  405. qib_put_mr(e->rdma_sge.mr);
  406. e->rdma_sge.mr = NULL;
  407. }
  408. }
  409. }
  410. /**
  411. * qib_error_qp - put a QP into the error state
  412. * @qp: the QP to put into the error state
  413. * @err: the receive completion error to signal if a RWQE is active
  414. *
  415. * Flushes both send and receive work queues.
  416. * Returns true if last WQE event should be generated.
  417. * The QP r_lock and s_lock should be held and interrupts disabled.
  418. * If we are already in error state, just return.
  419. */
  420. int qib_error_qp(struct qib_qp *qp, enum ib_wc_status err)
  421. {
  422. struct qib_ibdev *dev = to_idev(qp->ibqp.device);
  423. struct ib_wc wc;
  424. int ret = 0;
  425. if (qp->state == IB_QPS_ERR || qp->state == IB_QPS_RESET)
  426. goto bail;
  427. qp->state = IB_QPS_ERR;
  428. if (qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR)) {
  429. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_WAIT_RNR);
  430. del_timer(&qp->s_timer);
  431. }
  432. if (qp->s_flags & QIB_S_ANY_WAIT_SEND)
  433. qp->s_flags &= ~QIB_S_ANY_WAIT_SEND;
  434. spin_lock(&dev->pending_lock);
  435. if (!list_empty(&qp->iowait) && !(qp->s_flags & QIB_S_BUSY)) {
  436. qp->s_flags &= ~QIB_S_ANY_WAIT_IO;
  437. list_del_init(&qp->iowait);
  438. }
  439. spin_unlock(&dev->pending_lock);
  440. if (!(qp->s_flags & QIB_S_BUSY)) {
  441. qp->s_hdrwords = 0;
  442. if (qp->s_rdma_mr) {
  443. qib_put_mr(qp->s_rdma_mr);
  444. qp->s_rdma_mr = NULL;
  445. }
  446. if (qp->s_tx) {
  447. qib_put_txreq(qp->s_tx);
  448. qp->s_tx = NULL;
  449. }
  450. }
  451. /* Schedule the sending tasklet to drain the send work queue. */
  452. if (qp->s_last != qp->s_head)
  453. qib_schedule_send(qp);
  454. clear_mr_refs(qp, 0);
  455. memset(&wc, 0, sizeof(wc));
  456. wc.qp = &qp->ibqp;
  457. wc.opcode = IB_WC_RECV;
  458. if (test_and_clear_bit(QIB_R_WRID_VALID, &qp->r_aflags)) {
  459. wc.wr_id = qp->r_wr_id;
  460. wc.status = err;
  461. qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, 1);
  462. }
  463. wc.status = IB_WC_WR_FLUSH_ERR;
  464. if (qp->r_rq.wq) {
  465. struct qib_rwq *wq;
  466. u32 head;
  467. u32 tail;
  468. spin_lock(&qp->r_rq.lock);
  469. /* sanity check pointers before trusting them */
  470. wq = qp->r_rq.wq;
  471. head = wq->head;
  472. if (head >= qp->r_rq.size)
  473. head = 0;
  474. tail = wq->tail;
  475. if (tail >= qp->r_rq.size)
  476. tail = 0;
  477. while (tail != head) {
  478. wc.wr_id = get_rwqe_ptr(&qp->r_rq, tail)->wr_id;
  479. if (++tail >= qp->r_rq.size)
  480. tail = 0;
  481. qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, 1);
  482. }
  483. wq->tail = tail;
  484. spin_unlock(&qp->r_rq.lock);
  485. } else if (qp->ibqp.event_handler)
  486. ret = 1;
  487. bail:
  488. return ret;
  489. }
  490. /**
  491. * qib_modify_qp - modify the attributes of a queue pair
  492. * @ibqp: the queue pair who's attributes we're modifying
  493. * @attr: the new attributes
  494. * @attr_mask: the mask of attributes to modify
  495. * @udata: user data for libibverbs.so
  496. *
  497. * Returns 0 on success, otherwise returns an errno.
  498. */
  499. int qib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  500. int attr_mask, struct ib_udata *udata)
  501. {
  502. struct qib_ibdev *dev = to_idev(ibqp->device);
  503. struct qib_qp *qp = to_iqp(ibqp);
  504. enum ib_qp_state cur_state, new_state;
  505. struct ib_event ev;
  506. int lastwqe = 0;
  507. int mig = 0;
  508. int ret;
  509. u32 pmtu = 0; /* for gcc warning only */
  510. spin_lock_irq(&qp->r_lock);
  511. spin_lock(&qp->s_lock);
  512. cur_state = attr_mask & IB_QP_CUR_STATE ?
  513. attr->cur_qp_state : qp->state;
  514. new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state;
  515. if (!ib_modify_qp_is_ok(cur_state, new_state, ibqp->qp_type,
  516. attr_mask))
  517. goto inval;
  518. if (attr_mask & IB_QP_AV) {
  519. if (attr->ah_attr.dlid >= QIB_MULTICAST_LID_BASE)
  520. goto inval;
  521. if (qib_check_ah(qp->ibqp.device, &attr->ah_attr))
  522. goto inval;
  523. }
  524. if (attr_mask & IB_QP_ALT_PATH) {
  525. if (attr->alt_ah_attr.dlid >= QIB_MULTICAST_LID_BASE)
  526. goto inval;
  527. if (qib_check_ah(qp->ibqp.device, &attr->alt_ah_attr))
  528. goto inval;
  529. if (attr->alt_pkey_index >= qib_get_npkeys(dd_from_dev(dev)))
  530. goto inval;
  531. }
  532. if (attr_mask & IB_QP_PKEY_INDEX)
  533. if (attr->pkey_index >= qib_get_npkeys(dd_from_dev(dev)))
  534. goto inval;
  535. if (attr_mask & IB_QP_MIN_RNR_TIMER)
  536. if (attr->min_rnr_timer > 31)
  537. goto inval;
  538. if (attr_mask & IB_QP_PORT)
  539. if (qp->ibqp.qp_type == IB_QPT_SMI ||
  540. qp->ibqp.qp_type == IB_QPT_GSI ||
  541. attr->port_num == 0 ||
  542. attr->port_num > ibqp->device->phys_port_cnt)
  543. goto inval;
  544. if (attr_mask & IB_QP_DEST_QPN)
  545. if (attr->dest_qp_num > QIB_QPN_MASK)
  546. goto inval;
  547. if (attr_mask & IB_QP_RETRY_CNT)
  548. if (attr->retry_cnt > 7)
  549. goto inval;
  550. if (attr_mask & IB_QP_RNR_RETRY)
  551. if (attr->rnr_retry > 7)
  552. goto inval;
  553. /*
  554. * Don't allow invalid path_mtu values. OK to set greater
  555. * than the active mtu (or even the max_cap, if we have tuned
  556. * that to a small mtu. We'll set qp->path_mtu
  557. * to the lesser of requested attribute mtu and active,
  558. * for packetizing messages.
  559. * Note that the QP port has to be set in INIT and MTU in RTR.
  560. */
  561. if (attr_mask & IB_QP_PATH_MTU) {
  562. struct qib_devdata *dd = dd_from_dev(dev);
  563. int mtu, pidx = qp->port_num - 1;
  564. mtu = ib_mtu_enum_to_int(attr->path_mtu);
  565. if (mtu == -1)
  566. goto inval;
  567. if (mtu > dd->pport[pidx].ibmtu) {
  568. switch (dd->pport[pidx].ibmtu) {
  569. case 4096:
  570. pmtu = IB_MTU_4096;
  571. break;
  572. case 2048:
  573. pmtu = IB_MTU_2048;
  574. break;
  575. case 1024:
  576. pmtu = IB_MTU_1024;
  577. break;
  578. case 512:
  579. pmtu = IB_MTU_512;
  580. break;
  581. case 256:
  582. pmtu = IB_MTU_256;
  583. break;
  584. default:
  585. pmtu = IB_MTU_2048;
  586. }
  587. } else
  588. pmtu = attr->path_mtu;
  589. }
  590. if (attr_mask & IB_QP_PATH_MIG_STATE) {
  591. if (attr->path_mig_state == IB_MIG_REARM) {
  592. if (qp->s_mig_state == IB_MIG_ARMED)
  593. goto inval;
  594. if (new_state != IB_QPS_RTS)
  595. goto inval;
  596. } else if (attr->path_mig_state == IB_MIG_MIGRATED) {
  597. if (qp->s_mig_state == IB_MIG_REARM)
  598. goto inval;
  599. if (new_state != IB_QPS_RTS && new_state != IB_QPS_SQD)
  600. goto inval;
  601. if (qp->s_mig_state == IB_MIG_ARMED)
  602. mig = 1;
  603. } else
  604. goto inval;
  605. }
  606. if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
  607. if (attr->max_dest_rd_atomic > QIB_MAX_RDMA_ATOMIC)
  608. goto inval;
  609. switch (new_state) {
  610. case IB_QPS_RESET:
  611. if (qp->state != IB_QPS_RESET) {
  612. qp->state = IB_QPS_RESET;
  613. spin_lock(&dev->pending_lock);
  614. if (!list_empty(&qp->iowait))
  615. list_del_init(&qp->iowait);
  616. spin_unlock(&dev->pending_lock);
  617. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_ANY_WAIT);
  618. spin_unlock(&qp->s_lock);
  619. spin_unlock_irq(&qp->r_lock);
  620. /* Stop the sending work queue and retry timer */
  621. cancel_work_sync(&qp->s_work);
  622. del_timer_sync(&qp->s_timer);
  623. wait_event(qp->wait_dma, !atomic_read(&qp->s_dma_busy));
  624. if (qp->s_tx) {
  625. qib_put_txreq(qp->s_tx);
  626. qp->s_tx = NULL;
  627. }
  628. remove_qp(dev, qp);
  629. wait_event(qp->wait, !atomic_read(&qp->refcount));
  630. spin_lock_irq(&qp->r_lock);
  631. spin_lock(&qp->s_lock);
  632. clear_mr_refs(qp, 1);
  633. qib_reset_qp(qp, ibqp->qp_type);
  634. }
  635. break;
  636. case IB_QPS_RTR:
  637. /* Allow event to retrigger if QP set to RTR more than once */
  638. qp->r_flags &= ~QIB_R_COMM_EST;
  639. qp->state = new_state;
  640. break;
  641. case IB_QPS_SQD:
  642. qp->s_draining = qp->s_last != qp->s_cur;
  643. qp->state = new_state;
  644. break;
  645. case IB_QPS_SQE:
  646. if (qp->ibqp.qp_type == IB_QPT_RC)
  647. goto inval;
  648. qp->state = new_state;
  649. break;
  650. case IB_QPS_ERR:
  651. lastwqe = qib_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  652. break;
  653. default:
  654. qp->state = new_state;
  655. break;
  656. }
  657. if (attr_mask & IB_QP_PKEY_INDEX)
  658. qp->s_pkey_index = attr->pkey_index;
  659. if (attr_mask & IB_QP_PORT)
  660. qp->port_num = attr->port_num;
  661. if (attr_mask & IB_QP_DEST_QPN)
  662. qp->remote_qpn = attr->dest_qp_num;
  663. if (attr_mask & IB_QP_SQ_PSN) {
  664. qp->s_next_psn = attr->sq_psn & QIB_PSN_MASK;
  665. qp->s_psn = qp->s_next_psn;
  666. qp->s_sending_psn = qp->s_next_psn;
  667. qp->s_last_psn = qp->s_next_psn - 1;
  668. qp->s_sending_hpsn = qp->s_last_psn;
  669. }
  670. if (attr_mask & IB_QP_RQ_PSN)
  671. qp->r_psn = attr->rq_psn & QIB_PSN_MASK;
  672. if (attr_mask & IB_QP_ACCESS_FLAGS)
  673. qp->qp_access_flags = attr->qp_access_flags;
  674. if (attr_mask & IB_QP_AV) {
  675. qp->remote_ah_attr = attr->ah_attr;
  676. qp->s_srate = attr->ah_attr.static_rate;
  677. }
  678. if (attr_mask & IB_QP_ALT_PATH) {
  679. qp->alt_ah_attr = attr->alt_ah_attr;
  680. qp->s_alt_pkey_index = attr->alt_pkey_index;
  681. }
  682. if (attr_mask & IB_QP_PATH_MIG_STATE) {
  683. qp->s_mig_state = attr->path_mig_state;
  684. if (mig) {
  685. qp->remote_ah_attr = qp->alt_ah_attr;
  686. qp->port_num = qp->alt_ah_attr.port_num;
  687. qp->s_pkey_index = qp->s_alt_pkey_index;
  688. }
  689. }
  690. if (attr_mask & IB_QP_PATH_MTU) {
  691. qp->path_mtu = pmtu;
  692. qp->pmtu = ib_mtu_enum_to_int(pmtu);
  693. }
  694. if (attr_mask & IB_QP_RETRY_CNT) {
  695. qp->s_retry_cnt = attr->retry_cnt;
  696. qp->s_retry = attr->retry_cnt;
  697. }
  698. if (attr_mask & IB_QP_RNR_RETRY) {
  699. qp->s_rnr_retry_cnt = attr->rnr_retry;
  700. qp->s_rnr_retry = attr->rnr_retry;
  701. }
  702. if (attr_mask & IB_QP_MIN_RNR_TIMER)
  703. qp->r_min_rnr_timer = attr->min_rnr_timer;
  704. if (attr_mask & IB_QP_TIMEOUT) {
  705. qp->timeout = attr->timeout;
  706. qp->timeout_jiffies =
  707. usecs_to_jiffies((4096UL * (1UL << qp->timeout)) /
  708. 1000UL);
  709. }
  710. if (attr_mask & IB_QP_QKEY)
  711. qp->qkey = attr->qkey;
  712. if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
  713. qp->r_max_rd_atomic = attr->max_dest_rd_atomic;
  714. if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC)
  715. qp->s_max_rd_atomic = attr->max_rd_atomic;
  716. spin_unlock(&qp->s_lock);
  717. spin_unlock_irq(&qp->r_lock);
  718. if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT)
  719. insert_qp(dev, qp);
  720. if (lastwqe) {
  721. ev.device = qp->ibqp.device;
  722. ev.element.qp = &qp->ibqp;
  723. ev.event = IB_EVENT_QP_LAST_WQE_REACHED;
  724. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  725. }
  726. if (mig) {
  727. ev.device = qp->ibqp.device;
  728. ev.element.qp = &qp->ibqp;
  729. ev.event = IB_EVENT_PATH_MIG;
  730. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  731. }
  732. ret = 0;
  733. goto bail;
  734. inval:
  735. spin_unlock(&qp->s_lock);
  736. spin_unlock_irq(&qp->r_lock);
  737. ret = -EINVAL;
  738. bail:
  739. return ret;
  740. }
  741. int qib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  742. int attr_mask, struct ib_qp_init_attr *init_attr)
  743. {
  744. struct qib_qp *qp = to_iqp(ibqp);
  745. attr->qp_state = qp->state;
  746. attr->cur_qp_state = attr->qp_state;
  747. attr->path_mtu = qp->path_mtu;
  748. attr->path_mig_state = qp->s_mig_state;
  749. attr->qkey = qp->qkey;
  750. attr->rq_psn = qp->r_psn & QIB_PSN_MASK;
  751. attr->sq_psn = qp->s_next_psn & QIB_PSN_MASK;
  752. attr->dest_qp_num = qp->remote_qpn;
  753. attr->qp_access_flags = qp->qp_access_flags;
  754. attr->cap.max_send_wr = qp->s_size - 1;
  755. attr->cap.max_recv_wr = qp->ibqp.srq ? 0 : qp->r_rq.size - 1;
  756. attr->cap.max_send_sge = qp->s_max_sge;
  757. attr->cap.max_recv_sge = qp->r_rq.max_sge;
  758. attr->cap.max_inline_data = 0;
  759. attr->ah_attr = qp->remote_ah_attr;
  760. attr->alt_ah_attr = qp->alt_ah_attr;
  761. attr->pkey_index = qp->s_pkey_index;
  762. attr->alt_pkey_index = qp->s_alt_pkey_index;
  763. attr->en_sqd_async_notify = 0;
  764. attr->sq_draining = qp->s_draining;
  765. attr->max_rd_atomic = qp->s_max_rd_atomic;
  766. attr->max_dest_rd_atomic = qp->r_max_rd_atomic;
  767. attr->min_rnr_timer = qp->r_min_rnr_timer;
  768. attr->port_num = qp->port_num;
  769. attr->timeout = qp->timeout;
  770. attr->retry_cnt = qp->s_retry_cnt;
  771. attr->rnr_retry = qp->s_rnr_retry_cnt;
  772. attr->alt_port_num = qp->alt_ah_attr.port_num;
  773. attr->alt_timeout = qp->alt_timeout;
  774. init_attr->event_handler = qp->ibqp.event_handler;
  775. init_attr->qp_context = qp->ibqp.qp_context;
  776. init_attr->send_cq = qp->ibqp.send_cq;
  777. init_attr->recv_cq = qp->ibqp.recv_cq;
  778. init_attr->srq = qp->ibqp.srq;
  779. init_attr->cap = attr->cap;
  780. if (qp->s_flags & QIB_S_SIGNAL_REQ_WR)
  781. init_attr->sq_sig_type = IB_SIGNAL_REQ_WR;
  782. else
  783. init_attr->sq_sig_type = IB_SIGNAL_ALL_WR;
  784. init_attr->qp_type = qp->ibqp.qp_type;
  785. init_attr->port_num = qp->port_num;
  786. return 0;
  787. }
  788. /**
  789. * qib_compute_aeth - compute the AETH (syndrome + MSN)
  790. * @qp: the queue pair to compute the AETH for
  791. *
  792. * Returns the AETH.
  793. */
  794. __be32 qib_compute_aeth(struct qib_qp *qp)
  795. {
  796. u32 aeth = qp->r_msn & QIB_MSN_MASK;
  797. if (qp->ibqp.srq) {
  798. /*
  799. * Shared receive queues don't generate credits.
  800. * Set the credit field to the invalid value.
  801. */
  802. aeth |= QIB_AETH_CREDIT_INVAL << QIB_AETH_CREDIT_SHIFT;
  803. } else {
  804. u32 min, max, x;
  805. u32 credits;
  806. struct qib_rwq *wq = qp->r_rq.wq;
  807. u32 head;
  808. u32 tail;
  809. /* sanity check pointers before trusting them */
  810. head = wq->head;
  811. if (head >= qp->r_rq.size)
  812. head = 0;
  813. tail = wq->tail;
  814. if (tail >= qp->r_rq.size)
  815. tail = 0;
  816. /*
  817. * Compute the number of credits available (RWQEs).
  818. * XXX Not holding the r_rq.lock here so there is a small
  819. * chance that the pair of reads are not atomic.
  820. */
  821. credits = head - tail;
  822. if ((int)credits < 0)
  823. credits += qp->r_rq.size;
  824. /*
  825. * Binary search the credit table to find the code to
  826. * use.
  827. */
  828. min = 0;
  829. max = 31;
  830. for (;;) {
  831. x = (min + max) / 2;
  832. if (credit_table[x] == credits)
  833. break;
  834. if (credit_table[x] > credits)
  835. max = x;
  836. else if (min == x)
  837. break;
  838. else
  839. min = x;
  840. }
  841. aeth |= x << QIB_AETH_CREDIT_SHIFT;
  842. }
  843. return cpu_to_be32(aeth);
  844. }
  845. /**
  846. * qib_create_qp - create a queue pair for a device
  847. * @ibpd: the protection domain who's device we create the queue pair for
  848. * @init_attr: the attributes of the queue pair
  849. * @udata: user data for libibverbs.so
  850. *
  851. * Returns the queue pair on success, otherwise returns an errno.
  852. *
  853. * Called by the ib_create_qp() core verbs function.
  854. */
  855. struct ib_qp *qib_create_qp(struct ib_pd *ibpd,
  856. struct ib_qp_init_attr *init_attr,
  857. struct ib_udata *udata)
  858. {
  859. struct qib_qp *qp;
  860. int err;
  861. struct qib_swqe *swq = NULL;
  862. struct qib_ibdev *dev;
  863. struct qib_devdata *dd;
  864. size_t sz;
  865. size_t sg_list_sz;
  866. struct ib_qp *ret;
  867. if (init_attr->cap.max_send_sge > ib_qib_max_sges ||
  868. init_attr->cap.max_send_wr > ib_qib_max_qp_wrs) {
  869. ret = ERR_PTR(-EINVAL);
  870. goto bail;
  871. }
  872. /* Check receive queue parameters if no SRQ is specified. */
  873. if (!init_attr->srq) {
  874. if (init_attr->cap.max_recv_sge > ib_qib_max_sges ||
  875. init_attr->cap.max_recv_wr > ib_qib_max_qp_wrs) {
  876. ret = ERR_PTR(-EINVAL);
  877. goto bail;
  878. }
  879. if (init_attr->cap.max_send_sge +
  880. init_attr->cap.max_send_wr +
  881. init_attr->cap.max_recv_sge +
  882. init_attr->cap.max_recv_wr == 0) {
  883. ret = ERR_PTR(-EINVAL);
  884. goto bail;
  885. }
  886. }
  887. switch (init_attr->qp_type) {
  888. case IB_QPT_SMI:
  889. case IB_QPT_GSI:
  890. if (init_attr->port_num == 0 ||
  891. init_attr->port_num > ibpd->device->phys_port_cnt) {
  892. ret = ERR_PTR(-EINVAL);
  893. goto bail;
  894. }
  895. case IB_QPT_UC:
  896. case IB_QPT_RC:
  897. case IB_QPT_UD:
  898. sz = sizeof(struct qib_sge) *
  899. init_attr->cap.max_send_sge +
  900. sizeof(struct qib_swqe);
  901. swq = vmalloc((init_attr->cap.max_send_wr + 1) * sz);
  902. if (swq == NULL) {
  903. ret = ERR_PTR(-ENOMEM);
  904. goto bail;
  905. }
  906. sz = sizeof(*qp);
  907. sg_list_sz = 0;
  908. if (init_attr->srq) {
  909. struct qib_srq *srq = to_isrq(init_attr->srq);
  910. if (srq->rq.max_sge > 1)
  911. sg_list_sz = sizeof(*qp->r_sg_list) *
  912. (srq->rq.max_sge - 1);
  913. } else if (init_attr->cap.max_recv_sge > 1)
  914. sg_list_sz = sizeof(*qp->r_sg_list) *
  915. (init_attr->cap.max_recv_sge - 1);
  916. qp = kzalloc(sz + sg_list_sz, GFP_KERNEL);
  917. if (!qp) {
  918. ret = ERR_PTR(-ENOMEM);
  919. goto bail_swq;
  920. }
  921. RCU_INIT_POINTER(qp->next, NULL);
  922. qp->s_hdr = kzalloc(sizeof(*qp->s_hdr), GFP_KERNEL);
  923. if (!qp->s_hdr) {
  924. ret = ERR_PTR(-ENOMEM);
  925. goto bail_qp;
  926. }
  927. qp->timeout_jiffies =
  928. usecs_to_jiffies((4096UL * (1UL << qp->timeout)) /
  929. 1000UL);
  930. if (init_attr->srq)
  931. sz = 0;
  932. else {
  933. qp->r_rq.size = init_attr->cap.max_recv_wr + 1;
  934. qp->r_rq.max_sge = init_attr->cap.max_recv_sge;
  935. sz = (sizeof(struct ib_sge) * qp->r_rq.max_sge) +
  936. sizeof(struct qib_rwqe);
  937. qp->r_rq.wq = vmalloc_user(sizeof(struct qib_rwq) +
  938. qp->r_rq.size * sz);
  939. if (!qp->r_rq.wq) {
  940. ret = ERR_PTR(-ENOMEM);
  941. goto bail_qp;
  942. }
  943. }
  944. /*
  945. * ib_create_qp() will initialize qp->ibqp
  946. * except for qp->ibqp.qp_num.
  947. */
  948. spin_lock_init(&qp->r_lock);
  949. spin_lock_init(&qp->s_lock);
  950. spin_lock_init(&qp->r_rq.lock);
  951. atomic_set(&qp->refcount, 0);
  952. init_waitqueue_head(&qp->wait);
  953. init_waitqueue_head(&qp->wait_dma);
  954. init_timer(&qp->s_timer);
  955. qp->s_timer.data = (unsigned long)qp;
  956. INIT_WORK(&qp->s_work, qib_do_send);
  957. INIT_LIST_HEAD(&qp->iowait);
  958. INIT_LIST_HEAD(&qp->rspwait);
  959. qp->state = IB_QPS_RESET;
  960. qp->s_wq = swq;
  961. qp->s_size = init_attr->cap.max_send_wr + 1;
  962. qp->s_max_sge = init_attr->cap.max_send_sge;
  963. if (init_attr->sq_sig_type == IB_SIGNAL_REQ_WR)
  964. qp->s_flags = QIB_S_SIGNAL_REQ_WR;
  965. dev = to_idev(ibpd->device);
  966. dd = dd_from_dev(dev);
  967. err = alloc_qpn(dd, &dev->qpn_table, init_attr->qp_type,
  968. init_attr->port_num);
  969. if (err < 0) {
  970. ret = ERR_PTR(err);
  971. vfree(qp->r_rq.wq);
  972. goto bail_qp;
  973. }
  974. qp->ibqp.qp_num = err;
  975. qp->port_num = init_attr->port_num;
  976. qib_reset_qp(qp, init_attr->qp_type);
  977. break;
  978. default:
  979. /* Don't support raw QPs */
  980. ret = ERR_PTR(-ENOSYS);
  981. goto bail;
  982. }
  983. init_attr->cap.max_inline_data = 0;
  984. /*
  985. * Return the address of the RWQ as the offset to mmap.
  986. * See qib_mmap() for details.
  987. */
  988. if (udata && udata->outlen >= sizeof(__u64)) {
  989. if (!qp->r_rq.wq) {
  990. __u64 offset = 0;
  991. err = ib_copy_to_udata(udata, &offset,
  992. sizeof(offset));
  993. if (err) {
  994. ret = ERR_PTR(err);
  995. goto bail_ip;
  996. }
  997. } else {
  998. u32 s = sizeof(struct qib_rwq) + qp->r_rq.size * sz;
  999. qp->ip = qib_create_mmap_info(dev, s,
  1000. ibpd->uobject->context,
  1001. qp->r_rq.wq);
  1002. if (!qp->ip) {
  1003. ret = ERR_PTR(-ENOMEM);
  1004. goto bail_ip;
  1005. }
  1006. err = ib_copy_to_udata(udata, &(qp->ip->offset),
  1007. sizeof(qp->ip->offset));
  1008. if (err) {
  1009. ret = ERR_PTR(err);
  1010. goto bail_ip;
  1011. }
  1012. }
  1013. }
  1014. spin_lock(&dev->n_qps_lock);
  1015. if (dev->n_qps_allocated == ib_qib_max_qps) {
  1016. spin_unlock(&dev->n_qps_lock);
  1017. ret = ERR_PTR(-ENOMEM);
  1018. goto bail_ip;
  1019. }
  1020. dev->n_qps_allocated++;
  1021. spin_unlock(&dev->n_qps_lock);
  1022. if (qp->ip) {
  1023. spin_lock_irq(&dev->pending_lock);
  1024. list_add(&qp->ip->pending_mmaps, &dev->pending_mmaps);
  1025. spin_unlock_irq(&dev->pending_lock);
  1026. }
  1027. ret = &qp->ibqp;
  1028. goto bail;
  1029. bail_ip:
  1030. if (qp->ip)
  1031. kref_put(&qp->ip->ref, qib_release_mmap_info);
  1032. else
  1033. vfree(qp->r_rq.wq);
  1034. free_qpn(&dev->qpn_table, qp->ibqp.qp_num);
  1035. bail_qp:
  1036. kfree(qp->s_hdr);
  1037. kfree(qp);
  1038. bail_swq:
  1039. vfree(swq);
  1040. bail:
  1041. return ret;
  1042. }
  1043. /**
  1044. * qib_destroy_qp - destroy a queue pair
  1045. * @ibqp: the queue pair to destroy
  1046. *
  1047. * Returns 0 on success.
  1048. *
  1049. * Note that this can be called while the QP is actively sending or
  1050. * receiving!
  1051. */
  1052. int qib_destroy_qp(struct ib_qp *ibqp)
  1053. {
  1054. struct qib_qp *qp = to_iqp(ibqp);
  1055. struct qib_ibdev *dev = to_idev(ibqp->device);
  1056. /* Make sure HW and driver activity is stopped. */
  1057. spin_lock_irq(&qp->s_lock);
  1058. if (qp->state != IB_QPS_RESET) {
  1059. qp->state = IB_QPS_RESET;
  1060. spin_lock(&dev->pending_lock);
  1061. if (!list_empty(&qp->iowait))
  1062. list_del_init(&qp->iowait);
  1063. spin_unlock(&dev->pending_lock);
  1064. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_ANY_WAIT);
  1065. spin_unlock_irq(&qp->s_lock);
  1066. cancel_work_sync(&qp->s_work);
  1067. del_timer_sync(&qp->s_timer);
  1068. wait_event(qp->wait_dma, !atomic_read(&qp->s_dma_busy));
  1069. if (qp->s_tx) {
  1070. qib_put_txreq(qp->s_tx);
  1071. qp->s_tx = NULL;
  1072. }
  1073. remove_qp(dev, qp);
  1074. wait_event(qp->wait, !atomic_read(&qp->refcount));
  1075. clear_mr_refs(qp, 1);
  1076. } else
  1077. spin_unlock_irq(&qp->s_lock);
  1078. /* all user's cleaned up, mark it available */
  1079. free_qpn(&dev->qpn_table, qp->ibqp.qp_num);
  1080. spin_lock(&dev->n_qps_lock);
  1081. dev->n_qps_allocated--;
  1082. spin_unlock(&dev->n_qps_lock);
  1083. if (qp->ip)
  1084. kref_put(&qp->ip->ref, qib_release_mmap_info);
  1085. else
  1086. vfree(qp->r_rq.wq);
  1087. vfree(qp->s_wq);
  1088. kfree(qp->s_hdr);
  1089. kfree(qp);
  1090. return 0;
  1091. }
  1092. /**
  1093. * qib_init_qpn_table - initialize the QP number table for a device
  1094. * @qpt: the QPN table
  1095. */
  1096. void qib_init_qpn_table(struct qib_devdata *dd, struct qib_qpn_table *qpt)
  1097. {
  1098. spin_lock_init(&qpt->lock);
  1099. qpt->last = 1; /* start with QPN 2 */
  1100. qpt->nmaps = 1;
  1101. qpt->mask = dd->qpn_mask;
  1102. }
  1103. /**
  1104. * qib_free_qpn_table - free the QP number table for a device
  1105. * @qpt: the QPN table
  1106. */
  1107. void qib_free_qpn_table(struct qib_qpn_table *qpt)
  1108. {
  1109. int i;
  1110. for (i = 0; i < ARRAY_SIZE(qpt->map); i++)
  1111. if (qpt->map[i].page)
  1112. free_page((unsigned long) qpt->map[i].page);
  1113. }
  1114. /**
  1115. * qib_get_credit - flush the send work queue of a QP
  1116. * @qp: the qp who's send work queue to flush
  1117. * @aeth: the Acknowledge Extended Transport Header
  1118. *
  1119. * The QP s_lock should be held.
  1120. */
  1121. void qib_get_credit(struct qib_qp *qp, u32 aeth)
  1122. {
  1123. u32 credit = (aeth >> QIB_AETH_CREDIT_SHIFT) & QIB_AETH_CREDIT_MASK;
  1124. /*
  1125. * If the credit is invalid, we can send
  1126. * as many packets as we like. Otherwise, we have to
  1127. * honor the credit field.
  1128. */
  1129. if (credit == QIB_AETH_CREDIT_INVAL) {
  1130. if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT)) {
  1131. qp->s_flags |= QIB_S_UNLIMITED_CREDIT;
  1132. if (qp->s_flags & QIB_S_WAIT_SSN_CREDIT) {
  1133. qp->s_flags &= ~QIB_S_WAIT_SSN_CREDIT;
  1134. qib_schedule_send(qp);
  1135. }
  1136. }
  1137. } else if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT)) {
  1138. /* Compute new LSN (i.e., MSN + credit) */
  1139. credit = (aeth + credit_table[credit]) & QIB_MSN_MASK;
  1140. if (qib_cmp24(credit, qp->s_lsn) > 0) {
  1141. qp->s_lsn = credit;
  1142. if (qp->s_flags & QIB_S_WAIT_SSN_CREDIT) {
  1143. qp->s_flags &= ~QIB_S_WAIT_SSN_CREDIT;
  1144. qib_schedule_send(qp);
  1145. }
  1146. }
  1147. }
  1148. }