qib_eeprom.c 13 KB

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  1. /*
  2. * Copyright (c) 2012 Intel Corporation. All rights reserved.
  3. * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
  4. * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. */
  34. #include <linux/delay.h>
  35. #include <linux/pci.h>
  36. #include <linux/vmalloc.h>
  37. #include "qib.h"
  38. /*
  39. * Functions specific to the serial EEPROM on cards handled by ib_qib.
  40. * The actual serail interface code is in qib_twsi.c. This file is a client
  41. */
  42. /**
  43. * qib_eeprom_read - receives bytes from the eeprom via I2C
  44. * @dd: the qlogic_ib device
  45. * @eeprom_offset: address to read from
  46. * @buffer: where to store result
  47. * @len: number of bytes to receive
  48. */
  49. int qib_eeprom_read(struct qib_devdata *dd, u8 eeprom_offset,
  50. void *buff, int len)
  51. {
  52. int ret;
  53. ret = mutex_lock_interruptible(&dd->eep_lock);
  54. if (!ret) {
  55. ret = qib_twsi_reset(dd);
  56. if (ret)
  57. qib_dev_err(dd, "EEPROM Reset for read failed\n");
  58. else
  59. ret = qib_twsi_blk_rd(dd, dd->twsi_eeprom_dev,
  60. eeprom_offset, buff, len);
  61. mutex_unlock(&dd->eep_lock);
  62. }
  63. return ret;
  64. }
  65. /*
  66. * Actually update the eeprom, first doing write enable if
  67. * needed, then restoring write enable state.
  68. * Must be called with eep_lock held
  69. */
  70. static int eeprom_write_with_enable(struct qib_devdata *dd, u8 offset,
  71. const void *buf, int len)
  72. {
  73. int ret, pwen;
  74. pwen = dd->f_eeprom_wen(dd, 1);
  75. ret = qib_twsi_reset(dd);
  76. if (ret)
  77. qib_dev_err(dd, "EEPROM Reset for write failed\n");
  78. else
  79. ret = qib_twsi_blk_wr(dd, dd->twsi_eeprom_dev,
  80. offset, buf, len);
  81. dd->f_eeprom_wen(dd, pwen);
  82. return ret;
  83. }
  84. /**
  85. * qib_eeprom_write - writes data to the eeprom via I2C
  86. * @dd: the qlogic_ib device
  87. * @eeprom_offset: where to place data
  88. * @buffer: data to write
  89. * @len: number of bytes to write
  90. */
  91. int qib_eeprom_write(struct qib_devdata *dd, u8 eeprom_offset,
  92. const void *buff, int len)
  93. {
  94. int ret;
  95. ret = mutex_lock_interruptible(&dd->eep_lock);
  96. if (!ret) {
  97. ret = eeprom_write_with_enable(dd, eeprom_offset, buff, len);
  98. mutex_unlock(&dd->eep_lock);
  99. }
  100. return ret;
  101. }
  102. static u8 flash_csum(struct qib_flash *ifp, int adjust)
  103. {
  104. u8 *ip = (u8 *) ifp;
  105. u8 csum = 0, len;
  106. /*
  107. * Limit length checksummed to max length of actual data.
  108. * Checksum of erased eeprom will still be bad, but we avoid
  109. * reading past the end of the buffer we were passed.
  110. */
  111. len = ifp->if_length;
  112. if (len > sizeof(struct qib_flash))
  113. len = sizeof(struct qib_flash);
  114. while (len--)
  115. csum += *ip++;
  116. csum -= ifp->if_csum;
  117. csum = ~csum;
  118. if (adjust)
  119. ifp->if_csum = csum;
  120. return csum;
  121. }
  122. /**
  123. * qib_get_eeprom_info- get the GUID et al. from the TSWI EEPROM device
  124. * @dd: the qlogic_ib device
  125. *
  126. * We have the capability to use the nguid field, and get
  127. * the guid from the first chip's flash, to use for all of them.
  128. */
  129. void qib_get_eeprom_info(struct qib_devdata *dd)
  130. {
  131. void *buf;
  132. struct qib_flash *ifp;
  133. __be64 guid;
  134. int len, eep_stat;
  135. u8 csum, *bguid;
  136. int t = dd->unit;
  137. struct qib_devdata *dd0 = qib_lookup(0);
  138. if (t && dd0->nguid > 1 && t <= dd0->nguid) {
  139. u8 oguid;
  140. dd->base_guid = dd0->base_guid;
  141. bguid = (u8 *) &dd->base_guid;
  142. oguid = bguid[7];
  143. bguid[7] += t;
  144. if (oguid > bguid[7]) {
  145. if (bguid[6] == 0xff) {
  146. if (bguid[5] == 0xff) {
  147. qib_dev_err(dd,
  148. "Can't set %s GUID from base, wraps to OUI!\n",
  149. qib_get_unit_name(t));
  150. dd->base_guid = 0;
  151. goto bail;
  152. }
  153. bguid[5]++;
  154. }
  155. bguid[6]++;
  156. }
  157. dd->nguid = 1;
  158. goto bail;
  159. }
  160. /*
  161. * Read full flash, not just currently used part, since it may have
  162. * been written with a newer definition.
  163. * */
  164. len = sizeof(struct qib_flash);
  165. buf = vmalloc(len);
  166. if (!buf) {
  167. qib_dev_err(dd,
  168. "Couldn't allocate memory to read %u bytes from eeprom for GUID\n",
  169. len);
  170. goto bail;
  171. }
  172. /*
  173. * Use "public" eeprom read function, which does locking and
  174. * figures out device. This will migrate to chip-specific.
  175. */
  176. eep_stat = qib_eeprom_read(dd, 0, buf, len);
  177. if (eep_stat) {
  178. qib_dev_err(dd, "Failed reading GUID from eeprom\n");
  179. goto done;
  180. }
  181. ifp = (struct qib_flash *)buf;
  182. csum = flash_csum(ifp, 0);
  183. if (csum != ifp->if_csum) {
  184. qib_devinfo(dd->pcidev,
  185. "Bad I2C flash checksum: 0x%x, not 0x%x\n",
  186. csum, ifp->if_csum);
  187. goto done;
  188. }
  189. if (*(__be64 *) ifp->if_guid == cpu_to_be64(0) ||
  190. *(__be64 *) ifp->if_guid == ~cpu_to_be64(0)) {
  191. qib_dev_err(dd,
  192. "Invalid GUID %llx from flash; ignoring\n",
  193. *(unsigned long long *) ifp->if_guid);
  194. /* don't allow GUID if all 0 or all 1's */
  195. goto done;
  196. }
  197. /* complain, but allow it */
  198. if (*(u64 *) ifp->if_guid == 0x100007511000000ULL)
  199. qib_devinfo(dd->pcidev,
  200. "Warning, GUID %llx is default, probably not correct!\n",
  201. *(unsigned long long *) ifp->if_guid);
  202. bguid = ifp->if_guid;
  203. if (!bguid[0] && !bguid[1] && !bguid[2]) {
  204. /*
  205. * Original incorrect GUID format in flash; fix in
  206. * core copy, by shifting up 2 octets; don't need to
  207. * change top octet, since both it and shifted are 0.
  208. */
  209. bguid[1] = bguid[3];
  210. bguid[2] = bguid[4];
  211. bguid[3] = 0;
  212. bguid[4] = 0;
  213. guid = *(__be64 *) ifp->if_guid;
  214. } else
  215. guid = *(__be64 *) ifp->if_guid;
  216. dd->base_guid = guid;
  217. dd->nguid = ifp->if_numguid;
  218. /*
  219. * Things are slightly complicated by the desire to transparently
  220. * support both the Pathscale 10-digit serial number and the QLogic
  221. * 13-character version.
  222. */
  223. if ((ifp->if_fversion > 1) && ifp->if_sprefix[0] &&
  224. ((u8 *) ifp->if_sprefix)[0] != 0xFF) {
  225. char *snp = dd->serial;
  226. /*
  227. * This board has a Serial-prefix, which is stored
  228. * elsewhere for backward-compatibility.
  229. */
  230. memcpy(snp, ifp->if_sprefix, sizeof ifp->if_sprefix);
  231. snp[sizeof ifp->if_sprefix] = '\0';
  232. len = strlen(snp);
  233. snp += len;
  234. len = (sizeof dd->serial) - len;
  235. if (len > sizeof ifp->if_serial)
  236. len = sizeof ifp->if_serial;
  237. memcpy(snp, ifp->if_serial, len);
  238. } else
  239. memcpy(dd->serial, ifp->if_serial,
  240. sizeof ifp->if_serial);
  241. if (!strstr(ifp->if_comment, "Tested successfully"))
  242. qib_dev_err(dd,
  243. "Board SN %s did not pass functional test: %s\n",
  244. dd->serial, ifp->if_comment);
  245. memcpy(&dd->eep_st_errs, &ifp->if_errcntp, QIB_EEP_LOG_CNT);
  246. /*
  247. * Power-on (actually "active") hours are kept as little-endian value
  248. * in EEPROM, but as seconds in a (possibly as small as 24-bit)
  249. * atomic_t while running.
  250. */
  251. atomic_set(&dd->active_time, 0);
  252. dd->eep_hrs = ifp->if_powerhour[0] | (ifp->if_powerhour[1] << 8);
  253. done:
  254. vfree(buf);
  255. bail:;
  256. }
  257. /**
  258. * qib_update_eeprom_log - copy active-time and error counters to eeprom
  259. * @dd: the qlogic_ib device
  260. *
  261. * Although the time is kept as seconds in the qib_devdata struct, it is
  262. * rounded to hours for re-write, as we have only 16 bits in EEPROM.
  263. * First-cut code reads whole (expected) struct qib_flash, modifies,
  264. * re-writes. Future direction: read/write only what we need, assuming
  265. * that the EEPROM had to have been "good enough" for driver init, and
  266. * if not, we aren't making it worse.
  267. *
  268. */
  269. int qib_update_eeprom_log(struct qib_devdata *dd)
  270. {
  271. void *buf;
  272. struct qib_flash *ifp;
  273. int len, hi_water;
  274. uint32_t new_time, new_hrs;
  275. u8 csum;
  276. int ret, idx;
  277. unsigned long flags;
  278. /* first, check if we actually need to do anything. */
  279. ret = 0;
  280. for (idx = 0; idx < QIB_EEP_LOG_CNT; ++idx) {
  281. if (dd->eep_st_new_errs[idx]) {
  282. ret = 1;
  283. break;
  284. }
  285. }
  286. new_time = atomic_read(&dd->active_time);
  287. if (ret == 0 && new_time < 3600)
  288. goto bail;
  289. /*
  290. * The quick-check above determined that there is something worthy
  291. * of logging, so get current contents and do a more detailed idea.
  292. * read full flash, not just currently used part, since it may have
  293. * been written with a newer definition
  294. */
  295. len = sizeof(struct qib_flash);
  296. buf = vmalloc(len);
  297. ret = 1;
  298. if (!buf) {
  299. qib_dev_err(dd,
  300. "Couldn't allocate memory to read %u bytes from eeprom for logging\n",
  301. len);
  302. goto bail;
  303. }
  304. /* Grab semaphore and read current EEPROM. If we get an
  305. * error, let go, but if not, keep it until we finish write.
  306. */
  307. ret = mutex_lock_interruptible(&dd->eep_lock);
  308. if (ret) {
  309. qib_dev_err(dd, "Unable to acquire EEPROM for logging\n");
  310. goto free_bail;
  311. }
  312. ret = qib_twsi_blk_rd(dd, dd->twsi_eeprom_dev, 0, buf, len);
  313. if (ret) {
  314. mutex_unlock(&dd->eep_lock);
  315. qib_dev_err(dd, "Unable read EEPROM for logging\n");
  316. goto free_bail;
  317. }
  318. ifp = (struct qib_flash *)buf;
  319. csum = flash_csum(ifp, 0);
  320. if (csum != ifp->if_csum) {
  321. mutex_unlock(&dd->eep_lock);
  322. qib_dev_err(dd, "EEPROM cks err (0x%02X, S/B 0x%02X)\n",
  323. csum, ifp->if_csum);
  324. ret = 1;
  325. goto free_bail;
  326. }
  327. hi_water = 0;
  328. spin_lock_irqsave(&dd->eep_st_lock, flags);
  329. for (idx = 0; idx < QIB_EEP_LOG_CNT; ++idx) {
  330. int new_val = dd->eep_st_new_errs[idx];
  331. if (new_val) {
  332. /*
  333. * If we have seen any errors, add to EEPROM values
  334. * We need to saturate at 0xFF (255) and we also
  335. * would need to adjust the checksum if we were
  336. * trying to minimize EEPROM traffic
  337. * Note that we add to actual current count in EEPROM,
  338. * in case it was altered while we were running.
  339. */
  340. new_val += ifp->if_errcntp[idx];
  341. if (new_val > 0xFF)
  342. new_val = 0xFF;
  343. if (ifp->if_errcntp[idx] != new_val) {
  344. ifp->if_errcntp[idx] = new_val;
  345. hi_water = offsetof(struct qib_flash,
  346. if_errcntp) + idx;
  347. }
  348. /*
  349. * update our shadow (used to minimize EEPROM
  350. * traffic), to match what we are about to write.
  351. */
  352. dd->eep_st_errs[idx] = new_val;
  353. dd->eep_st_new_errs[idx] = 0;
  354. }
  355. }
  356. /*
  357. * Now update active-time. We would like to round to the nearest hour
  358. * but unless atomic_t are sure to be proper signed ints we cannot,
  359. * because we need to account for what we "transfer" to EEPROM and
  360. * if we log an hour at 31 minutes, then we would need to set
  361. * active_time to -29 to accurately count the _next_ hour.
  362. */
  363. if (new_time >= 3600) {
  364. new_hrs = new_time / 3600;
  365. atomic_sub((new_hrs * 3600), &dd->active_time);
  366. new_hrs += dd->eep_hrs;
  367. if (new_hrs > 0xFFFF)
  368. new_hrs = 0xFFFF;
  369. dd->eep_hrs = new_hrs;
  370. if ((new_hrs & 0xFF) != ifp->if_powerhour[0]) {
  371. ifp->if_powerhour[0] = new_hrs & 0xFF;
  372. hi_water = offsetof(struct qib_flash, if_powerhour);
  373. }
  374. if ((new_hrs >> 8) != ifp->if_powerhour[1]) {
  375. ifp->if_powerhour[1] = new_hrs >> 8;
  376. hi_water = offsetof(struct qib_flash, if_powerhour) + 1;
  377. }
  378. }
  379. /*
  380. * There is a tiny possibility that we could somehow fail to write
  381. * the EEPROM after updating our shadows, but problems from holding
  382. * the spinlock too long are a much bigger issue.
  383. */
  384. spin_unlock_irqrestore(&dd->eep_st_lock, flags);
  385. if (hi_water) {
  386. /* we made some change to the data, uopdate cksum and write */
  387. csum = flash_csum(ifp, 1);
  388. ret = eeprom_write_with_enable(dd, 0, buf, hi_water + 1);
  389. }
  390. mutex_unlock(&dd->eep_lock);
  391. if (ret)
  392. qib_dev_err(dd, "Failed updating EEPROM\n");
  393. free_bail:
  394. vfree(buf);
  395. bail:
  396. return ret;
  397. }
  398. /**
  399. * qib_inc_eeprom_err - increment one of the four error counters
  400. * that are logged to EEPROM.
  401. * @dd: the qlogic_ib device
  402. * @eidx: 0..3, the counter to increment
  403. * @incr: how much to add
  404. *
  405. * Each counter is 8-bits, and saturates at 255 (0xFF). They
  406. * are copied to the EEPROM (aka flash) whenever qib_update_eeprom_log()
  407. * is called, but it can only be called in a context that allows sleep.
  408. * This function can be called even at interrupt level.
  409. */
  410. void qib_inc_eeprom_err(struct qib_devdata *dd, u32 eidx, u32 incr)
  411. {
  412. uint new_val;
  413. unsigned long flags;
  414. spin_lock_irqsave(&dd->eep_st_lock, flags);
  415. new_val = dd->eep_st_new_errs[eidx] + incr;
  416. if (new_val > 255)
  417. new_val = 255;
  418. dd->eep_st_new_errs[eidx] = new_val;
  419. spin_unlock_irqrestore(&dd->eep_st_lock, flags);
  420. }