device.c 29 KB

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  1. /*
  2. * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/module.h>
  33. #include <linux/moduleparam.h>
  34. #include <linux/debugfs.h>
  35. #include <linux/vmalloc.h>
  36. #include <rdma/ib_verbs.h>
  37. #include "iw_cxgb4.h"
  38. #define DRV_VERSION "0.1"
  39. MODULE_AUTHOR("Steve Wise");
  40. MODULE_DESCRIPTION("Chelsio T4 RDMA Driver");
  41. MODULE_LICENSE("Dual BSD/GPL");
  42. MODULE_VERSION(DRV_VERSION);
  43. struct uld_ctx {
  44. struct list_head entry;
  45. struct cxgb4_lld_info lldi;
  46. struct c4iw_dev *dev;
  47. };
  48. static LIST_HEAD(uld_ctx_list);
  49. static DEFINE_MUTEX(dev_mutex);
  50. static struct dentry *c4iw_debugfs_root;
  51. struct c4iw_debugfs_data {
  52. struct c4iw_dev *devp;
  53. char *buf;
  54. int bufsize;
  55. int pos;
  56. };
  57. static int count_idrs(int id, void *p, void *data)
  58. {
  59. int *countp = data;
  60. *countp = *countp + 1;
  61. return 0;
  62. }
  63. static ssize_t debugfs_read(struct file *file, char __user *buf, size_t count,
  64. loff_t *ppos)
  65. {
  66. struct c4iw_debugfs_data *d = file->private_data;
  67. return simple_read_from_buffer(buf, count, ppos, d->buf, d->pos);
  68. }
  69. static int dump_qp(int id, void *p, void *data)
  70. {
  71. struct c4iw_qp *qp = p;
  72. struct c4iw_debugfs_data *qpd = data;
  73. int space;
  74. int cc;
  75. if (id != qp->wq.sq.qid)
  76. return 0;
  77. space = qpd->bufsize - qpd->pos - 1;
  78. if (space == 0)
  79. return 1;
  80. if (qp->ep)
  81. cc = snprintf(qpd->buf + qpd->pos, space,
  82. "qp sq id %u rq id %u state %u onchip %u "
  83. "ep tid %u state %u %pI4:%u->%pI4:%u\n",
  84. qp->wq.sq.qid, qp->wq.rq.qid, (int)qp->attr.state,
  85. qp->wq.sq.flags & T4_SQ_ONCHIP,
  86. qp->ep->hwtid, (int)qp->ep->com.state,
  87. &qp->ep->com.local_addr.sin_addr.s_addr,
  88. ntohs(qp->ep->com.local_addr.sin_port),
  89. &qp->ep->com.remote_addr.sin_addr.s_addr,
  90. ntohs(qp->ep->com.remote_addr.sin_port));
  91. else
  92. cc = snprintf(qpd->buf + qpd->pos, space,
  93. "qp sq id %u rq id %u state %u onchip %u\n",
  94. qp->wq.sq.qid, qp->wq.rq.qid,
  95. (int)qp->attr.state,
  96. qp->wq.sq.flags & T4_SQ_ONCHIP);
  97. if (cc < space)
  98. qpd->pos += cc;
  99. return 0;
  100. }
  101. static int qp_release(struct inode *inode, struct file *file)
  102. {
  103. struct c4iw_debugfs_data *qpd = file->private_data;
  104. if (!qpd) {
  105. printk(KERN_INFO "%s null qpd?\n", __func__);
  106. return 0;
  107. }
  108. vfree(qpd->buf);
  109. kfree(qpd);
  110. return 0;
  111. }
  112. static int qp_open(struct inode *inode, struct file *file)
  113. {
  114. struct c4iw_debugfs_data *qpd;
  115. int ret = 0;
  116. int count = 1;
  117. qpd = kmalloc(sizeof *qpd, GFP_KERNEL);
  118. if (!qpd) {
  119. ret = -ENOMEM;
  120. goto out;
  121. }
  122. qpd->devp = inode->i_private;
  123. qpd->pos = 0;
  124. spin_lock_irq(&qpd->devp->lock);
  125. idr_for_each(&qpd->devp->qpidr, count_idrs, &count);
  126. spin_unlock_irq(&qpd->devp->lock);
  127. qpd->bufsize = count * 128;
  128. qpd->buf = vmalloc(qpd->bufsize);
  129. if (!qpd->buf) {
  130. ret = -ENOMEM;
  131. goto err1;
  132. }
  133. spin_lock_irq(&qpd->devp->lock);
  134. idr_for_each(&qpd->devp->qpidr, dump_qp, qpd);
  135. spin_unlock_irq(&qpd->devp->lock);
  136. qpd->buf[qpd->pos++] = 0;
  137. file->private_data = qpd;
  138. goto out;
  139. err1:
  140. kfree(qpd);
  141. out:
  142. return ret;
  143. }
  144. static const struct file_operations qp_debugfs_fops = {
  145. .owner = THIS_MODULE,
  146. .open = qp_open,
  147. .release = qp_release,
  148. .read = debugfs_read,
  149. .llseek = default_llseek,
  150. };
  151. static int dump_stag(int id, void *p, void *data)
  152. {
  153. struct c4iw_debugfs_data *stagd = data;
  154. int space;
  155. int cc;
  156. space = stagd->bufsize - stagd->pos - 1;
  157. if (space == 0)
  158. return 1;
  159. cc = snprintf(stagd->buf + stagd->pos, space, "0x%x\n", id<<8);
  160. if (cc < space)
  161. stagd->pos += cc;
  162. return 0;
  163. }
  164. static int stag_release(struct inode *inode, struct file *file)
  165. {
  166. struct c4iw_debugfs_data *stagd = file->private_data;
  167. if (!stagd) {
  168. printk(KERN_INFO "%s null stagd?\n", __func__);
  169. return 0;
  170. }
  171. kfree(stagd->buf);
  172. kfree(stagd);
  173. return 0;
  174. }
  175. static int stag_open(struct inode *inode, struct file *file)
  176. {
  177. struct c4iw_debugfs_data *stagd;
  178. int ret = 0;
  179. int count = 1;
  180. stagd = kmalloc(sizeof *stagd, GFP_KERNEL);
  181. if (!stagd) {
  182. ret = -ENOMEM;
  183. goto out;
  184. }
  185. stagd->devp = inode->i_private;
  186. stagd->pos = 0;
  187. spin_lock_irq(&stagd->devp->lock);
  188. idr_for_each(&stagd->devp->mmidr, count_idrs, &count);
  189. spin_unlock_irq(&stagd->devp->lock);
  190. stagd->bufsize = count * sizeof("0x12345678\n");
  191. stagd->buf = kmalloc(stagd->bufsize, GFP_KERNEL);
  192. if (!stagd->buf) {
  193. ret = -ENOMEM;
  194. goto err1;
  195. }
  196. spin_lock_irq(&stagd->devp->lock);
  197. idr_for_each(&stagd->devp->mmidr, dump_stag, stagd);
  198. spin_unlock_irq(&stagd->devp->lock);
  199. stagd->buf[stagd->pos++] = 0;
  200. file->private_data = stagd;
  201. goto out;
  202. err1:
  203. kfree(stagd);
  204. out:
  205. return ret;
  206. }
  207. static const struct file_operations stag_debugfs_fops = {
  208. .owner = THIS_MODULE,
  209. .open = stag_open,
  210. .release = stag_release,
  211. .read = debugfs_read,
  212. .llseek = default_llseek,
  213. };
  214. static char *db_state_str[] = {"NORMAL", "FLOW_CONTROL", "RECOVERY"};
  215. static int stats_show(struct seq_file *seq, void *v)
  216. {
  217. struct c4iw_dev *dev = seq->private;
  218. seq_printf(seq, " Object: %10s %10s %10s %10s\n", "Total", "Current",
  219. "Max", "Fail");
  220. seq_printf(seq, " PDID: %10llu %10llu %10llu %10llu\n",
  221. dev->rdev.stats.pd.total, dev->rdev.stats.pd.cur,
  222. dev->rdev.stats.pd.max, dev->rdev.stats.pd.fail);
  223. seq_printf(seq, " QID: %10llu %10llu %10llu %10llu\n",
  224. dev->rdev.stats.qid.total, dev->rdev.stats.qid.cur,
  225. dev->rdev.stats.qid.max, dev->rdev.stats.qid.fail);
  226. seq_printf(seq, " TPTMEM: %10llu %10llu %10llu %10llu\n",
  227. dev->rdev.stats.stag.total, dev->rdev.stats.stag.cur,
  228. dev->rdev.stats.stag.max, dev->rdev.stats.stag.fail);
  229. seq_printf(seq, " PBLMEM: %10llu %10llu %10llu %10llu\n",
  230. dev->rdev.stats.pbl.total, dev->rdev.stats.pbl.cur,
  231. dev->rdev.stats.pbl.max, dev->rdev.stats.pbl.fail);
  232. seq_printf(seq, " RQTMEM: %10llu %10llu %10llu %10llu\n",
  233. dev->rdev.stats.rqt.total, dev->rdev.stats.rqt.cur,
  234. dev->rdev.stats.rqt.max, dev->rdev.stats.rqt.fail);
  235. seq_printf(seq, " OCQPMEM: %10llu %10llu %10llu %10llu\n",
  236. dev->rdev.stats.ocqp.total, dev->rdev.stats.ocqp.cur,
  237. dev->rdev.stats.ocqp.max, dev->rdev.stats.ocqp.fail);
  238. seq_printf(seq, " DB FULL: %10llu\n", dev->rdev.stats.db_full);
  239. seq_printf(seq, " DB EMPTY: %10llu\n", dev->rdev.stats.db_empty);
  240. seq_printf(seq, " DB DROP: %10llu\n", dev->rdev.stats.db_drop);
  241. seq_printf(seq, " DB State: %s Transitions %llu\n",
  242. db_state_str[dev->db_state],
  243. dev->rdev.stats.db_state_transitions);
  244. seq_printf(seq, "TCAM_FULL: %10llu\n", dev->rdev.stats.tcam_full);
  245. seq_printf(seq, "ACT_OFLD_CONN_FAILS: %10llu\n",
  246. dev->rdev.stats.act_ofld_conn_fails);
  247. seq_printf(seq, "PAS_OFLD_CONN_FAILS: %10llu\n",
  248. dev->rdev.stats.pas_ofld_conn_fails);
  249. return 0;
  250. }
  251. static int stats_open(struct inode *inode, struct file *file)
  252. {
  253. return single_open(file, stats_show, inode->i_private);
  254. }
  255. static ssize_t stats_clear(struct file *file, const char __user *buf,
  256. size_t count, loff_t *pos)
  257. {
  258. struct c4iw_dev *dev = ((struct seq_file *)file->private_data)->private;
  259. mutex_lock(&dev->rdev.stats.lock);
  260. dev->rdev.stats.pd.max = 0;
  261. dev->rdev.stats.pd.fail = 0;
  262. dev->rdev.stats.qid.max = 0;
  263. dev->rdev.stats.qid.fail = 0;
  264. dev->rdev.stats.stag.max = 0;
  265. dev->rdev.stats.stag.fail = 0;
  266. dev->rdev.stats.pbl.max = 0;
  267. dev->rdev.stats.pbl.fail = 0;
  268. dev->rdev.stats.rqt.max = 0;
  269. dev->rdev.stats.rqt.fail = 0;
  270. dev->rdev.stats.ocqp.max = 0;
  271. dev->rdev.stats.ocqp.fail = 0;
  272. dev->rdev.stats.db_full = 0;
  273. dev->rdev.stats.db_empty = 0;
  274. dev->rdev.stats.db_drop = 0;
  275. dev->rdev.stats.db_state_transitions = 0;
  276. dev->rdev.stats.tcam_full = 0;
  277. dev->rdev.stats.act_ofld_conn_fails = 0;
  278. dev->rdev.stats.pas_ofld_conn_fails = 0;
  279. mutex_unlock(&dev->rdev.stats.lock);
  280. return count;
  281. }
  282. static const struct file_operations stats_debugfs_fops = {
  283. .owner = THIS_MODULE,
  284. .open = stats_open,
  285. .release = single_release,
  286. .read = seq_read,
  287. .llseek = seq_lseek,
  288. .write = stats_clear,
  289. };
  290. static int dump_ep(int id, void *p, void *data)
  291. {
  292. struct c4iw_ep *ep = p;
  293. struct c4iw_debugfs_data *epd = data;
  294. int space;
  295. int cc;
  296. space = epd->bufsize - epd->pos - 1;
  297. if (space == 0)
  298. return 1;
  299. cc = snprintf(epd->buf + epd->pos, space,
  300. "ep %p cm_id %p qp %p state %d flags 0x%lx history 0x%lx "
  301. "hwtid %d atid %d %pI4:%d <-> %pI4:%d\n",
  302. ep, ep->com.cm_id, ep->com.qp, (int)ep->com.state,
  303. ep->com.flags, ep->com.history, ep->hwtid, ep->atid,
  304. &ep->com.local_addr.sin_addr.s_addr,
  305. ntohs(ep->com.local_addr.sin_port),
  306. &ep->com.remote_addr.sin_addr.s_addr,
  307. ntohs(ep->com.remote_addr.sin_port));
  308. if (cc < space)
  309. epd->pos += cc;
  310. return 0;
  311. }
  312. static int dump_listen_ep(int id, void *p, void *data)
  313. {
  314. struct c4iw_listen_ep *ep = p;
  315. struct c4iw_debugfs_data *epd = data;
  316. int space;
  317. int cc;
  318. space = epd->bufsize - epd->pos - 1;
  319. if (space == 0)
  320. return 1;
  321. cc = snprintf(epd->buf + epd->pos, space,
  322. "ep %p cm_id %p state %d flags 0x%lx stid %d backlog %d "
  323. "%pI4:%d\n", ep, ep->com.cm_id, (int)ep->com.state,
  324. ep->com.flags, ep->stid, ep->backlog,
  325. &ep->com.local_addr.sin_addr.s_addr,
  326. ntohs(ep->com.local_addr.sin_port));
  327. if (cc < space)
  328. epd->pos += cc;
  329. return 0;
  330. }
  331. static int ep_release(struct inode *inode, struct file *file)
  332. {
  333. struct c4iw_debugfs_data *epd = file->private_data;
  334. if (!epd) {
  335. pr_info("%s null qpd?\n", __func__);
  336. return 0;
  337. }
  338. vfree(epd->buf);
  339. kfree(epd);
  340. return 0;
  341. }
  342. static int ep_open(struct inode *inode, struct file *file)
  343. {
  344. struct c4iw_debugfs_data *epd;
  345. int ret = 0;
  346. int count = 1;
  347. epd = kmalloc(sizeof(*epd), GFP_KERNEL);
  348. if (!epd) {
  349. ret = -ENOMEM;
  350. goto out;
  351. }
  352. epd->devp = inode->i_private;
  353. epd->pos = 0;
  354. spin_lock_irq(&epd->devp->lock);
  355. idr_for_each(&epd->devp->hwtid_idr, count_idrs, &count);
  356. idr_for_each(&epd->devp->atid_idr, count_idrs, &count);
  357. idr_for_each(&epd->devp->stid_idr, count_idrs, &count);
  358. spin_unlock_irq(&epd->devp->lock);
  359. epd->bufsize = count * 160;
  360. epd->buf = vmalloc(epd->bufsize);
  361. if (!epd->buf) {
  362. ret = -ENOMEM;
  363. goto err1;
  364. }
  365. spin_lock_irq(&epd->devp->lock);
  366. idr_for_each(&epd->devp->hwtid_idr, dump_ep, epd);
  367. idr_for_each(&epd->devp->atid_idr, dump_ep, epd);
  368. idr_for_each(&epd->devp->stid_idr, dump_listen_ep, epd);
  369. spin_unlock_irq(&epd->devp->lock);
  370. file->private_data = epd;
  371. goto out;
  372. err1:
  373. kfree(epd);
  374. out:
  375. return ret;
  376. }
  377. static const struct file_operations ep_debugfs_fops = {
  378. .owner = THIS_MODULE,
  379. .open = ep_open,
  380. .release = ep_release,
  381. .read = debugfs_read,
  382. };
  383. static int setup_debugfs(struct c4iw_dev *devp)
  384. {
  385. struct dentry *de;
  386. if (!devp->debugfs_root)
  387. return -1;
  388. de = debugfs_create_file("qps", S_IWUSR, devp->debugfs_root,
  389. (void *)devp, &qp_debugfs_fops);
  390. if (de && de->d_inode)
  391. de->d_inode->i_size = 4096;
  392. de = debugfs_create_file("stags", S_IWUSR, devp->debugfs_root,
  393. (void *)devp, &stag_debugfs_fops);
  394. if (de && de->d_inode)
  395. de->d_inode->i_size = 4096;
  396. de = debugfs_create_file("stats", S_IWUSR, devp->debugfs_root,
  397. (void *)devp, &stats_debugfs_fops);
  398. if (de && de->d_inode)
  399. de->d_inode->i_size = 4096;
  400. de = debugfs_create_file("eps", S_IWUSR, devp->debugfs_root,
  401. (void *)devp, &ep_debugfs_fops);
  402. if (de && de->d_inode)
  403. de->d_inode->i_size = 4096;
  404. return 0;
  405. }
  406. void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev,
  407. struct c4iw_dev_ucontext *uctx)
  408. {
  409. struct list_head *pos, *nxt;
  410. struct c4iw_qid_list *entry;
  411. mutex_lock(&uctx->lock);
  412. list_for_each_safe(pos, nxt, &uctx->qpids) {
  413. entry = list_entry(pos, struct c4iw_qid_list, entry);
  414. list_del_init(&entry->entry);
  415. if (!(entry->qid & rdev->qpmask)) {
  416. c4iw_put_resource(&rdev->resource.qid_table,
  417. entry->qid);
  418. mutex_lock(&rdev->stats.lock);
  419. rdev->stats.qid.cur -= rdev->qpmask + 1;
  420. mutex_unlock(&rdev->stats.lock);
  421. }
  422. kfree(entry);
  423. }
  424. list_for_each_safe(pos, nxt, &uctx->qpids) {
  425. entry = list_entry(pos, struct c4iw_qid_list, entry);
  426. list_del_init(&entry->entry);
  427. kfree(entry);
  428. }
  429. mutex_unlock(&uctx->lock);
  430. }
  431. void c4iw_init_dev_ucontext(struct c4iw_rdev *rdev,
  432. struct c4iw_dev_ucontext *uctx)
  433. {
  434. INIT_LIST_HEAD(&uctx->qpids);
  435. INIT_LIST_HEAD(&uctx->cqids);
  436. mutex_init(&uctx->lock);
  437. }
  438. /* Caller takes care of locking if needed */
  439. static int c4iw_rdev_open(struct c4iw_rdev *rdev)
  440. {
  441. int err;
  442. c4iw_init_dev_ucontext(rdev, &rdev->uctx);
  443. /*
  444. * qpshift is the number of bits to shift the qpid left in order
  445. * to get the correct address of the doorbell for that qp.
  446. */
  447. rdev->qpshift = PAGE_SHIFT - ilog2(rdev->lldi.udb_density);
  448. rdev->qpmask = rdev->lldi.udb_density - 1;
  449. rdev->cqshift = PAGE_SHIFT - ilog2(rdev->lldi.ucq_density);
  450. rdev->cqmask = rdev->lldi.ucq_density - 1;
  451. PDBG("%s dev %s stag start 0x%0x size 0x%0x num stags %d "
  452. "pbl start 0x%0x size 0x%0x rq start 0x%0x size 0x%0x "
  453. "qp qid start %u size %u cq qid start %u size %u\n",
  454. __func__, pci_name(rdev->lldi.pdev), rdev->lldi.vr->stag.start,
  455. rdev->lldi.vr->stag.size, c4iw_num_stags(rdev),
  456. rdev->lldi.vr->pbl.start,
  457. rdev->lldi.vr->pbl.size, rdev->lldi.vr->rq.start,
  458. rdev->lldi.vr->rq.size,
  459. rdev->lldi.vr->qp.start,
  460. rdev->lldi.vr->qp.size,
  461. rdev->lldi.vr->cq.start,
  462. rdev->lldi.vr->cq.size);
  463. PDBG("udb len 0x%x udb base %p db_reg %p gts_reg %p qpshift %lu "
  464. "qpmask 0x%x cqshift %lu cqmask 0x%x\n",
  465. (unsigned)pci_resource_len(rdev->lldi.pdev, 2),
  466. (void *)(unsigned long)pci_resource_start(rdev->lldi.pdev, 2),
  467. rdev->lldi.db_reg,
  468. rdev->lldi.gts_reg,
  469. rdev->qpshift, rdev->qpmask,
  470. rdev->cqshift, rdev->cqmask);
  471. if (c4iw_num_stags(rdev) == 0) {
  472. err = -EINVAL;
  473. goto err1;
  474. }
  475. rdev->stats.pd.total = T4_MAX_NUM_PD;
  476. rdev->stats.stag.total = rdev->lldi.vr->stag.size;
  477. rdev->stats.pbl.total = rdev->lldi.vr->pbl.size;
  478. rdev->stats.rqt.total = rdev->lldi.vr->rq.size;
  479. rdev->stats.ocqp.total = rdev->lldi.vr->ocq.size;
  480. rdev->stats.qid.total = rdev->lldi.vr->qp.size;
  481. err = c4iw_init_resource(rdev, c4iw_num_stags(rdev), T4_MAX_NUM_PD);
  482. if (err) {
  483. printk(KERN_ERR MOD "error %d initializing resources\n", err);
  484. goto err1;
  485. }
  486. err = c4iw_pblpool_create(rdev);
  487. if (err) {
  488. printk(KERN_ERR MOD "error %d initializing pbl pool\n", err);
  489. goto err2;
  490. }
  491. err = c4iw_rqtpool_create(rdev);
  492. if (err) {
  493. printk(KERN_ERR MOD "error %d initializing rqt pool\n", err);
  494. goto err3;
  495. }
  496. err = c4iw_ocqp_pool_create(rdev);
  497. if (err) {
  498. printk(KERN_ERR MOD "error %d initializing ocqp pool\n", err);
  499. goto err4;
  500. }
  501. return 0;
  502. err4:
  503. c4iw_rqtpool_destroy(rdev);
  504. err3:
  505. c4iw_pblpool_destroy(rdev);
  506. err2:
  507. c4iw_destroy_resource(&rdev->resource);
  508. err1:
  509. return err;
  510. }
  511. static void c4iw_rdev_close(struct c4iw_rdev *rdev)
  512. {
  513. c4iw_pblpool_destroy(rdev);
  514. c4iw_rqtpool_destroy(rdev);
  515. c4iw_destroy_resource(&rdev->resource);
  516. }
  517. static void c4iw_dealloc(struct uld_ctx *ctx)
  518. {
  519. c4iw_rdev_close(&ctx->dev->rdev);
  520. idr_destroy(&ctx->dev->cqidr);
  521. idr_destroy(&ctx->dev->qpidr);
  522. idr_destroy(&ctx->dev->mmidr);
  523. idr_destroy(&ctx->dev->hwtid_idr);
  524. idr_destroy(&ctx->dev->stid_idr);
  525. idr_destroy(&ctx->dev->atid_idr);
  526. iounmap(ctx->dev->rdev.oc_mw_kva);
  527. ib_dealloc_device(&ctx->dev->ibdev);
  528. ctx->dev = NULL;
  529. }
  530. static void c4iw_remove(struct uld_ctx *ctx)
  531. {
  532. PDBG("%s c4iw_dev %p\n", __func__, ctx->dev);
  533. c4iw_unregister_device(ctx->dev);
  534. c4iw_dealloc(ctx);
  535. }
  536. static int rdma_supported(const struct cxgb4_lld_info *infop)
  537. {
  538. return infop->vr->stag.size > 0 && infop->vr->pbl.size > 0 &&
  539. infop->vr->rq.size > 0 && infop->vr->qp.size > 0 &&
  540. infop->vr->cq.size > 0 && infop->vr->ocq.size > 0;
  541. }
  542. static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop)
  543. {
  544. struct c4iw_dev *devp;
  545. int ret;
  546. if (!rdma_supported(infop)) {
  547. printk(KERN_INFO MOD "%s: RDMA not supported on this device.\n",
  548. pci_name(infop->pdev));
  549. return ERR_PTR(-ENOSYS);
  550. }
  551. devp = (struct c4iw_dev *)ib_alloc_device(sizeof(*devp));
  552. if (!devp) {
  553. printk(KERN_ERR MOD "Cannot allocate ib device\n");
  554. return ERR_PTR(-ENOMEM);
  555. }
  556. devp->rdev.lldi = *infop;
  557. devp->rdev.oc_mw_pa = pci_resource_start(devp->rdev.lldi.pdev, 2) +
  558. (pci_resource_len(devp->rdev.lldi.pdev, 2) -
  559. roundup_pow_of_two(devp->rdev.lldi.vr->ocq.size));
  560. devp->rdev.oc_mw_kva = ioremap_wc(devp->rdev.oc_mw_pa,
  561. devp->rdev.lldi.vr->ocq.size);
  562. PDBG(KERN_INFO MOD "ocq memory: "
  563. "hw_start 0x%x size %u mw_pa 0x%lx mw_kva %p\n",
  564. devp->rdev.lldi.vr->ocq.start, devp->rdev.lldi.vr->ocq.size,
  565. devp->rdev.oc_mw_pa, devp->rdev.oc_mw_kva);
  566. ret = c4iw_rdev_open(&devp->rdev);
  567. if (ret) {
  568. printk(KERN_ERR MOD "Unable to open CXIO rdev err %d\n", ret);
  569. ib_dealloc_device(&devp->ibdev);
  570. return ERR_PTR(ret);
  571. }
  572. idr_init(&devp->cqidr);
  573. idr_init(&devp->qpidr);
  574. idr_init(&devp->mmidr);
  575. idr_init(&devp->hwtid_idr);
  576. idr_init(&devp->stid_idr);
  577. idr_init(&devp->atid_idr);
  578. spin_lock_init(&devp->lock);
  579. mutex_init(&devp->rdev.stats.lock);
  580. mutex_init(&devp->db_mutex);
  581. if (c4iw_debugfs_root) {
  582. devp->debugfs_root = debugfs_create_dir(
  583. pci_name(devp->rdev.lldi.pdev),
  584. c4iw_debugfs_root);
  585. setup_debugfs(devp);
  586. }
  587. return devp;
  588. }
  589. static void *c4iw_uld_add(const struct cxgb4_lld_info *infop)
  590. {
  591. struct uld_ctx *ctx;
  592. static int vers_printed;
  593. int i;
  594. if (!vers_printed++)
  595. printk(KERN_INFO MOD "Chelsio T4 RDMA Driver - version %s\n",
  596. DRV_VERSION);
  597. ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
  598. if (!ctx) {
  599. ctx = ERR_PTR(-ENOMEM);
  600. goto out;
  601. }
  602. ctx->lldi = *infop;
  603. PDBG("%s found device %s nchan %u nrxq %u ntxq %u nports %u\n",
  604. __func__, pci_name(ctx->lldi.pdev),
  605. ctx->lldi.nchan, ctx->lldi.nrxq,
  606. ctx->lldi.ntxq, ctx->lldi.nports);
  607. mutex_lock(&dev_mutex);
  608. list_add_tail(&ctx->entry, &uld_ctx_list);
  609. mutex_unlock(&dev_mutex);
  610. for (i = 0; i < ctx->lldi.nrxq; i++)
  611. PDBG("rxqid[%u] %u\n", i, ctx->lldi.rxq_ids[i]);
  612. out:
  613. return ctx;
  614. }
  615. static inline struct sk_buff *copy_gl_to_skb_pkt(const struct pkt_gl *gl,
  616. const __be64 *rsp,
  617. u32 pktshift)
  618. {
  619. struct sk_buff *skb;
  620. /*
  621. * Allocate space for cpl_pass_accept_req which will be synthesized by
  622. * driver. Once the driver synthesizes the request the skb will go
  623. * through the regular cpl_pass_accept_req processing.
  624. * The math here assumes sizeof cpl_pass_accept_req >= sizeof
  625. * cpl_rx_pkt.
  626. */
  627. skb = alloc_skb(gl->tot_len + sizeof(struct cpl_pass_accept_req) +
  628. sizeof(struct rss_header) - pktshift, GFP_ATOMIC);
  629. if (unlikely(!skb))
  630. return NULL;
  631. __skb_put(skb, gl->tot_len + sizeof(struct cpl_pass_accept_req) +
  632. sizeof(struct rss_header) - pktshift);
  633. /*
  634. * This skb will contain:
  635. * rss_header from the rspq descriptor (1 flit)
  636. * cpl_rx_pkt struct from the rspq descriptor (2 flits)
  637. * space for the difference between the size of an
  638. * rx_pkt and pass_accept_req cpl (1 flit)
  639. * the packet data from the gl
  640. */
  641. skb_copy_to_linear_data(skb, rsp, sizeof(struct cpl_pass_accept_req) +
  642. sizeof(struct rss_header));
  643. skb_copy_to_linear_data_offset(skb, sizeof(struct rss_header) +
  644. sizeof(struct cpl_pass_accept_req),
  645. gl->va + pktshift,
  646. gl->tot_len - pktshift);
  647. return skb;
  648. }
  649. static inline int recv_rx_pkt(struct c4iw_dev *dev, const struct pkt_gl *gl,
  650. const __be64 *rsp)
  651. {
  652. unsigned int opcode = *(u8 *)rsp;
  653. struct sk_buff *skb;
  654. if (opcode != CPL_RX_PKT)
  655. goto out;
  656. skb = copy_gl_to_skb_pkt(gl , rsp, dev->rdev.lldi.sge_pktshift);
  657. if (skb == NULL)
  658. goto out;
  659. if (c4iw_handlers[opcode] == NULL) {
  660. pr_info("%s no handler opcode 0x%x...\n", __func__,
  661. opcode);
  662. kfree_skb(skb);
  663. goto out;
  664. }
  665. c4iw_handlers[opcode](dev, skb);
  666. return 1;
  667. out:
  668. return 0;
  669. }
  670. static int c4iw_uld_rx_handler(void *handle, const __be64 *rsp,
  671. const struct pkt_gl *gl)
  672. {
  673. struct uld_ctx *ctx = handle;
  674. struct c4iw_dev *dev = ctx->dev;
  675. struct sk_buff *skb;
  676. u8 opcode;
  677. if (gl == NULL) {
  678. /* omit RSS and rsp_ctrl at end of descriptor */
  679. unsigned int len = 64 - sizeof(struct rsp_ctrl) - 8;
  680. skb = alloc_skb(256, GFP_ATOMIC);
  681. if (!skb)
  682. goto nomem;
  683. __skb_put(skb, len);
  684. skb_copy_to_linear_data(skb, &rsp[1], len);
  685. } else if (gl == CXGB4_MSG_AN) {
  686. const struct rsp_ctrl *rc = (void *)rsp;
  687. u32 qid = be32_to_cpu(rc->pldbuflen_qid);
  688. c4iw_ev_handler(dev, qid);
  689. return 0;
  690. } else if (unlikely(*(u8 *)rsp != *(u8 *)gl->va)) {
  691. if (recv_rx_pkt(dev, gl, rsp))
  692. return 0;
  693. pr_info("%s: unexpected FL contents at %p, " \
  694. "RSS %#llx, FL %#llx, len %u\n",
  695. pci_name(ctx->lldi.pdev), gl->va,
  696. (unsigned long long)be64_to_cpu(*rsp),
  697. (unsigned long long)be64_to_cpu(
  698. *(__force __be64 *)gl->va),
  699. gl->tot_len);
  700. return 0;
  701. } else {
  702. skb = cxgb4_pktgl_to_skb(gl, 128, 128);
  703. if (unlikely(!skb))
  704. goto nomem;
  705. }
  706. opcode = *(u8 *)rsp;
  707. if (c4iw_handlers[opcode])
  708. c4iw_handlers[opcode](dev, skb);
  709. else
  710. pr_info("%s no handler opcode 0x%x...\n", __func__,
  711. opcode);
  712. return 0;
  713. nomem:
  714. return -1;
  715. }
  716. static int c4iw_uld_state_change(void *handle, enum cxgb4_state new_state)
  717. {
  718. struct uld_ctx *ctx = handle;
  719. PDBG("%s new_state %u\n", __func__, new_state);
  720. switch (new_state) {
  721. case CXGB4_STATE_UP:
  722. printk(KERN_INFO MOD "%s: Up\n", pci_name(ctx->lldi.pdev));
  723. if (!ctx->dev) {
  724. int ret;
  725. ctx->dev = c4iw_alloc(&ctx->lldi);
  726. if (IS_ERR(ctx->dev)) {
  727. printk(KERN_ERR MOD
  728. "%s: initialization failed: %ld\n",
  729. pci_name(ctx->lldi.pdev),
  730. PTR_ERR(ctx->dev));
  731. ctx->dev = NULL;
  732. break;
  733. }
  734. ret = c4iw_register_device(ctx->dev);
  735. if (ret) {
  736. printk(KERN_ERR MOD
  737. "%s: RDMA registration failed: %d\n",
  738. pci_name(ctx->lldi.pdev), ret);
  739. c4iw_dealloc(ctx);
  740. }
  741. }
  742. break;
  743. case CXGB4_STATE_DOWN:
  744. printk(KERN_INFO MOD "%s: Down\n",
  745. pci_name(ctx->lldi.pdev));
  746. if (ctx->dev)
  747. c4iw_remove(ctx);
  748. break;
  749. case CXGB4_STATE_START_RECOVERY:
  750. printk(KERN_INFO MOD "%s: Fatal Error\n",
  751. pci_name(ctx->lldi.pdev));
  752. if (ctx->dev) {
  753. struct ib_event event;
  754. ctx->dev->rdev.flags |= T4_FATAL_ERROR;
  755. memset(&event, 0, sizeof event);
  756. event.event = IB_EVENT_DEVICE_FATAL;
  757. event.device = &ctx->dev->ibdev;
  758. ib_dispatch_event(&event);
  759. c4iw_remove(ctx);
  760. }
  761. break;
  762. case CXGB4_STATE_DETACH:
  763. printk(KERN_INFO MOD "%s: Detach\n",
  764. pci_name(ctx->lldi.pdev));
  765. if (ctx->dev)
  766. c4iw_remove(ctx);
  767. break;
  768. }
  769. return 0;
  770. }
  771. static int disable_qp_db(int id, void *p, void *data)
  772. {
  773. struct c4iw_qp *qp = p;
  774. t4_disable_wq_db(&qp->wq);
  775. return 0;
  776. }
  777. static void stop_queues(struct uld_ctx *ctx)
  778. {
  779. spin_lock_irq(&ctx->dev->lock);
  780. if (ctx->dev->db_state == NORMAL) {
  781. ctx->dev->rdev.stats.db_state_transitions++;
  782. ctx->dev->db_state = FLOW_CONTROL;
  783. idr_for_each(&ctx->dev->qpidr, disable_qp_db, NULL);
  784. }
  785. spin_unlock_irq(&ctx->dev->lock);
  786. }
  787. static int enable_qp_db(int id, void *p, void *data)
  788. {
  789. struct c4iw_qp *qp = p;
  790. t4_enable_wq_db(&qp->wq);
  791. return 0;
  792. }
  793. static void resume_queues(struct uld_ctx *ctx)
  794. {
  795. spin_lock_irq(&ctx->dev->lock);
  796. if (ctx->dev->qpcnt <= db_fc_threshold &&
  797. ctx->dev->db_state == FLOW_CONTROL) {
  798. ctx->dev->db_state = NORMAL;
  799. ctx->dev->rdev.stats.db_state_transitions++;
  800. idr_for_each(&ctx->dev->qpidr, enable_qp_db, NULL);
  801. }
  802. spin_unlock_irq(&ctx->dev->lock);
  803. }
  804. struct qp_list {
  805. unsigned idx;
  806. struct c4iw_qp **qps;
  807. };
  808. static int add_and_ref_qp(int id, void *p, void *data)
  809. {
  810. struct qp_list *qp_listp = data;
  811. struct c4iw_qp *qp = p;
  812. c4iw_qp_add_ref(&qp->ibqp);
  813. qp_listp->qps[qp_listp->idx++] = qp;
  814. return 0;
  815. }
  816. static int count_qps(int id, void *p, void *data)
  817. {
  818. unsigned *countp = data;
  819. (*countp)++;
  820. return 0;
  821. }
  822. static void deref_qps(struct qp_list qp_list)
  823. {
  824. int idx;
  825. for (idx = 0; idx < qp_list.idx; idx++)
  826. c4iw_qp_rem_ref(&qp_list.qps[idx]->ibqp);
  827. }
  828. static void recover_lost_dbs(struct uld_ctx *ctx, struct qp_list *qp_list)
  829. {
  830. int idx;
  831. int ret;
  832. for (idx = 0; idx < qp_list->idx; idx++) {
  833. struct c4iw_qp *qp = qp_list->qps[idx];
  834. ret = cxgb4_sync_txq_pidx(qp->rhp->rdev.lldi.ports[0],
  835. qp->wq.sq.qid,
  836. t4_sq_host_wq_pidx(&qp->wq),
  837. t4_sq_wq_size(&qp->wq));
  838. if (ret) {
  839. printk(KERN_ERR MOD "%s: Fatal error - "
  840. "DB overflow recovery failed - "
  841. "error syncing SQ qid %u\n",
  842. pci_name(ctx->lldi.pdev), qp->wq.sq.qid);
  843. return;
  844. }
  845. ret = cxgb4_sync_txq_pidx(qp->rhp->rdev.lldi.ports[0],
  846. qp->wq.rq.qid,
  847. t4_rq_host_wq_pidx(&qp->wq),
  848. t4_rq_wq_size(&qp->wq));
  849. if (ret) {
  850. printk(KERN_ERR MOD "%s: Fatal error - "
  851. "DB overflow recovery failed - "
  852. "error syncing RQ qid %u\n",
  853. pci_name(ctx->lldi.pdev), qp->wq.rq.qid);
  854. return;
  855. }
  856. /* Wait for the dbfifo to drain */
  857. while (cxgb4_dbfifo_count(qp->rhp->rdev.lldi.ports[0], 1) > 0) {
  858. set_current_state(TASK_UNINTERRUPTIBLE);
  859. schedule_timeout(usecs_to_jiffies(10));
  860. }
  861. }
  862. }
  863. static void recover_queues(struct uld_ctx *ctx)
  864. {
  865. int count = 0;
  866. struct qp_list qp_list;
  867. int ret;
  868. /* lock out kernel db ringers */
  869. mutex_lock(&ctx->dev->db_mutex);
  870. /* put all queues in to recovery mode */
  871. spin_lock_irq(&ctx->dev->lock);
  872. ctx->dev->db_state = RECOVERY;
  873. ctx->dev->rdev.stats.db_state_transitions++;
  874. idr_for_each(&ctx->dev->qpidr, disable_qp_db, NULL);
  875. spin_unlock_irq(&ctx->dev->lock);
  876. /* slow everybody down */
  877. set_current_state(TASK_UNINTERRUPTIBLE);
  878. schedule_timeout(usecs_to_jiffies(1000));
  879. /* Wait for the dbfifo to completely drain. */
  880. while (cxgb4_dbfifo_count(ctx->dev->rdev.lldi.ports[0], 1) > 0) {
  881. set_current_state(TASK_UNINTERRUPTIBLE);
  882. schedule_timeout(usecs_to_jiffies(10));
  883. }
  884. /* flush the SGE contexts */
  885. ret = cxgb4_flush_eq_cache(ctx->dev->rdev.lldi.ports[0]);
  886. if (ret) {
  887. printk(KERN_ERR MOD "%s: Fatal error - DB overflow recovery failed\n",
  888. pci_name(ctx->lldi.pdev));
  889. goto out;
  890. }
  891. /* Count active queues so we can build a list of queues to recover */
  892. spin_lock_irq(&ctx->dev->lock);
  893. idr_for_each(&ctx->dev->qpidr, count_qps, &count);
  894. qp_list.qps = kzalloc(count * sizeof *qp_list.qps, GFP_ATOMIC);
  895. if (!qp_list.qps) {
  896. printk(KERN_ERR MOD "%s: Fatal error - DB overflow recovery failed\n",
  897. pci_name(ctx->lldi.pdev));
  898. spin_unlock_irq(&ctx->dev->lock);
  899. goto out;
  900. }
  901. qp_list.idx = 0;
  902. /* add and ref each qp so it doesn't get freed */
  903. idr_for_each(&ctx->dev->qpidr, add_and_ref_qp, &qp_list);
  904. spin_unlock_irq(&ctx->dev->lock);
  905. /* now traverse the list in a safe context to recover the db state*/
  906. recover_lost_dbs(ctx, &qp_list);
  907. /* we're almost done! deref the qps and clean up */
  908. deref_qps(qp_list);
  909. kfree(qp_list.qps);
  910. /* Wait for the dbfifo to completely drain again */
  911. while (cxgb4_dbfifo_count(ctx->dev->rdev.lldi.ports[0], 1) > 0) {
  912. set_current_state(TASK_UNINTERRUPTIBLE);
  913. schedule_timeout(usecs_to_jiffies(10));
  914. }
  915. /* resume the queues */
  916. spin_lock_irq(&ctx->dev->lock);
  917. if (ctx->dev->qpcnt > db_fc_threshold)
  918. ctx->dev->db_state = FLOW_CONTROL;
  919. else {
  920. ctx->dev->db_state = NORMAL;
  921. idr_for_each(&ctx->dev->qpidr, enable_qp_db, NULL);
  922. }
  923. ctx->dev->rdev.stats.db_state_transitions++;
  924. spin_unlock_irq(&ctx->dev->lock);
  925. out:
  926. /* start up kernel db ringers again */
  927. mutex_unlock(&ctx->dev->db_mutex);
  928. }
  929. static int c4iw_uld_control(void *handle, enum cxgb4_control control, ...)
  930. {
  931. struct uld_ctx *ctx = handle;
  932. switch (control) {
  933. case CXGB4_CONTROL_DB_FULL:
  934. stop_queues(ctx);
  935. mutex_lock(&ctx->dev->rdev.stats.lock);
  936. ctx->dev->rdev.stats.db_full++;
  937. mutex_unlock(&ctx->dev->rdev.stats.lock);
  938. break;
  939. case CXGB4_CONTROL_DB_EMPTY:
  940. resume_queues(ctx);
  941. mutex_lock(&ctx->dev->rdev.stats.lock);
  942. ctx->dev->rdev.stats.db_empty++;
  943. mutex_unlock(&ctx->dev->rdev.stats.lock);
  944. break;
  945. case CXGB4_CONTROL_DB_DROP:
  946. recover_queues(ctx);
  947. mutex_lock(&ctx->dev->rdev.stats.lock);
  948. ctx->dev->rdev.stats.db_drop++;
  949. mutex_unlock(&ctx->dev->rdev.stats.lock);
  950. break;
  951. default:
  952. printk(KERN_WARNING MOD "%s: unknown control cmd %u\n",
  953. pci_name(ctx->lldi.pdev), control);
  954. break;
  955. }
  956. return 0;
  957. }
  958. static struct cxgb4_uld_info c4iw_uld_info = {
  959. .name = DRV_NAME,
  960. .add = c4iw_uld_add,
  961. .rx_handler = c4iw_uld_rx_handler,
  962. .state_change = c4iw_uld_state_change,
  963. .control = c4iw_uld_control,
  964. };
  965. static int __init c4iw_init_module(void)
  966. {
  967. int err;
  968. err = c4iw_cm_init();
  969. if (err)
  970. return err;
  971. c4iw_debugfs_root = debugfs_create_dir(DRV_NAME, NULL);
  972. if (!c4iw_debugfs_root)
  973. printk(KERN_WARNING MOD
  974. "could not create debugfs entry, continuing\n");
  975. cxgb4_register_uld(CXGB4_ULD_RDMA, &c4iw_uld_info);
  976. return 0;
  977. }
  978. static void __exit c4iw_exit_module(void)
  979. {
  980. struct uld_ctx *ctx, *tmp;
  981. mutex_lock(&dev_mutex);
  982. list_for_each_entry_safe(ctx, tmp, &uld_ctx_list, entry) {
  983. if (ctx->dev)
  984. c4iw_remove(ctx);
  985. kfree(ctx);
  986. }
  987. mutex_unlock(&dev_mutex);
  988. cxgb4_unregister_uld(CXGB4_ULD_RDMA);
  989. c4iw_cm_term();
  990. debugfs_remove_recursive(c4iw_debugfs_root);
  991. }
  992. module_init(c4iw_init_module);
  993. module_exit(c4iw_exit_module);