ad5064.c 16 KB

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  1. /*
  2. * AD5024, AD5025, AD5044, AD5045, AD5064, AD5064-1, AD5065, AD5628, AD5629R,
  3. * AD5648, AD5666, AD5668, AD5669R Digital to analog converters driver
  4. *
  5. * Copyright 2011 Analog Devices Inc.
  6. *
  7. * Licensed under the GPL-2.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/err.h>
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/i2c.h>
  15. #include <linux/slab.h>
  16. #include <linux/sysfs.h>
  17. #include <linux/regulator/consumer.h>
  18. #include <asm/unaligned.h>
  19. #include <linux/iio/iio.h>
  20. #include <linux/iio/sysfs.h>
  21. #define AD5064_MAX_DAC_CHANNELS 8
  22. #define AD5064_MAX_VREFS 4
  23. #define AD5064_ADDR(x) ((x) << 20)
  24. #define AD5064_CMD(x) ((x) << 24)
  25. #define AD5064_ADDR_ALL_DAC 0xF
  26. #define AD5064_CMD_WRITE_INPUT_N 0x0
  27. #define AD5064_CMD_UPDATE_DAC_N 0x1
  28. #define AD5064_CMD_WRITE_INPUT_N_UPDATE_ALL 0x2
  29. #define AD5064_CMD_WRITE_INPUT_N_UPDATE_N 0x3
  30. #define AD5064_CMD_POWERDOWN_DAC 0x4
  31. #define AD5064_CMD_CLEAR 0x5
  32. #define AD5064_CMD_LDAC_MASK 0x6
  33. #define AD5064_CMD_RESET 0x7
  34. #define AD5064_CMD_CONFIG 0x8
  35. #define AD5064_CONFIG_DAISY_CHAIN_ENABLE BIT(1)
  36. #define AD5064_CONFIG_INT_VREF_ENABLE BIT(0)
  37. #define AD5064_LDAC_PWRDN_NONE 0x0
  38. #define AD5064_LDAC_PWRDN_1K 0x1
  39. #define AD5064_LDAC_PWRDN_100K 0x2
  40. #define AD5064_LDAC_PWRDN_3STATE 0x3
  41. /**
  42. * struct ad5064_chip_info - chip specific information
  43. * @shared_vref: whether the vref supply is shared between channels
  44. * @internal_vref: internal reference voltage. 0 if the chip has no internal
  45. * vref.
  46. * @channel: channel specification
  47. * @num_channels: number of channels
  48. */
  49. struct ad5064_chip_info {
  50. bool shared_vref;
  51. unsigned long internal_vref;
  52. const struct iio_chan_spec *channels;
  53. unsigned int num_channels;
  54. };
  55. struct ad5064_state;
  56. typedef int (*ad5064_write_func)(struct ad5064_state *st, unsigned int cmd,
  57. unsigned int addr, unsigned int val);
  58. /**
  59. * struct ad5064_state - driver instance specific data
  60. * @dev: the device for this driver instance
  61. * @chip_info: chip model specific constants, available modes etc
  62. * @vref_reg: vref supply regulators
  63. * @pwr_down: whether channel is powered down
  64. * @pwr_down_mode: channel's current power down mode
  65. * @dac_cache: current DAC raw value (chip does not support readback)
  66. * @use_internal_vref: set to true if the internal reference voltage should be
  67. * used.
  68. * @write: register write callback
  69. * @data: i2c/spi transfer buffers
  70. */
  71. struct ad5064_state {
  72. struct device *dev;
  73. const struct ad5064_chip_info *chip_info;
  74. struct regulator_bulk_data vref_reg[AD5064_MAX_VREFS];
  75. bool pwr_down[AD5064_MAX_DAC_CHANNELS];
  76. u8 pwr_down_mode[AD5064_MAX_DAC_CHANNELS];
  77. unsigned int dac_cache[AD5064_MAX_DAC_CHANNELS];
  78. bool use_internal_vref;
  79. ad5064_write_func write;
  80. /*
  81. * DMA (thus cache coherency maintenance) requires the
  82. * transfer buffers to live in their own cache lines.
  83. */
  84. union {
  85. u8 i2c[3];
  86. __be32 spi;
  87. } data ____cacheline_aligned;
  88. };
  89. enum ad5064_type {
  90. ID_AD5024,
  91. ID_AD5025,
  92. ID_AD5044,
  93. ID_AD5045,
  94. ID_AD5064,
  95. ID_AD5064_1,
  96. ID_AD5065,
  97. ID_AD5628_1,
  98. ID_AD5628_2,
  99. ID_AD5648_1,
  100. ID_AD5648_2,
  101. ID_AD5666_1,
  102. ID_AD5666_2,
  103. ID_AD5668_1,
  104. ID_AD5668_2,
  105. };
  106. static int ad5064_write(struct ad5064_state *st, unsigned int cmd,
  107. unsigned int addr, unsigned int val, unsigned int shift)
  108. {
  109. val <<= shift;
  110. return st->write(st, cmd, addr, val);
  111. }
  112. static int ad5064_sync_powerdown_mode(struct ad5064_state *st,
  113. const struct iio_chan_spec *chan)
  114. {
  115. unsigned int val;
  116. int ret;
  117. val = (0x1 << chan->address);
  118. if (st->pwr_down[chan->channel])
  119. val |= st->pwr_down_mode[chan->channel] << 8;
  120. ret = ad5064_write(st, AD5064_CMD_POWERDOWN_DAC, 0, val, 0);
  121. return ret;
  122. }
  123. static const char * const ad5064_powerdown_modes[] = {
  124. "1kohm_to_gnd",
  125. "100kohm_to_gnd",
  126. "three_state",
  127. };
  128. static int ad5064_get_powerdown_mode(struct iio_dev *indio_dev,
  129. const struct iio_chan_spec *chan)
  130. {
  131. struct ad5064_state *st = iio_priv(indio_dev);
  132. return st->pwr_down_mode[chan->channel] - 1;
  133. }
  134. static int ad5064_set_powerdown_mode(struct iio_dev *indio_dev,
  135. const struct iio_chan_spec *chan, unsigned int mode)
  136. {
  137. struct ad5064_state *st = iio_priv(indio_dev);
  138. int ret;
  139. mutex_lock(&indio_dev->mlock);
  140. st->pwr_down_mode[chan->channel] = mode + 1;
  141. ret = ad5064_sync_powerdown_mode(st, chan);
  142. mutex_unlock(&indio_dev->mlock);
  143. return ret;
  144. }
  145. static const struct iio_enum ad5064_powerdown_mode_enum = {
  146. .items = ad5064_powerdown_modes,
  147. .num_items = ARRAY_SIZE(ad5064_powerdown_modes),
  148. .get = ad5064_get_powerdown_mode,
  149. .set = ad5064_set_powerdown_mode,
  150. };
  151. static ssize_t ad5064_read_dac_powerdown(struct iio_dev *indio_dev,
  152. uintptr_t private, const struct iio_chan_spec *chan, char *buf)
  153. {
  154. struct ad5064_state *st = iio_priv(indio_dev);
  155. return sprintf(buf, "%d\n", st->pwr_down[chan->channel]);
  156. }
  157. static ssize_t ad5064_write_dac_powerdown(struct iio_dev *indio_dev,
  158. uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
  159. size_t len)
  160. {
  161. struct ad5064_state *st = iio_priv(indio_dev);
  162. bool pwr_down;
  163. int ret;
  164. ret = strtobool(buf, &pwr_down);
  165. if (ret)
  166. return ret;
  167. mutex_lock(&indio_dev->mlock);
  168. st->pwr_down[chan->channel] = pwr_down;
  169. ret = ad5064_sync_powerdown_mode(st, chan);
  170. mutex_unlock(&indio_dev->mlock);
  171. return ret ? ret : len;
  172. }
  173. static int ad5064_get_vref(struct ad5064_state *st,
  174. struct iio_chan_spec const *chan)
  175. {
  176. unsigned int i;
  177. if (st->use_internal_vref)
  178. return st->chip_info->internal_vref;
  179. i = st->chip_info->shared_vref ? 0 : chan->channel;
  180. return regulator_get_voltage(st->vref_reg[i].consumer);
  181. }
  182. static int ad5064_read_raw(struct iio_dev *indio_dev,
  183. struct iio_chan_spec const *chan,
  184. int *val,
  185. int *val2,
  186. long m)
  187. {
  188. struct ad5064_state *st = iio_priv(indio_dev);
  189. int scale_uv;
  190. switch (m) {
  191. case IIO_CHAN_INFO_RAW:
  192. *val = st->dac_cache[chan->channel];
  193. return IIO_VAL_INT;
  194. case IIO_CHAN_INFO_SCALE:
  195. scale_uv = ad5064_get_vref(st, chan);
  196. if (scale_uv < 0)
  197. return scale_uv;
  198. scale_uv = (scale_uv * 100) >> chan->scan_type.realbits;
  199. *val = scale_uv / 100000;
  200. *val2 = (scale_uv % 100000) * 10;
  201. return IIO_VAL_INT_PLUS_MICRO;
  202. default:
  203. break;
  204. }
  205. return -EINVAL;
  206. }
  207. static int ad5064_write_raw(struct iio_dev *indio_dev,
  208. struct iio_chan_spec const *chan, int val, int val2, long mask)
  209. {
  210. struct ad5064_state *st = iio_priv(indio_dev);
  211. int ret;
  212. switch (mask) {
  213. case IIO_CHAN_INFO_RAW:
  214. if (val >= (1 << chan->scan_type.realbits) || val < 0)
  215. return -EINVAL;
  216. mutex_lock(&indio_dev->mlock);
  217. ret = ad5064_write(st, AD5064_CMD_WRITE_INPUT_N_UPDATE_N,
  218. chan->address, val, chan->scan_type.shift);
  219. if (ret == 0)
  220. st->dac_cache[chan->channel] = val;
  221. mutex_unlock(&indio_dev->mlock);
  222. break;
  223. default:
  224. ret = -EINVAL;
  225. }
  226. return ret;
  227. }
  228. static const struct iio_info ad5064_info = {
  229. .read_raw = ad5064_read_raw,
  230. .write_raw = ad5064_write_raw,
  231. .driver_module = THIS_MODULE,
  232. };
  233. static const struct iio_chan_spec_ext_info ad5064_ext_info[] = {
  234. {
  235. .name = "powerdown",
  236. .read = ad5064_read_dac_powerdown,
  237. .write = ad5064_write_dac_powerdown,
  238. },
  239. IIO_ENUM("powerdown_mode", false, &ad5064_powerdown_mode_enum),
  240. IIO_ENUM_AVAILABLE("powerdown_mode", &ad5064_powerdown_mode_enum),
  241. { },
  242. };
  243. #define AD5064_CHANNEL(chan, addr, bits) { \
  244. .type = IIO_VOLTAGE, \
  245. .indexed = 1, \
  246. .output = 1, \
  247. .channel = (chan), \
  248. .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
  249. IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \
  250. .address = addr, \
  251. .scan_type = IIO_ST('u', (bits), 16, 20 - (bits)), \
  252. .ext_info = ad5064_ext_info, \
  253. }
  254. #define DECLARE_AD5064_CHANNELS(name, bits) \
  255. const struct iio_chan_spec name[] = { \
  256. AD5064_CHANNEL(0, 0, bits), \
  257. AD5064_CHANNEL(1, 1, bits), \
  258. AD5064_CHANNEL(2, 2, bits), \
  259. AD5064_CHANNEL(3, 3, bits), \
  260. AD5064_CHANNEL(4, 4, bits), \
  261. AD5064_CHANNEL(5, 5, bits), \
  262. AD5064_CHANNEL(6, 6, bits), \
  263. AD5064_CHANNEL(7, 7, bits), \
  264. }
  265. #define DECLARE_AD5065_CHANNELS(name, bits) \
  266. const struct iio_chan_spec name[] = { \
  267. AD5064_CHANNEL(0, 0, bits), \
  268. AD5064_CHANNEL(1, 3, bits), \
  269. }
  270. static DECLARE_AD5064_CHANNELS(ad5024_channels, 12);
  271. static DECLARE_AD5064_CHANNELS(ad5044_channels, 14);
  272. static DECLARE_AD5064_CHANNELS(ad5064_channels, 16);
  273. static DECLARE_AD5065_CHANNELS(ad5025_channels, 12);
  274. static DECLARE_AD5065_CHANNELS(ad5045_channels, 14);
  275. static DECLARE_AD5065_CHANNELS(ad5065_channels, 16);
  276. static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
  277. [ID_AD5024] = {
  278. .shared_vref = false,
  279. .channels = ad5024_channels,
  280. .num_channels = 4,
  281. },
  282. [ID_AD5025] = {
  283. .shared_vref = false,
  284. .channels = ad5025_channels,
  285. .num_channels = 2,
  286. },
  287. [ID_AD5044] = {
  288. .shared_vref = false,
  289. .channels = ad5044_channels,
  290. .num_channels = 4,
  291. },
  292. [ID_AD5045] = {
  293. .shared_vref = false,
  294. .channels = ad5045_channels,
  295. .num_channels = 2,
  296. },
  297. [ID_AD5064] = {
  298. .shared_vref = false,
  299. .channels = ad5064_channels,
  300. .num_channels = 4,
  301. },
  302. [ID_AD5064_1] = {
  303. .shared_vref = true,
  304. .channels = ad5064_channels,
  305. .num_channels = 4,
  306. },
  307. [ID_AD5065] = {
  308. .shared_vref = false,
  309. .channels = ad5065_channels,
  310. .num_channels = 2,
  311. },
  312. [ID_AD5628_1] = {
  313. .shared_vref = true,
  314. .internal_vref = 2500000,
  315. .channels = ad5024_channels,
  316. .num_channels = 8,
  317. },
  318. [ID_AD5628_2] = {
  319. .shared_vref = true,
  320. .internal_vref = 5000000,
  321. .channels = ad5024_channels,
  322. .num_channels = 8,
  323. },
  324. [ID_AD5648_1] = {
  325. .shared_vref = true,
  326. .internal_vref = 2500000,
  327. .channels = ad5044_channels,
  328. .num_channels = 8,
  329. },
  330. [ID_AD5648_2] = {
  331. .shared_vref = true,
  332. .internal_vref = 5000000,
  333. .channels = ad5044_channels,
  334. .num_channels = 8,
  335. },
  336. [ID_AD5666_1] = {
  337. .shared_vref = true,
  338. .internal_vref = 2500000,
  339. .channels = ad5064_channels,
  340. .num_channels = 4,
  341. },
  342. [ID_AD5666_2] = {
  343. .shared_vref = true,
  344. .internal_vref = 5000000,
  345. .channels = ad5064_channels,
  346. .num_channels = 4,
  347. },
  348. [ID_AD5668_1] = {
  349. .shared_vref = true,
  350. .internal_vref = 2500000,
  351. .channels = ad5064_channels,
  352. .num_channels = 8,
  353. },
  354. [ID_AD5668_2] = {
  355. .shared_vref = true,
  356. .internal_vref = 5000000,
  357. .channels = ad5064_channels,
  358. .num_channels = 8,
  359. },
  360. };
  361. static inline unsigned int ad5064_num_vref(struct ad5064_state *st)
  362. {
  363. return st->chip_info->shared_vref ? 1 : st->chip_info->num_channels;
  364. }
  365. static const char * const ad5064_vref_names[] = {
  366. "vrefA",
  367. "vrefB",
  368. "vrefC",
  369. "vrefD",
  370. };
  371. static const char * const ad5064_vref_name(struct ad5064_state *st,
  372. unsigned int vref)
  373. {
  374. return st->chip_info->shared_vref ? "vref" : ad5064_vref_names[vref];
  375. }
  376. static int ad5064_probe(struct device *dev, enum ad5064_type type,
  377. const char *name, ad5064_write_func write)
  378. {
  379. struct iio_dev *indio_dev;
  380. struct ad5064_state *st;
  381. unsigned int midscale;
  382. unsigned int i;
  383. int ret;
  384. indio_dev = iio_device_alloc(sizeof(*st));
  385. if (indio_dev == NULL)
  386. return -ENOMEM;
  387. st = iio_priv(indio_dev);
  388. dev_set_drvdata(dev, indio_dev);
  389. st->chip_info = &ad5064_chip_info_tbl[type];
  390. st->dev = dev;
  391. st->write = write;
  392. for (i = 0; i < ad5064_num_vref(st); ++i)
  393. st->vref_reg[i].supply = ad5064_vref_name(st, i);
  394. ret = regulator_bulk_get(dev, ad5064_num_vref(st),
  395. st->vref_reg);
  396. if (ret) {
  397. if (!st->chip_info->internal_vref)
  398. goto error_free;
  399. st->use_internal_vref = true;
  400. ret = ad5064_write(st, AD5064_CMD_CONFIG, 0,
  401. AD5064_CONFIG_INT_VREF_ENABLE, 0);
  402. if (ret) {
  403. dev_err(dev, "Failed to enable internal vref: %d\n",
  404. ret);
  405. goto error_free;
  406. }
  407. } else {
  408. ret = regulator_bulk_enable(ad5064_num_vref(st), st->vref_reg);
  409. if (ret)
  410. goto error_free_reg;
  411. }
  412. indio_dev->dev.parent = dev;
  413. indio_dev->name = name;
  414. indio_dev->info = &ad5064_info;
  415. indio_dev->modes = INDIO_DIRECT_MODE;
  416. indio_dev->channels = st->chip_info->channels;
  417. indio_dev->num_channels = st->chip_info->num_channels;
  418. midscale = (1 << indio_dev->channels[0].scan_type.realbits) / 2;
  419. for (i = 0; i < st->chip_info->num_channels; ++i) {
  420. st->pwr_down_mode[i] = AD5064_LDAC_PWRDN_1K;
  421. st->dac_cache[i] = midscale;
  422. }
  423. ret = iio_device_register(indio_dev);
  424. if (ret)
  425. goto error_disable_reg;
  426. return 0;
  427. error_disable_reg:
  428. if (!st->use_internal_vref)
  429. regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
  430. error_free_reg:
  431. if (!st->use_internal_vref)
  432. regulator_bulk_free(ad5064_num_vref(st), st->vref_reg);
  433. error_free:
  434. iio_device_free(indio_dev);
  435. return ret;
  436. }
  437. static int ad5064_remove(struct device *dev)
  438. {
  439. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  440. struct ad5064_state *st = iio_priv(indio_dev);
  441. iio_device_unregister(indio_dev);
  442. if (!st->use_internal_vref) {
  443. regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
  444. regulator_bulk_free(ad5064_num_vref(st), st->vref_reg);
  445. }
  446. iio_device_free(indio_dev);
  447. return 0;
  448. }
  449. #if IS_ENABLED(CONFIG_SPI_MASTER)
  450. static int ad5064_spi_write(struct ad5064_state *st, unsigned int cmd,
  451. unsigned int addr, unsigned int val)
  452. {
  453. struct spi_device *spi = to_spi_device(st->dev);
  454. st->data.spi = cpu_to_be32(AD5064_CMD(cmd) | AD5064_ADDR(addr) | val);
  455. return spi_write(spi, &st->data.spi, sizeof(st->data.spi));
  456. }
  457. static int ad5064_spi_probe(struct spi_device *spi)
  458. {
  459. const struct spi_device_id *id = spi_get_device_id(spi);
  460. return ad5064_probe(&spi->dev, id->driver_data, id->name,
  461. ad5064_spi_write);
  462. }
  463. static int ad5064_spi_remove(struct spi_device *spi)
  464. {
  465. return ad5064_remove(&spi->dev);
  466. }
  467. static const struct spi_device_id ad5064_spi_ids[] = {
  468. {"ad5024", ID_AD5024},
  469. {"ad5025", ID_AD5025},
  470. {"ad5044", ID_AD5044},
  471. {"ad5045", ID_AD5045},
  472. {"ad5064", ID_AD5064},
  473. {"ad5064-1", ID_AD5064_1},
  474. {"ad5065", ID_AD5065},
  475. {"ad5628-1", ID_AD5628_1},
  476. {"ad5628-2", ID_AD5628_2},
  477. {"ad5648-1", ID_AD5648_1},
  478. {"ad5648-2", ID_AD5648_2},
  479. {"ad5666-1", ID_AD5666_1},
  480. {"ad5666-2", ID_AD5666_2},
  481. {"ad5668-1", ID_AD5668_1},
  482. {"ad5668-2", ID_AD5668_2},
  483. {"ad5668-3", ID_AD5668_2}, /* similar enough to ad5668-2 */
  484. {}
  485. };
  486. MODULE_DEVICE_TABLE(spi, ad5064_spi_ids);
  487. static struct spi_driver ad5064_spi_driver = {
  488. .driver = {
  489. .name = "ad5064",
  490. .owner = THIS_MODULE,
  491. },
  492. .probe = ad5064_spi_probe,
  493. .remove = ad5064_spi_remove,
  494. .id_table = ad5064_spi_ids,
  495. };
  496. static int __init ad5064_spi_register_driver(void)
  497. {
  498. return spi_register_driver(&ad5064_spi_driver);
  499. }
  500. static void ad5064_spi_unregister_driver(void)
  501. {
  502. spi_unregister_driver(&ad5064_spi_driver);
  503. }
  504. #else
  505. static inline int ad5064_spi_register_driver(void) { return 0; }
  506. static inline void ad5064_spi_unregister_driver(void) { }
  507. #endif
  508. #if IS_ENABLED(CONFIG_I2C)
  509. static int ad5064_i2c_write(struct ad5064_state *st, unsigned int cmd,
  510. unsigned int addr, unsigned int val)
  511. {
  512. struct i2c_client *i2c = to_i2c_client(st->dev);
  513. st->data.i2c[0] = (cmd << 4) | addr;
  514. put_unaligned_be16(val, &st->data.i2c[1]);
  515. return i2c_master_send(i2c, st->data.i2c, 3);
  516. }
  517. static int ad5064_i2c_probe(struct i2c_client *i2c,
  518. const struct i2c_device_id *id)
  519. {
  520. return ad5064_probe(&i2c->dev, id->driver_data, id->name,
  521. ad5064_i2c_write);
  522. }
  523. static int ad5064_i2c_remove(struct i2c_client *i2c)
  524. {
  525. return ad5064_remove(&i2c->dev);
  526. }
  527. static const struct i2c_device_id ad5064_i2c_ids[] = {
  528. {"ad5629-1", ID_AD5628_1},
  529. {"ad5629-2", ID_AD5628_2},
  530. {"ad5629-3", ID_AD5628_2}, /* similar enough to ad5629-2 */
  531. {"ad5669-1", ID_AD5668_1},
  532. {"ad5669-2", ID_AD5668_2},
  533. {"ad5669-3", ID_AD5668_2}, /* similar enough to ad5669-2 */
  534. {}
  535. };
  536. MODULE_DEVICE_TABLE(i2c, ad5064_i2c_ids);
  537. static struct i2c_driver ad5064_i2c_driver = {
  538. .driver = {
  539. .name = "ad5064",
  540. .owner = THIS_MODULE,
  541. },
  542. .probe = ad5064_i2c_probe,
  543. .remove = ad5064_i2c_remove,
  544. .id_table = ad5064_i2c_ids,
  545. };
  546. static int __init ad5064_i2c_register_driver(void)
  547. {
  548. return i2c_add_driver(&ad5064_i2c_driver);
  549. }
  550. static void __exit ad5064_i2c_unregister_driver(void)
  551. {
  552. i2c_del_driver(&ad5064_i2c_driver);
  553. }
  554. #else
  555. static inline int ad5064_i2c_register_driver(void) { return 0; }
  556. static inline void ad5064_i2c_unregister_driver(void) { }
  557. #endif
  558. static int __init ad5064_init(void)
  559. {
  560. int ret;
  561. ret = ad5064_spi_register_driver();
  562. if (ret)
  563. return ret;
  564. ret = ad5064_i2c_register_driver();
  565. if (ret) {
  566. ad5064_spi_unregister_driver();
  567. return ret;
  568. }
  569. return 0;
  570. }
  571. module_init(ad5064_init);
  572. static void __exit ad5064_exit(void)
  573. {
  574. ad5064_i2c_unregister_driver();
  575. ad5064_spi_unregister_driver();
  576. }
  577. module_exit(ad5064_exit);
  578. MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
  579. MODULE_DESCRIPTION("Analog Devices AD5024 and similar multi-channel DACs");
  580. MODULE_LICENSE("GPL v2");