ad7476.c 7.5 KB

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  1. /*
  2. * AD7466/7/8 AD7476/5/7/8 (A) SPI ADC driver
  3. *
  4. * Copyright 2010 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/kernel.h>
  10. #include <linux/slab.h>
  11. #include <linux/sysfs.h>
  12. #include <linux/spi/spi.h>
  13. #include <linux/regulator/consumer.h>
  14. #include <linux/err.h>
  15. #include <linux/module.h>
  16. #include <linux/iio/iio.h>
  17. #include <linux/iio/sysfs.h>
  18. #include <linux/iio/buffer.h>
  19. #include <linux/iio/trigger_consumer.h>
  20. #include <linux/iio/triggered_buffer.h>
  21. #define RES_MASK(bits) ((1 << (bits)) - 1)
  22. struct ad7476_state;
  23. struct ad7476_chip_info {
  24. unsigned int int_vref_uv;
  25. struct iio_chan_spec channel[2];
  26. void (*reset)(struct ad7476_state *);
  27. };
  28. struct ad7476_state {
  29. struct spi_device *spi;
  30. const struct ad7476_chip_info *chip_info;
  31. struct regulator *reg;
  32. struct spi_transfer xfer;
  33. struct spi_message msg;
  34. /*
  35. * DMA (thus cache coherency maintenance) requires the
  36. * transfer buffers to live in their own cache lines.
  37. * Make the buffer large enough for one 16 bit sample and one 64 bit
  38. * aligned 64 bit timestamp.
  39. */
  40. unsigned char data[ALIGN(2, sizeof(s64)) + sizeof(s64)]
  41. ____cacheline_aligned;
  42. };
  43. enum ad7476_supported_device_ids {
  44. ID_AD7091R,
  45. ID_AD7276,
  46. ID_AD7277,
  47. ID_AD7278,
  48. ID_AD7466,
  49. ID_AD7467,
  50. ID_AD7468,
  51. ID_AD7495,
  52. ID_AD7940,
  53. };
  54. static irqreturn_t ad7476_trigger_handler(int irq, void *p)
  55. {
  56. struct iio_poll_func *pf = p;
  57. struct iio_dev *indio_dev = pf->indio_dev;
  58. struct ad7476_state *st = iio_priv(indio_dev);
  59. s64 time_ns;
  60. int b_sent;
  61. b_sent = spi_sync(st->spi, &st->msg);
  62. if (b_sent < 0)
  63. goto done;
  64. time_ns = iio_get_time_ns();
  65. if (indio_dev->scan_timestamp)
  66. ((s64 *)st->data)[1] = time_ns;
  67. iio_push_to_buffers(indio_dev, st->data);
  68. done:
  69. iio_trigger_notify_done(indio_dev->trig);
  70. return IRQ_HANDLED;
  71. }
  72. static void ad7091_reset(struct ad7476_state *st)
  73. {
  74. /* Any transfers with 8 scl cycles will reset the device */
  75. spi_read(st->spi, st->data, 1);
  76. }
  77. static int ad7476_scan_direct(struct ad7476_state *st)
  78. {
  79. int ret;
  80. ret = spi_sync(st->spi, &st->msg);
  81. if (ret)
  82. return ret;
  83. return be16_to_cpup((__be16 *)st->data);
  84. }
  85. static int ad7476_read_raw(struct iio_dev *indio_dev,
  86. struct iio_chan_spec const *chan,
  87. int *val,
  88. int *val2,
  89. long m)
  90. {
  91. int ret;
  92. struct ad7476_state *st = iio_priv(indio_dev);
  93. int scale_uv;
  94. switch (m) {
  95. case IIO_CHAN_INFO_RAW:
  96. mutex_lock(&indio_dev->mlock);
  97. if (iio_buffer_enabled(indio_dev))
  98. ret = -EBUSY;
  99. else
  100. ret = ad7476_scan_direct(st);
  101. mutex_unlock(&indio_dev->mlock);
  102. if (ret < 0)
  103. return ret;
  104. *val = (ret >> st->chip_info->channel[0].scan_type.shift) &
  105. RES_MASK(st->chip_info->channel[0].scan_type.realbits);
  106. return IIO_VAL_INT;
  107. case IIO_CHAN_INFO_SCALE:
  108. if (!st->chip_info->int_vref_uv) {
  109. scale_uv = regulator_get_voltage(st->reg);
  110. if (scale_uv < 0)
  111. return scale_uv;
  112. } else {
  113. scale_uv = st->chip_info->int_vref_uv;
  114. }
  115. scale_uv >>= chan->scan_type.realbits;
  116. *val = scale_uv / 1000;
  117. *val2 = (scale_uv % 1000) * 1000;
  118. return IIO_VAL_INT_PLUS_MICRO;
  119. }
  120. return -EINVAL;
  121. }
  122. #define _AD7476_CHAN(bits, _shift, _info_mask) \
  123. { \
  124. .type = IIO_VOLTAGE, \
  125. .indexed = 1, \
  126. .info_mask = _info_mask | \
  127. IIO_CHAN_INFO_SCALE_SHARED_BIT, \
  128. .scan_type = { \
  129. .sign = 'u', \
  130. .realbits = (bits), \
  131. .storagebits = 16, \
  132. .shift = (_shift), \
  133. .endianness = IIO_BE, \
  134. }, \
  135. }
  136. #define AD7476_CHAN(bits) _AD7476_CHAN((bits), 13 - (bits), \
  137. IIO_CHAN_INFO_RAW_SEPARATE_BIT)
  138. #define AD7940_CHAN(bits) _AD7476_CHAN((bits), 15 - (bits), \
  139. IIO_CHAN_INFO_RAW_SEPARATE_BIT)
  140. #define AD7091R_CHAN(bits) _AD7476_CHAN((bits), 16 - (bits), 0)
  141. static const struct ad7476_chip_info ad7476_chip_info_tbl[] = {
  142. [ID_AD7091R] = {
  143. .channel[0] = AD7091R_CHAN(12),
  144. .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
  145. .reset = ad7091_reset,
  146. },
  147. [ID_AD7276] = {
  148. .channel[0] = AD7940_CHAN(12),
  149. .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
  150. },
  151. [ID_AD7277] = {
  152. .channel[0] = AD7940_CHAN(10),
  153. .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
  154. },
  155. [ID_AD7278] = {
  156. .channel[0] = AD7940_CHAN(8),
  157. .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
  158. },
  159. [ID_AD7466] = {
  160. .channel[0] = AD7476_CHAN(12),
  161. .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
  162. },
  163. [ID_AD7467] = {
  164. .channel[0] = AD7476_CHAN(10),
  165. .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
  166. },
  167. [ID_AD7468] = {
  168. .channel[0] = AD7476_CHAN(8),
  169. .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
  170. },
  171. [ID_AD7495] = {
  172. .channel[0] = AD7476_CHAN(12),
  173. .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
  174. .int_vref_uv = 2500000,
  175. },
  176. [ID_AD7940] = {
  177. .channel[0] = AD7940_CHAN(14),
  178. .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
  179. },
  180. };
  181. static const struct iio_info ad7476_info = {
  182. .driver_module = THIS_MODULE,
  183. .read_raw = &ad7476_read_raw,
  184. };
  185. static int ad7476_probe(struct spi_device *spi)
  186. {
  187. struct ad7476_state *st;
  188. struct iio_dev *indio_dev;
  189. int ret;
  190. indio_dev = iio_device_alloc(sizeof(*st));
  191. if (indio_dev == NULL) {
  192. ret = -ENOMEM;
  193. goto error_ret;
  194. }
  195. st = iio_priv(indio_dev);
  196. st->chip_info =
  197. &ad7476_chip_info_tbl[spi_get_device_id(spi)->driver_data];
  198. st->reg = regulator_get(&spi->dev, "vcc");
  199. if (IS_ERR(st->reg)) {
  200. ret = PTR_ERR(st->reg);
  201. goto error_free_dev;
  202. }
  203. ret = regulator_enable(st->reg);
  204. if (ret)
  205. goto error_put_reg;
  206. spi_set_drvdata(spi, indio_dev);
  207. st->spi = spi;
  208. /* Establish that the iio_dev is a child of the spi device */
  209. indio_dev->dev.parent = &spi->dev;
  210. indio_dev->name = spi_get_device_id(spi)->name;
  211. indio_dev->modes = INDIO_DIRECT_MODE;
  212. indio_dev->channels = st->chip_info->channel;
  213. indio_dev->num_channels = 2;
  214. indio_dev->info = &ad7476_info;
  215. /* Setup default message */
  216. st->xfer.rx_buf = &st->data;
  217. st->xfer.len = st->chip_info->channel[0].scan_type.storagebits / 8;
  218. spi_message_init(&st->msg);
  219. spi_message_add_tail(&st->xfer, &st->msg);
  220. ret = iio_triggered_buffer_setup(indio_dev, NULL,
  221. &ad7476_trigger_handler, NULL);
  222. if (ret)
  223. goto error_disable_reg;
  224. if (st->chip_info->reset)
  225. st->chip_info->reset(st);
  226. ret = iio_device_register(indio_dev);
  227. if (ret)
  228. goto error_ring_unregister;
  229. return 0;
  230. error_ring_unregister:
  231. iio_triggered_buffer_cleanup(indio_dev);
  232. error_disable_reg:
  233. regulator_disable(st->reg);
  234. error_put_reg:
  235. regulator_put(st->reg);
  236. error_free_dev:
  237. iio_device_free(indio_dev);
  238. error_ret:
  239. return ret;
  240. }
  241. static int ad7476_remove(struct spi_device *spi)
  242. {
  243. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  244. struct ad7476_state *st = iio_priv(indio_dev);
  245. iio_device_unregister(indio_dev);
  246. iio_triggered_buffer_cleanup(indio_dev);
  247. regulator_disable(st->reg);
  248. regulator_put(st->reg);
  249. iio_device_free(indio_dev);
  250. return 0;
  251. }
  252. static const struct spi_device_id ad7476_id[] = {
  253. {"ad7091r", ID_AD7091R},
  254. {"ad7273", ID_AD7277},
  255. {"ad7274", ID_AD7276},
  256. {"ad7276", ID_AD7276},
  257. {"ad7277", ID_AD7277},
  258. {"ad7278", ID_AD7278},
  259. {"ad7466", ID_AD7466},
  260. {"ad7467", ID_AD7467},
  261. {"ad7468", ID_AD7468},
  262. {"ad7475", ID_AD7466},
  263. {"ad7476", ID_AD7466},
  264. {"ad7476a", ID_AD7466},
  265. {"ad7477", ID_AD7467},
  266. {"ad7477a", ID_AD7467},
  267. {"ad7478", ID_AD7468},
  268. {"ad7478a", ID_AD7468},
  269. {"ad7495", ID_AD7495},
  270. {"ad7910", ID_AD7467},
  271. {"ad7920", ID_AD7466},
  272. {"ad7940", ID_AD7940},
  273. {}
  274. };
  275. MODULE_DEVICE_TABLE(spi, ad7476_id);
  276. static struct spi_driver ad7476_driver = {
  277. .driver = {
  278. .name = "ad7476",
  279. .owner = THIS_MODULE,
  280. },
  281. .probe = ad7476_probe,
  282. .remove = ad7476_remove,
  283. .id_table = ad7476_id,
  284. };
  285. module_spi_driver(ad7476_driver);
  286. MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
  287. MODULE_DESCRIPTION("Analog Devices AD7476 and similar 1-channel ADCs");
  288. MODULE_LICENSE("GPL v2");