i2c-sis630.c 15 KB

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  1. /*
  2. Copyright (c) 2002,2003 Alexander Malysh <amalysh@web.de>
  3. This program is free software; you can redistribute it and/or modify
  4. it under the terms of the GNU General Public License as published by
  5. the Free Software Foundation; either version 2 of the License, or
  6. (at your option) any later version.
  7. This program is distributed in the hope that it will be useful,
  8. but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. GNU General Public License for more details.
  11. You should have received a copy of the GNU General Public License
  12. along with this program; if not, write to the Free Software
  13. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  14. */
  15. /*
  16. Status: beta
  17. Supports:
  18. SIS 630
  19. SIS 730
  20. SIS 964
  21. Notable differences between chips:
  22. +------------------------+--------------------+-------------------+
  23. | | SIS630/730 | SIS964 |
  24. +------------------------+--------------------+-------------------+
  25. | Clock | 14kHz/56kHz | 55.56kHz/27.78kHz |
  26. | SMBus registers offset | 0x80 | 0xE0 |
  27. | SMB_CNT | Bit 1 = Slave Busy | Bit 1 = Bus probe |
  28. | (not used yet) | Bit 3 is reserved | Bit 3 = Last byte |
  29. | SMB_PCOUNT | Offset + 0x06 | Offset + 0x14 |
  30. | SMB_COUNT | 4:0 bits | 5:0 bits |
  31. +------------------------+--------------------+-------------------+
  32. (Other differences don't affect the functions provided by the driver)
  33. Note: we assume there can only be one device, with one SMBus interface.
  34. */
  35. #include <linux/kernel.h>
  36. #include <linux/module.h>
  37. #include <linux/delay.h>
  38. #include <linux/pci.h>
  39. #include <linux/ioport.h>
  40. #include <linux/init.h>
  41. #include <linux/i2c.h>
  42. #include <linux/acpi.h>
  43. #include <linux/io.h>
  44. /* SIS964 id is defined here as we are the only file using it */
  45. #define PCI_DEVICE_ID_SI_964 0x0964
  46. /* SIS630/730/964 SMBus registers */
  47. #define SMB_STS 0x00 /* status */
  48. #define SMB_CNT 0x02 /* control */
  49. #define SMBHOST_CNT 0x03 /* host control */
  50. #define SMB_ADDR 0x04 /* address */
  51. #define SMB_CMD 0x05 /* command */
  52. #define SMB_COUNT 0x07 /* byte count */
  53. #define SMB_BYTE 0x08 /* ~0x8F data byte field */
  54. /* SMB_STS register */
  55. #define BYTE_DONE_STS 0x10 /* Byte Done Status / Block Array */
  56. #define SMBCOL_STS 0x04 /* Collision */
  57. #define SMBERR_STS 0x02 /* Device error */
  58. /* SMB_CNT register */
  59. #define MSTO_EN 0x40 /* Host Master Timeout Enable */
  60. #define SMBCLK_SEL 0x20 /* Host master clock selection */
  61. #define SMB_PROBE 0x02 /* Bus Probe/Slave busy */
  62. #define SMB_HOSTBUSY 0x01 /* Host Busy */
  63. /* SMBHOST_CNT register */
  64. #define SMB_KILL 0x20 /* Kill */
  65. #define SMB_START 0x10 /* Start */
  66. /* register count for request_region
  67. * As we don't use SMB_PCOUNT, 20 is ok for SiS630 and SiS964
  68. */
  69. #define SIS630_SMB_IOREGION 20
  70. /* PCI address constants */
  71. /* acpi base address register */
  72. #define SIS630_ACPI_BASE_REG 0x74
  73. /* bios control register */
  74. #define SIS630_BIOS_CTL_REG 0x40
  75. /* Other settings */
  76. #define MAX_TIMEOUT 500
  77. /* SIS630 constants */
  78. #define SIS630_QUICK 0x00
  79. #define SIS630_BYTE 0x01
  80. #define SIS630_BYTE_DATA 0x02
  81. #define SIS630_WORD_DATA 0x03
  82. #define SIS630_PCALL 0x04
  83. #define SIS630_BLOCK_DATA 0x05
  84. static struct pci_driver sis630_driver;
  85. /* insmod parameters */
  86. static bool high_clock;
  87. static bool force;
  88. module_param(high_clock, bool, 0);
  89. MODULE_PARM_DESC(high_clock,
  90. "Set Host Master Clock to 56KHz (default 14KHz) (SIS630/730 only).");
  91. module_param(force, bool, 0);
  92. MODULE_PARM_DESC(force, "Forcibly enable the SIS630. DANGEROUS!");
  93. /* SMBus base adress */
  94. static unsigned short smbus_base;
  95. /* supported chips */
  96. static int supported[] = {
  97. PCI_DEVICE_ID_SI_630,
  98. PCI_DEVICE_ID_SI_730,
  99. PCI_DEVICE_ID_SI_760,
  100. 0 /* terminates the list */
  101. };
  102. static inline u8 sis630_read(u8 reg)
  103. {
  104. return inb(smbus_base + reg);
  105. }
  106. static inline void sis630_write(u8 reg, u8 data)
  107. {
  108. outb(data, smbus_base + reg);
  109. }
  110. static int sis630_transaction_start(struct i2c_adapter *adap, int size,
  111. u8 *oldclock)
  112. {
  113. int temp;
  114. /* Make sure the SMBus host is ready to start transmitting. */
  115. temp = sis630_read(SMB_CNT);
  116. if ((temp & (SMB_PROBE | SMB_HOSTBUSY)) != 0x00) {
  117. dev_dbg(&adap->dev, "SMBus busy (%02x). Resetting...\n", temp);
  118. /* kill smbus transaction */
  119. sis630_write(SMBHOST_CNT, SMB_KILL);
  120. temp = sis630_read(SMB_CNT);
  121. if (temp & (SMB_PROBE | SMB_HOSTBUSY)) {
  122. dev_dbg(&adap->dev, "Failed! (%02x)\n", temp);
  123. return -EBUSY;
  124. } else {
  125. dev_dbg(&adap->dev, "Successful!\n");
  126. }
  127. }
  128. /* save old clock, so we can prevent machine for hung */
  129. *oldclock = sis630_read(SMB_CNT);
  130. dev_dbg(&adap->dev, "saved clock 0x%02x\n", *oldclock);
  131. /* disable timeout interrupt,
  132. * set Host Master Clock to 56KHz if requested */
  133. if (high_clock)
  134. sis630_write(SMB_CNT, SMBCLK_SEL);
  135. else
  136. sis630_write(SMB_CNT, (*oldclock & ~MSTO_EN));
  137. /* clear all sticky bits */
  138. temp = sis630_read(SMB_STS);
  139. sis630_write(SMB_STS, temp & 0x1e);
  140. /* start the transaction by setting bit 4 and size */
  141. sis630_write(SMBHOST_CNT, SMB_START | (size & 0x07));
  142. return 0;
  143. }
  144. static int sis630_transaction_wait(struct i2c_adapter *adap, int size)
  145. {
  146. int temp, result = 0, timeout = 0;
  147. /* We will always wait for a fraction of a second! */
  148. do {
  149. msleep(1);
  150. temp = sis630_read(SMB_STS);
  151. /* check if block transmitted */
  152. if (size == SIS630_BLOCK_DATA && (temp & BYTE_DONE_STS))
  153. break;
  154. } while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT));
  155. /* If the SMBus is still busy, we give up */
  156. if (timeout > MAX_TIMEOUT) {
  157. dev_dbg(&adap->dev, "SMBus Timeout!\n");
  158. result = -ETIMEDOUT;
  159. }
  160. if (temp & SMBERR_STS) {
  161. dev_dbg(&adap->dev, "Error: Failed bus transaction\n");
  162. result = -ENXIO;
  163. }
  164. if (temp & SMBCOL_STS) {
  165. dev_err(&adap->dev, "Bus collision!\n");
  166. result = -EAGAIN;
  167. }
  168. return result;
  169. }
  170. static void sis630_transaction_end(struct i2c_adapter *adap, u8 oldclock)
  171. {
  172. /* clear all status "sticky" bits */
  173. sis630_write(SMB_STS, 0xFF);
  174. dev_dbg(&adap->dev,
  175. "SMB_CNT before clock restore 0x%02x\n", sis630_read(SMB_CNT));
  176. /*
  177. * restore old Host Master Clock if high_clock is set
  178. * and oldclock was not 56KHz
  179. */
  180. if (high_clock && !(oldclock & SMBCLK_SEL))
  181. sis630_write(SMB_CNT, sis630_read(SMB_CNT) & ~SMBCLK_SEL);
  182. dev_dbg(&adap->dev,
  183. "SMB_CNT after clock restore 0x%02x\n", sis630_read(SMB_CNT));
  184. }
  185. static int sis630_transaction(struct i2c_adapter *adap, int size)
  186. {
  187. int result = 0;
  188. u8 oldclock = 0;
  189. result = sis630_transaction_start(adap, size, &oldclock);
  190. if (!result) {
  191. result = sis630_transaction_wait(adap, size);
  192. sis630_transaction_end(adap, oldclock);
  193. }
  194. return result;
  195. }
  196. static int sis630_block_data(struct i2c_adapter *adap,
  197. union i2c_smbus_data *data, int read_write)
  198. {
  199. int i, len = 0, rc = 0;
  200. u8 oldclock = 0;
  201. if (read_write == I2C_SMBUS_WRITE) {
  202. len = data->block[0];
  203. if (len < 0)
  204. len = 0;
  205. else if (len > 32)
  206. len = 32;
  207. sis630_write(SMB_COUNT, len);
  208. for (i = 1; i <= len; i++) {
  209. dev_dbg(&adap->dev,
  210. "set data 0x%02x\n", data->block[i]);
  211. /* set data */
  212. sis630_write(SMB_BYTE + (i - 1) % 8, data->block[i]);
  213. if (i == 8 || (len < 8 && i == len)) {
  214. dev_dbg(&adap->dev,
  215. "start trans len=%d i=%d\n", len, i);
  216. /* first transaction */
  217. rc = sis630_transaction_start(adap,
  218. SIS630_BLOCK_DATA, &oldclock);
  219. if (rc)
  220. return rc;
  221. } else if ((i - 1) % 8 == 7 || i == len) {
  222. dev_dbg(&adap->dev,
  223. "trans_wait len=%d i=%d\n", len, i);
  224. if (i > 8) {
  225. dev_dbg(&adap->dev,
  226. "clear smbary_sts"
  227. " len=%d i=%d\n", len, i);
  228. /*
  229. If this is not first transaction,
  230. we must clear sticky bit.
  231. clear SMBARY_STS
  232. */
  233. sis630_write(SMB_STS, BYTE_DONE_STS);
  234. }
  235. rc = sis630_transaction_wait(adap,
  236. SIS630_BLOCK_DATA);
  237. if (rc) {
  238. dev_dbg(&adap->dev,
  239. "trans_wait failed\n");
  240. break;
  241. }
  242. }
  243. }
  244. } else {
  245. /* read request */
  246. data->block[0] = len = 0;
  247. rc = sis630_transaction_start(adap,
  248. SIS630_BLOCK_DATA, &oldclock);
  249. if (rc)
  250. return rc;
  251. do {
  252. rc = sis630_transaction_wait(adap, SIS630_BLOCK_DATA);
  253. if (rc) {
  254. dev_dbg(&adap->dev, "trans_wait failed\n");
  255. break;
  256. }
  257. /* if this first transaction then read byte count */
  258. if (len == 0)
  259. data->block[0] = sis630_read(SMB_COUNT);
  260. /* just to be sure */
  261. if (data->block[0] > 32)
  262. data->block[0] = 32;
  263. dev_dbg(&adap->dev,
  264. "block data read len=0x%x\n", data->block[0]);
  265. for (i = 0; i < 8 && len < data->block[0]; i++, len++) {
  266. dev_dbg(&adap->dev,
  267. "read i=%d len=%d\n", i, len);
  268. data->block[len + 1] = sis630_read(SMB_BYTE +
  269. i);
  270. }
  271. dev_dbg(&adap->dev,
  272. "clear smbary_sts len=%d i=%d\n", len, i);
  273. /* clear SMBARY_STS */
  274. sis630_write(SMB_STS, BYTE_DONE_STS);
  275. } while (len < data->block[0]);
  276. }
  277. sis630_transaction_end(adap, oldclock);
  278. return rc;
  279. }
  280. /* Return negative errno on error. */
  281. static s32 sis630_access(struct i2c_adapter *adap, u16 addr,
  282. unsigned short flags, char read_write,
  283. u8 command, int size, union i2c_smbus_data *data)
  284. {
  285. int status;
  286. switch (size) {
  287. case I2C_SMBUS_QUICK:
  288. sis630_write(SMB_ADDR,
  289. ((addr & 0x7f) << 1) | (read_write & 0x01));
  290. size = SIS630_QUICK;
  291. break;
  292. case I2C_SMBUS_BYTE:
  293. sis630_write(SMB_ADDR,
  294. ((addr & 0x7f) << 1) | (read_write & 0x01));
  295. if (read_write == I2C_SMBUS_WRITE)
  296. sis630_write(SMB_CMD, command);
  297. size = SIS630_BYTE;
  298. break;
  299. case I2C_SMBUS_BYTE_DATA:
  300. sis630_write(SMB_ADDR,
  301. ((addr & 0x7f) << 1) | (read_write & 0x01));
  302. sis630_write(SMB_CMD, command);
  303. if (read_write == I2C_SMBUS_WRITE)
  304. sis630_write(SMB_BYTE, data->byte);
  305. size = SIS630_BYTE_DATA;
  306. break;
  307. case I2C_SMBUS_PROC_CALL:
  308. case I2C_SMBUS_WORD_DATA:
  309. sis630_write(SMB_ADDR,
  310. ((addr & 0x7f) << 1) | (read_write & 0x01));
  311. sis630_write(SMB_CMD, command);
  312. if (read_write == I2C_SMBUS_WRITE) {
  313. sis630_write(SMB_BYTE, data->word & 0xff);
  314. sis630_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8);
  315. }
  316. size = (size == I2C_SMBUS_PROC_CALL ?
  317. SIS630_PCALL : SIS630_WORD_DATA);
  318. break;
  319. case I2C_SMBUS_BLOCK_DATA:
  320. sis630_write(SMB_ADDR,
  321. ((addr & 0x7f) << 1) | (read_write & 0x01));
  322. sis630_write(SMB_CMD, command);
  323. size = SIS630_BLOCK_DATA;
  324. return sis630_block_data(adap, data, read_write);
  325. default:
  326. dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
  327. return -EOPNOTSUPP;
  328. }
  329. status = sis630_transaction(adap, size);
  330. if (status)
  331. return status;
  332. if ((size != SIS630_PCALL) &&
  333. ((read_write == I2C_SMBUS_WRITE) || (size == SIS630_QUICK))) {
  334. return 0;
  335. }
  336. switch (size) {
  337. case SIS630_BYTE:
  338. case SIS630_BYTE_DATA:
  339. data->byte = sis630_read(SMB_BYTE);
  340. break;
  341. case SIS630_PCALL:
  342. case SIS630_WORD_DATA:
  343. data->word = sis630_read(SMB_BYTE) +
  344. (sis630_read(SMB_BYTE + 1) << 8);
  345. break;
  346. }
  347. return 0;
  348. }
  349. static u32 sis630_func(struct i2c_adapter *adapter)
  350. {
  351. return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
  352. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
  353. I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_BLOCK_DATA;
  354. }
  355. static int sis630_setup(struct pci_dev *sis630_dev)
  356. {
  357. unsigned char b;
  358. struct pci_dev *dummy = NULL;
  359. int retval, i;
  360. /* acpi base address */
  361. unsigned short acpi_base;
  362. /* check for supported SiS devices */
  363. for (i = 0; supported[i] > 0; i++) {
  364. dummy = pci_get_device(PCI_VENDOR_ID_SI, supported[i], dummy);
  365. if (dummy)
  366. break; /* found */
  367. }
  368. if (dummy) {
  369. pci_dev_put(dummy);
  370. } else if (force) {
  371. dev_err(&sis630_dev->dev,
  372. "WARNING: Can't detect SIS630 compatible device, but "
  373. "loading because of force option enabled\n");
  374. } else {
  375. return -ENODEV;
  376. }
  377. /*
  378. Enable ACPI first , so we can accsess reg 74-75
  379. in acpi io space and read acpi base addr
  380. */
  381. if (pci_read_config_byte(sis630_dev, SIS630_BIOS_CTL_REG, &b)) {
  382. dev_err(&sis630_dev->dev, "Error: Can't read bios ctl reg\n");
  383. retval = -ENODEV;
  384. goto exit;
  385. }
  386. /* if ACPI already enabled , do nothing */
  387. if (!(b & 0x80) &&
  388. pci_write_config_byte(sis630_dev, SIS630_BIOS_CTL_REG, b | 0x80)) {
  389. dev_err(&sis630_dev->dev, "Error: Can't enable ACPI\n");
  390. retval = -ENODEV;
  391. goto exit;
  392. }
  393. /* Determine the ACPI base address */
  394. if (pci_read_config_word(sis630_dev,
  395. SIS630_ACPI_BASE_REG, &acpi_base)) {
  396. dev_err(&sis630_dev->dev,
  397. "Error: Can't determine ACPI base address\n");
  398. retval = -ENODEV;
  399. goto exit;
  400. }
  401. dev_dbg(&sis630_dev->dev, "ACPI base at 0x%04hx\n", acpi_base);
  402. if (supported[i] == PCI_DEVICE_ID_SI_760)
  403. smbus_base = acpi_base + 0xE0;
  404. else
  405. smbus_base = acpi_base + 0x80;
  406. dev_dbg(&sis630_dev->dev, "SMBus base at 0x%04hx\n", smbus_base);
  407. retval = acpi_check_region(smbus_base + SMB_STS, SIS630_SMB_IOREGION,
  408. sis630_driver.name);
  409. if (retval)
  410. goto exit;
  411. /* Everything is happy, let's grab the memory and set things up. */
  412. if (!request_region(smbus_base + SMB_STS, SIS630_SMB_IOREGION,
  413. sis630_driver.name)) {
  414. dev_err(&sis630_dev->dev,
  415. "I/O Region 0x%04hx-0x%04hx for SMBus already in use.\n",
  416. smbus_base + SMB_STS,
  417. smbus_base + SMB_STS + SIS630_SMB_IOREGION - 1);
  418. retval = -EBUSY;
  419. goto exit;
  420. }
  421. retval = 0;
  422. exit:
  423. if (retval)
  424. smbus_base = 0;
  425. return retval;
  426. }
  427. static const struct i2c_algorithm smbus_algorithm = {
  428. .smbus_xfer = sis630_access,
  429. .functionality = sis630_func,
  430. };
  431. static struct i2c_adapter sis630_adapter = {
  432. .owner = THIS_MODULE,
  433. .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
  434. .algo = &smbus_algorithm,
  435. .retries = 3
  436. };
  437. static DEFINE_PCI_DEVICE_TABLE(sis630_ids) = {
  438. { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) },
  439. { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC) },
  440. { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_964) },
  441. { 0, }
  442. };
  443. MODULE_DEVICE_TABLE(pci, sis630_ids);
  444. static int sis630_probe(struct pci_dev *dev, const struct pci_device_id *id)
  445. {
  446. if (sis630_setup(dev)) {
  447. dev_err(&dev->dev,
  448. "SIS630 compatible bus not detected, "
  449. "module not inserted.\n");
  450. return -ENODEV;
  451. }
  452. /* set up the sysfs linkage to our parent device */
  453. sis630_adapter.dev.parent = &dev->dev;
  454. snprintf(sis630_adapter.name, sizeof(sis630_adapter.name),
  455. "SMBus SIS630 adapter at %04hx", smbus_base + SMB_STS);
  456. return i2c_add_adapter(&sis630_adapter);
  457. }
  458. static void sis630_remove(struct pci_dev *dev)
  459. {
  460. if (smbus_base) {
  461. i2c_del_adapter(&sis630_adapter);
  462. release_region(smbus_base + SMB_STS, SIS630_SMB_IOREGION);
  463. smbus_base = 0;
  464. }
  465. }
  466. static struct pci_driver sis630_driver = {
  467. .name = "sis630_smbus",
  468. .id_table = sis630_ids,
  469. .probe = sis630_probe,
  470. .remove = sis630_remove,
  471. };
  472. module_pci_driver(sis630_driver);
  473. MODULE_LICENSE("GPL");
  474. MODULE_AUTHOR("Alexander Malysh <amalysh@web.de>");
  475. MODULE_DESCRIPTION("SIS630 SMBus driver");