w83781d.c 57 KB

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  1. /*
  2. * w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
  3. * monitoring
  4. * Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
  5. * Philip Edelbrock <phil@netroedge.com>,
  6. * and Mark Studebaker <mdsxyz123@yahoo.com>
  7. * Copyright (c) 2007 - 2008 Jean Delvare <khali@linux-fr.org>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. /*
  24. * Supports following chips:
  25. *
  26. * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
  27. * as99127f 7 3 0 3 0x31 0x12c3 yes no
  28. * as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
  29. * w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
  30. * w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
  31. * w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
  32. *
  33. */
  34. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  35. #include <linux/module.h>
  36. #include <linux/init.h>
  37. #include <linux/slab.h>
  38. #include <linux/jiffies.h>
  39. #include <linux/i2c.h>
  40. #include <linux/hwmon.h>
  41. #include <linux/hwmon-vid.h>
  42. #include <linux/hwmon-sysfs.h>
  43. #include <linux/sysfs.h>
  44. #include <linux/err.h>
  45. #include <linux/mutex.h>
  46. #ifdef CONFIG_ISA
  47. #include <linux/platform_device.h>
  48. #include <linux/ioport.h>
  49. #include <linux/io.h>
  50. #endif
  51. #include "lm75.h"
  52. /* Addresses to scan */
  53. static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
  54. 0x2e, 0x2f, I2C_CLIENT_END };
  55. enum chips { w83781d, w83782d, w83783s, as99127f };
  56. /* Insmod parameters */
  57. static unsigned short force_subclients[4];
  58. module_param_array(force_subclients, short, NULL, 0);
  59. MODULE_PARM_DESC(force_subclients, "List of subclient addresses: "
  60. "{bus, clientaddr, subclientaddr1, subclientaddr2}");
  61. static bool reset;
  62. module_param(reset, bool, 0);
  63. MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
  64. static bool init = 1;
  65. module_param(init, bool, 0);
  66. MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  67. /* Constants specified below */
  68. /* Length of ISA address segment */
  69. #define W83781D_EXTENT 8
  70. /* Where are the ISA address/data registers relative to the base address */
  71. #define W83781D_ADDR_REG_OFFSET 5
  72. #define W83781D_DATA_REG_OFFSET 6
  73. /* The device registers */
  74. /* in nr from 0 to 8 */
  75. #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
  76. (0x554 + (((nr) - 7) * 2)))
  77. #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
  78. (0x555 + (((nr) - 7) * 2)))
  79. #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
  80. (0x550 + (nr) - 7))
  81. /* fan nr from 0 to 2 */
  82. #define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))
  83. #define W83781D_REG_FAN(nr) (0x28 + (nr))
  84. #define W83781D_REG_BANK 0x4E
  85. #define W83781D_REG_TEMP2_CONFIG 0x152
  86. #define W83781D_REG_TEMP3_CONFIG 0x252
  87. /* temp nr from 1 to 3 */
  88. #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
  89. ((nr == 2) ? (0x0150) : \
  90. (0x27)))
  91. #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
  92. ((nr == 2) ? (0x153) : \
  93. (0x3A)))
  94. #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
  95. ((nr == 2) ? (0x155) : \
  96. (0x39)))
  97. #define W83781D_REG_CONFIG 0x40
  98. /* Interrupt status (W83781D, AS99127F) */
  99. #define W83781D_REG_ALARM1 0x41
  100. #define W83781D_REG_ALARM2 0x42
  101. /* Real-time status (W83782D, W83783S) */
  102. #define W83782D_REG_ALARM1 0x459
  103. #define W83782D_REG_ALARM2 0x45A
  104. #define W83782D_REG_ALARM3 0x45B
  105. #define W83781D_REG_BEEP_CONFIG 0x4D
  106. #define W83781D_REG_BEEP_INTS1 0x56
  107. #define W83781D_REG_BEEP_INTS2 0x57
  108. #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
  109. #define W83781D_REG_VID_FANDIV 0x47
  110. #define W83781D_REG_CHIPID 0x49
  111. #define W83781D_REG_WCHIPID 0x58
  112. #define W83781D_REG_CHIPMAN 0x4F
  113. #define W83781D_REG_PIN 0x4B
  114. /* 782D/783S only */
  115. #define W83781D_REG_VBAT 0x5D
  116. /* PWM 782D (1-4) and 783S (1-2) only */
  117. static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
  118. #define W83781D_REG_PWMCLK12 0x5C
  119. #define W83781D_REG_PWMCLK34 0x45C
  120. #define W83781D_REG_I2C_ADDR 0x48
  121. #define W83781D_REG_I2C_SUBADDR 0x4A
  122. /*
  123. * The following are undocumented in the data sheets however we
  124. * received the information in an email from Winbond tech support
  125. */
  126. /* Sensor selection - not on 781d */
  127. #define W83781D_REG_SCFG1 0x5D
  128. static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
  129. #define W83781D_REG_SCFG2 0x59
  130. static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
  131. #define W83781D_DEFAULT_BETA 3435
  132. /* Conversions */
  133. #define IN_TO_REG(val) clamp_val(((val) + 8) / 16, 0, 255)
  134. #define IN_FROM_REG(val) ((val) * 16)
  135. static inline u8
  136. FAN_TO_REG(long rpm, int div)
  137. {
  138. if (rpm == 0)
  139. return 255;
  140. rpm = clamp_val(rpm, 1, 1000000);
  141. return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
  142. }
  143. static inline long
  144. FAN_FROM_REG(u8 val, int div)
  145. {
  146. if (val == 0)
  147. return -1;
  148. if (val == 255)
  149. return 0;
  150. return 1350000 / (val * div);
  151. }
  152. #define TEMP_TO_REG(val) clamp_val((val) / 1000, -127, 128)
  153. #define TEMP_FROM_REG(val) ((val) * 1000)
  154. #define BEEP_MASK_FROM_REG(val, type) ((type) == as99127f ? \
  155. (~(val)) & 0x7fff : (val) & 0xff7fff)
  156. #define BEEP_MASK_TO_REG(val, type) ((type) == as99127f ? \
  157. (~(val)) & 0x7fff : (val) & 0xff7fff)
  158. #define DIV_FROM_REG(val) (1 << (val))
  159. static inline u8
  160. DIV_TO_REG(long val, enum chips type)
  161. {
  162. int i;
  163. val = clamp_val(val, 1,
  164. ((type == w83781d || type == as99127f) ? 8 : 128)) >> 1;
  165. for (i = 0; i < 7; i++) {
  166. if (val == 0)
  167. break;
  168. val >>= 1;
  169. }
  170. return i;
  171. }
  172. struct w83781d_data {
  173. struct i2c_client *client;
  174. struct device *hwmon_dev;
  175. struct mutex lock;
  176. enum chips type;
  177. /* For ISA device only */
  178. const char *name;
  179. int isa_addr;
  180. struct mutex update_lock;
  181. char valid; /* !=0 if following fields are valid */
  182. unsigned long last_updated; /* In jiffies */
  183. struct i2c_client *lm75[2]; /* for secondary I2C addresses */
  184. /* array of 2 pointers to subclients */
  185. u8 in[9]; /* Register value - 8 & 9 for 782D only */
  186. u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
  187. u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
  188. u8 fan[3]; /* Register value */
  189. u8 fan_min[3]; /* Register value */
  190. s8 temp; /* Register value */
  191. s8 temp_max; /* Register value */
  192. s8 temp_max_hyst; /* Register value */
  193. u16 temp_add[2]; /* Register value */
  194. u16 temp_max_add[2]; /* Register value */
  195. u16 temp_max_hyst_add[2]; /* Register value */
  196. u8 fan_div[3]; /* Register encoding, shifted right */
  197. u8 vid; /* Register encoding, combined */
  198. u32 alarms; /* Register encoding, combined */
  199. u32 beep_mask; /* Register encoding, combined */
  200. u8 pwm[4]; /* Register value */
  201. u8 pwm2_enable; /* Boolean */
  202. u16 sens[3]; /*
  203. * 782D/783S only.
  204. * 1 = pentium diode; 2 = 3904 diode;
  205. * 4 = thermistor
  206. */
  207. u8 vrm;
  208. };
  209. static struct w83781d_data *w83781d_data_if_isa(void);
  210. static int w83781d_alias_detect(struct i2c_client *client, u8 chipid);
  211. static int w83781d_read_value(struct w83781d_data *data, u16 reg);
  212. static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
  213. static struct w83781d_data *w83781d_update_device(struct device *dev);
  214. static void w83781d_init_device(struct device *dev);
  215. /* following are the sysfs callback functions */
  216. #define show_in_reg(reg) \
  217. static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
  218. char *buf) \
  219. { \
  220. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  221. struct w83781d_data *data = w83781d_update_device(dev); \
  222. return sprintf(buf, "%ld\n", \
  223. (long)IN_FROM_REG(data->reg[attr->index])); \
  224. }
  225. show_in_reg(in);
  226. show_in_reg(in_min);
  227. show_in_reg(in_max);
  228. #define store_in_reg(REG, reg) \
  229. static ssize_t store_in_##reg(struct device *dev, struct device_attribute \
  230. *da, const char *buf, size_t count) \
  231. { \
  232. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  233. struct w83781d_data *data = dev_get_drvdata(dev); \
  234. int nr = attr->index; \
  235. unsigned long val; \
  236. int err = kstrtoul(buf, 10, &val); \
  237. if (err) \
  238. return err; \
  239. mutex_lock(&data->update_lock); \
  240. data->in_##reg[nr] = IN_TO_REG(val); \
  241. w83781d_write_value(data, W83781D_REG_IN_##REG(nr), \
  242. data->in_##reg[nr]); \
  243. \
  244. mutex_unlock(&data->update_lock); \
  245. return count; \
  246. }
  247. store_in_reg(MIN, min);
  248. store_in_reg(MAX, max);
  249. #define sysfs_in_offsets(offset) \
  250. static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
  251. show_in, NULL, offset); \
  252. static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
  253. show_in_min, store_in_min, offset); \
  254. static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
  255. show_in_max, store_in_max, offset)
  256. sysfs_in_offsets(0);
  257. sysfs_in_offsets(1);
  258. sysfs_in_offsets(2);
  259. sysfs_in_offsets(3);
  260. sysfs_in_offsets(4);
  261. sysfs_in_offsets(5);
  262. sysfs_in_offsets(6);
  263. sysfs_in_offsets(7);
  264. sysfs_in_offsets(8);
  265. #define show_fan_reg(reg) \
  266. static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
  267. char *buf) \
  268. { \
  269. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  270. struct w83781d_data *data = w83781d_update_device(dev); \
  271. return sprintf(buf, "%ld\n", \
  272. FAN_FROM_REG(data->reg[attr->index], \
  273. DIV_FROM_REG(data->fan_div[attr->index]))); \
  274. }
  275. show_fan_reg(fan);
  276. show_fan_reg(fan_min);
  277. static ssize_t
  278. store_fan_min(struct device *dev, struct device_attribute *da,
  279. const char *buf, size_t count)
  280. {
  281. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  282. struct w83781d_data *data = dev_get_drvdata(dev);
  283. int nr = attr->index;
  284. unsigned long val;
  285. int err;
  286. err = kstrtoul(buf, 10, &val);
  287. if (err)
  288. return err;
  289. mutex_lock(&data->update_lock);
  290. data->fan_min[nr] =
  291. FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
  292. w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
  293. data->fan_min[nr]);
  294. mutex_unlock(&data->update_lock);
  295. return count;
  296. }
  297. static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
  298. static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
  299. show_fan_min, store_fan_min, 0);
  300. static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
  301. static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
  302. show_fan_min, store_fan_min, 1);
  303. static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
  304. static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
  305. show_fan_min, store_fan_min, 2);
  306. #define show_temp_reg(reg) \
  307. static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
  308. char *buf) \
  309. { \
  310. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  311. struct w83781d_data *data = w83781d_update_device(dev); \
  312. int nr = attr->index; \
  313. if (nr >= 2) { /* TEMP2 and TEMP3 */ \
  314. return sprintf(buf, "%d\n", \
  315. LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
  316. } else { /* TEMP1 */ \
  317. return sprintf(buf, "%ld\n", (long)TEMP_FROM_REG(data->reg)); \
  318. } \
  319. }
  320. show_temp_reg(temp);
  321. show_temp_reg(temp_max);
  322. show_temp_reg(temp_max_hyst);
  323. #define store_temp_reg(REG, reg) \
  324. static ssize_t store_temp_##reg(struct device *dev, \
  325. struct device_attribute *da, const char *buf, size_t count) \
  326. { \
  327. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  328. struct w83781d_data *data = dev_get_drvdata(dev); \
  329. int nr = attr->index; \
  330. long val; \
  331. int err = kstrtol(buf, 10, &val); \
  332. if (err) \
  333. return err; \
  334. mutex_lock(&data->update_lock); \
  335. \
  336. if (nr >= 2) { /* TEMP2 and TEMP3 */ \
  337. data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
  338. w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
  339. data->temp_##reg##_add[nr-2]); \
  340. } else { /* TEMP1 */ \
  341. data->temp_##reg = TEMP_TO_REG(val); \
  342. w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
  343. data->temp_##reg); \
  344. } \
  345. \
  346. mutex_unlock(&data->update_lock); \
  347. return count; \
  348. }
  349. store_temp_reg(OVER, max);
  350. store_temp_reg(HYST, max_hyst);
  351. #define sysfs_temp_offsets(offset) \
  352. static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
  353. show_temp, NULL, offset); \
  354. static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
  355. show_temp_max, store_temp_max, offset); \
  356. static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
  357. show_temp_max_hyst, store_temp_max_hyst, offset);
  358. sysfs_temp_offsets(1);
  359. sysfs_temp_offsets(2);
  360. sysfs_temp_offsets(3);
  361. static ssize_t
  362. show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
  363. {
  364. struct w83781d_data *data = w83781d_update_device(dev);
  365. return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
  366. }
  367. static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
  368. static ssize_t
  369. show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
  370. {
  371. struct w83781d_data *data = dev_get_drvdata(dev);
  372. return sprintf(buf, "%ld\n", (long) data->vrm);
  373. }
  374. static ssize_t
  375. store_vrm_reg(struct device *dev, struct device_attribute *attr,
  376. const char *buf, size_t count)
  377. {
  378. struct w83781d_data *data = dev_get_drvdata(dev);
  379. unsigned long val;
  380. int err;
  381. err = kstrtoul(buf, 10, &val);
  382. if (err)
  383. return err;
  384. data->vrm = clamp_val(val, 0, 255);
  385. return count;
  386. }
  387. static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
  388. static ssize_t
  389. show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
  390. {
  391. struct w83781d_data *data = w83781d_update_device(dev);
  392. return sprintf(buf, "%u\n", data->alarms);
  393. }
  394. static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
  395. static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
  396. char *buf)
  397. {
  398. struct w83781d_data *data = w83781d_update_device(dev);
  399. int bitnr = to_sensor_dev_attr(attr)->index;
  400. return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
  401. }
  402. /* The W83781D has a single alarm bit for temp2 and temp3 */
  403. static ssize_t show_temp3_alarm(struct device *dev,
  404. struct device_attribute *attr, char *buf)
  405. {
  406. struct w83781d_data *data = w83781d_update_device(dev);
  407. int bitnr = (data->type == w83781d) ? 5 : 13;
  408. return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
  409. }
  410. static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
  411. static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
  412. static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
  413. static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
  414. static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
  415. static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
  416. static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
  417. static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
  418. static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
  419. static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
  420. static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
  421. static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
  422. static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
  423. static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
  424. static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
  425. static ssize_t show_beep_mask(struct device *dev,
  426. struct device_attribute *attr, char *buf)
  427. {
  428. struct w83781d_data *data = w83781d_update_device(dev);
  429. return sprintf(buf, "%ld\n",
  430. (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
  431. }
  432. static ssize_t
  433. store_beep_mask(struct device *dev, struct device_attribute *attr,
  434. const char *buf, size_t count)
  435. {
  436. struct w83781d_data *data = dev_get_drvdata(dev);
  437. unsigned long val;
  438. int err;
  439. err = kstrtoul(buf, 10, &val);
  440. if (err)
  441. return err;
  442. mutex_lock(&data->update_lock);
  443. data->beep_mask &= 0x8000; /* preserve beep enable */
  444. data->beep_mask |= BEEP_MASK_TO_REG(val, data->type);
  445. w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
  446. data->beep_mask & 0xff);
  447. w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
  448. (data->beep_mask >> 8) & 0xff);
  449. if (data->type != w83781d && data->type != as99127f) {
  450. w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
  451. ((data->beep_mask) >> 16) & 0xff);
  452. }
  453. mutex_unlock(&data->update_lock);
  454. return count;
  455. }
  456. static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
  457. show_beep_mask, store_beep_mask);
  458. static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
  459. char *buf)
  460. {
  461. struct w83781d_data *data = w83781d_update_device(dev);
  462. int bitnr = to_sensor_dev_attr(attr)->index;
  463. return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
  464. }
  465. static ssize_t
  466. store_beep(struct device *dev, struct device_attribute *attr,
  467. const char *buf, size_t count)
  468. {
  469. struct w83781d_data *data = dev_get_drvdata(dev);
  470. int bitnr = to_sensor_dev_attr(attr)->index;
  471. u8 reg;
  472. unsigned long bit;
  473. int err;
  474. err = kstrtoul(buf, 10, &bit);
  475. if (err)
  476. return err;
  477. if (bit & ~1)
  478. return -EINVAL;
  479. mutex_lock(&data->update_lock);
  480. if (bit)
  481. data->beep_mask |= (1 << bitnr);
  482. else
  483. data->beep_mask &= ~(1 << bitnr);
  484. if (bitnr < 8) {
  485. reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
  486. if (bit)
  487. reg |= (1 << bitnr);
  488. else
  489. reg &= ~(1 << bitnr);
  490. w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
  491. } else if (bitnr < 16) {
  492. reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
  493. if (bit)
  494. reg |= (1 << (bitnr - 8));
  495. else
  496. reg &= ~(1 << (bitnr - 8));
  497. w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
  498. } else {
  499. reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
  500. if (bit)
  501. reg |= (1 << (bitnr - 16));
  502. else
  503. reg &= ~(1 << (bitnr - 16));
  504. w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
  505. }
  506. mutex_unlock(&data->update_lock);
  507. return count;
  508. }
  509. /* The W83781D has a single beep bit for temp2 and temp3 */
  510. static ssize_t show_temp3_beep(struct device *dev,
  511. struct device_attribute *attr, char *buf)
  512. {
  513. struct w83781d_data *data = w83781d_update_device(dev);
  514. int bitnr = (data->type == w83781d) ? 5 : 13;
  515. return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
  516. }
  517. static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
  518. show_beep, store_beep, 0);
  519. static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
  520. show_beep, store_beep, 1);
  521. static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
  522. show_beep, store_beep, 2);
  523. static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
  524. show_beep, store_beep, 3);
  525. static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
  526. show_beep, store_beep, 8);
  527. static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
  528. show_beep, store_beep, 9);
  529. static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
  530. show_beep, store_beep, 10);
  531. static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
  532. show_beep, store_beep, 16);
  533. static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
  534. show_beep, store_beep, 17);
  535. static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
  536. show_beep, store_beep, 6);
  537. static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
  538. show_beep, store_beep, 7);
  539. static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
  540. show_beep, store_beep, 11);
  541. static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
  542. show_beep, store_beep, 4);
  543. static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
  544. show_beep, store_beep, 5);
  545. static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
  546. show_temp3_beep, store_beep, 13);
  547. static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
  548. show_beep, store_beep, 15);
  549. static ssize_t
  550. show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
  551. {
  552. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  553. struct w83781d_data *data = w83781d_update_device(dev);
  554. return sprintf(buf, "%ld\n",
  555. (long) DIV_FROM_REG(data->fan_div[attr->index]));
  556. }
  557. /*
  558. * Note: we save and restore the fan minimum here, because its value is
  559. * determined in part by the fan divisor. This follows the principle of
  560. * least surprise; the user doesn't expect the fan minimum to change just
  561. * because the divisor changed.
  562. */
  563. static ssize_t
  564. store_fan_div(struct device *dev, struct device_attribute *da,
  565. const char *buf, size_t count)
  566. {
  567. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  568. struct w83781d_data *data = dev_get_drvdata(dev);
  569. unsigned long min;
  570. int nr = attr->index;
  571. u8 reg;
  572. unsigned long val;
  573. int err;
  574. err = kstrtoul(buf, 10, &val);
  575. if (err)
  576. return err;
  577. mutex_lock(&data->update_lock);
  578. /* Save fan_min */
  579. min = FAN_FROM_REG(data->fan_min[nr],
  580. DIV_FROM_REG(data->fan_div[nr]));
  581. data->fan_div[nr] = DIV_TO_REG(val, data->type);
  582. reg = (w83781d_read_value(data, nr == 2 ?
  583. W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
  584. & (nr == 0 ? 0xcf : 0x3f))
  585. | ((data->fan_div[nr] & 0x03) << (nr == 0 ? 4 : 6));
  586. w83781d_write_value(data, nr == 2 ?
  587. W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
  588. /* w83781d and as99127f don't have extended divisor bits */
  589. if (data->type != w83781d && data->type != as99127f) {
  590. reg = (w83781d_read_value(data, W83781D_REG_VBAT)
  591. & ~(1 << (5 + nr)))
  592. | ((data->fan_div[nr] & 0x04) << (3 + nr));
  593. w83781d_write_value(data, W83781D_REG_VBAT, reg);
  594. }
  595. /* Restore fan_min */
  596. data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
  597. w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
  598. mutex_unlock(&data->update_lock);
  599. return count;
  600. }
  601. static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
  602. show_fan_div, store_fan_div, 0);
  603. static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
  604. show_fan_div, store_fan_div, 1);
  605. static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
  606. show_fan_div, store_fan_div, 2);
  607. static ssize_t
  608. show_pwm(struct device *dev, struct device_attribute *da, char *buf)
  609. {
  610. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  611. struct w83781d_data *data = w83781d_update_device(dev);
  612. return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
  613. }
  614. static ssize_t
  615. show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf)
  616. {
  617. struct w83781d_data *data = w83781d_update_device(dev);
  618. return sprintf(buf, "%d\n", (int)data->pwm2_enable);
  619. }
  620. static ssize_t
  621. store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
  622. size_t count)
  623. {
  624. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  625. struct w83781d_data *data = dev_get_drvdata(dev);
  626. int nr = attr->index;
  627. unsigned long val;
  628. int err;
  629. err = kstrtoul(buf, 10, &val);
  630. if (err)
  631. return err;
  632. mutex_lock(&data->update_lock);
  633. data->pwm[nr] = clamp_val(val, 0, 255);
  634. w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
  635. mutex_unlock(&data->update_lock);
  636. return count;
  637. }
  638. static ssize_t
  639. store_pwm2_enable(struct device *dev, struct device_attribute *da,
  640. const char *buf, size_t count)
  641. {
  642. struct w83781d_data *data = dev_get_drvdata(dev);
  643. unsigned long val;
  644. u32 reg;
  645. int err;
  646. err = kstrtoul(buf, 10, &val);
  647. if (err)
  648. return err;
  649. mutex_lock(&data->update_lock);
  650. switch (val) {
  651. case 0:
  652. case 1:
  653. reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
  654. w83781d_write_value(data, W83781D_REG_PWMCLK12,
  655. (reg & 0xf7) | (val << 3));
  656. reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
  657. w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
  658. (reg & 0xef) | (!val << 4));
  659. data->pwm2_enable = val;
  660. break;
  661. default:
  662. mutex_unlock(&data->update_lock);
  663. return -EINVAL;
  664. }
  665. mutex_unlock(&data->update_lock);
  666. return count;
  667. }
  668. static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
  669. static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
  670. static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
  671. static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
  672. /* only PWM2 can be enabled/disabled */
  673. static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
  674. show_pwm2_enable, store_pwm2_enable);
  675. static ssize_t
  676. show_sensor(struct device *dev, struct device_attribute *da, char *buf)
  677. {
  678. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  679. struct w83781d_data *data = w83781d_update_device(dev);
  680. return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
  681. }
  682. static ssize_t
  683. store_sensor(struct device *dev, struct device_attribute *da,
  684. const char *buf, size_t count)
  685. {
  686. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  687. struct w83781d_data *data = dev_get_drvdata(dev);
  688. int nr = attr->index;
  689. unsigned long val;
  690. u32 tmp;
  691. int err;
  692. err = kstrtoul(buf, 10, &val);
  693. if (err)
  694. return err;
  695. mutex_lock(&data->update_lock);
  696. switch (val) {
  697. case 1: /* PII/Celeron diode */
  698. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  699. w83781d_write_value(data, W83781D_REG_SCFG1,
  700. tmp | BIT_SCFG1[nr]);
  701. tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
  702. w83781d_write_value(data, W83781D_REG_SCFG2,
  703. tmp | BIT_SCFG2[nr]);
  704. data->sens[nr] = val;
  705. break;
  706. case 2: /* 3904 */
  707. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  708. w83781d_write_value(data, W83781D_REG_SCFG1,
  709. tmp | BIT_SCFG1[nr]);
  710. tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
  711. w83781d_write_value(data, W83781D_REG_SCFG2,
  712. tmp & ~BIT_SCFG2[nr]);
  713. data->sens[nr] = val;
  714. break;
  715. case W83781D_DEFAULT_BETA:
  716. dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
  717. "instead\n", W83781D_DEFAULT_BETA);
  718. /* fall through */
  719. case 4: /* thermistor */
  720. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  721. w83781d_write_value(data, W83781D_REG_SCFG1,
  722. tmp & ~BIT_SCFG1[nr]);
  723. data->sens[nr] = val;
  724. break;
  725. default:
  726. dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
  727. (long) val);
  728. break;
  729. }
  730. mutex_unlock(&data->update_lock);
  731. return count;
  732. }
  733. static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
  734. show_sensor, store_sensor, 0);
  735. static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
  736. show_sensor, store_sensor, 1);
  737. static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
  738. show_sensor, store_sensor, 2);
  739. /*
  740. * Assumes that adapter is of I2C, not ISA variety.
  741. * OTHERWISE DON'T CALL THIS
  742. */
  743. static int
  744. w83781d_detect_subclients(struct i2c_client *new_client)
  745. {
  746. int i, val1 = 0, id;
  747. int err;
  748. int address = new_client->addr;
  749. unsigned short sc_addr[2];
  750. struct i2c_adapter *adapter = new_client->adapter;
  751. struct w83781d_data *data = i2c_get_clientdata(new_client);
  752. enum chips kind = data->type;
  753. int num_sc = 1;
  754. id = i2c_adapter_id(adapter);
  755. if (force_subclients[0] == id && force_subclients[1] == address) {
  756. for (i = 2; i <= 3; i++) {
  757. if (force_subclients[i] < 0x48 ||
  758. force_subclients[i] > 0x4f) {
  759. dev_err(&new_client->dev, "Invalid subclient "
  760. "address %d; must be 0x48-0x4f\n",
  761. force_subclients[i]);
  762. err = -EINVAL;
  763. goto ERROR_SC_1;
  764. }
  765. }
  766. w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
  767. (force_subclients[2] & 0x07) |
  768. ((force_subclients[3] & 0x07) << 4));
  769. sc_addr[0] = force_subclients[2];
  770. } else {
  771. val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
  772. sc_addr[0] = 0x48 + (val1 & 0x07);
  773. }
  774. if (kind != w83783s) {
  775. num_sc = 2;
  776. if (force_subclients[0] == id &&
  777. force_subclients[1] == address) {
  778. sc_addr[1] = force_subclients[3];
  779. } else {
  780. sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07);
  781. }
  782. if (sc_addr[0] == sc_addr[1]) {
  783. dev_err(&new_client->dev,
  784. "Duplicate addresses 0x%x for subclients.\n",
  785. sc_addr[0]);
  786. err = -EBUSY;
  787. goto ERROR_SC_2;
  788. }
  789. }
  790. for (i = 0; i < num_sc; i++) {
  791. data->lm75[i] = i2c_new_dummy(adapter, sc_addr[i]);
  792. if (!data->lm75[i]) {
  793. dev_err(&new_client->dev, "Subclient %d "
  794. "registration at address 0x%x "
  795. "failed.\n", i, sc_addr[i]);
  796. err = -ENOMEM;
  797. if (i == 1)
  798. goto ERROR_SC_3;
  799. goto ERROR_SC_2;
  800. }
  801. }
  802. return 0;
  803. /* Undo inits in case of errors */
  804. ERROR_SC_3:
  805. i2c_unregister_device(data->lm75[0]);
  806. ERROR_SC_2:
  807. ERROR_SC_1:
  808. return err;
  809. }
  810. #define IN_UNIT_ATTRS(X) \
  811. &sensor_dev_attr_in##X##_input.dev_attr.attr, \
  812. &sensor_dev_attr_in##X##_min.dev_attr.attr, \
  813. &sensor_dev_attr_in##X##_max.dev_attr.attr, \
  814. &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \
  815. &sensor_dev_attr_in##X##_beep.dev_attr.attr
  816. #define FAN_UNIT_ATTRS(X) \
  817. &sensor_dev_attr_fan##X##_input.dev_attr.attr, \
  818. &sensor_dev_attr_fan##X##_min.dev_attr.attr, \
  819. &sensor_dev_attr_fan##X##_div.dev_attr.attr, \
  820. &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \
  821. &sensor_dev_attr_fan##X##_beep.dev_attr.attr
  822. #define TEMP_UNIT_ATTRS(X) \
  823. &sensor_dev_attr_temp##X##_input.dev_attr.attr, \
  824. &sensor_dev_attr_temp##X##_max.dev_attr.attr, \
  825. &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \
  826. &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \
  827. &sensor_dev_attr_temp##X##_beep.dev_attr.attr
  828. static struct attribute *w83781d_attributes[] = {
  829. IN_UNIT_ATTRS(0),
  830. IN_UNIT_ATTRS(2),
  831. IN_UNIT_ATTRS(3),
  832. IN_UNIT_ATTRS(4),
  833. IN_UNIT_ATTRS(5),
  834. IN_UNIT_ATTRS(6),
  835. FAN_UNIT_ATTRS(1),
  836. FAN_UNIT_ATTRS(2),
  837. FAN_UNIT_ATTRS(3),
  838. TEMP_UNIT_ATTRS(1),
  839. TEMP_UNIT_ATTRS(2),
  840. &dev_attr_cpu0_vid.attr,
  841. &dev_attr_vrm.attr,
  842. &dev_attr_alarms.attr,
  843. &dev_attr_beep_mask.attr,
  844. &sensor_dev_attr_beep_enable.dev_attr.attr,
  845. NULL
  846. };
  847. static const struct attribute_group w83781d_group = {
  848. .attrs = w83781d_attributes,
  849. };
  850. static struct attribute *w83781d_attributes_in1[] = {
  851. IN_UNIT_ATTRS(1),
  852. NULL
  853. };
  854. static const struct attribute_group w83781d_group_in1 = {
  855. .attrs = w83781d_attributes_in1,
  856. };
  857. static struct attribute *w83781d_attributes_in78[] = {
  858. IN_UNIT_ATTRS(7),
  859. IN_UNIT_ATTRS(8),
  860. NULL
  861. };
  862. static const struct attribute_group w83781d_group_in78 = {
  863. .attrs = w83781d_attributes_in78,
  864. };
  865. static struct attribute *w83781d_attributes_temp3[] = {
  866. TEMP_UNIT_ATTRS(3),
  867. NULL
  868. };
  869. static const struct attribute_group w83781d_group_temp3 = {
  870. .attrs = w83781d_attributes_temp3,
  871. };
  872. static struct attribute *w83781d_attributes_pwm12[] = {
  873. &sensor_dev_attr_pwm1.dev_attr.attr,
  874. &sensor_dev_attr_pwm2.dev_attr.attr,
  875. &dev_attr_pwm2_enable.attr,
  876. NULL
  877. };
  878. static const struct attribute_group w83781d_group_pwm12 = {
  879. .attrs = w83781d_attributes_pwm12,
  880. };
  881. static struct attribute *w83781d_attributes_pwm34[] = {
  882. &sensor_dev_attr_pwm3.dev_attr.attr,
  883. &sensor_dev_attr_pwm4.dev_attr.attr,
  884. NULL
  885. };
  886. static const struct attribute_group w83781d_group_pwm34 = {
  887. .attrs = w83781d_attributes_pwm34,
  888. };
  889. static struct attribute *w83781d_attributes_other[] = {
  890. &sensor_dev_attr_temp1_type.dev_attr.attr,
  891. &sensor_dev_attr_temp2_type.dev_attr.attr,
  892. &sensor_dev_attr_temp3_type.dev_attr.attr,
  893. NULL
  894. };
  895. static const struct attribute_group w83781d_group_other = {
  896. .attrs = w83781d_attributes_other,
  897. };
  898. /* No clean up is done on error, it's up to the caller */
  899. static int
  900. w83781d_create_files(struct device *dev, int kind, int is_isa)
  901. {
  902. int err;
  903. err = sysfs_create_group(&dev->kobj, &w83781d_group);
  904. if (err)
  905. return err;
  906. if (kind != w83783s) {
  907. err = sysfs_create_group(&dev->kobj, &w83781d_group_in1);
  908. if (err)
  909. return err;
  910. }
  911. if (kind != as99127f && kind != w83781d && kind != w83783s) {
  912. err = sysfs_create_group(&dev->kobj, &w83781d_group_in78);
  913. if (err)
  914. return err;
  915. }
  916. if (kind != w83783s) {
  917. err = sysfs_create_group(&dev->kobj, &w83781d_group_temp3);
  918. if (err)
  919. return err;
  920. if (kind != w83781d) {
  921. err = sysfs_chmod_file(&dev->kobj,
  922. &sensor_dev_attr_temp3_alarm.dev_attr.attr,
  923. S_IRUGO | S_IWUSR);
  924. if (err)
  925. return err;
  926. }
  927. }
  928. if (kind != w83781d && kind != as99127f) {
  929. err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm12);
  930. if (err)
  931. return err;
  932. }
  933. if (kind == w83782d && !is_isa) {
  934. err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm34);
  935. if (err)
  936. return err;
  937. }
  938. if (kind != as99127f && kind != w83781d) {
  939. err = device_create_file(dev,
  940. &sensor_dev_attr_temp1_type.dev_attr);
  941. if (err)
  942. return err;
  943. err = device_create_file(dev,
  944. &sensor_dev_attr_temp2_type.dev_attr);
  945. if (err)
  946. return err;
  947. if (kind != w83783s) {
  948. err = device_create_file(dev,
  949. &sensor_dev_attr_temp3_type.dev_attr);
  950. if (err)
  951. return err;
  952. }
  953. }
  954. return 0;
  955. }
  956. /* Return 0 if detection is successful, -ENODEV otherwise */
  957. static int
  958. w83781d_detect(struct i2c_client *client, struct i2c_board_info *info)
  959. {
  960. int val1, val2;
  961. struct w83781d_data *isa = w83781d_data_if_isa();
  962. struct i2c_adapter *adapter = client->adapter;
  963. int address = client->addr;
  964. const char *client_name;
  965. enum vendor { winbond, asus } vendid;
  966. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  967. return -ENODEV;
  968. /*
  969. * We block updates of the ISA device to minimize the risk of
  970. * concurrent access to the same W83781D chip through different
  971. * interfaces.
  972. */
  973. if (isa)
  974. mutex_lock(&isa->update_lock);
  975. if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) {
  976. dev_dbg(&adapter->dev,
  977. "Detection of w83781d chip failed at step 3\n");
  978. goto err_nodev;
  979. }
  980. val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK);
  981. val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
  982. /* Check for Winbond or Asus ID if in bank 0 */
  983. if (!(val1 & 0x07) &&
  984. ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) ||
  985. ((val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) {
  986. dev_dbg(&adapter->dev,
  987. "Detection of w83781d chip failed at step 4\n");
  988. goto err_nodev;
  989. }
  990. /*
  991. * If Winbond SMBus, check address at 0x48.
  992. * Asus doesn't support, except for as99127f rev.2
  993. */
  994. if ((!(val1 & 0x80) && val2 == 0xa3) ||
  995. ((val1 & 0x80) && val2 == 0x5c)) {
  996. if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR)
  997. != address) {
  998. dev_dbg(&adapter->dev,
  999. "Detection of w83781d chip failed at step 5\n");
  1000. goto err_nodev;
  1001. }
  1002. }
  1003. /* Put it now into bank 0 and Vendor ID High Byte */
  1004. i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
  1005. (i2c_smbus_read_byte_data(client, W83781D_REG_BANK)
  1006. & 0x78) | 0x80);
  1007. /* Get the vendor ID */
  1008. val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
  1009. if (val2 == 0x5c)
  1010. vendid = winbond;
  1011. else if (val2 == 0x12)
  1012. vendid = asus;
  1013. else {
  1014. dev_dbg(&adapter->dev,
  1015. "w83781d chip vendor is neither Winbond nor Asus\n");
  1016. goto err_nodev;
  1017. }
  1018. /* Determine the chip type. */
  1019. val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID);
  1020. if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
  1021. client_name = "w83781d";
  1022. else if (val1 == 0x30 && vendid == winbond)
  1023. client_name = "w83782d";
  1024. else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
  1025. client_name = "w83783s";
  1026. else if (val1 == 0x31)
  1027. client_name = "as99127f";
  1028. else
  1029. goto err_nodev;
  1030. if (val1 <= 0x30 && w83781d_alias_detect(client, val1)) {
  1031. dev_dbg(&adapter->dev, "Device at 0x%02x appears to "
  1032. "be the same as ISA device\n", address);
  1033. goto err_nodev;
  1034. }
  1035. if (isa)
  1036. mutex_unlock(&isa->update_lock);
  1037. strlcpy(info->type, client_name, I2C_NAME_SIZE);
  1038. return 0;
  1039. err_nodev:
  1040. if (isa)
  1041. mutex_unlock(&isa->update_lock);
  1042. return -ENODEV;
  1043. }
  1044. static void w83781d_remove_files(struct device *dev)
  1045. {
  1046. sysfs_remove_group(&dev->kobj, &w83781d_group);
  1047. sysfs_remove_group(&dev->kobj, &w83781d_group_in1);
  1048. sysfs_remove_group(&dev->kobj, &w83781d_group_in78);
  1049. sysfs_remove_group(&dev->kobj, &w83781d_group_temp3);
  1050. sysfs_remove_group(&dev->kobj, &w83781d_group_pwm12);
  1051. sysfs_remove_group(&dev->kobj, &w83781d_group_pwm34);
  1052. sysfs_remove_group(&dev->kobj, &w83781d_group_other);
  1053. }
  1054. static int
  1055. w83781d_probe(struct i2c_client *client, const struct i2c_device_id *id)
  1056. {
  1057. struct device *dev = &client->dev;
  1058. struct w83781d_data *data;
  1059. int err;
  1060. data = devm_kzalloc(dev, sizeof(struct w83781d_data), GFP_KERNEL);
  1061. if (!data)
  1062. return -ENOMEM;
  1063. i2c_set_clientdata(client, data);
  1064. mutex_init(&data->lock);
  1065. mutex_init(&data->update_lock);
  1066. data->type = id->driver_data;
  1067. data->client = client;
  1068. /* attach secondary i2c lm75-like clients */
  1069. err = w83781d_detect_subclients(client);
  1070. if (err)
  1071. return err;
  1072. /* Initialize the chip */
  1073. w83781d_init_device(dev);
  1074. /* Register sysfs hooks */
  1075. err = w83781d_create_files(dev, data->type, 0);
  1076. if (err)
  1077. goto exit_remove_files;
  1078. data->hwmon_dev = hwmon_device_register(dev);
  1079. if (IS_ERR(data->hwmon_dev)) {
  1080. err = PTR_ERR(data->hwmon_dev);
  1081. goto exit_remove_files;
  1082. }
  1083. return 0;
  1084. exit_remove_files:
  1085. w83781d_remove_files(dev);
  1086. if (data->lm75[0])
  1087. i2c_unregister_device(data->lm75[0]);
  1088. if (data->lm75[1])
  1089. i2c_unregister_device(data->lm75[1]);
  1090. return err;
  1091. }
  1092. static int
  1093. w83781d_remove(struct i2c_client *client)
  1094. {
  1095. struct w83781d_data *data = i2c_get_clientdata(client);
  1096. struct device *dev = &client->dev;
  1097. hwmon_device_unregister(data->hwmon_dev);
  1098. w83781d_remove_files(dev);
  1099. if (data->lm75[0])
  1100. i2c_unregister_device(data->lm75[0]);
  1101. if (data->lm75[1])
  1102. i2c_unregister_device(data->lm75[1]);
  1103. return 0;
  1104. }
  1105. static int
  1106. w83781d_read_value_i2c(struct w83781d_data *data, u16 reg)
  1107. {
  1108. struct i2c_client *client = data->client;
  1109. int res, bank;
  1110. struct i2c_client *cl;
  1111. bank = (reg >> 8) & 0x0f;
  1112. if (bank > 2)
  1113. /* switch banks */
  1114. i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
  1115. bank);
  1116. if (bank == 0 || bank > 2) {
  1117. res = i2c_smbus_read_byte_data(client, reg & 0xff);
  1118. } else {
  1119. /* switch to subclient */
  1120. cl = data->lm75[bank - 1];
  1121. /* convert from ISA to LM75 I2C addresses */
  1122. switch (reg & 0xff) {
  1123. case 0x50: /* TEMP */
  1124. res = i2c_smbus_read_word_swapped(cl, 0);
  1125. break;
  1126. case 0x52: /* CONFIG */
  1127. res = i2c_smbus_read_byte_data(cl, 1);
  1128. break;
  1129. case 0x53: /* HYST */
  1130. res = i2c_smbus_read_word_swapped(cl, 2);
  1131. break;
  1132. case 0x55: /* OVER */
  1133. default:
  1134. res = i2c_smbus_read_word_swapped(cl, 3);
  1135. break;
  1136. }
  1137. }
  1138. if (bank > 2)
  1139. i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
  1140. return res;
  1141. }
  1142. static int
  1143. w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value)
  1144. {
  1145. struct i2c_client *client = data->client;
  1146. int bank;
  1147. struct i2c_client *cl;
  1148. bank = (reg >> 8) & 0x0f;
  1149. if (bank > 2)
  1150. /* switch banks */
  1151. i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
  1152. bank);
  1153. if (bank == 0 || bank > 2) {
  1154. i2c_smbus_write_byte_data(client, reg & 0xff,
  1155. value & 0xff);
  1156. } else {
  1157. /* switch to subclient */
  1158. cl = data->lm75[bank - 1];
  1159. /* convert from ISA to LM75 I2C addresses */
  1160. switch (reg & 0xff) {
  1161. case 0x52: /* CONFIG */
  1162. i2c_smbus_write_byte_data(cl, 1, value & 0xff);
  1163. break;
  1164. case 0x53: /* HYST */
  1165. i2c_smbus_write_word_swapped(cl, 2, value);
  1166. break;
  1167. case 0x55: /* OVER */
  1168. i2c_smbus_write_word_swapped(cl, 3, value);
  1169. break;
  1170. }
  1171. }
  1172. if (bank > 2)
  1173. i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
  1174. return 0;
  1175. }
  1176. static void
  1177. w83781d_init_device(struct device *dev)
  1178. {
  1179. struct w83781d_data *data = dev_get_drvdata(dev);
  1180. int i, p;
  1181. int type = data->type;
  1182. u8 tmp;
  1183. if (reset && type != as99127f) { /*
  1184. * this resets registers we don't have
  1185. * documentation for on the as99127f
  1186. */
  1187. /*
  1188. * Resetting the chip has been the default for a long time,
  1189. * but it causes the BIOS initializations (fan clock dividers,
  1190. * thermal sensor types...) to be lost, so it is now optional.
  1191. * It might even go away if nobody reports it as being useful,
  1192. * as I see very little reason why this would be needed at
  1193. * all.
  1194. */
  1195. dev_info(dev, "If reset=1 solved a problem you were "
  1196. "having, please report!\n");
  1197. /* save these registers */
  1198. i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
  1199. p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
  1200. /*
  1201. * Reset all except Watchdog values and last conversion values
  1202. * This sets fan-divs to 2, among others
  1203. */
  1204. w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
  1205. /*
  1206. * Restore the registers and disable power-on abnormal beep.
  1207. * This saves FAN 1/2/3 input/output values set by BIOS.
  1208. */
  1209. w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
  1210. w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
  1211. /*
  1212. * Disable master beep-enable (reset turns it on).
  1213. * Individual beep_mask should be reset to off but for some
  1214. * reason disabling this bit helps some people not get beeped
  1215. */
  1216. w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
  1217. }
  1218. /*
  1219. * Disable power-on abnormal beep, as advised by the datasheet.
  1220. * Already done if reset=1.
  1221. */
  1222. if (init && !reset && type != as99127f) {
  1223. i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
  1224. w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
  1225. }
  1226. data->vrm = vid_which_vrm();
  1227. if ((type != w83781d) && (type != as99127f)) {
  1228. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  1229. for (i = 1; i <= 3; i++) {
  1230. if (!(tmp & BIT_SCFG1[i - 1])) {
  1231. data->sens[i - 1] = 4;
  1232. } else {
  1233. if (w83781d_read_value
  1234. (data,
  1235. W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
  1236. data->sens[i - 1] = 1;
  1237. else
  1238. data->sens[i - 1] = 2;
  1239. }
  1240. if (type == w83783s && i == 2)
  1241. break;
  1242. }
  1243. }
  1244. if (init && type != as99127f) {
  1245. /* Enable temp2 */
  1246. tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
  1247. if (tmp & 0x01) {
  1248. dev_warn(dev, "Enabling temp2, readings "
  1249. "might not make sense\n");
  1250. w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
  1251. tmp & 0xfe);
  1252. }
  1253. /* Enable temp3 */
  1254. if (type != w83783s) {
  1255. tmp = w83781d_read_value(data,
  1256. W83781D_REG_TEMP3_CONFIG);
  1257. if (tmp & 0x01) {
  1258. dev_warn(dev, "Enabling temp3, "
  1259. "readings might not make sense\n");
  1260. w83781d_write_value(data,
  1261. W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
  1262. }
  1263. }
  1264. }
  1265. /* Start monitoring */
  1266. w83781d_write_value(data, W83781D_REG_CONFIG,
  1267. (w83781d_read_value(data,
  1268. W83781D_REG_CONFIG) & 0xf7)
  1269. | 0x01);
  1270. /* A few vars need to be filled upon startup */
  1271. for (i = 0; i < 3; i++) {
  1272. data->fan_min[i] = w83781d_read_value(data,
  1273. W83781D_REG_FAN_MIN(i));
  1274. }
  1275. mutex_init(&data->update_lock);
  1276. }
  1277. static struct w83781d_data *w83781d_update_device(struct device *dev)
  1278. {
  1279. struct w83781d_data *data = dev_get_drvdata(dev);
  1280. struct i2c_client *client = data->client;
  1281. int i;
  1282. mutex_lock(&data->update_lock);
  1283. if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
  1284. || !data->valid) {
  1285. dev_dbg(dev, "Starting device update\n");
  1286. for (i = 0; i <= 8; i++) {
  1287. if (data->type == w83783s && i == 1)
  1288. continue; /* 783S has no in1 */
  1289. data->in[i] =
  1290. w83781d_read_value(data, W83781D_REG_IN(i));
  1291. data->in_min[i] =
  1292. w83781d_read_value(data, W83781D_REG_IN_MIN(i));
  1293. data->in_max[i] =
  1294. w83781d_read_value(data, W83781D_REG_IN_MAX(i));
  1295. if ((data->type != w83782d) && (i == 6))
  1296. break;
  1297. }
  1298. for (i = 0; i < 3; i++) {
  1299. data->fan[i] =
  1300. w83781d_read_value(data, W83781D_REG_FAN(i));
  1301. data->fan_min[i] =
  1302. w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
  1303. }
  1304. if (data->type != w83781d && data->type != as99127f) {
  1305. for (i = 0; i < 4; i++) {
  1306. data->pwm[i] =
  1307. w83781d_read_value(data,
  1308. W83781D_REG_PWM[i]);
  1309. /* Only W83782D on SMBus has PWM3 and PWM4 */
  1310. if ((data->type != w83782d || !client)
  1311. && i == 1)
  1312. break;
  1313. }
  1314. /* Only PWM2 can be disabled */
  1315. data->pwm2_enable = (w83781d_read_value(data,
  1316. W83781D_REG_PWMCLK12) & 0x08) >> 3;
  1317. }
  1318. data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
  1319. data->temp_max =
  1320. w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
  1321. data->temp_max_hyst =
  1322. w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
  1323. data->temp_add[0] =
  1324. w83781d_read_value(data, W83781D_REG_TEMP(2));
  1325. data->temp_max_add[0] =
  1326. w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
  1327. data->temp_max_hyst_add[0] =
  1328. w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
  1329. if (data->type != w83783s) {
  1330. data->temp_add[1] =
  1331. w83781d_read_value(data, W83781D_REG_TEMP(3));
  1332. data->temp_max_add[1] =
  1333. w83781d_read_value(data,
  1334. W83781D_REG_TEMP_OVER(3));
  1335. data->temp_max_hyst_add[1] =
  1336. w83781d_read_value(data,
  1337. W83781D_REG_TEMP_HYST(3));
  1338. }
  1339. i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
  1340. data->vid = i & 0x0f;
  1341. data->vid |= (w83781d_read_value(data,
  1342. W83781D_REG_CHIPID) & 0x01) << 4;
  1343. data->fan_div[0] = (i >> 4) & 0x03;
  1344. data->fan_div[1] = (i >> 6) & 0x03;
  1345. data->fan_div[2] = (w83781d_read_value(data,
  1346. W83781D_REG_PIN) >> 6) & 0x03;
  1347. if ((data->type != w83781d) && (data->type != as99127f)) {
  1348. i = w83781d_read_value(data, W83781D_REG_VBAT);
  1349. data->fan_div[0] |= (i >> 3) & 0x04;
  1350. data->fan_div[1] |= (i >> 4) & 0x04;
  1351. data->fan_div[2] |= (i >> 5) & 0x04;
  1352. }
  1353. if (data->type == w83782d) {
  1354. data->alarms = w83781d_read_value(data,
  1355. W83782D_REG_ALARM1)
  1356. | (w83781d_read_value(data,
  1357. W83782D_REG_ALARM2) << 8)
  1358. | (w83781d_read_value(data,
  1359. W83782D_REG_ALARM3) << 16);
  1360. } else if (data->type == w83783s) {
  1361. data->alarms = w83781d_read_value(data,
  1362. W83782D_REG_ALARM1)
  1363. | (w83781d_read_value(data,
  1364. W83782D_REG_ALARM2) << 8);
  1365. } else {
  1366. /*
  1367. * No real-time status registers, fall back to
  1368. * interrupt status registers
  1369. */
  1370. data->alarms = w83781d_read_value(data,
  1371. W83781D_REG_ALARM1)
  1372. | (w83781d_read_value(data,
  1373. W83781D_REG_ALARM2) << 8);
  1374. }
  1375. i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
  1376. data->beep_mask = (i << 8) +
  1377. w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
  1378. if ((data->type != w83781d) && (data->type != as99127f)) {
  1379. data->beep_mask |=
  1380. w83781d_read_value(data,
  1381. W83781D_REG_BEEP_INTS3) << 16;
  1382. }
  1383. data->last_updated = jiffies;
  1384. data->valid = 1;
  1385. }
  1386. mutex_unlock(&data->update_lock);
  1387. return data;
  1388. }
  1389. static const struct i2c_device_id w83781d_ids[] = {
  1390. { "w83781d", w83781d, },
  1391. { "w83782d", w83782d, },
  1392. { "w83783s", w83783s, },
  1393. { "as99127f", as99127f },
  1394. { /* LIST END */ }
  1395. };
  1396. MODULE_DEVICE_TABLE(i2c, w83781d_ids);
  1397. static struct i2c_driver w83781d_driver = {
  1398. .class = I2C_CLASS_HWMON,
  1399. .driver = {
  1400. .name = "w83781d",
  1401. },
  1402. .probe = w83781d_probe,
  1403. .remove = w83781d_remove,
  1404. .id_table = w83781d_ids,
  1405. .detect = w83781d_detect,
  1406. .address_list = normal_i2c,
  1407. };
  1408. /*
  1409. * ISA related code
  1410. */
  1411. #ifdef CONFIG_ISA
  1412. /* ISA device, if found */
  1413. static struct platform_device *pdev;
  1414. static unsigned short isa_address = 0x290;
  1415. /*
  1416. * I2C devices get this name attribute automatically, but for ISA devices
  1417. * we must create it by ourselves.
  1418. */
  1419. static ssize_t
  1420. show_name(struct device *dev, struct device_attribute *devattr, char *buf)
  1421. {
  1422. struct w83781d_data *data = dev_get_drvdata(dev);
  1423. return sprintf(buf, "%s\n", data->name);
  1424. }
  1425. static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
  1426. static struct w83781d_data *w83781d_data_if_isa(void)
  1427. {
  1428. return pdev ? platform_get_drvdata(pdev) : NULL;
  1429. }
  1430. /* Returns 1 if the I2C chip appears to be an alias of the ISA chip */
  1431. static int w83781d_alias_detect(struct i2c_client *client, u8 chipid)
  1432. {
  1433. struct w83781d_data *isa;
  1434. int i;
  1435. if (!pdev) /* No ISA chip */
  1436. return 0;
  1437. isa = platform_get_drvdata(pdev);
  1438. if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr)
  1439. return 0; /* Address doesn't match */
  1440. if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid)
  1441. return 0; /* Chip type doesn't match */
  1442. /*
  1443. * We compare all the limit registers, the config register and the
  1444. * interrupt mask registers
  1445. */
  1446. for (i = 0x2b; i <= 0x3d; i++) {
  1447. if (w83781d_read_value(isa, i) !=
  1448. i2c_smbus_read_byte_data(client, i))
  1449. return 0;
  1450. }
  1451. if (w83781d_read_value(isa, W83781D_REG_CONFIG) !=
  1452. i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG))
  1453. return 0;
  1454. for (i = 0x43; i <= 0x46; i++) {
  1455. if (w83781d_read_value(isa, i) !=
  1456. i2c_smbus_read_byte_data(client, i))
  1457. return 0;
  1458. }
  1459. return 1;
  1460. }
  1461. static int
  1462. w83781d_read_value_isa(struct w83781d_data *data, u16 reg)
  1463. {
  1464. int word_sized, res;
  1465. word_sized = (((reg & 0xff00) == 0x100)
  1466. || ((reg & 0xff00) == 0x200))
  1467. && (((reg & 0x00ff) == 0x50)
  1468. || ((reg & 0x00ff) == 0x53)
  1469. || ((reg & 0x00ff) == 0x55));
  1470. if (reg & 0xff00) {
  1471. outb_p(W83781D_REG_BANK,
  1472. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1473. outb_p(reg >> 8,
  1474. data->isa_addr + W83781D_DATA_REG_OFFSET);
  1475. }
  1476. outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1477. res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET);
  1478. if (word_sized) {
  1479. outb_p((reg & 0xff) + 1,
  1480. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1481. res =
  1482. (res << 8) + inb_p(data->isa_addr +
  1483. W83781D_DATA_REG_OFFSET);
  1484. }
  1485. if (reg & 0xff00) {
  1486. outb_p(W83781D_REG_BANK,
  1487. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1488. outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
  1489. }
  1490. return res;
  1491. }
  1492. static void
  1493. w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value)
  1494. {
  1495. int word_sized;
  1496. word_sized = (((reg & 0xff00) == 0x100)
  1497. || ((reg & 0xff00) == 0x200))
  1498. && (((reg & 0x00ff) == 0x53)
  1499. || ((reg & 0x00ff) == 0x55));
  1500. if (reg & 0xff00) {
  1501. outb_p(W83781D_REG_BANK,
  1502. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1503. outb_p(reg >> 8,
  1504. data->isa_addr + W83781D_DATA_REG_OFFSET);
  1505. }
  1506. outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1507. if (word_sized) {
  1508. outb_p(value >> 8,
  1509. data->isa_addr + W83781D_DATA_REG_OFFSET);
  1510. outb_p((reg & 0xff) + 1,
  1511. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1512. }
  1513. outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET);
  1514. if (reg & 0xff00) {
  1515. outb_p(W83781D_REG_BANK,
  1516. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1517. outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
  1518. }
  1519. }
  1520. /*
  1521. * The SMBus locks itself, usually, but nothing may access the Winbond between
  1522. * bank switches. ISA access must always be locked explicitly!
  1523. * We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
  1524. * would slow down the W83781D access and should not be necessary.
  1525. * There are some ugly typecasts here, but the good news is - they should
  1526. * nowhere else be necessary!
  1527. */
  1528. static int
  1529. w83781d_read_value(struct w83781d_data *data, u16 reg)
  1530. {
  1531. struct i2c_client *client = data->client;
  1532. int res;
  1533. mutex_lock(&data->lock);
  1534. if (client)
  1535. res = w83781d_read_value_i2c(data, reg);
  1536. else
  1537. res = w83781d_read_value_isa(data, reg);
  1538. mutex_unlock(&data->lock);
  1539. return res;
  1540. }
  1541. static int
  1542. w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
  1543. {
  1544. struct i2c_client *client = data->client;
  1545. mutex_lock(&data->lock);
  1546. if (client)
  1547. w83781d_write_value_i2c(data, reg, value);
  1548. else
  1549. w83781d_write_value_isa(data, reg, value);
  1550. mutex_unlock(&data->lock);
  1551. return 0;
  1552. }
  1553. static int
  1554. w83781d_isa_probe(struct platform_device *pdev)
  1555. {
  1556. int err, reg;
  1557. struct w83781d_data *data;
  1558. struct resource *res;
  1559. /* Reserve the ISA region */
  1560. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1561. if (!devm_request_region(&pdev->dev,
  1562. res->start + W83781D_ADDR_REG_OFFSET, 2,
  1563. "w83781d"))
  1564. return -EBUSY;
  1565. data = devm_kzalloc(&pdev->dev, sizeof(struct w83781d_data),
  1566. GFP_KERNEL);
  1567. if (!data)
  1568. return -ENOMEM;
  1569. mutex_init(&data->lock);
  1570. data->isa_addr = res->start;
  1571. platform_set_drvdata(pdev, data);
  1572. reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
  1573. switch (reg) {
  1574. case 0x30:
  1575. data->type = w83782d;
  1576. data->name = "w83782d";
  1577. break;
  1578. default:
  1579. data->type = w83781d;
  1580. data->name = "w83781d";
  1581. }
  1582. /* Initialize the W83781D chip */
  1583. w83781d_init_device(&pdev->dev);
  1584. /* Register sysfs hooks */
  1585. err = w83781d_create_files(&pdev->dev, data->type, 1);
  1586. if (err)
  1587. goto exit_remove_files;
  1588. err = device_create_file(&pdev->dev, &dev_attr_name);
  1589. if (err)
  1590. goto exit_remove_files;
  1591. data->hwmon_dev = hwmon_device_register(&pdev->dev);
  1592. if (IS_ERR(data->hwmon_dev)) {
  1593. err = PTR_ERR(data->hwmon_dev);
  1594. goto exit_remove_files;
  1595. }
  1596. return 0;
  1597. exit_remove_files:
  1598. w83781d_remove_files(&pdev->dev);
  1599. device_remove_file(&pdev->dev, &dev_attr_name);
  1600. return err;
  1601. }
  1602. static int
  1603. w83781d_isa_remove(struct platform_device *pdev)
  1604. {
  1605. struct w83781d_data *data = platform_get_drvdata(pdev);
  1606. hwmon_device_unregister(data->hwmon_dev);
  1607. w83781d_remove_files(&pdev->dev);
  1608. device_remove_file(&pdev->dev, &dev_attr_name);
  1609. return 0;
  1610. }
  1611. static struct platform_driver w83781d_isa_driver = {
  1612. .driver = {
  1613. .owner = THIS_MODULE,
  1614. .name = "w83781d",
  1615. },
  1616. .probe = w83781d_isa_probe,
  1617. .remove = w83781d_isa_remove,
  1618. };
  1619. /* return 1 if a supported chip is found, 0 otherwise */
  1620. static int __init
  1621. w83781d_isa_found(unsigned short address)
  1622. {
  1623. int val, save, found = 0;
  1624. int port;
  1625. /*
  1626. * Some boards declare base+0 to base+7 as a PNP device, some base+4
  1627. * to base+7 and some base+5 to base+6. So we better request each port
  1628. * individually for the probing phase.
  1629. */
  1630. for (port = address; port < address + W83781D_EXTENT; port++) {
  1631. if (!request_region(port, 1, "w83781d")) {
  1632. pr_debug("Failed to request port 0x%x\n", port);
  1633. goto release;
  1634. }
  1635. }
  1636. #define REALLY_SLOW_IO
  1637. /*
  1638. * We need the timeouts for at least some W83781D-like
  1639. * chips. But only if we read 'undefined' registers.
  1640. */
  1641. val = inb_p(address + 1);
  1642. if (inb_p(address + 2) != val
  1643. || inb_p(address + 3) != val
  1644. || inb_p(address + 7) != val) {
  1645. pr_debug("Detection failed at step %d\n", 1);
  1646. goto release;
  1647. }
  1648. #undef REALLY_SLOW_IO
  1649. /*
  1650. * We should be able to change the 7 LSB of the address port. The
  1651. * MSB (busy flag) should be clear initially, set after the write.
  1652. */
  1653. save = inb_p(address + W83781D_ADDR_REG_OFFSET);
  1654. if (save & 0x80) {
  1655. pr_debug("Detection failed at step %d\n", 2);
  1656. goto release;
  1657. }
  1658. val = ~save & 0x7f;
  1659. outb_p(val, address + W83781D_ADDR_REG_OFFSET);
  1660. if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
  1661. outb_p(save, address + W83781D_ADDR_REG_OFFSET);
  1662. pr_debug("Detection failed at step %d\n", 3);
  1663. goto release;
  1664. }
  1665. /* We found a device, now see if it could be a W83781D */
  1666. outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
  1667. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1668. if (val & 0x80) {
  1669. pr_debug("Detection failed at step %d\n", 4);
  1670. goto release;
  1671. }
  1672. outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
  1673. save = inb_p(address + W83781D_DATA_REG_OFFSET);
  1674. outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
  1675. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1676. if ((!(save & 0x80) && (val != 0xa3))
  1677. || ((save & 0x80) && (val != 0x5c))) {
  1678. pr_debug("Detection failed at step %d\n", 5);
  1679. goto release;
  1680. }
  1681. outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
  1682. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1683. if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
  1684. pr_debug("Detection failed at step %d\n", 6);
  1685. goto release;
  1686. }
  1687. /* The busy flag should be clear again */
  1688. if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
  1689. pr_debug("Detection failed at step %d\n", 7);
  1690. goto release;
  1691. }
  1692. /* Determine the chip type */
  1693. outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
  1694. save = inb_p(address + W83781D_DATA_REG_OFFSET);
  1695. outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
  1696. outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
  1697. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1698. if ((val & 0xfe) == 0x10 /* W83781D */
  1699. || val == 0x30) /* W83782D */
  1700. found = 1;
  1701. if (found)
  1702. pr_info("Found a %s chip at %#x\n",
  1703. val == 0x30 ? "W83782D" : "W83781D", (int)address);
  1704. release:
  1705. for (port--; port >= address; port--)
  1706. release_region(port, 1);
  1707. return found;
  1708. }
  1709. static int __init
  1710. w83781d_isa_device_add(unsigned short address)
  1711. {
  1712. struct resource res = {
  1713. .start = address,
  1714. .end = address + W83781D_EXTENT - 1,
  1715. .name = "w83781d",
  1716. .flags = IORESOURCE_IO,
  1717. };
  1718. int err;
  1719. pdev = platform_device_alloc("w83781d", address);
  1720. if (!pdev) {
  1721. err = -ENOMEM;
  1722. pr_err("Device allocation failed\n");
  1723. goto exit;
  1724. }
  1725. err = platform_device_add_resources(pdev, &res, 1);
  1726. if (err) {
  1727. pr_err("Device resource addition failed (%d)\n", err);
  1728. goto exit_device_put;
  1729. }
  1730. err = platform_device_add(pdev);
  1731. if (err) {
  1732. pr_err("Device addition failed (%d)\n", err);
  1733. goto exit_device_put;
  1734. }
  1735. return 0;
  1736. exit_device_put:
  1737. platform_device_put(pdev);
  1738. exit:
  1739. pdev = NULL;
  1740. return err;
  1741. }
  1742. static int __init
  1743. w83781d_isa_register(void)
  1744. {
  1745. int res;
  1746. if (w83781d_isa_found(isa_address)) {
  1747. res = platform_driver_register(&w83781d_isa_driver);
  1748. if (res)
  1749. goto exit;
  1750. /* Sets global pdev as a side effect */
  1751. res = w83781d_isa_device_add(isa_address);
  1752. if (res)
  1753. goto exit_unreg_isa_driver;
  1754. }
  1755. return 0;
  1756. exit_unreg_isa_driver:
  1757. platform_driver_unregister(&w83781d_isa_driver);
  1758. exit:
  1759. return res;
  1760. }
  1761. static void
  1762. w83781d_isa_unregister(void)
  1763. {
  1764. if (pdev) {
  1765. platform_device_unregister(pdev);
  1766. platform_driver_unregister(&w83781d_isa_driver);
  1767. }
  1768. }
  1769. #else /* !CONFIG_ISA */
  1770. static struct w83781d_data *w83781d_data_if_isa(void)
  1771. {
  1772. return NULL;
  1773. }
  1774. static int
  1775. w83781d_alias_detect(struct i2c_client *client, u8 chipid)
  1776. {
  1777. return 0;
  1778. }
  1779. static int
  1780. w83781d_read_value(struct w83781d_data *data, u16 reg)
  1781. {
  1782. int res;
  1783. mutex_lock(&data->lock);
  1784. res = w83781d_read_value_i2c(data, reg);
  1785. mutex_unlock(&data->lock);
  1786. return res;
  1787. }
  1788. static int
  1789. w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
  1790. {
  1791. mutex_lock(&data->lock);
  1792. w83781d_write_value_i2c(data, reg, value);
  1793. mutex_unlock(&data->lock);
  1794. return 0;
  1795. }
  1796. static int __init
  1797. w83781d_isa_register(void)
  1798. {
  1799. return 0;
  1800. }
  1801. static void
  1802. w83781d_isa_unregister(void)
  1803. {
  1804. }
  1805. #endif /* CONFIG_ISA */
  1806. static int __init
  1807. sensors_w83781d_init(void)
  1808. {
  1809. int res;
  1810. /*
  1811. * We register the ISA device first, so that we can skip the
  1812. * registration of an I2C interface to the same device.
  1813. */
  1814. res = w83781d_isa_register();
  1815. if (res)
  1816. goto exit;
  1817. res = i2c_add_driver(&w83781d_driver);
  1818. if (res)
  1819. goto exit_unreg_isa;
  1820. return 0;
  1821. exit_unreg_isa:
  1822. w83781d_isa_unregister();
  1823. exit:
  1824. return res;
  1825. }
  1826. static void __exit
  1827. sensors_w83781d_exit(void)
  1828. {
  1829. w83781d_isa_unregister();
  1830. i2c_del_driver(&w83781d_driver);
  1831. }
  1832. MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
  1833. "Philip Edelbrock <phil@netroedge.com>, "
  1834. "and Mark Studebaker <mdsxyz123@yahoo.com>");
  1835. MODULE_DESCRIPTION("W83781D driver");
  1836. MODULE_LICENSE("GPL");
  1837. module_init(sensors_w83781d_init);
  1838. module_exit(sensors_w83781d_exit);