jc42.c 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605
  1. /*
  2. * jc42.c - driver for Jedec JC42.4 compliant temperature sensors
  3. *
  4. * Copyright (c) 2010 Ericsson AB.
  5. *
  6. * Derived from lm77.c by Andras BALI <drewie@freemail.hu>.
  7. *
  8. * JC42.4 compliant temperature sensors are typically used on memory modules.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23. */
  24. #include <linux/module.h>
  25. #include <linux/init.h>
  26. #include <linux/slab.h>
  27. #include <linux/jiffies.h>
  28. #include <linux/i2c.h>
  29. #include <linux/hwmon.h>
  30. #include <linux/hwmon-sysfs.h>
  31. #include <linux/err.h>
  32. #include <linux/mutex.h>
  33. /* Addresses to scan */
  34. static const unsigned short normal_i2c[] = {
  35. 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END };
  36. /* JC42 registers. All registers are 16 bit. */
  37. #define JC42_REG_CAP 0x00
  38. #define JC42_REG_CONFIG 0x01
  39. #define JC42_REG_TEMP_UPPER 0x02
  40. #define JC42_REG_TEMP_LOWER 0x03
  41. #define JC42_REG_TEMP_CRITICAL 0x04
  42. #define JC42_REG_TEMP 0x05
  43. #define JC42_REG_MANID 0x06
  44. #define JC42_REG_DEVICEID 0x07
  45. /* Status bits in temperature register */
  46. #define JC42_ALARM_CRIT_BIT 15
  47. #define JC42_ALARM_MAX_BIT 14
  48. #define JC42_ALARM_MIN_BIT 13
  49. /* Configuration register defines */
  50. #define JC42_CFG_CRIT_ONLY (1 << 2)
  51. #define JC42_CFG_TCRIT_LOCK (1 << 6)
  52. #define JC42_CFG_EVENT_LOCK (1 << 7)
  53. #define JC42_CFG_SHUTDOWN (1 << 8)
  54. #define JC42_CFG_HYST_SHIFT 9
  55. #define JC42_CFG_HYST_MASK (0x03 << 9)
  56. /* Capabilities */
  57. #define JC42_CAP_RANGE (1 << 2)
  58. /* Manufacturer IDs */
  59. #define ADT_MANID 0x11d4 /* Analog Devices */
  60. #define ATMEL_MANID 0x001f /* Atmel */
  61. #define MAX_MANID 0x004d /* Maxim */
  62. #define IDT_MANID 0x00b3 /* IDT */
  63. #define MCP_MANID 0x0054 /* Microchip */
  64. #define NXP_MANID 0x1131 /* NXP Semiconductors */
  65. #define ONS_MANID 0x1b09 /* ON Semiconductor */
  66. #define STM_MANID 0x104a /* ST Microelectronics */
  67. /* Supported chips */
  68. /* Analog Devices */
  69. #define ADT7408_DEVID 0x0801
  70. #define ADT7408_DEVID_MASK 0xffff
  71. /* Atmel */
  72. #define AT30TS00_DEVID 0x8201
  73. #define AT30TS00_DEVID_MASK 0xffff
  74. /* IDT */
  75. #define TS3000B3_DEVID 0x2903 /* Also matches TSE2002B3 */
  76. #define TS3000B3_DEVID_MASK 0xffff
  77. #define TS3000GB2_DEVID 0x2912 /* Also matches TSE2002GB2 */
  78. #define TS3000GB2_DEVID_MASK 0xffff
  79. /* Maxim */
  80. #define MAX6604_DEVID 0x3e00
  81. #define MAX6604_DEVID_MASK 0xffff
  82. /* Microchip */
  83. #define MCP9804_DEVID 0x0200
  84. #define MCP9804_DEVID_MASK 0xfffc
  85. #define MCP98242_DEVID 0x2000
  86. #define MCP98242_DEVID_MASK 0xfffc
  87. #define MCP98243_DEVID 0x2100
  88. #define MCP98243_DEVID_MASK 0xfffc
  89. #define MCP98244_DEVID 0x2200
  90. #define MCP98244_DEVID_MASK 0xfffc
  91. #define MCP9843_DEVID 0x0000 /* Also matches mcp9805 */
  92. #define MCP9843_DEVID_MASK 0xfffe
  93. /* NXP */
  94. #define SE97_DEVID 0xa200
  95. #define SE97_DEVID_MASK 0xfffc
  96. #define SE98_DEVID 0xa100
  97. #define SE98_DEVID_MASK 0xfffc
  98. /* ON Semiconductor */
  99. #define CAT6095_DEVID 0x0800 /* Also matches CAT34TS02 */
  100. #define CAT6095_DEVID_MASK 0xffe0
  101. /* ST Microelectronics */
  102. #define STTS424_DEVID 0x0101
  103. #define STTS424_DEVID_MASK 0xffff
  104. #define STTS424E_DEVID 0x0000
  105. #define STTS424E_DEVID_MASK 0xfffe
  106. #define STTS2002_DEVID 0x0300
  107. #define STTS2002_DEVID_MASK 0xffff
  108. #define STTS3000_DEVID 0x0200
  109. #define STTS3000_DEVID_MASK 0xffff
  110. static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 };
  111. struct jc42_chips {
  112. u16 manid;
  113. u16 devid;
  114. u16 devid_mask;
  115. };
  116. static struct jc42_chips jc42_chips[] = {
  117. { ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK },
  118. { ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK },
  119. { IDT_MANID, TS3000B3_DEVID, TS3000B3_DEVID_MASK },
  120. { IDT_MANID, TS3000GB2_DEVID, TS3000GB2_DEVID_MASK },
  121. { MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK },
  122. { MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK },
  123. { MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK },
  124. { MCP_MANID, MCP98243_DEVID, MCP98243_DEVID_MASK },
  125. { MCP_MANID, MCP98244_DEVID, MCP98244_DEVID_MASK },
  126. { MCP_MANID, MCP9843_DEVID, MCP9843_DEVID_MASK },
  127. { NXP_MANID, SE97_DEVID, SE97_DEVID_MASK },
  128. { ONS_MANID, CAT6095_DEVID, CAT6095_DEVID_MASK },
  129. { NXP_MANID, SE98_DEVID, SE98_DEVID_MASK },
  130. { STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK },
  131. { STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK },
  132. { STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK },
  133. { STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK },
  134. };
  135. /* Each client has this additional data */
  136. struct jc42_data {
  137. struct device *hwmon_dev;
  138. struct mutex update_lock; /* protect register access */
  139. bool extended; /* true if extended range supported */
  140. bool valid;
  141. unsigned long last_updated; /* In jiffies */
  142. u16 orig_config; /* original configuration */
  143. u16 config; /* current configuration */
  144. u16 temp_input; /* Temperatures */
  145. u16 temp_crit;
  146. u16 temp_min;
  147. u16 temp_max;
  148. };
  149. static int jc42_probe(struct i2c_client *client,
  150. const struct i2c_device_id *id);
  151. static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info);
  152. static int jc42_remove(struct i2c_client *client);
  153. static struct jc42_data *jc42_update_device(struct device *dev);
  154. static const struct i2c_device_id jc42_id[] = {
  155. { "jc42", 0 },
  156. { }
  157. };
  158. MODULE_DEVICE_TABLE(i2c, jc42_id);
  159. #ifdef CONFIG_PM
  160. static int jc42_suspend(struct device *dev)
  161. {
  162. struct i2c_client *client = to_i2c_client(dev);
  163. struct jc42_data *data = i2c_get_clientdata(client);
  164. data->config |= JC42_CFG_SHUTDOWN;
  165. i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, data->config);
  166. return 0;
  167. }
  168. static int jc42_resume(struct device *dev)
  169. {
  170. struct i2c_client *client = to_i2c_client(dev);
  171. struct jc42_data *data = i2c_get_clientdata(client);
  172. data->config &= ~JC42_CFG_SHUTDOWN;
  173. i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, data->config);
  174. return 0;
  175. }
  176. static const struct dev_pm_ops jc42_dev_pm_ops = {
  177. .suspend = jc42_suspend,
  178. .resume = jc42_resume,
  179. };
  180. #define JC42_DEV_PM_OPS (&jc42_dev_pm_ops)
  181. #else
  182. #define JC42_DEV_PM_OPS NULL
  183. #endif /* CONFIG_PM */
  184. /* This is the driver that will be inserted */
  185. static struct i2c_driver jc42_driver = {
  186. .class = I2C_CLASS_SPD,
  187. .driver = {
  188. .name = "jc42",
  189. .pm = JC42_DEV_PM_OPS,
  190. },
  191. .probe = jc42_probe,
  192. .remove = jc42_remove,
  193. .id_table = jc42_id,
  194. .detect = jc42_detect,
  195. .address_list = normal_i2c,
  196. };
  197. #define JC42_TEMP_MIN_EXTENDED (-40000)
  198. #define JC42_TEMP_MIN 0
  199. #define JC42_TEMP_MAX 125000
  200. static u16 jc42_temp_to_reg(int temp, bool extended)
  201. {
  202. int ntemp = clamp_val(temp,
  203. extended ? JC42_TEMP_MIN_EXTENDED :
  204. JC42_TEMP_MIN, JC42_TEMP_MAX);
  205. /* convert from 0.001 to 0.0625 resolution */
  206. return (ntemp * 2 / 125) & 0x1fff;
  207. }
  208. static int jc42_temp_from_reg(s16 reg)
  209. {
  210. reg &= 0x1fff;
  211. /* sign extend register */
  212. if (reg & 0x1000)
  213. reg |= 0xf000;
  214. /* convert from 0.0625 to 0.001 resolution */
  215. return reg * 125 / 2;
  216. }
  217. /* sysfs stuff */
  218. /* read routines for temperature limits */
  219. #define show(value) \
  220. static ssize_t show_##value(struct device *dev, \
  221. struct device_attribute *attr, \
  222. char *buf) \
  223. { \
  224. struct jc42_data *data = jc42_update_device(dev); \
  225. if (IS_ERR(data)) \
  226. return PTR_ERR(data); \
  227. return sprintf(buf, "%d\n", jc42_temp_from_reg(data->value)); \
  228. }
  229. show(temp_input);
  230. show(temp_crit);
  231. show(temp_min);
  232. show(temp_max);
  233. /* read routines for hysteresis values */
  234. static ssize_t show_temp_crit_hyst(struct device *dev,
  235. struct device_attribute *attr, char *buf)
  236. {
  237. struct jc42_data *data = jc42_update_device(dev);
  238. int temp, hyst;
  239. if (IS_ERR(data))
  240. return PTR_ERR(data);
  241. temp = jc42_temp_from_reg(data->temp_crit);
  242. hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
  243. >> JC42_CFG_HYST_SHIFT];
  244. return sprintf(buf, "%d\n", temp - hyst);
  245. }
  246. static ssize_t show_temp_max_hyst(struct device *dev,
  247. struct device_attribute *attr, char *buf)
  248. {
  249. struct jc42_data *data = jc42_update_device(dev);
  250. int temp, hyst;
  251. if (IS_ERR(data))
  252. return PTR_ERR(data);
  253. temp = jc42_temp_from_reg(data->temp_max);
  254. hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
  255. >> JC42_CFG_HYST_SHIFT];
  256. return sprintf(buf, "%d\n", temp - hyst);
  257. }
  258. /* write routines */
  259. #define set(value, reg) \
  260. static ssize_t set_##value(struct device *dev, \
  261. struct device_attribute *attr, \
  262. const char *buf, size_t count) \
  263. { \
  264. struct i2c_client *client = to_i2c_client(dev); \
  265. struct jc42_data *data = i2c_get_clientdata(client); \
  266. int err, ret = count; \
  267. long val; \
  268. if (kstrtol(buf, 10, &val) < 0) \
  269. return -EINVAL; \
  270. mutex_lock(&data->update_lock); \
  271. data->value = jc42_temp_to_reg(val, data->extended); \
  272. err = i2c_smbus_write_word_swapped(client, reg, data->value); \
  273. if (err < 0) \
  274. ret = err; \
  275. mutex_unlock(&data->update_lock); \
  276. return ret; \
  277. }
  278. set(temp_min, JC42_REG_TEMP_LOWER);
  279. set(temp_max, JC42_REG_TEMP_UPPER);
  280. set(temp_crit, JC42_REG_TEMP_CRITICAL);
  281. /*
  282. * JC42.4 compliant chips only support four hysteresis values.
  283. * Pick best choice and go from there.
  284. */
  285. static ssize_t set_temp_crit_hyst(struct device *dev,
  286. struct device_attribute *attr,
  287. const char *buf, size_t count)
  288. {
  289. struct i2c_client *client = to_i2c_client(dev);
  290. struct jc42_data *data = i2c_get_clientdata(client);
  291. unsigned long val;
  292. int diff, hyst;
  293. int err;
  294. int ret = count;
  295. if (kstrtoul(buf, 10, &val) < 0)
  296. return -EINVAL;
  297. diff = jc42_temp_from_reg(data->temp_crit) - val;
  298. hyst = 0;
  299. if (diff > 0) {
  300. if (diff < 2250)
  301. hyst = 1; /* 1.5 degrees C */
  302. else if (diff < 4500)
  303. hyst = 2; /* 3.0 degrees C */
  304. else
  305. hyst = 3; /* 6.0 degrees C */
  306. }
  307. mutex_lock(&data->update_lock);
  308. data->config = (data->config & ~JC42_CFG_HYST_MASK)
  309. | (hyst << JC42_CFG_HYST_SHIFT);
  310. err = i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG,
  311. data->config);
  312. if (err < 0)
  313. ret = err;
  314. mutex_unlock(&data->update_lock);
  315. return ret;
  316. }
  317. static ssize_t show_alarm(struct device *dev,
  318. struct device_attribute *attr, char *buf)
  319. {
  320. u16 bit = to_sensor_dev_attr(attr)->index;
  321. struct jc42_data *data = jc42_update_device(dev);
  322. u16 val;
  323. if (IS_ERR(data))
  324. return PTR_ERR(data);
  325. val = data->temp_input;
  326. if (bit != JC42_ALARM_CRIT_BIT && (data->config & JC42_CFG_CRIT_ONLY))
  327. val = 0;
  328. return sprintf(buf, "%u\n", (val >> bit) & 1);
  329. }
  330. static DEVICE_ATTR(temp1_input, S_IRUGO,
  331. show_temp_input, NULL);
  332. static DEVICE_ATTR(temp1_crit, S_IRUGO,
  333. show_temp_crit, set_temp_crit);
  334. static DEVICE_ATTR(temp1_min, S_IRUGO,
  335. show_temp_min, set_temp_min);
  336. static DEVICE_ATTR(temp1_max, S_IRUGO,
  337. show_temp_max, set_temp_max);
  338. static DEVICE_ATTR(temp1_crit_hyst, S_IRUGO,
  339. show_temp_crit_hyst, set_temp_crit_hyst);
  340. static DEVICE_ATTR(temp1_max_hyst, S_IRUGO,
  341. show_temp_max_hyst, NULL);
  342. static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL,
  343. JC42_ALARM_CRIT_BIT);
  344. static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL,
  345. JC42_ALARM_MIN_BIT);
  346. static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL,
  347. JC42_ALARM_MAX_BIT);
  348. static struct attribute *jc42_attributes[] = {
  349. &dev_attr_temp1_input.attr,
  350. &dev_attr_temp1_crit.attr,
  351. &dev_attr_temp1_min.attr,
  352. &dev_attr_temp1_max.attr,
  353. &dev_attr_temp1_crit_hyst.attr,
  354. &dev_attr_temp1_max_hyst.attr,
  355. &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
  356. &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
  357. &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
  358. NULL
  359. };
  360. static umode_t jc42_attribute_mode(struct kobject *kobj,
  361. struct attribute *attr, int index)
  362. {
  363. struct device *dev = container_of(kobj, struct device, kobj);
  364. struct i2c_client *client = to_i2c_client(dev);
  365. struct jc42_data *data = i2c_get_clientdata(client);
  366. unsigned int config = data->config;
  367. bool readonly;
  368. if (attr == &dev_attr_temp1_crit.attr)
  369. readonly = config & JC42_CFG_TCRIT_LOCK;
  370. else if (attr == &dev_attr_temp1_min.attr ||
  371. attr == &dev_attr_temp1_max.attr)
  372. readonly = config & JC42_CFG_EVENT_LOCK;
  373. else if (attr == &dev_attr_temp1_crit_hyst.attr)
  374. readonly = config & (JC42_CFG_EVENT_LOCK | JC42_CFG_TCRIT_LOCK);
  375. else
  376. readonly = true;
  377. return S_IRUGO | (readonly ? 0 : S_IWUSR);
  378. }
  379. static const struct attribute_group jc42_group = {
  380. .attrs = jc42_attributes,
  381. .is_visible = jc42_attribute_mode,
  382. };
  383. /* Return 0 if detection is successful, -ENODEV otherwise */
  384. static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info)
  385. {
  386. struct i2c_adapter *adapter = client->adapter;
  387. int i, config, cap, manid, devid;
  388. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
  389. I2C_FUNC_SMBUS_WORD_DATA))
  390. return -ENODEV;
  391. cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
  392. config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
  393. manid = i2c_smbus_read_word_swapped(client, JC42_REG_MANID);
  394. devid = i2c_smbus_read_word_swapped(client, JC42_REG_DEVICEID);
  395. if (cap < 0 || config < 0 || manid < 0 || devid < 0)
  396. return -ENODEV;
  397. if ((cap & 0xff00) || (config & 0xf800))
  398. return -ENODEV;
  399. for (i = 0; i < ARRAY_SIZE(jc42_chips); i++) {
  400. struct jc42_chips *chip = &jc42_chips[i];
  401. if (manid == chip->manid &&
  402. (devid & chip->devid_mask) == chip->devid) {
  403. strlcpy(info->type, "jc42", I2C_NAME_SIZE);
  404. return 0;
  405. }
  406. }
  407. return -ENODEV;
  408. }
  409. static int jc42_probe(struct i2c_client *client, const struct i2c_device_id *id)
  410. {
  411. struct jc42_data *data;
  412. int config, cap, err;
  413. struct device *dev = &client->dev;
  414. data = devm_kzalloc(dev, sizeof(struct jc42_data), GFP_KERNEL);
  415. if (!data)
  416. return -ENOMEM;
  417. i2c_set_clientdata(client, data);
  418. mutex_init(&data->update_lock);
  419. cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
  420. if (cap < 0)
  421. return cap;
  422. data->extended = !!(cap & JC42_CAP_RANGE);
  423. config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
  424. if (config < 0)
  425. return config;
  426. data->orig_config = config;
  427. if (config & JC42_CFG_SHUTDOWN) {
  428. config &= ~JC42_CFG_SHUTDOWN;
  429. i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
  430. }
  431. data->config = config;
  432. /* Register sysfs hooks */
  433. err = sysfs_create_group(&dev->kobj, &jc42_group);
  434. if (err)
  435. return err;
  436. data->hwmon_dev = hwmon_device_register(dev);
  437. if (IS_ERR(data->hwmon_dev)) {
  438. err = PTR_ERR(data->hwmon_dev);
  439. goto exit_remove;
  440. }
  441. return 0;
  442. exit_remove:
  443. sysfs_remove_group(&dev->kobj, &jc42_group);
  444. return err;
  445. }
  446. static int jc42_remove(struct i2c_client *client)
  447. {
  448. struct jc42_data *data = i2c_get_clientdata(client);
  449. hwmon_device_unregister(data->hwmon_dev);
  450. sysfs_remove_group(&client->dev.kobj, &jc42_group);
  451. /* Restore original configuration except hysteresis */
  452. if ((data->config & ~JC42_CFG_HYST_MASK) !=
  453. (data->orig_config & ~JC42_CFG_HYST_MASK)) {
  454. int config;
  455. config = (data->orig_config & ~JC42_CFG_HYST_MASK)
  456. | (data->config & JC42_CFG_HYST_MASK);
  457. i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
  458. }
  459. return 0;
  460. }
  461. static struct jc42_data *jc42_update_device(struct device *dev)
  462. {
  463. struct i2c_client *client = to_i2c_client(dev);
  464. struct jc42_data *data = i2c_get_clientdata(client);
  465. struct jc42_data *ret = data;
  466. int val;
  467. mutex_lock(&data->update_lock);
  468. if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
  469. val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP);
  470. if (val < 0) {
  471. ret = ERR_PTR(val);
  472. goto abort;
  473. }
  474. data->temp_input = val;
  475. val = i2c_smbus_read_word_swapped(client,
  476. JC42_REG_TEMP_CRITICAL);
  477. if (val < 0) {
  478. ret = ERR_PTR(val);
  479. goto abort;
  480. }
  481. data->temp_crit = val;
  482. val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_LOWER);
  483. if (val < 0) {
  484. ret = ERR_PTR(val);
  485. goto abort;
  486. }
  487. data->temp_min = val;
  488. val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_UPPER);
  489. if (val < 0) {
  490. ret = ERR_PTR(val);
  491. goto abort;
  492. }
  493. data->temp_max = val;
  494. data->last_updated = jiffies;
  495. data->valid = true;
  496. }
  497. abort:
  498. mutex_unlock(&data->update_lock);
  499. return ret;
  500. }
  501. module_i2c_driver(jc42_driver);
  502. MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
  503. MODULE_DESCRIPTION("JC42 driver");
  504. MODULE_LICENSE("GPL");