f71882fg.c 83 KB

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  1. /***************************************************************************
  2. * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
  3. * Copyright (C) 2007-2011 Hans de Goede <hdegoede@redhat.com> *
  4. * *
  5. * This program is free software; you can redistribute it and/or modify *
  6. * it under the terms of the GNU General Public License as published by *
  7. * the Free Software Foundation; either version 2 of the License, or *
  8. * (at your option) any later version. *
  9. * *
  10. * This program is distributed in the hope that it will be useful, *
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  13. * GNU General Public License for more details. *
  14. * *
  15. * You should have received a copy of the GNU General Public License *
  16. * along with this program; if not, write to the *
  17. * Free Software Foundation, Inc., *
  18. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  19. ***************************************************************************/
  20. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  21. #include <linux/module.h>
  22. #include <linux/init.h>
  23. #include <linux/slab.h>
  24. #include <linux/jiffies.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/hwmon.h>
  27. #include <linux/hwmon-sysfs.h>
  28. #include <linux/err.h>
  29. #include <linux/mutex.h>
  30. #include <linux/io.h>
  31. #include <linux/acpi.h>
  32. #define DRVNAME "f71882fg"
  33. #define SIO_F71858FG_LD_HWM 0x02 /* Hardware monitor logical device */
  34. #define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */
  35. #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
  36. #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
  37. #define SIO_REG_LDSEL 0x07 /* Logical device select */
  38. #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
  39. #define SIO_REG_DEVREV 0x22 /* Device revision */
  40. #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
  41. #define SIO_REG_ENABLE 0x30 /* Logical device enable */
  42. #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
  43. #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
  44. #define SIO_F71808E_ID 0x0901 /* Chipset ID */
  45. #define SIO_F71808A_ID 0x1001 /* Chipset ID */
  46. #define SIO_F71858_ID 0x0507 /* Chipset ID */
  47. #define SIO_F71862_ID 0x0601 /* Chipset ID */
  48. #define SIO_F71869_ID 0x0814 /* Chipset ID */
  49. #define SIO_F71869A_ID 0x1007 /* Chipset ID */
  50. #define SIO_F71882_ID 0x0541 /* Chipset ID */
  51. #define SIO_F71889_ID 0x0723 /* Chipset ID */
  52. #define SIO_F71889E_ID 0x0909 /* Chipset ID */
  53. #define SIO_F71889A_ID 0x1005 /* Chipset ID */
  54. #define SIO_F8000_ID 0x0581 /* Chipset ID */
  55. #define SIO_F81865_ID 0x0704 /* Chipset ID */
  56. #define REGION_LENGTH 8
  57. #define ADDR_REG_OFFSET 5
  58. #define DATA_REG_OFFSET 6
  59. #define F71882FG_REG_IN_STATUS 0x12 /* f7188x only */
  60. #define F71882FG_REG_IN_BEEP 0x13 /* f7188x only */
  61. #define F71882FG_REG_IN(nr) (0x20 + (nr))
  62. #define F71882FG_REG_IN1_HIGH 0x32 /* f7188x only */
  63. #define F71882FG_REG_FAN(nr) (0xA0 + (16 * (nr)))
  64. #define F71882FG_REG_FAN_TARGET(nr) (0xA2 + (16 * (nr)))
  65. #define F71882FG_REG_FAN_FULL_SPEED(nr) (0xA4 + (16 * (nr)))
  66. #define F71882FG_REG_FAN_STATUS 0x92
  67. #define F71882FG_REG_FAN_BEEP 0x93
  68. #define F71882FG_REG_TEMP(nr) (0x70 + 2 * (nr))
  69. #define F71882FG_REG_TEMP_OVT(nr) (0x80 + 2 * (nr))
  70. #define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr))
  71. #define F71882FG_REG_TEMP_STATUS 0x62
  72. #define F71882FG_REG_TEMP_BEEP 0x63
  73. #define F71882FG_REG_TEMP_CONFIG 0x69
  74. #define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr))
  75. #define F71882FG_REG_TEMP_TYPE 0x6B
  76. #define F71882FG_REG_TEMP_DIODE_OPEN 0x6F
  77. #define F71882FG_REG_PWM(nr) (0xA3 + (16 * (nr)))
  78. #define F71882FG_REG_PWM_TYPE 0x94
  79. #define F71882FG_REG_PWM_ENABLE 0x96
  80. #define F71882FG_REG_FAN_HYST(nr) (0x98 + (nr))
  81. #define F71882FG_REG_FAN_FAULT_T 0x9F
  82. #define F71882FG_FAN_NEG_TEMP_EN 0x20
  83. #define F71882FG_FAN_PROG_SEL 0x80
  84. #define F71882FG_REG_POINT_PWM(pwm, point) (0xAA + (point) + (16 * (pwm)))
  85. #define F71882FG_REG_POINT_TEMP(pwm, point) (0xA6 + (point) + (16 * (pwm)))
  86. #define F71882FG_REG_POINT_MAPPING(nr) (0xAF + 16 * (nr))
  87. #define F71882FG_REG_START 0x01
  88. #define F71882FG_MAX_INS 9
  89. #define FAN_MIN_DETECT 366 /* Lowest detectable fanspeed */
  90. static unsigned short force_id;
  91. module_param(force_id, ushort, 0);
  92. MODULE_PARM_DESC(force_id, "Override the detected device ID");
  93. enum chips { f71808e, f71808a, f71858fg, f71862fg, f71869, f71869a, f71882fg,
  94. f71889fg, f71889ed, f71889a, f8000, f81865f };
  95. static const char *const f71882fg_names[] = {
  96. "f71808e",
  97. "f71808a",
  98. "f71858fg",
  99. "f71862fg",
  100. "f71869", /* Both f71869f and f71869e, reg. compatible and same id */
  101. "f71869a",
  102. "f71882fg",
  103. "f71889fg", /* f81801u too, same id */
  104. "f71889ed",
  105. "f71889a",
  106. "f8000",
  107. "f81865f",
  108. };
  109. static const char f71882fg_has_in[][F71882FG_MAX_INS] = {
  110. [f71808e] = { 1, 1, 1, 1, 1, 1, 0, 1, 1 },
  111. [f71808a] = { 1, 1, 1, 1, 0, 0, 0, 1, 1 },
  112. [f71858fg] = { 1, 1, 1, 0, 0, 0, 0, 0, 0 },
  113. [f71862fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  114. [f71869] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  115. [f71869a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  116. [f71882fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  117. [f71889fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  118. [f71889ed] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  119. [f71889a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  120. [f8000] = { 1, 1, 1, 0, 0, 0, 0, 0, 0 },
  121. [f81865f] = { 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  122. };
  123. static const char f71882fg_has_in1_alarm[] = {
  124. [f71808e] = 0,
  125. [f71808a] = 0,
  126. [f71858fg] = 0,
  127. [f71862fg] = 0,
  128. [f71869] = 0,
  129. [f71869a] = 0,
  130. [f71882fg] = 1,
  131. [f71889fg] = 1,
  132. [f71889ed] = 1,
  133. [f71889a] = 1,
  134. [f8000] = 0,
  135. [f81865f] = 1,
  136. };
  137. static const char f71882fg_fan_has_beep[] = {
  138. [f71808e] = 0,
  139. [f71808a] = 0,
  140. [f71858fg] = 0,
  141. [f71862fg] = 1,
  142. [f71869] = 1,
  143. [f71869a] = 1,
  144. [f71882fg] = 1,
  145. [f71889fg] = 1,
  146. [f71889ed] = 1,
  147. [f71889a] = 1,
  148. [f8000] = 0,
  149. [f81865f] = 1,
  150. };
  151. static const char f71882fg_nr_fans[] = {
  152. [f71808e] = 3,
  153. [f71808a] = 2, /* +1 fan which is monitor + simple pwm only */
  154. [f71858fg] = 3,
  155. [f71862fg] = 3,
  156. [f71869] = 3,
  157. [f71869a] = 3,
  158. [f71882fg] = 4,
  159. [f71889fg] = 3,
  160. [f71889ed] = 3,
  161. [f71889a] = 3,
  162. [f8000] = 3, /* +1 fan which is monitor only */
  163. [f81865f] = 2,
  164. };
  165. static const char f71882fg_temp_has_beep[] = {
  166. [f71808e] = 0,
  167. [f71808a] = 1,
  168. [f71858fg] = 0,
  169. [f71862fg] = 1,
  170. [f71869] = 1,
  171. [f71869a] = 1,
  172. [f71882fg] = 1,
  173. [f71889fg] = 1,
  174. [f71889ed] = 1,
  175. [f71889a] = 1,
  176. [f8000] = 0,
  177. [f81865f] = 1,
  178. };
  179. static const char f71882fg_nr_temps[] = {
  180. [f71808e] = 2,
  181. [f71808a] = 2,
  182. [f71858fg] = 3,
  183. [f71862fg] = 3,
  184. [f71869] = 3,
  185. [f71869a] = 3,
  186. [f71882fg] = 3,
  187. [f71889fg] = 3,
  188. [f71889ed] = 3,
  189. [f71889a] = 3,
  190. [f8000] = 3,
  191. [f81865f] = 2,
  192. };
  193. static struct platform_device *f71882fg_pdev;
  194. /* Super-I/O Function prototypes */
  195. static inline int superio_inb(int base, int reg);
  196. static inline int superio_inw(int base, int reg);
  197. static inline int superio_enter(int base);
  198. static inline void superio_select(int base, int ld);
  199. static inline void superio_exit(int base);
  200. struct f71882fg_sio_data {
  201. enum chips type;
  202. };
  203. struct f71882fg_data {
  204. unsigned short addr;
  205. enum chips type;
  206. struct device *hwmon_dev;
  207. struct mutex update_lock;
  208. int temp_start; /* temp numbering start (0 or 1) */
  209. char valid; /* !=0 if following fields are valid */
  210. char auto_point_temp_signed;
  211. unsigned long last_updated; /* In jiffies */
  212. unsigned long last_limits; /* In jiffies */
  213. /* Register Values */
  214. u8 in[F71882FG_MAX_INS];
  215. u8 in1_max;
  216. u8 in_status;
  217. u8 in_beep;
  218. u16 fan[4];
  219. u16 fan_target[4];
  220. u16 fan_full_speed[4];
  221. u8 fan_status;
  222. u8 fan_beep;
  223. /*
  224. * Note: all models have max 3 temperature channels, but on some
  225. * they are addressed as 0-2 and on others as 1-3, so for coding
  226. * convenience we reserve space for 4 channels
  227. */
  228. u16 temp[4];
  229. u8 temp_ovt[4];
  230. u8 temp_high[4];
  231. u8 temp_hyst[2]; /* 2 hysts stored per reg */
  232. u8 temp_type[4];
  233. u8 temp_status;
  234. u8 temp_beep;
  235. u8 temp_diode_open;
  236. u8 temp_config;
  237. u8 pwm[4];
  238. u8 pwm_enable;
  239. u8 pwm_auto_point_hyst[2];
  240. u8 pwm_auto_point_mapping[4];
  241. u8 pwm_auto_point_pwm[4][5];
  242. s8 pwm_auto_point_temp[4][4];
  243. };
  244. /* Sysfs in */
  245. static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
  246. char *buf);
  247. static ssize_t show_in_max(struct device *dev, struct device_attribute
  248. *devattr, char *buf);
  249. static ssize_t store_in_max(struct device *dev, struct device_attribute
  250. *devattr, const char *buf, size_t count);
  251. static ssize_t show_in_beep(struct device *dev, struct device_attribute
  252. *devattr, char *buf);
  253. static ssize_t store_in_beep(struct device *dev, struct device_attribute
  254. *devattr, const char *buf, size_t count);
  255. static ssize_t show_in_alarm(struct device *dev, struct device_attribute
  256. *devattr, char *buf);
  257. /* Sysfs Fan */
  258. static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
  259. char *buf);
  260. static ssize_t show_fan_full_speed(struct device *dev,
  261. struct device_attribute *devattr, char *buf);
  262. static ssize_t store_fan_full_speed(struct device *dev,
  263. struct device_attribute *devattr, const char *buf, size_t count);
  264. static ssize_t show_fan_beep(struct device *dev, struct device_attribute
  265. *devattr, char *buf);
  266. static ssize_t store_fan_beep(struct device *dev, struct device_attribute
  267. *devattr, const char *buf, size_t count);
  268. static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
  269. *devattr, char *buf);
  270. /* Sysfs Temp */
  271. static ssize_t show_temp(struct device *dev, struct device_attribute
  272. *devattr, char *buf);
  273. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  274. *devattr, char *buf);
  275. static ssize_t store_temp_max(struct device *dev, struct device_attribute
  276. *devattr, const char *buf, size_t count);
  277. static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
  278. *devattr, char *buf);
  279. static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
  280. *devattr, const char *buf, size_t count);
  281. static ssize_t show_temp_crit(struct device *dev, struct device_attribute
  282. *devattr, char *buf);
  283. static ssize_t store_temp_crit(struct device *dev, struct device_attribute
  284. *devattr, const char *buf, size_t count);
  285. static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
  286. *devattr, char *buf);
  287. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  288. *devattr, char *buf);
  289. static ssize_t show_temp_beep(struct device *dev, struct device_attribute
  290. *devattr, char *buf);
  291. static ssize_t store_temp_beep(struct device *dev, struct device_attribute
  292. *devattr, const char *buf, size_t count);
  293. static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
  294. *devattr, char *buf);
  295. static ssize_t show_temp_fault(struct device *dev, struct device_attribute
  296. *devattr, char *buf);
  297. /* PWM and Auto point control */
  298. static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
  299. char *buf);
  300. static ssize_t store_pwm(struct device *dev, struct device_attribute *devattr,
  301. const char *buf, size_t count);
  302. static ssize_t show_simple_pwm(struct device *dev,
  303. struct device_attribute *devattr, char *buf);
  304. static ssize_t store_simple_pwm(struct device *dev,
  305. struct device_attribute *devattr, const char *buf, size_t count);
  306. static ssize_t show_pwm_enable(struct device *dev,
  307. struct device_attribute *devattr, char *buf);
  308. static ssize_t store_pwm_enable(struct device *dev,
  309. struct device_attribute *devattr, const char *buf, size_t count);
  310. static ssize_t show_pwm_interpolate(struct device *dev,
  311. struct device_attribute *devattr, char *buf);
  312. static ssize_t store_pwm_interpolate(struct device *dev,
  313. struct device_attribute *devattr, const char *buf, size_t count);
  314. static ssize_t show_pwm_auto_point_channel(struct device *dev,
  315. struct device_attribute *devattr, char *buf);
  316. static ssize_t store_pwm_auto_point_channel(struct device *dev,
  317. struct device_attribute *devattr, const char *buf, size_t count);
  318. static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
  319. struct device_attribute *devattr, char *buf);
  320. static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
  321. struct device_attribute *devattr, const char *buf, size_t count);
  322. static ssize_t show_pwm_auto_point_pwm(struct device *dev,
  323. struct device_attribute *devattr, char *buf);
  324. static ssize_t store_pwm_auto_point_pwm(struct device *dev,
  325. struct device_attribute *devattr, const char *buf, size_t count);
  326. static ssize_t show_pwm_auto_point_temp(struct device *dev,
  327. struct device_attribute *devattr, char *buf);
  328. static ssize_t store_pwm_auto_point_temp(struct device *dev,
  329. struct device_attribute *devattr, const char *buf, size_t count);
  330. /* Sysfs misc */
  331. static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
  332. char *buf);
  333. static int f71882fg_probe(struct platform_device *pdev);
  334. static int f71882fg_remove(struct platform_device *pdev);
  335. static struct platform_driver f71882fg_driver = {
  336. .driver = {
  337. .owner = THIS_MODULE,
  338. .name = DRVNAME,
  339. },
  340. .probe = f71882fg_probe,
  341. .remove = f71882fg_remove,
  342. };
  343. static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
  344. /*
  345. * Temp attr for the f71858fg, the f71858fg is special as it has its
  346. * temperature indexes start at 0 (the others start at 1)
  347. */
  348. static struct sensor_device_attribute_2 f71858fg_temp_attr[] = {
  349. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
  350. SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
  351. store_temp_max, 0, 0),
  352. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  353. store_temp_max_hyst, 0, 0),
  354. SENSOR_ATTR_2(temp1_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 0),
  355. SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  356. store_temp_crit, 0, 0),
  357. SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  358. 0, 0),
  359. SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
  360. SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
  361. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
  362. SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
  363. store_temp_max, 0, 1),
  364. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  365. store_temp_max_hyst, 0, 1),
  366. SENSOR_ATTR_2(temp2_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
  367. SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  368. store_temp_crit, 0, 1),
  369. SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  370. 0, 1),
  371. SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
  372. SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
  373. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
  374. SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
  375. store_temp_max, 0, 2),
  376. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  377. store_temp_max_hyst, 0, 2),
  378. SENSOR_ATTR_2(temp3_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
  379. SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  380. store_temp_crit, 0, 2),
  381. SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  382. 0, 2),
  383. SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
  384. SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
  385. };
  386. /* Temp attr for the standard models */
  387. static struct sensor_device_attribute_2 fxxxx_temp_attr[3][9] = { {
  388. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 1),
  389. SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
  390. store_temp_max, 0, 1),
  391. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  392. store_temp_max_hyst, 0, 1),
  393. /*
  394. * Should really be temp1_max_alarm, but older versions did not handle
  395. * the max and crit alarms separately and lm_sensors v2 depends on the
  396. * presence of temp#_alarm files. The same goes for temp2/3 _alarm.
  397. */
  398. SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
  399. SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  400. store_temp_crit, 0, 1),
  401. SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  402. 0, 1),
  403. SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
  404. SENSOR_ATTR_2(temp1_type, S_IRUGO, show_temp_type, NULL, 0, 1),
  405. SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
  406. }, {
  407. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 2),
  408. SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
  409. store_temp_max, 0, 2),
  410. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  411. store_temp_max_hyst, 0, 2),
  412. /* Should be temp2_max_alarm, see temp1_alarm note */
  413. SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
  414. SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  415. store_temp_crit, 0, 2),
  416. SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  417. 0, 2),
  418. SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
  419. SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 2),
  420. SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
  421. }, {
  422. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 3),
  423. SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
  424. store_temp_max, 0, 3),
  425. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  426. store_temp_max_hyst, 0, 3),
  427. /* Should be temp3_max_alarm, see temp1_alarm note */
  428. SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 3),
  429. SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  430. store_temp_crit, 0, 3),
  431. SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  432. 0, 3),
  433. SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 7),
  434. SENSOR_ATTR_2(temp3_type, S_IRUGO, show_temp_type, NULL, 0, 3),
  435. SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 3),
  436. } };
  437. /* Temp attr for models which can beep on temp alarm */
  438. static struct sensor_device_attribute_2 fxxxx_temp_beep_attr[3][2] = { {
  439. SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  440. store_temp_beep, 0, 1),
  441. SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  442. store_temp_beep, 0, 5),
  443. }, {
  444. SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  445. store_temp_beep, 0, 2),
  446. SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  447. store_temp_beep, 0, 6),
  448. }, {
  449. SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  450. store_temp_beep, 0, 3),
  451. SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  452. store_temp_beep, 0, 7),
  453. } };
  454. /*
  455. * Temp attr for the f8000
  456. * Note on the f8000 temp_ovt (crit) is used as max, and temp_high (max)
  457. * is used as hysteresis value to clear alarms
  458. * Also like the f71858fg its temperature indexes start at 0
  459. */
  460. static struct sensor_device_attribute_2 f8000_temp_attr[] = {
  461. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
  462. SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_crit,
  463. store_temp_crit, 0, 0),
  464. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
  465. store_temp_max, 0, 0),
  466. SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
  467. SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
  468. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
  469. SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_crit,
  470. store_temp_crit, 0, 1),
  471. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
  472. store_temp_max, 0, 1),
  473. SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
  474. SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
  475. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
  476. SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_crit,
  477. store_temp_crit, 0, 2),
  478. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
  479. store_temp_max, 0, 2),
  480. SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
  481. SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
  482. };
  483. /* in attr for all models */
  484. static struct sensor_device_attribute_2 fxxxx_in_attr[] = {
  485. SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
  486. SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1),
  487. SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2),
  488. SENSOR_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 0, 3),
  489. SENSOR_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 0, 4),
  490. SENSOR_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 0, 5),
  491. SENSOR_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 0, 6),
  492. SENSOR_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 0, 7),
  493. SENSOR_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 0, 8),
  494. };
  495. /* For models with in1 alarm capability */
  496. static struct sensor_device_attribute_2 fxxxx_in1_alarm_attr[] = {
  497. SENSOR_ATTR_2(in1_max, S_IRUGO|S_IWUSR, show_in_max, store_in_max,
  498. 0, 1),
  499. SENSOR_ATTR_2(in1_beep, S_IRUGO|S_IWUSR, show_in_beep, store_in_beep,
  500. 0, 1),
  501. SENSOR_ATTR_2(in1_alarm, S_IRUGO, show_in_alarm, NULL, 0, 1),
  502. };
  503. /* Fan / PWM attr common to all models */
  504. static struct sensor_device_attribute_2 fxxxx_fan_attr[4][6] = { {
  505. SENSOR_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0),
  506. SENSOR_ATTR_2(fan1_full_speed, S_IRUGO|S_IWUSR,
  507. show_fan_full_speed,
  508. store_fan_full_speed, 0, 0),
  509. SENSOR_ATTR_2(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 0),
  510. SENSOR_ATTR_2(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 0),
  511. SENSOR_ATTR_2(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  512. store_pwm_enable, 0, 0),
  513. SENSOR_ATTR_2(pwm1_interpolate, S_IRUGO|S_IWUSR,
  514. show_pwm_interpolate, store_pwm_interpolate, 0, 0),
  515. }, {
  516. SENSOR_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 0, 1),
  517. SENSOR_ATTR_2(fan2_full_speed, S_IRUGO|S_IWUSR,
  518. show_fan_full_speed,
  519. store_fan_full_speed, 0, 1),
  520. SENSOR_ATTR_2(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 1),
  521. SENSOR_ATTR_2(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 1),
  522. SENSOR_ATTR_2(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  523. store_pwm_enable, 0, 1),
  524. SENSOR_ATTR_2(pwm2_interpolate, S_IRUGO|S_IWUSR,
  525. show_pwm_interpolate, store_pwm_interpolate, 0, 1),
  526. }, {
  527. SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
  528. SENSOR_ATTR_2(fan3_full_speed, S_IRUGO|S_IWUSR,
  529. show_fan_full_speed,
  530. store_fan_full_speed, 0, 2),
  531. SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
  532. SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 2),
  533. SENSOR_ATTR_2(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  534. store_pwm_enable, 0, 2),
  535. SENSOR_ATTR_2(pwm3_interpolate, S_IRUGO|S_IWUSR,
  536. show_pwm_interpolate, store_pwm_interpolate, 0, 2),
  537. }, {
  538. SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
  539. SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR,
  540. show_fan_full_speed,
  541. store_fan_full_speed, 0, 3),
  542. SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3),
  543. SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3),
  544. SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  545. store_pwm_enable, 0, 3),
  546. SENSOR_ATTR_2(pwm4_interpolate, S_IRUGO|S_IWUSR,
  547. show_pwm_interpolate, store_pwm_interpolate, 0, 3),
  548. } };
  549. /* Attr for the third fan of the f71808a, which only has manual pwm */
  550. static struct sensor_device_attribute_2 f71808a_fan3_attr[] = {
  551. SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
  552. SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
  553. SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR,
  554. show_simple_pwm, store_simple_pwm, 0, 2),
  555. };
  556. /* Attr for models which can beep on Fan alarm */
  557. static struct sensor_device_attribute_2 fxxxx_fan_beep_attr[] = {
  558. SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  559. store_fan_beep, 0, 0),
  560. SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  561. store_fan_beep, 0, 1),
  562. SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  563. store_fan_beep, 0, 2),
  564. SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  565. store_fan_beep, 0, 3),
  566. };
  567. /*
  568. * PWM attr for the f71862fg, fewer pwms and fewer zones per pwm than the
  569. * standard models
  570. */
  571. static struct sensor_device_attribute_2 f71862fg_auto_pwm_attr[3][7] = { {
  572. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  573. show_pwm_auto_point_channel,
  574. store_pwm_auto_point_channel, 0, 0),
  575. SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  576. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  577. 1, 0),
  578. SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  579. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  580. 4, 0),
  581. SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
  582. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  583. 0, 0),
  584. SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
  585. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  586. 3, 0),
  587. SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  588. show_pwm_auto_point_temp_hyst,
  589. store_pwm_auto_point_temp_hyst,
  590. 0, 0),
  591. SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
  592. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  593. }, {
  594. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  595. show_pwm_auto_point_channel,
  596. store_pwm_auto_point_channel, 0, 1),
  597. SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  598. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  599. 1, 1),
  600. SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  601. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  602. 4, 1),
  603. SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
  604. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  605. 0, 1),
  606. SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
  607. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  608. 3, 1),
  609. SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  610. show_pwm_auto_point_temp_hyst,
  611. store_pwm_auto_point_temp_hyst,
  612. 0, 1),
  613. SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
  614. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  615. }, {
  616. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  617. show_pwm_auto_point_channel,
  618. store_pwm_auto_point_channel, 0, 2),
  619. SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  620. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  621. 1, 2),
  622. SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  623. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  624. 4, 2),
  625. SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
  626. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  627. 0, 2),
  628. SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
  629. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  630. 3, 2),
  631. SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  632. show_pwm_auto_point_temp_hyst,
  633. store_pwm_auto_point_temp_hyst,
  634. 0, 2),
  635. SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
  636. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  637. } };
  638. /*
  639. * PWM attr for the f71808e/f71869, almost identical to the f71862fg, but the
  640. * pwm setting when the temperature is above the pwmX_auto_point1_temp can be
  641. * programmed instead of being hardcoded to 0xff
  642. */
  643. static struct sensor_device_attribute_2 f71869_auto_pwm_attr[3][8] = { {
  644. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  645. show_pwm_auto_point_channel,
  646. store_pwm_auto_point_channel, 0, 0),
  647. SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  648. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  649. 0, 0),
  650. SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  651. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  652. 1, 0),
  653. SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
  654. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  655. 4, 0),
  656. SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
  657. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  658. 0, 0),
  659. SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
  660. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  661. 3, 0),
  662. SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  663. show_pwm_auto_point_temp_hyst,
  664. store_pwm_auto_point_temp_hyst,
  665. 0, 0),
  666. SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
  667. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  668. }, {
  669. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  670. show_pwm_auto_point_channel,
  671. store_pwm_auto_point_channel, 0, 1),
  672. SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  673. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  674. 0, 1),
  675. SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  676. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  677. 1, 1),
  678. SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
  679. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  680. 4, 1),
  681. SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
  682. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  683. 0, 1),
  684. SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
  685. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  686. 3, 1),
  687. SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  688. show_pwm_auto_point_temp_hyst,
  689. store_pwm_auto_point_temp_hyst,
  690. 0, 1),
  691. SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
  692. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  693. }, {
  694. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  695. show_pwm_auto_point_channel,
  696. store_pwm_auto_point_channel, 0, 2),
  697. SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  698. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  699. 0, 2),
  700. SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  701. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  702. 1, 2),
  703. SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
  704. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  705. 4, 2),
  706. SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
  707. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  708. 0, 2),
  709. SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
  710. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  711. 3, 2),
  712. SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  713. show_pwm_auto_point_temp_hyst,
  714. store_pwm_auto_point_temp_hyst,
  715. 0, 2),
  716. SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
  717. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  718. } };
  719. /* PWM attr for the standard models */
  720. static struct sensor_device_attribute_2 fxxxx_auto_pwm_attr[4][14] = { {
  721. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  722. show_pwm_auto_point_channel,
  723. store_pwm_auto_point_channel, 0, 0),
  724. SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  725. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  726. 0, 0),
  727. SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  728. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  729. 1, 0),
  730. SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
  731. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  732. 2, 0),
  733. SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO|S_IWUSR,
  734. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  735. 3, 0),
  736. SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IRUGO|S_IWUSR,
  737. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  738. 4, 0),
  739. SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
  740. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  741. 0, 0),
  742. SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
  743. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  744. 1, 0),
  745. SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IRUGO|S_IWUSR,
  746. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  747. 2, 0),
  748. SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IRUGO|S_IWUSR,
  749. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  750. 3, 0),
  751. SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  752. show_pwm_auto_point_temp_hyst,
  753. store_pwm_auto_point_temp_hyst,
  754. 0, 0),
  755. SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
  756. show_pwm_auto_point_temp_hyst, NULL, 1, 0),
  757. SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IRUGO,
  758. show_pwm_auto_point_temp_hyst, NULL, 2, 0),
  759. SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IRUGO,
  760. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  761. }, {
  762. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  763. show_pwm_auto_point_channel,
  764. store_pwm_auto_point_channel, 0, 1),
  765. SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  766. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  767. 0, 1),
  768. SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  769. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  770. 1, 1),
  771. SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
  772. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  773. 2, 1),
  774. SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO|S_IWUSR,
  775. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  776. 3, 1),
  777. SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IRUGO|S_IWUSR,
  778. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  779. 4, 1),
  780. SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
  781. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  782. 0, 1),
  783. SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
  784. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  785. 1, 1),
  786. SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IRUGO|S_IWUSR,
  787. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  788. 2, 1),
  789. SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IRUGO|S_IWUSR,
  790. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  791. 3, 1),
  792. SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  793. show_pwm_auto_point_temp_hyst,
  794. store_pwm_auto_point_temp_hyst,
  795. 0, 1),
  796. SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
  797. show_pwm_auto_point_temp_hyst, NULL, 1, 1),
  798. SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IRUGO,
  799. show_pwm_auto_point_temp_hyst, NULL, 2, 1),
  800. SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IRUGO,
  801. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  802. }, {
  803. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  804. show_pwm_auto_point_channel,
  805. store_pwm_auto_point_channel, 0, 2),
  806. SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  807. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  808. 0, 2),
  809. SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  810. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  811. 1, 2),
  812. SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
  813. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  814. 2, 2),
  815. SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO|S_IWUSR,
  816. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  817. 3, 2),
  818. SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IRUGO|S_IWUSR,
  819. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  820. 4, 2),
  821. SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
  822. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  823. 0, 2),
  824. SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
  825. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  826. 1, 2),
  827. SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IRUGO|S_IWUSR,
  828. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  829. 2, 2),
  830. SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IRUGO|S_IWUSR,
  831. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  832. 3, 2),
  833. SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  834. show_pwm_auto_point_temp_hyst,
  835. store_pwm_auto_point_temp_hyst,
  836. 0, 2),
  837. SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
  838. show_pwm_auto_point_temp_hyst, NULL, 1, 2),
  839. SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IRUGO,
  840. show_pwm_auto_point_temp_hyst, NULL, 2, 2),
  841. SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO,
  842. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  843. }, {
  844. SENSOR_ATTR_2(pwm4_auto_channels_temp, S_IRUGO|S_IWUSR,
  845. show_pwm_auto_point_channel,
  846. store_pwm_auto_point_channel, 0, 3),
  847. SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IRUGO|S_IWUSR,
  848. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  849. 0, 3),
  850. SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IRUGO|S_IWUSR,
  851. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  852. 1, 3),
  853. SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IRUGO|S_IWUSR,
  854. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  855. 2, 3),
  856. SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IRUGO|S_IWUSR,
  857. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  858. 3, 3),
  859. SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IRUGO|S_IWUSR,
  860. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  861. 4, 3),
  862. SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IRUGO|S_IWUSR,
  863. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  864. 0, 3),
  865. SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IRUGO|S_IWUSR,
  866. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  867. 1, 3),
  868. SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IRUGO|S_IWUSR,
  869. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  870. 2, 3),
  871. SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IRUGO|S_IWUSR,
  872. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  873. 3, 3),
  874. SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  875. show_pwm_auto_point_temp_hyst,
  876. store_pwm_auto_point_temp_hyst,
  877. 0, 3),
  878. SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IRUGO,
  879. show_pwm_auto_point_temp_hyst, NULL, 1, 3),
  880. SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IRUGO,
  881. show_pwm_auto_point_temp_hyst, NULL, 2, 3),
  882. SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IRUGO,
  883. show_pwm_auto_point_temp_hyst, NULL, 3, 3),
  884. } };
  885. /* Fan attr specific to the f8000 (4th fan input can only measure speed) */
  886. static struct sensor_device_attribute_2 f8000_fan_attr[] = {
  887. SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
  888. };
  889. /*
  890. * PWM attr for the f8000, zones mapped to temp instead of to pwm!
  891. * Also the register block at offset A0 maps to TEMP1 (so our temp2, as the
  892. * F8000 starts counting temps at 0), B0 maps the TEMP2 and C0 maps to TEMP0
  893. */
  894. static struct sensor_device_attribute_2 f8000_auto_pwm_attr[3][14] = { {
  895. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  896. show_pwm_auto_point_channel,
  897. store_pwm_auto_point_channel, 0, 0),
  898. SENSOR_ATTR_2(temp1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  899. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  900. 0, 2),
  901. SENSOR_ATTR_2(temp1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  902. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  903. 1, 2),
  904. SENSOR_ATTR_2(temp1_auto_point3_pwm, S_IRUGO|S_IWUSR,
  905. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  906. 2, 2),
  907. SENSOR_ATTR_2(temp1_auto_point4_pwm, S_IRUGO|S_IWUSR,
  908. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  909. 3, 2),
  910. SENSOR_ATTR_2(temp1_auto_point5_pwm, S_IRUGO|S_IWUSR,
  911. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  912. 4, 2),
  913. SENSOR_ATTR_2(temp1_auto_point1_temp, S_IRUGO|S_IWUSR,
  914. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  915. 0, 2),
  916. SENSOR_ATTR_2(temp1_auto_point2_temp, S_IRUGO|S_IWUSR,
  917. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  918. 1, 2),
  919. SENSOR_ATTR_2(temp1_auto_point3_temp, S_IRUGO|S_IWUSR,
  920. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  921. 2, 2),
  922. SENSOR_ATTR_2(temp1_auto_point4_temp, S_IRUGO|S_IWUSR,
  923. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  924. 3, 2),
  925. SENSOR_ATTR_2(temp1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  926. show_pwm_auto_point_temp_hyst,
  927. store_pwm_auto_point_temp_hyst,
  928. 0, 2),
  929. SENSOR_ATTR_2(temp1_auto_point2_temp_hyst, S_IRUGO,
  930. show_pwm_auto_point_temp_hyst, NULL, 1, 2),
  931. SENSOR_ATTR_2(temp1_auto_point3_temp_hyst, S_IRUGO,
  932. show_pwm_auto_point_temp_hyst, NULL, 2, 2),
  933. SENSOR_ATTR_2(temp1_auto_point4_temp_hyst, S_IRUGO,
  934. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  935. }, {
  936. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  937. show_pwm_auto_point_channel,
  938. store_pwm_auto_point_channel, 0, 1),
  939. SENSOR_ATTR_2(temp2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  940. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  941. 0, 0),
  942. SENSOR_ATTR_2(temp2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  943. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  944. 1, 0),
  945. SENSOR_ATTR_2(temp2_auto_point3_pwm, S_IRUGO|S_IWUSR,
  946. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  947. 2, 0),
  948. SENSOR_ATTR_2(temp2_auto_point4_pwm, S_IRUGO|S_IWUSR,
  949. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  950. 3, 0),
  951. SENSOR_ATTR_2(temp2_auto_point5_pwm, S_IRUGO|S_IWUSR,
  952. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  953. 4, 0),
  954. SENSOR_ATTR_2(temp2_auto_point1_temp, S_IRUGO|S_IWUSR,
  955. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  956. 0, 0),
  957. SENSOR_ATTR_2(temp2_auto_point2_temp, S_IRUGO|S_IWUSR,
  958. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  959. 1, 0),
  960. SENSOR_ATTR_2(temp2_auto_point3_temp, S_IRUGO|S_IWUSR,
  961. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  962. 2, 0),
  963. SENSOR_ATTR_2(temp2_auto_point4_temp, S_IRUGO|S_IWUSR,
  964. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  965. 3, 0),
  966. SENSOR_ATTR_2(temp2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  967. show_pwm_auto_point_temp_hyst,
  968. store_pwm_auto_point_temp_hyst,
  969. 0, 0),
  970. SENSOR_ATTR_2(temp2_auto_point2_temp_hyst, S_IRUGO,
  971. show_pwm_auto_point_temp_hyst, NULL, 1, 0),
  972. SENSOR_ATTR_2(temp2_auto_point3_temp_hyst, S_IRUGO,
  973. show_pwm_auto_point_temp_hyst, NULL, 2, 0),
  974. SENSOR_ATTR_2(temp2_auto_point4_temp_hyst, S_IRUGO,
  975. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  976. }, {
  977. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  978. show_pwm_auto_point_channel,
  979. store_pwm_auto_point_channel, 0, 2),
  980. SENSOR_ATTR_2(temp3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  981. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  982. 0, 1),
  983. SENSOR_ATTR_2(temp3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  984. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  985. 1, 1),
  986. SENSOR_ATTR_2(temp3_auto_point3_pwm, S_IRUGO|S_IWUSR,
  987. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  988. 2, 1),
  989. SENSOR_ATTR_2(temp3_auto_point4_pwm, S_IRUGO|S_IWUSR,
  990. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  991. 3, 1),
  992. SENSOR_ATTR_2(temp3_auto_point5_pwm, S_IRUGO|S_IWUSR,
  993. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  994. 4, 1),
  995. SENSOR_ATTR_2(temp3_auto_point1_temp, S_IRUGO|S_IWUSR,
  996. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  997. 0, 1),
  998. SENSOR_ATTR_2(temp3_auto_point2_temp, S_IRUGO|S_IWUSR,
  999. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1000. 1, 1),
  1001. SENSOR_ATTR_2(temp3_auto_point3_temp, S_IRUGO|S_IWUSR,
  1002. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1003. 2, 1),
  1004. SENSOR_ATTR_2(temp3_auto_point4_temp, S_IRUGO|S_IWUSR,
  1005. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1006. 3, 1),
  1007. SENSOR_ATTR_2(temp3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  1008. show_pwm_auto_point_temp_hyst,
  1009. store_pwm_auto_point_temp_hyst,
  1010. 0, 1),
  1011. SENSOR_ATTR_2(temp3_auto_point2_temp_hyst, S_IRUGO,
  1012. show_pwm_auto_point_temp_hyst, NULL, 1, 1),
  1013. SENSOR_ATTR_2(temp3_auto_point3_temp_hyst, S_IRUGO,
  1014. show_pwm_auto_point_temp_hyst, NULL, 2, 1),
  1015. SENSOR_ATTR_2(temp3_auto_point4_temp_hyst, S_IRUGO,
  1016. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  1017. } };
  1018. /* Super I/O functions */
  1019. static inline int superio_inb(int base, int reg)
  1020. {
  1021. outb(reg, base);
  1022. return inb(base + 1);
  1023. }
  1024. static int superio_inw(int base, int reg)
  1025. {
  1026. int val;
  1027. val = superio_inb(base, reg) << 8;
  1028. val |= superio_inb(base, reg + 1);
  1029. return val;
  1030. }
  1031. static inline int superio_enter(int base)
  1032. {
  1033. /* Don't step on other drivers' I/O space by accident */
  1034. if (!request_muxed_region(base, 2, DRVNAME)) {
  1035. pr_err("I/O address 0x%04x already in use\n", base);
  1036. return -EBUSY;
  1037. }
  1038. /* according to the datasheet the key must be send twice! */
  1039. outb(SIO_UNLOCK_KEY, base);
  1040. outb(SIO_UNLOCK_KEY, base);
  1041. return 0;
  1042. }
  1043. static inline void superio_select(int base, int ld)
  1044. {
  1045. outb(SIO_REG_LDSEL, base);
  1046. outb(ld, base + 1);
  1047. }
  1048. static inline void superio_exit(int base)
  1049. {
  1050. outb(SIO_LOCK_KEY, base);
  1051. release_region(base, 2);
  1052. }
  1053. static inline int fan_from_reg(u16 reg)
  1054. {
  1055. return reg ? (1500000 / reg) : 0;
  1056. }
  1057. static inline u16 fan_to_reg(int fan)
  1058. {
  1059. return fan ? (1500000 / fan) : 0;
  1060. }
  1061. static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg)
  1062. {
  1063. u8 val;
  1064. outb(reg, data->addr + ADDR_REG_OFFSET);
  1065. val = inb(data->addr + DATA_REG_OFFSET);
  1066. return val;
  1067. }
  1068. static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg)
  1069. {
  1070. u16 val;
  1071. val = f71882fg_read8(data, reg) << 8;
  1072. val |= f71882fg_read8(data, reg + 1);
  1073. return val;
  1074. }
  1075. static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val)
  1076. {
  1077. outb(reg, data->addr + ADDR_REG_OFFSET);
  1078. outb(val, data->addr + DATA_REG_OFFSET);
  1079. }
  1080. static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val)
  1081. {
  1082. f71882fg_write8(data, reg, val >> 8);
  1083. f71882fg_write8(data, reg + 1, val & 0xff);
  1084. }
  1085. static u16 f71882fg_read_temp(struct f71882fg_data *data, int nr)
  1086. {
  1087. if (data->type == f71858fg)
  1088. return f71882fg_read16(data, F71882FG_REG_TEMP(nr));
  1089. else
  1090. return f71882fg_read8(data, F71882FG_REG_TEMP(nr));
  1091. }
  1092. static struct f71882fg_data *f71882fg_update_device(struct device *dev)
  1093. {
  1094. struct f71882fg_data *data = dev_get_drvdata(dev);
  1095. int nr_fans = f71882fg_nr_fans[data->type];
  1096. int nr_temps = f71882fg_nr_temps[data->type];
  1097. int nr, reg, point;
  1098. mutex_lock(&data->update_lock);
  1099. /* Update once every 60 seconds */
  1100. if (time_after(jiffies, data->last_limits + 60 * HZ) ||
  1101. !data->valid) {
  1102. if (f71882fg_has_in1_alarm[data->type]) {
  1103. data->in1_max =
  1104. f71882fg_read8(data, F71882FG_REG_IN1_HIGH);
  1105. data->in_beep =
  1106. f71882fg_read8(data, F71882FG_REG_IN_BEEP);
  1107. }
  1108. /* Get High & boundary temps*/
  1109. for (nr = data->temp_start; nr < nr_temps + data->temp_start;
  1110. nr++) {
  1111. data->temp_ovt[nr] = f71882fg_read8(data,
  1112. F71882FG_REG_TEMP_OVT(nr));
  1113. data->temp_high[nr] = f71882fg_read8(data,
  1114. F71882FG_REG_TEMP_HIGH(nr));
  1115. }
  1116. if (data->type != f8000) {
  1117. data->temp_hyst[0] = f71882fg_read8(data,
  1118. F71882FG_REG_TEMP_HYST(0));
  1119. data->temp_hyst[1] = f71882fg_read8(data,
  1120. F71882FG_REG_TEMP_HYST(1));
  1121. }
  1122. /* All but the f71858fg / f8000 have this register */
  1123. if ((data->type != f71858fg) && (data->type != f8000)) {
  1124. reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE);
  1125. data->temp_type[1] = (reg & 0x02) ? 2 : 4;
  1126. data->temp_type[2] = (reg & 0x04) ? 2 : 4;
  1127. data->temp_type[3] = (reg & 0x08) ? 2 : 4;
  1128. }
  1129. if (f71882fg_fan_has_beep[data->type])
  1130. data->fan_beep = f71882fg_read8(data,
  1131. F71882FG_REG_FAN_BEEP);
  1132. if (f71882fg_temp_has_beep[data->type])
  1133. data->temp_beep = f71882fg_read8(data,
  1134. F71882FG_REG_TEMP_BEEP);
  1135. data->pwm_enable = f71882fg_read8(data,
  1136. F71882FG_REG_PWM_ENABLE);
  1137. data->pwm_auto_point_hyst[0] =
  1138. f71882fg_read8(data, F71882FG_REG_FAN_HYST(0));
  1139. data->pwm_auto_point_hyst[1] =
  1140. f71882fg_read8(data, F71882FG_REG_FAN_HYST(1));
  1141. for (nr = 0; nr < nr_fans; nr++) {
  1142. data->pwm_auto_point_mapping[nr] =
  1143. f71882fg_read8(data,
  1144. F71882FG_REG_POINT_MAPPING(nr));
  1145. switch (data->type) {
  1146. default:
  1147. for (point = 0; point < 5; point++) {
  1148. data->pwm_auto_point_pwm[nr][point] =
  1149. f71882fg_read8(data,
  1150. F71882FG_REG_POINT_PWM
  1151. (nr, point));
  1152. }
  1153. for (point = 0; point < 4; point++) {
  1154. data->pwm_auto_point_temp[nr][point] =
  1155. f71882fg_read8(data,
  1156. F71882FG_REG_POINT_TEMP
  1157. (nr, point));
  1158. }
  1159. break;
  1160. case f71808e:
  1161. case f71869:
  1162. data->pwm_auto_point_pwm[nr][0] =
  1163. f71882fg_read8(data,
  1164. F71882FG_REG_POINT_PWM(nr, 0));
  1165. /* Fall through */
  1166. case f71862fg:
  1167. data->pwm_auto_point_pwm[nr][1] =
  1168. f71882fg_read8(data,
  1169. F71882FG_REG_POINT_PWM
  1170. (nr, 1));
  1171. data->pwm_auto_point_pwm[nr][4] =
  1172. f71882fg_read8(data,
  1173. F71882FG_REG_POINT_PWM
  1174. (nr, 4));
  1175. data->pwm_auto_point_temp[nr][0] =
  1176. f71882fg_read8(data,
  1177. F71882FG_REG_POINT_TEMP
  1178. (nr, 0));
  1179. data->pwm_auto_point_temp[nr][3] =
  1180. f71882fg_read8(data,
  1181. F71882FG_REG_POINT_TEMP
  1182. (nr, 3));
  1183. break;
  1184. }
  1185. }
  1186. data->last_limits = jiffies;
  1187. }
  1188. /* Update every second */
  1189. if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
  1190. data->temp_status = f71882fg_read8(data,
  1191. F71882FG_REG_TEMP_STATUS);
  1192. data->temp_diode_open = f71882fg_read8(data,
  1193. F71882FG_REG_TEMP_DIODE_OPEN);
  1194. for (nr = data->temp_start; nr < nr_temps + data->temp_start;
  1195. nr++)
  1196. data->temp[nr] = f71882fg_read_temp(data, nr);
  1197. data->fan_status = f71882fg_read8(data,
  1198. F71882FG_REG_FAN_STATUS);
  1199. for (nr = 0; nr < nr_fans; nr++) {
  1200. data->fan[nr] = f71882fg_read16(data,
  1201. F71882FG_REG_FAN(nr));
  1202. data->fan_target[nr] =
  1203. f71882fg_read16(data, F71882FG_REG_FAN_TARGET(nr));
  1204. data->fan_full_speed[nr] =
  1205. f71882fg_read16(data,
  1206. F71882FG_REG_FAN_FULL_SPEED(nr));
  1207. data->pwm[nr] =
  1208. f71882fg_read8(data, F71882FG_REG_PWM(nr));
  1209. }
  1210. /* Some models have 1 more fan with limited capabilities */
  1211. if (data->type == f71808a) {
  1212. data->fan[2] = f71882fg_read16(data,
  1213. F71882FG_REG_FAN(2));
  1214. data->pwm[2] = f71882fg_read8(data,
  1215. F71882FG_REG_PWM(2));
  1216. }
  1217. if (data->type == f8000)
  1218. data->fan[3] = f71882fg_read16(data,
  1219. F71882FG_REG_FAN(3));
  1220. if (f71882fg_has_in1_alarm[data->type])
  1221. data->in_status = f71882fg_read8(data,
  1222. F71882FG_REG_IN_STATUS);
  1223. for (nr = 0; nr < F71882FG_MAX_INS; nr++)
  1224. if (f71882fg_has_in[data->type][nr])
  1225. data->in[nr] = f71882fg_read8(data,
  1226. F71882FG_REG_IN(nr));
  1227. data->last_updated = jiffies;
  1228. data->valid = 1;
  1229. }
  1230. mutex_unlock(&data->update_lock);
  1231. return data;
  1232. }
  1233. /* Sysfs Interface */
  1234. static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
  1235. char *buf)
  1236. {
  1237. struct f71882fg_data *data = f71882fg_update_device(dev);
  1238. int nr = to_sensor_dev_attr_2(devattr)->index;
  1239. int speed = fan_from_reg(data->fan[nr]);
  1240. if (speed == FAN_MIN_DETECT)
  1241. speed = 0;
  1242. return sprintf(buf, "%d\n", speed);
  1243. }
  1244. static ssize_t show_fan_full_speed(struct device *dev,
  1245. struct device_attribute *devattr, char *buf)
  1246. {
  1247. struct f71882fg_data *data = f71882fg_update_device(dev);
  1248. int nr = to_sensor_dev_attr_2(devattr)->index;
  1249. int speed = fan_from_reg(data->fan_full_speed[nr]);
  1250. return sprintf(buf, "%d\n", speed);
  1251. }
  1252. static ssize_t store_fan_full_speed(struct device *dev,
  1253. struct device_attribute *devattr,
  1254. const char *buf, size_t count)
  1255. {
  1256. struct f71882fg_data *data = dev_get_drvdata(dev);
  1257. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1258. long val;
  1259. err = kstrtol(buf, 10, &val);
  1260. if (err)
  1261. return err;
  1262. val = clamp_val(val, 23, 1500000);
  1263. val = fan_to_reg(val);
  1264. mutex_lock(&data->update_lock);
  1265. f71882fg_write16(data, F71882FG_REG_FAN_FULL_SPEED(nr), val);
  1266. data->fan_full_speed[nr] = val;
  1267. mutex_unlock(&data->update_lock);
  1268. return count;
  1269. }
  1270. static ssize_t show_fan_beep(struct device *dev, struct device_attribute
  1271. *devattr, char *buf)
  1272. {
  1273. struct f71882fg_data *data = f71882fg_update_device(dev);
  1274. int nr = to_sensor_dev_attr_2(devattr)->index;
  1275. if (data->fan_beep & (1 << nr))
  1276. return sprintf(buf, "1\n");
  1277. else
  1278. return sprintf(buf, "0\n");
  1279. }
  1280. static ssize_t store_fan_beep(struct device *dev, struct device_attribute
  1281. *devattr, const char *buf, size_t count)
  1282. {
  1283. struct f71882fg_data *data = dev_get_drvdata(dev);
  1284. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1285. unsigned long val;
  1286. err = kstrtoul(buf, 10, &val);
  1287. if (err)
  1288. return err;
  1289. mutex_lock(&data->update_lock);
  1290. data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP);
  1291. if (val)
  1292. data->fan_beep |= 1 << nr;
  1293. else
  1294. data->fan_beep &= ~(1 << nr);
  1295. f71882fg_write8(data, F71882FG_REG_FAN_BEEP, data->fan_beep);
  1296. mutex_unlock(&data->update_lock);
  1297. return count;
  1298. }
  1299. static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
  1300. *devattr, char *buf)
  1301. {
  1302. struct f71882fg_data *data = f71882fg_update_device(dev);
  1303. int nr = to_sensor_dev_attr_2(devattr)->index;
  1304. if (data->fan_status & (1 << nr))
  1305. return sprintf(buf, "1\n");
  1306. else
  1307. return sprintf(buf, "0\n");
  1308. }
  1309. static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
  1310. char *buf)
  1311. {
  1312. struct f71882fg_data *data = f71882fg_update_device(dev);
  1313. int nr = to_sensor_dev_attr_2(devattr)->index;
  1314. return sprintf(buf, "%d\n", data->in[nr] * 8);
  1315. }
  1316. static ssize_t show_in_max(struct device *dev, struct device_attribute
  1317. *devattr, char *buf)
  1318. {
  1319. struct f71882fg_data *data = f71882fg_update_device(dev);
  1320. return sprintf(buf, "%d\n", data->in1_max * 8);
  1321. }
  1322. static ssize_t store_in_max(struct device *dev, struct device_attribute
  1323. *devattr, const char *buf, size_t count)
  1324. {
  1325. struct f71882fg_data *data = dev_get_drvdata(dev);
  1326. int err;
  1327. long val;
  1328. err = kstrtol(buf, 10, &val);
  1329. if (err)
  1330. return err;
  1331. val /= 8;
  1332. val = clamp_val(val, 0, 255);
  1333. mutex_lock(&data->update_lock);
  1334. f71882fg_write8(data, F71882FG_REG_IN1_HIGH, val);
  1335. data->in1_max = val;
  1336. mutex_unlock(&data->update_lock);
  1337. return count;
  1338. }
  1339. static ssize_t show_in_beep(struct device *dev, struct device_attribute
  1340. *devattr, char *buf)
  1341. {
  1342. struct f71882fg_data *data = f71882fg_update_device(dev);
  1343. int nr = to_sensor_dev_attr_2(devattr)->index;
  1344. if (data->in_beep & (1 << nr))
  1345. return sprintf(buf, "1\n");
  1346. else
  1347. return sprintf(buf, "0\n");
  1348. }
  1349. static ssize_t store_in_beep(struct device *dev, struct device_attribute
  1350. *devattr, const char *buf, size_t count)
  1351. {
  1352. struct f71882fg_data *data = dev_get_drvdata(dev);
  1353. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1354. unsigned long val;
  1355. err = kstrtoul(buf, 10, &val);
  1356. if (err)
  1357. return err;
  1358. mutex_lock(&data->update_lock);
  1359. data->in_beep = f71882fg_read8(data, F71882FG_REG_IN_BEEP);
  1360. if (val)
  1361. data->in_beep |= 1 << nr;
  1362. else
  1363. data->in_beep &= ~(1 << nr);
  1364. f71882fg_write8(data, F71882FG_REG_IN_BEEP, data->in_beep);
  1365. mutex_unlock(&data->update_lock);
  1366. return count;
  1367. }
  1368. static ssize_t show_in_alarm(struct device *dev, struct device_attribute
  1369. *devattr, char *buf)
  1370. {
  1371. struct f71882fg_data *data = f71882fg_update_device(dev);
  1372. int nr = to_sensor_dev_attr_2(devattr)->index;
  1373. if (data->in_status & (1 << nr))
  1374. return sprintf(buf, "1\n");
  1375. else
  1376. return sprintf(buf, "0\n");
  1377. }
  1378. static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
  1379. char *buf)
  1380. {
  1381. struct f71882fg_data *data = f71882fg_update_device(dev);
  1382. int nr = to_sensor_dev_attr_2(devattr)->index;
  1383. int sign, temp;
  1384. if (data->type == f71858fg) {
  1385. /* TEMP_TABLE_SEL 1 or 3 ? */
  1386. if (data->temp_config & 1) {
  1387. sign = data->temp[nr] & 0x0001;
  1388. temp = (data->temp[nr] >> 5) & 0x7ff;
  1389. } else {
  1390. sign = data->temp[nr] & 0x8000;
  1391. temp = (data->temp[nr] >> 5) & 0x3ff;
  1392. }
  1393. temp *= 125;
  1394. if (sign)
  1395. temp -= 128000;
  1396. } else
  1397. temp = data->temp[nr] * 1000;
  1398. return sprintf(buf, "%d\n", temp);
  1399. }
  1400. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  1401. *devattr, char *buf)
  1402. {
  1403. struct f71882fg_data *data = f71882fg_update_device(dev);
  1404. int nr = to_sensor_dev_attr_2(devattr)->index;
  1405. return sprintf(buf, "%d\n", data->temp_high[nr] * 1000);
  1406. }
  1407. static ssize_t store_temp_max(struct device *dev, struct device_attribute
  1408. *devattr, const char *buf, size_t count)
  1409. {
  1410. struct f71882fg_data *data = dev_get_drvdata(dev);
  1411. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1412. long val;
  1413. err = kstrtol(buf, 10, &val);
  1414. if (err)
  1415. return err;
  1416. val /= 1000;
  1417. val = clamp_val(val, 0, 255);
  1418. mutex_lock(&data->update_lock);
  1419. f71882fg_write8(data, F71882FG_REG_TEMP_HIGH(nr), val);
  1420. data->temp_high[nr] = val;
  1421. mutex_unlock(&data->update_lock);
  1422. return count;
  1423. }
  1424. static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
  1425. *devattr, char *buf)
  1426. {
  1427. struct f71882fg_data *data = f71882fg_update_device(dev);
  1428. int nr = to_sensor_dev_attr_2(devattr)->index;
  1429. int temp_max_hyst;
  1430. mutex_lock(&data->update_lock);
  1431. if (nr & 1)
  1432. temp_max_hyst = data->temp_hyst[nr / 2] >> 4;
  1433. else
  1434. temp_max_hyst = data->temp_hyst[nr / 2] & 0x0f;
  1435. temp_max_hyst = (data->temp_high[nr] - temp_max_hyst) * 1000;
  1436. mutex_unlock(&data->update_lock);
  1437. return sprintf(buf, "%d\n", temp_max_hyst);
  1438. }
  1439. static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
  1440. *devattr, const char *buf, size_t count)
  1441. {
  1442. struct f71882fg_data *data = dev_get_drvdata(dev);
  1443. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1444. ssize_t ret = count;
  1445. u8 reg;
  1446. long val;
  1447. err = kstrtol(buf, 10, &val);
  1448. if (err)
  1449. return err;
  1450. val /= 1000;
  1451. mutex_lock(&data->update_lock);
  1452. /* convert abs to relative and check */
  1453. data->temp_high[nr] = f71882fg_read8(data, F71882FG_REG_TEMP_HIGH(nr));
  1454. val = clamp_val(val, data->temp_high[nr] - 15, data->temp_high[nr]);
  1455. val = data->temp_high[nr] - val;
  1456. /* convert value to register contents */
  1457. reg = f71882fg_read8(data, F71882FG_REG_TEMP_HYST(nr / 2));
  1458. if (nr & 1)
  1459. reg = (reg & 0x0f) | (val << 4);
  1460. else
  1461. reg = (reg & 0xf0) | val;
  1462. f71882fg_write8(data, F71882FG_REG_TEMP_HYST(nr / 2), reg);
  1463. data->temp_hyst[nr / 2] = reg;
  1464. mutex_unlock(&data->update_lock);
  1465. return ret;
  1466. }
  1467. static ssize_t show_temp_crit(struct device *dev, struct device_attribute
  1468. *devattr, char *buf)
  1469. {
  1470. struct f71882fg_data *data = f71882fg_update_device(dev);
  1471. int nr = to_sensor_dev_attr_2(devattr)->index;
  1472. return sprintf(buf, "%d\n", data->temp_ovt[nr] * 1000);
  1473. }
  1474. static ssize_t store_temp_crit(struct device *dev, struct device_attribute
  1475. *devattr, const char *buf, size_t count)
  1476. {
  1477. struct f71882fg_data *data = dev_get_drvdata(dev);
  1478. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1479. long val;
  1480. err = kstrtol(buf, 10, &val);
  1481. if (err)
  1482. return err;
  1483. val /= 1000;
  1484. val = clamp_val(val, 0, 255);
  1485. mutex_lock(&data->update_lock);
  1486. f71882fg_write8(data, F71882FG_REG_TEMP_OVT(nr), val);
  1487. data->temp_ovt[nr] = val;
  1488. mutex_unlock(&data->update_lock);
  1489. return count;
  1490. }
  1491. static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
  1492. *devattr, char *buf)
  1493. {
  1494. struct f71882fg_data *data = f71882fg_update_device(dev);
  1495. int nr = to_sensor_dev_attr_2(devattr)->index;
  1496. int temp_crit_hyst;
  1497. mutex_lock(&data->update_lock);
  1498. if (nr & 1)
  1499. temp_crit_hyst = data->temp_hyst[nr / 2] >> 4;
  1500. else
  1501. temp_crit_hyst = data->temp_hyst[nr / 2] & 0x0f;
  1502. temp_crit_hyst = (data->temp_ovt[nr] - temp_crit_hyst) * 1000;
  1503. mutex_unlock(&data->update_lock);
  1504. return sprintf(buf, "%d\n", temp_crit_hyst);
  1505. }
  1506. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  1507. *devattr, char *buf)
  1508. {
  1509. struct f71882fg_data *data = f71882fg_update_device(dev);
  1510. int nr = to_sensor_dev_attr_2(devattr)->index;
  1511. return sprintf(buf, "%d\n", data->temp_type[nr]);
  1512. }
  1513. static ssize_t show_temp_beep(struct device *dev, struct device_attribute
  1514. *devattr, char *buf)
  1515. {
  1516. struct f71882fg_data *data = f71882fg_update_device(dev);
  1517. int nr = to_sensor_dev_attr_2(devattr)->index;
  1518. if (data->temp_beep & (1 << nr))
  1519. return sprintf(buf, "1\n");
  1520. else
  1521. return sprintf(buf, "0\n");
  1522. }
  1523. static ssize_t store_temp_beep(struct device *dev, struct device_attribute
  1524. *devattr, const char *buf, size_t count)
  1525. {
  1526. struct f71882fg_data *data = dev_get_drvdata(dev);
  1527. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1528. unsigned long val;
  1529. err = kstrtoul(buf, 10, &val);
  1530. if (err)
  1531. return err;
  1532. mutex_lock(&data->update_lock);
  1533. data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP);
  1534. if (val)
  1535. data->temp_beep |= 1 << nr;
  1536. else
  1537. data->temp_beep &= ~(1 << nr);
  1538. f71882fg_write8(data, F71882FG_REG_TEMP_BEEP, data->temp_beep);
  1539. mutex_unlock(&data->update_lock);
  1540. return count;
  1541. }
  1542. static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
  1543. *devattr, char *buf)
  1544. {
  1545. struct f71882fg_data *data = f71882fg_update_device(dev);
  1546. int nr = to_sensor_dev_attr_2(devattr)->index;
  1547. if (data->temp_status & (1 << nr))
  1548. return sprintf(buf, "1\n");
  1549. else
  1550. return sprintf(buf, "0\n");
  1551. }
  1552. static ssize_t show_temp_fault(struct device *dev, struct device_attribute
  1553. *devattr, char *buf)
  1554. {
  1555. struct f71882fg_data *data = f71882fg_update_device(dev);
  1556. int nr = to_sensor_dev_attr_2(devattr)->index;
  1557. if (data->temp_diode_open & (1 << nr))
  1558. return sprintf(buf, "1\n");
  1559. else
  1560. return sprintf(buf, "0\n");
  1561. }
  1562. static ssize_t show_pwm(struct device *dev,
  1563. struct device_attribute *devattr, char *buf)
  1564. {
  1565. struct f71882fg_data *data = f71882fg_update_device(dev);
  1566. int val, nr = to_sensor_dev_attr_2(devattr)->index;
  1567. mutex_lock(&data->update_lock);
  1568. if (data->pwm_enable & (1 << (2 * nr)))
  1569. /* PWM mode */
  1570. val = data->pwm[nr];
  1571. else {
  1572. /* RPM mode */
  1573. val = 255 * fan_from_reg(data->fan_target[nr])
  1574. / fan_from_reg(data->fan_full_speed[nr]);
  1575. }
  1576. mutex_unlock(&data->update_lock);
  1577. return sprintf(buf, "%d\n", val);
  1578. }
  1579. static ssize_t store_pwm(struct device *dev,
  1580. struct device_attribute *devattr, const char *buf,
  1581. size_t count)
  1582. {
  1583. struct f71882fg_data *data = dev_get_drvdata(dev);
  1584. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1585. long val;
  1586. err = kstrtol(buf, 10, &val);
  1587. if (err)
  1588. return err;
  1589. val = clamp_val(val, 0, 255);
  1590. mutex_lock(&data->update_lock);
  1591. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1592. if ((data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 3) != 2) ||
  1593. (data->type != f8000 && !((data->pwm_enable >> 2 * nr) & 2))) {
  1594. count = -EROFS;
  1595. goto leave;
  1596. }
  1597. if (data->pwm_enable & (1 << (2 * nr))) {
  1598. /* PWM mode */
  1599. f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
  1600. data->pwm[nr] = val;
  1601. } else {
  1602. /* RPM mode */
  1603. int target, full_speed;
  1604. full_speed = f71882fg_read16(data,
  1605. F71882FG_REG_FAN_FULL_SPEED(nr));
  1606. target = fan_to_reg(val * fan_from_reg(full_speed) / 255);
  1607. f71882fg_write16(data, F71882FG_REG_FAN_TARGET(nr), target);
  1608. data->fan_target[nr] = target;
  1609. data->fan_full_speed[nr] = full_speed;
  1610. }
  1611. leave:
  1612. mutex_unlock(&data->update_lock);
  1613. return count;
  1614. }
  1615. static ssize_t show_simple_pwm(struct device *dev,
  1616. struct device_attribute *devattr, char *buf)
  1617. {
  1618. struct f71882fg_data *data = f71882fg_update_device(dev);
  1619. int val, nr = to_sensor_dev_attr_2(devattr)->index;
  1620. val = data->pwm[nr];
  1621. return sprintf(buf, "%d\n", val);
  1622. }
  1623. static ssize_t store_simple_pwm(struct device *dev,
  1624. struct device_attribute *devattr,
  1625. const char *buf, size_t count)
  1626. {
  1627. struct f71882fg_data *data = dev_get_drvdata(dev);
  1628. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1629. long val;
  1630. err = kstrtol(buf, 10, &val);
  1631. if (err)
  1632. return err;
  1633. val = clamp_val(val, 0, 255);
  1634. mutex_lock(&data->update_lock);
  1635. f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
  1636. data->pwm[nr] = val;
  1637. mutex_unlock(&data->update_lock);
  1638. return count;
  1639. }
  1640. static ssize_t show_pwm_enable(struct device *dev,
  1641. struct device_attribute *devattr, char *buf)
  1642. {
  1643. int result = 0;
  1644. struct f71882fg_data *data = f71882fg_update_device(dev);
  1645. int nr = to_sensor_dev_attr_2(devattr)->index;
  1646. switch ((data->pwm_enable >> 2 * nr) & 3) {
  1647. case 0:
  1648. case 1:
  1649. result = 2; /* Normal auto mode */
  1650. break;
  1651. case 2:
  1652. result = 1; /* Manual mode */
  1653. break;
  1654. case 3:
  1655. if (data->type == f8000)
  1656. result = 3; /* Thermostat mode */
  1657. else
  1658. result = 1; /* Manual mode */
  1659. break;
  1660. }
  1661. return sprintf(buf, "%d\n", result);
  1662. }
  1663. static ssize_t store_pwm_enable(struct device *dev, struct device_attribute
  1664. *devattr, const char *buf, size_t count)
  1665. {
  1666. struct f71882fg_data *data = dev_get_drvdata(dev);
  1667. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1668. long val;
  1669. err = kstrtol(buf, 10, &val);
  1670. if (err)
  1671. return err;
  1672. /* Special case for F8000 pwm channel 3 which only does auto mode */
  1673. if (data->type == f8000 && nr == 2 && val != 2)
  1674. return -EINVAL;
  1675. mutex_lock(&data->update_lock);
  1676. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1677. /* Special case for F8000 auto PWM mode / Thermostat mode */
  1678. if (data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 1)) {
  1679. switch (val) {
  1680. case 2:
  1681. data->pwm_enable &= ~(2 << (2 * nr));
  1682. break; /* Normal auto mode */
  1683. case 3:
  1684. data->pwm_enable |= 2 << (2 * nr);
  1685. break; /* Thermostat mode */
  1686. default:
  1687. count = -EINVAL;
  1688. goto leave;
  1689. }
  1690. } else {
  1691. switch (val) {
  1692. case 1:
  1693. /* The f71858fg does not support manual RPM mode */
  1694. if (data->type == f71858fg &&
  1695. ((data->pwm_enable >> (2 * nr)) & 1)) {
  1696. count = -EINVAL;
  1697. goto leave;
  1698. }
  1699. data->pwm_enable |= 2 << (2 * nr);
  1700. break; /* Manual */
  1701. case 2:
  1702. data->pwm_enable &= ~(2 << (2 * nr));
  1703. break; /* Normal auto mode */
  1704. default:
  1705. count = -EINVAL;
  1706. goto leave;
  1707. }
  1708. }
  1709. f71882fg_write8(data, F71882FG_REG_PWM_ENABLE, data->pwm_enable);
  1710. leave:
  1711. mutex_unlock(&data->update_lock);
  1712. return count;
  1713. }
  1714. static ssize_t show_pwm_auto_point_pwm(struct device *dev,
  1715. struct device_attribute *devattr,
  1716. char *buf)
  1717. {
  1718. int result;
  1719. struct f71882fg_data *data = f71882fg_update_device(dev);
  1720. int pwm = to_sensor_dev_attr_2(devattr)->index;
  1721. int point = to_sensor_dev_attr_2(devattr)->nr;
  1722. mutex_lock(&data->update_lock);
  1723. if (data->pwm_enable & (1 << (2 * pwm))) {
  1724. /* PWM mode */
  1725. result = data->pwm_auto_point_pwm[pwm][point];
  1726. } else {
  1727. /* RPM mode */
  1728. result = 32 * 255 / (32 + data->pwm_auto_point_pwm[pwm][point]);
  1729. }
  1730. mutex_unlock(&data->update_lock);
  1731. return sprintf(buf, "%d\n", result);
  1732. }
  1733. static ssize_t store_pwm_auto_point_pwm(struct device *dev,
  1734. struct device_attribute *devattr,
  1735. const char *buf, size_t count)
  1736. {
  1737. struct f71882fg_data *data = dev_get_drvdata(dev);
  1738. int err, pwm = to_sensor_dev_attr_2(devattr)->index;
  1739. int point = to_sensor_dev_attr_2(devattr)->nr;
  1740. long val;
  1741. err = kstrtol(buf, 10, &val);
  1742. if (err)
  1743. return err;
  1744. val = clamp_val(val, 0, 255);
  1745. mutex_lock(&data->update_lock);
  1746. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1747. if (data->pwm_enable & (1 << (2 * pwm))) {
  1748. /* PWM mode */
  1749. } else {
  1750. /* RPM mode */
  1751. if (val < 29) /* Prevent negative numbers */
  1752. val = 255;
  1753. else
  1754. val = (255 - val) * 32 / val;
  1755. }
  1756. f71882fg_write8(data, F71882FG_REG_POINT_PWM(pwm, point), val);
  1757. data->pwm_auto_point_pwm[pwm][point] = val;
  1758. mutex_unlock(&data->update_lock);
  1759. return count;
  1760. }
  1761. static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
  1762. struct device_attribute *devattr,
  1763. char *buf)
  1764. {
  1765. int result = 0;
  1766. struct f71882fg_data *data = f71882fg_update_device(dev);
  1767. int nr = to_sensor_dev_attr_2(devattr)->index;
  1768. int point = to_sensor_dev_attr_2(devattr)->nr;
  1769. mutex_lock(&data->update_lock);
  1770. if (nr & 1)
  1771. result = data->pwm_auto_point_hyst[nr / 2] >> 4;
  1772. else
  1773. result = data->pwm_auto_point_hyst[nr / 2] & 0x0f;
  1774. result = 1000 * (data->pwm_auto_point_temp[nr][point] - result);
  1775. mutex_unlock(&data->update_lock);
  1776. return sprintf(buf, "%d\n", result);
  1777. }
  1778. static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
  1779. struct device_attribute *devattr,
  1780. const char *buf, size_t count)
  1781. {
  1782. struct f71882fg_data *data = dev_get_drvdata(dev);
  1783. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1784. int point = to_sensor_dev_attr_2(devattr)->nr;
  1785. u8 reg;
  1786. long val;
  1787. err = kstrtol(buf, 10, &val);
  1788. if (err)
  1789. return err;
  1790. val /= 1000;
  1791. mutex_lock(&data->update_lock);
  1792. data->pwm_auto_point_temp[nr][point] =
  1793. f71882fg_read8(data, F71882FG_REG_POINT_TEMP(nr, point));
  1794. val = clamp_val(val, data->pwm_auto_point_temp[nr][point] - 15,
  1795. data->pwm_auto_point_temp[nr][point]);
  1796. val = data->pwm_auto_point_temp[nr][point] - val;
  1797. reg = f71882fg_read8(data, F71882FG_REG_FAN_HYST(nr / 2));
  1798. if (nr & 1)
  1799. reg = (reg & 0x0f) | (val << 4);
  1800. else
  1801. reg = (reg & 0xf0) | val;
  1802. f71882fg_write8(data, F71882FG_REG_FAN_HYST(nr / 2), reg);
  1803. data->pwm_auto_point_hyst[nr / 2] = reg;
  1804. mutex_unlock(&data->update_lock);
  1805. return count;
  1806. }
  1807. static ssize_t show_pwm_interpolate(struct device *dev,
  1808. struct device_attribute *devattr, char *buf)
  1809. {
  1810. int result;
  1811. struct f71882fg_data *data = f71882fg_update_device(dev);
  1812. int nr = to_sensor_dev_attr_2(devattr)->index;
  1813. result = (data->pwm_auto_point_mapping[nr] >> 4) & 1;
  1814. return sprintf(buf, "%d\n", result);
  1815. }
  1816. static ssize_t store_pwm_interpolate(struct device *dev,
  1817. struct device_attribute *devattr,
  1818. const char *buf, size_t count)
  1819. {
  1820. struct f71882fg_data *data = dev_get_drvdata(dev);
  1821. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1822. unsigned long val;
  1823. err = kstrtoul(buf, 10, &val);
  1824. if (err)
  1825. return err;
  1826. mutex_lock(&data->update_lock);
  1827. data->pwm_auto_point_mapping[nr] =
  1828. f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
  1829. if (val)
  1830. val = data->pwm_auto_point_mapping[nr] | (1 << 4);
  1831. else
  1832. val = data->pwm_auto_point_mapping[nr] & (~(1 << 4));
  1833. f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
  1834. data->pwm_auto_point_mapping[nr] = val;
  1835. mutex_unlock(&data->update_lock);
  1836. return count;
  1837. }
  1838. static ssize_t show_pwm_auto_point_channel(struct device *dev,
  1839. struct device_attribute *devattr,
  1840. char *buf)
  1841. {
  1842. int result;
  1843. struct f71882fg_data *data = f71882fg_update_device(dev);
  1844. int nr = to_sensor_dev_attr_2(devattr)->index;
  1845. result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) -
  1846. data->temp_start);
  1847. return sprintf(buf, "%d\n", result);
  1848. }
  1849. static ssize_t store_pwm_auto_point_channel(struct device *dev,
  1850. struct device_attribute *devattr,
  1851. const char *buf, size_t count)
  1852. {
  1853. struct f71882fg_data *data = dev_get_drvdata(dev);
  1854. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1855. long val;
  1856. err = kstrtol(buf, 10, &val);
  1857. if (err)
  1858. return err;
  1859. switch (val) {
  1860. case 1:
  1861. val = 0;
  1862. break;
  1863. case 2:
  1864. val = 1;
  1865. break;
  1866. case 4:
  1867. val = 2;
  1868. break;
  1869. default:
  1870. return -EINVAL;
  1871. }
  1872. val += data->temp_start;
  1873. mutex_lock(&data->update_lock);
  1874. data->pwm_auto_point_mapping[nr] =
  1875. f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
  1876. val = (data->pwm_auto_point_mapping[nr] & 0xfc) | val;
  1877. f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
  1878. data->pwm_auto_point_mapping[nr] = val;
  1879. mutex_unlock(&data->update_lock);
  1880. return count;
  1881. }
  1882. static ssize_t show_pwm_auto_point_temp(struct device *dev,
  1883. struct device_attribute *devattr,
  1884. char *buf)
  1885. {
  1886. int result;
  1887. struct f71882fg_data *data = f71882fg_update_device(dev);
  1888. int pwm = to_sensor_dev_attr_2(devattr)->index;
  1889. int point = to_sensor_dev_attr_2(devattr)->nr;
  1890. result = data->pwm_auto_point_temp[pwm][point];
  1891. return sprintf(buf, "%d\n", 1000 * result);
  1892. }
  1893. static ssize_t store_pwm_auto_point_temp(struct device *dev,
  1894. struct device_attribute *devattr,
  1895. const char *buf, size_t count)
  1896. {
  1897. struct f71882fg_data *data = dev_get_drvdata(dev);
  1898. int err, pwm = to_sensor_dev_attr_2(devattr)->index;
  1899. int point = to_sensor_dev_attr_2(devattr)->nr;
  1900. long val;
  1901. err = kstrtol(buf, 10, &val);
  1902. if (err)
  1903. return err;
  1904. val /= 1000;
  1905. if (data->auto_point_temp_signed)
  1906. val = clamp_val(val, -128, 127);
  1907. else
  1908. val = clamp_val(val, 0, 127);
  1909. mutex_lock(&data->update_lock);
  1910. f71882fg_write8(data, F71882FG_REG_POINT_TEMP(pwm, point), val);
  1911. data->pwm_auto_point_temp[pwm][point] = val;
  1912. mutex_unlock(&data->update_lock);
  1913. return count;
  1914. }
  1915. static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
  1916. char *buf)
  1917. {
  1918. struct f71882fg_data *data = dev_get_drvdata(dev);
  1919. return sprintf(buf, "%s\n", f71882fg_names[data->type]);
  1920. }
  1921. static int f71882fg_create_sysfs_files(struct platform_device *pdev,
  1922. struct sensor_device_attribute_2 *attr, int count)
  1923. {
  1924. int err, i;
  1925. for (i = 0; i < count; i++) {
  1926. err = device_create_file(&pdev->dev, &attr[i].dev_attr);
  1927. if (err)
  1928. return err;
  1929. }
  1930. return 0;
  1931. }
  1932. static void f71882fg_remove_sysfs_files(struct platform_device *pdev,
  1933. struct sensor_device_attribute_2 *attr, int count)
  1934. {
  1935. int i;
  1936. for (i = 0; i < count; i++)
  1937. device_remove_file(&pdev->dev, &attr[i].dev_attr);
  1938. }
  1939. static int f71882fg_create_fan_sysfs_files(
  1940. struct platform_device *pdev, int idx)
  1941. {
  1942. struct f71882fg_data *data = platform_get_drvdata(pdev);
  1943. int err;
  1944. /* Sanity check the pwm setting */
  1945. err = 0;
  1946. switch (data->type) {
  1947. case f71858fg:
  1948. if (((data->pwm_enable >> (idx * 2)) & 3) == 3)
  1949. err = 1;
  1950. break;
  1951. case f71862fg:
  1952. if (((data->pwm_enable >> (idx * 2)) & 1) != 1)
  1953. err = 1;
  1954. break;
  1955. case f8000:
  1956. if (idx == 2)
  1957. err = data->pwm_enable & 0x20;
  1958. break;
  1959. default:
  1960. break;
  1961. }
  1962. if (err) {
  1963. dev_err(&pdev->dev,
  1964. "Invalid (reserved) pwm settings: 0x%02x, "
  1965. "skipping fan %d\n",
  1966. (data->pwm_enable >> (idx * 2)) & 3, idx + 1);
  1967. return 0; /* This is a non fatal condition */
  1968. }
  1969. err = f71882fg_create_sysfs_files(pdev, &fxxxx_fan_attr[idx][0],
  1970. ARRAY_SIZE(fxxxx_fan_attr[0]));
  1971. if (err)
  1972. return err;
  1973. if (f71882fg_fan_has_beep[data->type]) {
  1974. err = f71882fg_create_sysfs_files(pdev,
  1975. &fxxxx_fan_beep_attr[idx],
  1976. 1);
  1977. if (err)
  1978. return err;
  1979. }
  1980. dev_info(&pdev->dev, "Fan: %d is in %s mode\n", idx + 1,
  1981. (data->pwm_enable & (1 << (2 * idx))) ? "duty-cycle" : "RPM");
  1982. /* Check for unsupported auto pwm settings */
  1983. switch (data->type) {
  1984. case f71808e:
  1985. case f71808a:
  1986. case f71869:
  1987. case f71869a:
  1988. case f71889fg:
  1989. case f71889ed:
  1990. case f71889a:
  1991. data->pwm_auto_point_mapping[idx] =
  1992. f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(idx));
  1993. if ((data->pwm_auto_point_mapping[idx] & 0x80) ||
  1994. (data->pwm_auto_point_mapping[idx] & 3) == 0) {
  1995. dev_warn(&pdev->dev,
  1996. "Auto pwm controlled by raw digital "
  1997. "data, disabling pwm auto_point "
  1998. "sysfs attributes for fan %d\n", idx + 1);
  1999. return 0; /* This is a non fatal condition */
  2000. }
  2001. break;
  2002. default:
  2003. break;
  2004. }
  2005. switch (data->type) {
  2006. case f71862fg:
  2007. err = f71882fg_create_sysfs_files(pdev,
  2008. &f71862fg_auto_pwm_attr[idx][0],
  2009. ARRAY_SIZE(f71862fg_auto_pwm_attr[0]));
  2010. break;
  2011. case f71808e:
  2012. case f71869:
  2013. err = f71882fg_create_sysfs_files(pdev,
  2014. &f71869_auto_pwm_attr[idx][0],
  2015. ARRAY_SIZE(f71869_auto_pwm_attr[0]));
  2016. break;
  2017. case f8000:
  2018. err = f71882fg_create_sysfs_files(pdev,
  2019. &f8000_auto_pwm_attr[idx][0],
  2020. ARRAY_SIZE(f8000_auto_pwm_attr[0]));
  2021. break;
  2022. default:
  2023. err = f71882fg_create_sysfs_files(pdev,
  2024. &fxxxx_auto_pwm_attr[idx][0],
  2025. ARRAY_SIZE(fxxxx_auto_pwm_attr[0]));
  2026. }
  2027. return err;
  2028. }
  2029. static int f71882fg_probe(struct platform_device *pdev)
  2030. {
  2031. struct f71882fg_data *data;
  2032. struct f71882fg_sio_data *sio_data = pdev->dev.platform_data;
  2033. int nr_fans = f71882fg_nr_fans[sio_data->type];
  2034. int nr_temps = f71882fg_nr_temps[sio_data->type];
  2035. int err, i;
  2036. u8 start_reg, reg;
  2037. data = devm_kzalloc(&pdev->dev, sizeof(struct f71882fg_data),
  2038. GFP_KERNEL);
  2039. if (!data)
  2040. return -ENOMEM;
  2041. data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
  2042. data->type = sio_data->type;
  2043. data->temp_start =
  2044. (data->type == f71858fg || data->type == f8000) ? 0 : 1;
  2045. mutex_init(&data->update_lock);
  2046. platform_set_drvdata(pdev, data);
  2047. start_reg = f71882fg_read8(data, F71882FG_REG_START);
  2048. if (start_reg & 0x04) {
  2049. dev_warn(&pdev->dev, "Hardware monitor is powered down\n");
  2050. return -ENODEV;
  2051. }
  2052. if (!(start_reg & 0x03)) {
  2053. dev_warn(&pdev->dev, "Hardware monitoring not activated\n");
  2054. return -ENODEV;
  2055. }
  2056. /* Register sysfs interface files */
  2057. err = device_create_file(&pdev->dev, &dev_attr_name);
  2058. if (err)
  2059. goto exit_unregister_sysfs;
  2060. if (start_reg & 0x01) {
  2061. switch (data->type) {
  2062. case f71858fg:
  2063. data->temp_config =
  2064. f71882fg_read8(data, F71882FG_REG_TEMP_CONFIG);
  2065. if (data->temp_config & 0x10)
  2066. /*
  2067. * The f71858fg temperature alarms behave as
  2068. * the f8000 alarms in this mode
  2069. */
  2070. err = f71882fg_create_sysfs_files(pdev,
  2071. f8000_temp_attr,
  2072. ARRAY_SIZE(f8000_temp_attr));
  2073. else
  2074. err = f71882fg_create_sysfs_files(pdev,
  2075. f71858fg_temp_attr,
  2076. ARRAY_SIZE(f71858fg_temp_attr));
  2077. break;
  2078. case f8000:
  2079. err = f71882fg_create_sysfs_files(pdev,
  2080. f8000_temp_attr,
  2081. ARRAY_SIZE(f8000_temp_attr));
  2082. break;
  2083. default:
  2084. err = f71882fg_create_sysfs_files(pdev,
  2085. &fxxxx_temp_attr[0][0],
  2086. ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
  2087. }
  2088. if (err)
  2089. goto exit_unregister_sysfs;
  2090. if (f71882fg_temp_has_beep[data->type]) {
  2091. err = f71882fg_create_sysfs_files(pdev,
  2092. &fxxxx_temp_beep_attr[0][0],
  2093. ARRAY_SIZE(fxxxx_temp_beep_attr[0])
  2094. * nr_temps);
  2095. if (err)
  2096. goto exit_unregister_sysfs;
  2097. }
  2098. for (i = 0; i < F71882FG_MAX_INS; i++) {
  2099. if (f71882fg_has_in[data->type][i]) {
  2100. err = device_create_file(&pdev->dev,
  2101. &fxxxx_in_attr[i].dev_attr);
  2102. if (err)
  2103. goto exit_unregister_sysfs;
  2104. }
  2105. }
  2106. if (f71882fg_has_in1_alarm[data->type]) {
  2107. err = f71882fg_create_sysfs_files(pdev,
  2108. fxxxx_in1_alarm_attr,
  2109. ARRAY_SIZE(fxxxx_in1_alarm_attr));
  2110. if (err)
  2111. goto exit_unregister_sysfs;
  2112. }
  2113. }
  2114. if (start_reg & 0x02) {
  2115. switch (data->type) {
  2116. case f71808e:
  2117. case f71808a:
  2118. case f71869:
  2119. case f71869a:
  2120. /* These always have signed auto point temps */
  2121. data->auto_point_temp_signed = 1;
  2122. /* Fall through to select correct fan/pwm reg bank! */
  2123. case f71889fg:
  2124. case f71889ed:
  2125. case f71889a:
  2126. reg = f71882fg_read8(data, F71882FG_REG_FAN_FAULT_T);
  2127. if (reg & F71882FG_FAN_NEG_TEMP_EN)
  2128. data->auto_point_temp_signed = 1;
  2129. /* Ensure banked pwm registers point to right bank */
  2130. reg &= ~F71882FG_FAN_PROG_SEL;
  2131. f71882fg_write8(data, F71882FG_REG_FAN_FAULT_T, reg);
  2132. break;
  2133. default:
  2134. break;
  2135. }
  2136. data->pwm_enable =
  2137. f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  2138. for (i = 0; i < nr_fans; i++) {
  2139. err = f71882fg_create_fan_sysfs_files(pdev, i);
  2140. if (err)
  2141. goto exit_unregister_sysfs;
  2142. }
  2143. /* Some types have 1 extra fan with limited functionality */
  2144. switch (data->type) {
  2145. case f71808a:
  2146. err = f71882fg_create_sysfs_files(pdev,
  2147. f71808a_fan3_attr,
  2148. ARRAY_SIZE(f71808a_fan3_attr));
  2149. break;
  2150. case f8000:
  2151. err = f71882fg_create_sysfs_files(pdev,
  2152. f8000_fan_attr,
  2153. ARRAY_SIZE(f8000_fan_attr));
  2154. break;
  2155. default:
  2156. break;
  2157. }
  2158. if (err)
  2159. goto exit_unregister_sysfs;
  2160. }
  2161. data->hwmon_dev = hwmon_device_register(&pdev->dev);
  2162. if (IS_ERR(data->hwmon_dev)) {
  2163. err = PTR_ERR(data->hwmon_dev);
  2164. data->hwmon_dev = NULL;
  2165. goto exit_unregister_sysfs;
  2166. }
  2167. return 0;
  2168. exit_unregister_sysfs:
  2169. f71882fg_remove(pdev); /* Will unregister the sysfs files for us */
  2170. return err; /* f71882fg_remove() also frees our data */
  2171. return err;
  2172. }
  2173. static int f71882fg_remove(struct platform_device *pdev)
  2174. {
  2175. struct f71882fg_data *data = platform_get_drvdata(pdev);
  2176. int nr_fans = f71882fg_nr_fans[data->type];
  2177. int nr_temps = f71882fg_nr_temps[data->type];
  2178. int i;
  2179. u8 start_reg = f71882fg_read8(data, F71882FG_REG_START);
  2180. if (data->hwmon_dev)
  2181. hwmon_device_unregister(data->hwmon_dev);
  2182. device_remove_file(&pdev->dev, &dev_attr_name);
  2183. if (start_reg & 0x01) {
  2184. switch (data->type) {
  2185. case f71858fg:
  2186. if (data->temp_config & 0x10)
  2187. f71882fg_remove_sysfs_files(pdev,
  2188. f8000_temp_attr,
  2189. ARRAY_SIZE(f8000_temp_attr));
  2190. else
  2191. f71882fg_remove_sysfs_files(pdev,
  2192. f71858fg_temp_attr,
  2193. ARRAY_SIZE(f71858fg_temp_attr));
  2194. break;
  2195. case f8000:
  2196. f71882fg_remove_sysfs_files(pdev,
  2197. f8000_temp_attr,
  2198. ARRAY_SIZE(f8000_temp_attr));
  2199. break;
  2200. default:
  2201. f71882fg_remove_sysfs_files(pdev,
  2202. &fxxxx_temp_attr[0][0],
  2203. ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
  2204. }
  2205. if (f71882fg_temp_has_beep[data->type]) {
  2206. f71882fg_remove_sysfs_files(pdev,
  2207. &fxxxx_temp_beep_attr[0][0],
  2208. ARRAY_SIZE(fxxxx_temp_beep_attr[0]) * nr_temps);
  2209. }
  2210. for (i = 0; i < F71882FG_MAX_INS; i++) {
  2211. if (f71882fg_has_in[data->type][i]) {
  2212. device_remove_file(&pdev->dev,
  2213. &fxxxx_in_attr[i].dev_attr);
  2214. }
  2215. }
  2216. if (f71882fg_has_in1_alarm[data->type]) {
  2217. f71882fg_remove_sysfs_files(pdev,
  2218. fxxxx_in1_alarm_attr,
  2219. ARRAY_SIZE(fxxxx_in1_alarm_attr));
  2220. }
  2221. }
  2222. if (start_reg & 0x02) {
  2223. f71882fg_remove_sysfs_files(pdev, &fxxxx_fan_attr[0][0],
  2224. ARRAY_SIZE(fxxxx_fan_attr[0]) * nr_fans);
  2225. if (f71882fg_fan_has_beep[data->type]) {
  2226. f71882fg_remove_sysfs_files(pdev,
  2227. fxxxx_fan_beep_attr, nr_fans);
  2228. }
  2229. switch (data->type) {
  2230. case f71808a:
  2231. f71882fg_remove_sysfs_files(pdev,
  2232. &fxxxx_auto_pwm_attr[0][0],
  2233. ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
  2234. f71882fg_remove_sysfs_files(pdev,
  2235. f71808a_fan3_attr,
  2236. ARRAY_SIZE(f71808a_fan3_attr));
  2237. break;
  2238. case f71862fg:
  2239. f71882fg_remove_sysfs_files(pdev,
  2240. &f71862fg_auto_pwm_attr[0][0],
  2241. ARRAY_SIZE(f71862fg_auto_pwm_attr[0]) *
  2242. nr_fans);
  2243. break;
  2244. case f71808e:
  2245. case f71869:
  2246. f71882fg_remove_sysfs_files(pdev,
  2247. &f71869_auto_pwm_attr[0][0],
  2248. ARRAY_SIZE(f71869_auto_pwm_attr[0]) * nr_fans);
  2249. break;
  2250. case f8000:
  2251. f71882fg_remove_sysfs_files(pdev,
  2252. f8000_fan_attr,
  2253. ARRAY_SIZE(f8000_fan_attr));
  2254. f71882fg_remove_sysfs_files(pdev,
  2255. &f8000_auto_pwm_attr[0][0],
  2256. ARRAY_SIZE(f8000_auto_pwm_attr[0]) * nr_fans);
  2257. break;
  2258. default:
  2259. f71882fg_remove_sysfs_files(pdev,
  2260. &fxxxx_auto_pwm_attr[0][0],
  2261. ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
  2262. }
  2263. }
  2264. return 0;
  2265. }
  2266. static int __init f71882fg_find(int sioaddr, struct f71882fg_sio_data *sio_data)
  2267. {
  2268. u16 devid;
  2269. unsigned short address;
  2270. int err = superio_enter(sioaddr);
  2271. if (err)
  2272. return err;
  2273. devid = superio_inw(sioaddr, SIO_REG_MANID);
  2274. if (devid != SIO_FINTEK_ID) {
  2275. pr_debug("Not a Fintek device\n");
  2276. err = -ENODEV;
  2277. goto exit;
  2278. }
  2279. devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
  2280. switch (devid) {
  2281. case SIO_F71808E_ID:
  2282. sio_data->type = f71808e;
  2283. break;
  2284. case SIO_F71808A_ID:
  2285. sio_data->type = f71808a;
  2286. break;
  2287. case SIO_F71858_ID:
  2288. sio_data->type = f71858fg;
  2289. break;
  2290. case SIO_F71862_ID:
  2291. sio_data->type = f71862fg;
  2292. break;
  2293. case SIO_F71869_ID:
  2294. sio_data->type = f71869;
  2295. break;
  2296. case SIO_F71869A_ID:
  2297. sio_data->type = f71869a;
  2298. break;
  2299. case SIO_F71882_ID:
  2300. sio_data->type = f71882fg;
  2301. break;
  2302. case SIO_F71889_ID:
  2303. sio_data->type = f71889fg;
  2304. break;
  2305. case SIO_F71889E_ID:
  2306. sio_data->type = f71889ed;
  2307. break;
  2308. case SIO_F71889A_ID:
  2309. sio_data->type = f71889a;
  2310. break;
  2311. case SIO_F8000_ID:
  2312. sio_data->type = f8000;
  2313. break;
  2314. case SIO_F81865_ID:
  2315. sio_data->type = f81865f;
  2316. break;
  2317. default:
  2318. pr_info("Unsupported Fintek device: %04x\n",
  2319. (unsigned int)devid);
  2320. err = -ENODEV;
  2321. goto exit;
  2322. }
  2323. if (sio_data->type == f71858fg)
  2324. superio_select(sioaddr, SIO_F71858FG_LD_HWM);
  2325. else
  2326. superio_select(sioaddr, SIO_F71882FG_LD_HWM);
  2327. if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
  2328. pr_warn("Device not activated\n");
  2329. err = -ENODEV;
  2330. goto exit;
  2331. }
  2332. address = superio_inw(sioaddr, SIO_REG_ADDR);
  2333. if (address == 0) {
  2334. pr_warn("Base address not set\n");
  2335. err = -ENODEV;
  2336. goto exit;
  2337. }
  2338. address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
  2339. err = address;
  2340. pr_info("Found %s chip at %#x, revision %d\n",
  2341. f71882fg_names[sio_data->type], (unsigned int)address,
  2342. (int)superio_inb(sioaddr, SIO_REG_DEVREV));
  2343. exit:
  2344. superio_exit(sioaddr);
  2345. return err;
  2346. }
  2347. static int __init f71882fg_device_add(int address,
  2348. const struct f71882fg_sio_data *sio_data)
  2349. {
  2350. struct resource res = {
  2351. .start = address,
  2352. .end = address + REGION_LENGTH - 1,
  2353. .flags = IORESOURCE_IO,
  2354. };
  2355. int err;
  2356. f71882fg_pdev = platform_device_alloc(DRVNAME, address);
  2357. if (!f71882fg_pdev)
  2358. return -ENOMEM;
  2359. res.name = f71882fg_pdev->name;
  2360. err = acpi_check_resource_conflict(&res);
  2361. if (err)
  2362. goto exit_device_put;
  2363. err = platform_device_add_resources(f71882fg_pdev, &res, 1);
  2364. if (err) {
  2365. pr_err("Device resource addition failed\n");
  2366. goto exit_device_put;
  2367. }
  2368. err = platform_device_add_data(f71882fg_pdev, sio_data,
  2369. sizeof(struct f71882fg_sio_data));
  2370. if (err) {
  2371. pr_err("Platform data allocation failed\n");
  2372. goto exit_device_put;
  2373. }
  2374. err = platform_device_add(f71882fg_pdev);
  2375. if (err) {
  2376. pr_err("Device addition failed\n");
  2377. goto exit_device_put;
  2378. }
  2379. return 0;
  2380. exit_device_put:
  2381. platform_device_put(f71882fg_pdev);
  2382. return err;
  2383. }
  2384. static int __init f71882fg_init(void)
  2385. {
  2386. int err;
  2387. int address;
  2388. struct f71882fg_sio_data sio_data;
  2389. memset(&sio_data, 0, sizeof(sio_data));
  2390. address = f71882fg_find(0x2e, &sio_data);
  2391. if (address < 0)
  2392. address = f71882fg_find(0x4e, &sio_data);
  2393. if (address < 0)
  2394. return address;
  2395. err = platform_driver_register(&f71882fg_driver);
  2396. if (err)
  2397. return err;
  2398. err = f71882fg_device_add(address, &sio_data);
  2399. if (err)
  2400. goto exit_driver;
  2401. return 0;
  2402. exit_driver:
  2403. platform_driver_unregister(&f71882fg_driver);
  2404. return err;
  2405. }
  2406. static void __exit f71882fg_exit(void)
  2407. {
  2408. platform_device_unregister(f71882fg_pdev);
  2409. platform_driver_unregister(&f71882fg_driver);
  2410. }
  2411. MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver");
  2412. MODULE_AUTHOR("Hans Edgington, Hans de Goede <hdegoede@redhat.com>");
  2413. MODULE_LICENSE("GPL");
  2414. module_init(f71882fg_init);
  2415. module_exit(f71882fg_exit);