shmob_drm_crtc.c 20 KB

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  1. /*
  2. * shmob_drm_crtc.c -- SH Mobile DRM CRTCs
  3. *
  4. * Copyright (C) 2012 Renesas Corporation
  5. *
  6. * Laurent Pinchart (laurent.pinchart@ideasonboard.com)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. */
  13. #include <linux/backlight.h>
  14. #include <linux/clk.h>
  15. #include <drm/drmP.h>
  16. #include <drm/drm_crtc.h>
  17. #include <drm/drm_crtc_helper.h>
  18. #include <drm/drm_fb_cma_helper.h>
  19. #include <drm/drm_gem_cma_helper.h>
  20. #include <video/sh_mobile_meram.h>
  21. #include "shmob_drm_backlight.h"
  22. #include "shmob_drm_crtc.h"
  23. #include "shmob_drm_drv.h"
  24. #include "shmob_drm_kms.h"
  25. #include "shmob_drm_plane.h"
  26. #include "shmob_drm_regs.h"
  27. /*
  28. * TODO: panel support
  29. */
  30. /* -----------------------------------------------------------------------------
  31. * Clock management
  32. */
  33. static void shmob_drm_clk_on(struct shmob_drm_device *sdev)
  34. {
  35. if (sdev->clock)
  36. clk_enable(sdev->clock);
  37. #if 0
  38. if (sdev->meram_dev && sdev->meram_dev->pdev)
  39. pm_runtime_get_sync(&sdev->meram_dev->pdev->dev);
  40. #endif
  41. }
  42. static void shmob_drm_clk_off(struct shmob_drm_device *sdev)
  43. {
  44. #if 0
  45. if (sdev->meram_dev && sdev->meram_dev->pdev)
  46. pm_runtime_put_sync(&sdev->meram_dev->pdev->dev);
  47. #endif
  48. if (sdev->clock)
  49. clk_disable(sdev->clock);
  50. }
  51. /* -----------------------------------------------------------------------------
  52. * CRTC
  53. */
  54. static void shmob_drm_crtc_setup_geometry(struct shmob_drm_crtc *scrtc)
  55. {
  56. struct drm_crtc *crtc = &scrtc->crtc;
  57. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  58. const struct shmob_drm_interface_data *idata = &sdev->pdata->iface;
  59. const struct drm_display_mode *mode = &crtc->mode;
  60. u32 value;
  61. value = sdev->ldmt1r
  62. | ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? 0 : LDMT1R_VPOL)
  63. | ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? 0 : LDMT1R_HPOL)
  64. | ((idata->flags & SHMOB_DRM_IFACE_FL_DWPOL) ? LDMT1R_DWPOL : 0)
  65. | ((idata->flags & SHMOB_DRM_IFACE_FL_DIPOL) ? LDMT1R_DIPOL : 0)
  66. | ((idata->flags & SHMOB_DRM_IFACE_FL_DAPOL) ? LDMT1R_DAPOL : 0)
  67. | ((idata->flags & SHMOB_DRM_IFACE_FL_HSCNT) ? LDMT1R_HSCNT : 0)
  68. | ((idata->flags & SHMOB_DRM_IFACE_FL_DWCNT) ? LDMT1R_DWCNT : 0);
  69. lcdc_write(sdev, LDMT1R, value);
  70. if (idata->interface >= SHMOB_DRM_IFACE_SYS8A &&
  71. idata->interface <= SHMOB_DRM_IFACE_SYS24) {
  72. /* Setup SYS bus. */
  73. value = (idata->sys.cs_setup << LDMT2R_CSUP_SHIFT)
  74. | (idata->sys.vsync_active_high ? LDMT2R_RSV : 0)
  75. | (idata->sys.vsync_dir_input ? LDMT2R_VSEL : 0)
  76. | (idata->sys.write_setup << LDMT2R_WCSC_SHIFT)
  77. | (idata->sys.write_cycle << LDMT2R_WCEC_SHIFT)
  78. | (idata->sys.write_strobe << LDMT2R_WCLW_SHIFT);
  79. lcdc_write(sdev, LDMT2R, value);
  80. value = (idata->sys.read_latch << LDMT3R_RDLC_SHIFT)
  81. | (idata->sys.read_setup << LDMT3R_RCSC_SHIFT)
  82. | (idata->sys.read_cycle << LDMT3R_RCEC_SHIFT)
  83. | (idata->sys.read_strobe << LDMT3R_RCLW_SHIFT);
  84. lcdc_write(sdev, LDMT3R, value);
  85. }
  86. value = ((mode->hdisplay / 8) << 16) /* HDCN */
  87. | (mode->htotal / 8); /* HTCN */
  88. lcdc_write(sdev, LDHCNR, value);
  89. value = (((mode->hsync_end - mode->hsync_start) / 8) << 16) /* HSYNW */
  90. | (mode->hsync_start / 8); /* HSYNP */
  91. lcdc_write(sdev, LDHSYNR, value);
  92. value = ((mode->hdisplay & 7) << 24) | ((mode->htotal & 7) << 16)
  93. | (((mode->hsync_end - mode->hsync_start) & 7) << 8)
  94. | (mode->hsync_start & 7);
  95. lcdc_write(sdev, LDHAJR, value);
  96. value = ((mode->vdisplay) << 16) /* VDLN */
  97. | mode->vtotal; /* VTLN */
  98. lcdc_write(sdev, LDVLNR, value);
  99. value = ((mode->vsync_end - mode->vsync_start) << 16) /* VSYNW */
  100. | mode->vsync_start; /* VSYNP */
  101. lcdc_write(sdev, LDVSYNR, value);
  102. }
  103. static void shmob_drm_crtc_start_stop(struct shmob_drm_crtc *scrtc, bool start)
  104. {
  105. struct shmob_drm_device *sdev = scrtc->crtc.dev->dev_private;
  106. u32 value;
  107. value = lcdc_read(sdev, LDCNT2R);
  108. if (start)
  109. lcdc_write(sdev, LDCNT2R, value | LDCNT2R_DO);
  110. else
  111. lcdc_write(sdev, LDCNT2R, value & ~LDCNT2R_DO);
  112. /* Wait until power is applied/stopped. */
  113. while (1) {
  114. value = lcdc_read(sdev, LDPMR) & LDPMR_LPS;
  115. if ((start && value) || (!start && !value))
  116. break;
  117. cpu_relax();
  118. }
  119. if (!start) {
  120. /* Stop the dot clock. */
  121. lcdc_write(sdev, LDDCKSTPR, LDDCKSTPR_DCKSTP);
  122. }
  123. }
  124. /*
  125. * shmob_drm_crtc_start - Configure and start the LCDC
  126. * @scrtc: the SH Mobile CRTC
  127. *
  128. * Configure and start the LCDC device. External devices (clocks, MERAM, panels,
  129. * ...) are not touched by this function.
  130. */
  131. static void shmob_drm_crtc_start(struct shmob_drm_crtc *scrtc)
  132. {
  133. struct drm_crtc *crtc = &scrtc->crtc;
  134. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  135. const struct shmob_drm_interface_data *idata = &sdev->pdata->iface;
  136. const struct shmob_drm_format_info *format;
  137. struct drm_device *dev = sdev->ddev;
  138. struct drm_plane *plane;
  139. u32 value;
  140. if (scrtc->started)
  141. return;
  142. format = shmob_drm_format_info(crtc->fb->pixel_format);
  143. if (WARN_ON(format == NULL))
  144. return;
  145. /* Enable clocks before accessing the hardware. */
  146. shmob_drm_clk_on(sdev);
  147. /* Reset and enable the LCDC. */
  148. lcdc_write(sdev, LDCNT2R, lcdc_read(sdev, LDCNT2R) | LDCNT2R_BR);
  149. lcdc_wait_bit(sdev, LDCNT2R, LDCNT2R_BR, 0);
  150. lcdc_write(sdev, LDCNT2R, LDCNT2R_ME);
  151. /* Stop the LCDC first and disable all interrupts. */
  152. shmob_drm_crtc_start_stop(scrtc, false);
  153. lcdc_write(sdev, LDINTR, 0);
  154. /* Configure power supply, dot clocks and start them. */
  155. lcdc_write(sdev, LDPMR, 0);
  156. value = sdev->lddckr;
  157. if (idata->clk_div) {
  158. /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider
  159. * denominator.
  160. */
  161. lcdc_write(sdev, LDDCKPAT1R, 0);
  162. lcdc_write(sdev, LDDCKPAT2R, (1 << (idata->clk_div / 2)) - 1);
  163. if (idata->clk_div == 1)
  164. value |= LDDCKR_MOSEL;
  165. else
  166. value |= idata->clk_div;
  167. }
  168. lcdc_write(sdev, LDDCKR, value);
  169. lcdc_write(sdev, LDDCKSTPR, 0);
  170. lcdc_wait_bit(sdev, LDDCKSTPR, ~0, 0);
  171. /* TODO: Setup SYS panel */
  172. /* Setup geometry, format, frame buffer memory and operation mode. */
  173. shmob_drm_crtc_setup_geometry(scrtc);
  174. /* TODO: Handle YUV colorspaces. Hardcode REC709 for now. */
  175. lcdc_write(sdev, LDDFR, format->lddfr | LDDFR_CF1);
  176. lcdc_write(sdev, LDMLSR, scrtc->line_size);
  177. lcdc_write(sdev, LDSA1R, scrtc->dma[0]);
  178. if (format->yuv)
  179. lcdc_write(sdev, LDSA2R, scrtc->dma[1]);
  180. lcdc_write(sdev, LDSM1R, 0);
  181. /* Word and long word swap. */
  182. switch (format->fourcc) {
  183. case DRM_FORMAT_RGB565:
  184. case DRM_FORMAT_NV21:
  185. case DRM_FORMAT_NV61:
  186. case DRM_FORMAT_NV42:
  187. value = LDDDSR_LS | LDDDSR_WS;
  188. break;
  189. case DRM_FORMAT_RGB888:
  190. case DRM_FORMAT_NV12:
  191. case DRM_FORMAT_NV16:
  192. case DRM_FORMAT_NV24:
  193. value = LDDDSR_LS | LDDDSR_WS | LDDDSR_BS;
  194. break;
  195. case DRM_FORMAT_ARGB8888:
  196. default:
  197. value = LDDDSR_LS;
  198. break;
  199. }
  200. lcdc_write(sdev, LDDDSR, value);
  201. /* Setup planes. */
  202. list_for_each_entry(plane, &dev->mode_config.plane_list, head) {
  203. if (plane->crtc == crtc)
  204. shmob_drm_plane_setup(plane);
  205. }
  206. /* Enable the display output. */
  207. lcdc_write(sdev, LDCNT1R, LDCNT1R_DE);
  208. shmob_drm_crtc_start_stop(scrtc, true);
  209. scrtc->started = true;
  210. }
  211. static void shmob_drm_crtc_stop(struct shmob_drm_crtc *scrtc)
  212. {
  213. struct drm_crtc *crtc = &scrtc->crtc;
  214. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  215. if (!scrtc->started)
  216. return;
  217. /* Disable the MERAM cache. */
  218. if (scrtc->cache) {
  219. sh_mobile_meram_cache_free(sdev->meram, scrtc->cache);
  220. scrtc->cache = NULL;
  221. }
  222. /* Stop the LCDC. */
  223. shmob_drm_crtc_start_stop(scrtc, false);
  224. /* Disable the display output. */
  225. lcdc_write(sdev, LDCNT1R, 0);
  226. /* Stop clocks. */
  227. shmob_drm_clk_off(sdev);
  228. scrtc->started = false;
  229. }
  230. void shmob_drm_crtc_suspend(struct shmob_drm_crtc *scrtc)
  231. {
  232. shmob_drm_crtc_stop(scrtc);
  233. }
  234. void shmob_drm_crtc_resume(struct shmob_drm_crtc *scrtc)
  235. {
  236. if (scrtc->dpms != DRM_MODE_DPMS_ON)
  237. return;
  238. shmob_drm_crtc_start(scrtc);
  239. }
  240. static void shmob_drm_crtc_compute_base(struct shmob_drm_crtc *scrtc,
  241. int x, int y)
  242. {
  243. struct drm_crtc *crtc = &scrtc->crtc;
  244. struct drm_framebuffer *fb = crtc->fb;
  245. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  246. struct drm_gem_cma_object *gem;
  247. unsigned int bpp;
  248. bpp = scrtc->format->yuv ? 8 : scrtc->format->bpp;
  249. gem = drm_fb_cma_get_gem_obj(fb, 0);
  250. scrtc->dma[0] = gem->paddr + fb->offsets[0]
  251. + y * fb->pitches[0] + x * bpp / 8;
  252. if (scrtc->format->yuv) {
  253. bpp = scrtc->format->bpp - 8;
  254. gem = drm_fb_cma_get_gem_obj(fb, 1);
  255. scrtc->dma[1] = gem->paddr + fb->offsets[1]
  256. + y / (bpp == 4 ? 2 : 1) * fb->pitches[1]
  257. + x * (bpp == 16 ? 2 : 1);
  258. }
  259. if (scrtc->cache)
  260. sh_mobile_meram_cache_update(sdev->meram, scrtc->cache,
  261. scrtc->dma[0], scrtc->dma[1],
  262. &scrtc->dma[0], &scrtc->dma[1]);
  263. }
  264. static void shmob_drm_crtc_update_base(struct shmob_drm_crtc *scrtc)
  265. {
  266. struct drm_crtc *crtc = &scrtc->crtc;
  267. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  268. shmob_drm_crtc_compute_base(scrtc, crtc->x, crtc->y);
  269. lcdc_write_mirror(sdev, LDSA1R, scrtc->dma[0]);
  270. if (scrtc->format->yuv)
  271. lcdc_write_mirror(sdev, LDSA2R, scrtc->dma[1]);
  272. lcdc_write(sdev, LDRCNTR, lcdc_read(sdev, LDRCNTR) ^ LDRCNTR_MRS);
  273. }
  274. #define to_shmob_crtc(c) container_of(c, struct shmob_drm_crtc, crtc)
  275. static void shmob_drm_crtc_dpms(struct drm_crtc *crtc, int mode)
  276. {
  277. struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc);
  278. if (scrtc->dpms == mode)
  279. return;
  280. if (mode == DRM_MODE_DPMS_ON)
  281. shmob_drm_crtc_start(scrtc);
  282. else
  283. shmob_drm_crtc_stop(scrtc);
  284. scrtc->dpms = mode;
  285. }
  286. static bool shmob_drm_crtc_mode_fixup(struct drm_crtc *crtc,
  287. const struct drm_display_mode *mode,
  288. struct drm_display_mode *adjusted_mode)
  289. {
  290. return true;
  291. }
  292. static void shmob_drm_crtc_mode_prepare(struct drm_crtc *crtc)
  293. {
  294. shmob_drm_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
  295. }
  296. static int shmob_drm_crtc_mode_set(struct drm_crtc *crtc,
  297. struct drm_display_mode *mode,
  298. struct drm_display_mode *adjusted_mode,
  299. int x, int y,
  300. struct drm_framebuffer *old_fb)
  301. {
  302. struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc);
  303. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  304. const struct sh_mobile_meram_cfg *mdata = sdev->pdata->meram;
  305. const struct shmob_drm_format_info *format;
  306. void *cache;
  307. format = shmob_drm_format_info(crtc->fb->pixel_format);
  308. if (format == NULL) {
  309. dev_dbg(sdev->dev, "mode_set: unsupported format %08x\n",
  310. crtc->fb->pixel_format);
  311. return -EINVAL;
  312. }
  313. scrtc->format = format;
  314. scrtc->line_size = crtc->fb->pitches[0];
  315. if (sdev->meram) {
  316. /* Enable MERAM cache if configured. We need to de-init
  317. * configured ICBs before we can re-initialize them.
  318. */
  319. if (scrtc->cache) {
  320. sh_mobile_meram_cache_free(sdev->meram, scrtc->cache);
  321. scrtc->cache = NULL;
  322. }
  323. cache = sh_mobile_meram_cache_alloc(sdev->meram, mdata,
  324. crtc->fb->pitches[0],
  325. adjusted_mode->vdisplay,
  326. format->meram,
  327. &scrtc->line_size);
  328. if (!IS_ERR(cache))
  329. scrtc->cache = cache;
  330. }
  331. shmob_drm_crtc_compute_base(scrtc, x, y);
  332. return 0;
  333. }
  334. static void shmob_drm_crtc_mode_commit(struct drm_crtc *crtc)
  335. {
  336. shmob_drm_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
  337. }
  338. static int shmob_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
  339. struct drm_framebuffer *old_fb)
  340. {
  341. shmob_drm_crtc_update_base(to_shmob_crtc(crtc));
  342. return 0;
  343. }
  344. static const struct drm_crtc_helper_funcs crtc_helper_funcs = {
  345. .dpms = shmob_drm_crtc_dpms,
  346. .mode_fixup = shmob_drm_crtc_mode_fixup,
  347. .prepare = shmob_drm_crtc_mode_prepare,
  348. .commit = shmob_drm_crtc_mode_commit,
  349. .mode_set = shmob_drm_crtc_mode_set,
  350. .mode_set_base = shmob_drm_crtc_mode_set_base,
  351. };
  352. void shmob_drm_crtc_cancel_page_flip(struct shmob_drm_crtc *scrtc,
  353. struct drm_file *file)
  354. {
  355. struct drm_pending_vblank_event *event;
  356. struct drm_device *dev = scrtc->crtc.dev;
  357. unsigned long flags;
  358. /* Destroy the pending vertical blanking event associated with the
  359. * pending page flip, if any, and disable vertical blanking interrupts.
  360. */
  361. spin_lock_irqsave(&dev->event_lock, flags);
  362. event = scrtc->event;
  363. if (event && event->base.file_priv == file) {
  364. scrtc->event = NULL;
  365. event->base.destroy(&event->base);
  366. drm_vblank_put(dev, 0);
  367. }
  368. spin_unlock_irqrestore(&dev->event_lock, flags);
  369. }
  370. void shmob_drm_crtc_finish_page_flip(struct shmob_drm_crtc *scrtc)
  371. {
  372. struct drm_pending_vblank_event *event;
  373. struct drm_device *dev = scrtc->crtc.dev;
  374. struct timeval vblanktime;
  375. unsigned long flags;
  376. spin_lock_irqsave(&dev->event_lock, flags);
  377. event = scrtc->event;
  378. scrtc->event = NULL;
  379. spin_unlock_irqrestore(&dev->event_lock, flags);
  380. if (event == NULL)
  381. return;
  382. event->event.sequence = drm_vblank_count_and_time(dev, 0, &vblanktime);
  383. event->event.tv_sec = vblanktime.tv_sec;
  384. event->event.tv_usec = vblanktime.tv_usec;
  385. spin_lock_irqsave(&dev->event_lock, flags);
  386. list_add_tail(&event->base.link, &event->base.file_priv->event_list);
  387. wake_up_interruptible(&event->base.file_priv->event_wait);
  388. spin_unlock_irqrestore(&dev->event_lock, flags);
  389. drm_vblank_put(dev, 0);
  390. }
  391. static int shmob_drm_crtc_page_flip(struct drm_crtc *crtc,
  392. struct drm_framebuffer *fb,
  393. struct drm_pending_vblank_event *event)
  394. {
  395. struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc);
  396. struct drm_device *dev = scrtc->crtc.dev;
  397. unsigned long flags;
  398. spin_lock_irqsave(&dev->event_lock, flags);
  399. if (scrtc->event != NULL) {
  400. spin_unlock_irqrestore(&dev->event_lock, flags);
  401. return -EBUSY;
  402. }
  403. spin_unlock_irqrestore(&dev->event_lock, flags);
  404. crtc->fb = fb;
  405. shmob_drm_crtc_update_base(scrtc);
  406. if (event) {
  407. event->pipe = 0;
  408. spin_lock_irqsave(&dev->event_lock, flags);
  409. scrtc->event = event;
  410. spin_unlock_irqrestore(&dev->event_lock, flags);
  411. drm_vblank_get(dev, 0);
  412. }
  413. return 0;
  414. }
  415. static const struct drm_crtc_funcs crtc_funcs = {
  416. .destroy = drm_crtc_cleanup,
  417. .set_config = drm_crtc_helper_set_config,
  418. .page_flip = shmob_drm_crtc_page_flip,
  419. };
  420. int shmob_drm_crtc_create(struct shmob_drm_device *sdev)
  421. {
  422. struct drm_crtc *crtc = &sdev->crtc.crtc;
  423. int ret;
  424. sdev->crtc.dpms = DRM_MODE_DPMS_OFF;
  425. ret = drm_crtc_init(sdev->ddev, crtc, &crtc_funcs);
  426. if (ret < 0)
  427. return ret;
  428. drm_crtc_helper_add(crtc, &crtc_helper_funcs);
  429. return 0;
  430. }
  431. /* -----------------------------------------------------------------------------
  432. * Encoder
  433. */
  434. #define to_shmob_encoder(e) \
  435. container_of(e, struct shmob_drm_encoder, encoder)
  436. static void shmob_drm_encoder_dpms(struct drm_encoder *encoder, int mode)
  437. {
  438. struct shmob_drm_encoder *senc = to_shmob_encoder(encoder);
  439. struct shmob_drm_device *sdev = encoder->dev->dev_private;
  440. struct shmob_drm_connector *scon = &sdev->connector;
  441. if (senc->dpms == mode)
  442. return;
  443. shmob_drm_backlight_dpms(scon, mode);
  444. senc->dpms = mode;
  445. }
  446. static bool shmob_drm_encoder_mode_fixup(struct drm_encoder *encoder,
  447. const struct drm_display_mode *mode,
  448. struct drm_display_mode *adjusted_mode)
  449. {
  450. struct drm_device *dev = encoder->dev;
  451. struct shmob_drm_device *sdev = dev->dev_private;
  452. struct drm_connector *connector = &sdev->connector.connector;
  453. const struct drm_display_mode *panel_mode;
  454. if (list_empty(&connector->modes)) {
  455. dev_dbg(dev->dev, "mode_fixup: empty modes list\n");
  456. return false;
  457. }
  458. /* The flat panel mode is fixed, just copy it to the adjusted mode. */
  459. panel_mode = list_first_entry(&connector->modes,
  460. struct drm_display_mode, head);
  461. drm_mode_copy(adjusted_mode, panel_mode);
  462. return true;
  463. }
  464. static void shmob_drm_encoder_mode_prepare(struct drm_encoder *encoder)
  465. {
  466. /* No-op, everything is handled in the CRTC code. */
  467. }
  468. static void shmob_drm_encoder_mode_set(struct drm_encoder *encoder,
  469. struct drm_display_mode *mode,
  470. struct drm_display_mode *adjusted_mode)
  471. {
  472. /* No-op, everything is handled in the CRTC code. */
  473. }
  474. static void shmob_drm_encoder_mode_commit(struct drm_encoder *encoder)
  475. {
  476. /* No-op, everything is handled in the CRTC code. */
  477. }
  478. static const struct drm_encoder_helper_funcs encoder_helper_funcs = {
  479. .dpms = shmob_drm_encoder_dpms,
  480. .mode_fixup = shmob_drm_encoder_mode_fixup,
  481. .prepare = shmob_drm_encoder_mode_prepare,
  482. .commit = shmob_drm_encoder_mode_commit,
  483. .mode_set = shmob_drm_encoder_mode_set,
  484. };
  485. static void shmob_drm_encoder_destroy(struct drm_encoder *encoder)
  486. {
  487. drm_encoder_cleanup(encoder);
  488. }
  489. static const struct drm_encoder_funcs encoder_funcs = {
  490. .destroy = shmob_drm_encoder_destroy,
  491. };
  492. int shmob_drm_encoder_create(struct shmob_drm_device *sdev)
  493. {
  494. struct drm_encoder *encoder = &sdev->encoder.encoder;
  495. int ret;
  496. sdev->encoder.dpms = DRM_MODE_DPMS_OFF;
  497. encoder->possible_crtcs = 1;
  498. ret = drm_encoder_init(sdev->ddev, encoder, &encoder_funcs,
  499. DRM_MODE_ENCODER_LVDS);
  500. if (ret < 0)
  501. return ret;
  502. drm_encoder_helper_add(encoder, &encoder_helper_funcs);
  503. return 0;
  504. }
  505. void shmob_drm_crtc_enable_vblank(struct shmob_drm_device *sdev, bool enable)
  506. {
  507. unsigned long flags;
  508. u32 ldintr;
  509. /* Be careful not to acknowledge any pending interrupt. */
  510. spin_lock_irqsave(&sdev->irq_lock, flags);
  511. ldintr = lcdc_read(sdev, LDINTR) | LDINTR_STATUS_MASK;
  512. if (enable)
  513. ldintr |= LDINTR_VEE;
  514. else
  515. ldintr &= ~LDINTR_VEE;
  516. lcdc_write(sdev, LDINTR, ldintr);
  517. spin_unlock_irqrestore(&sdev->irq_lock, flags);
  518. }
  519. /* -----------------------------------------------------------------------------
  520. * Connector
  521. */
  522. #define to_shmob_connector(c) \
  523. container_of(c, struct shmob_drm_connector, connector)
  524. static int shmob_drm_connector_get_modes(struct drm_connector *connector)
  525. {
  526. struct shmob_drm_device *sdev = connector->dev->dev_private;
  527. struct drm_display_mode *mode;
  528. mode = drm_mode_create(connector->dev);
  529. if (mode == NULL)
  530. return 0;
  531. mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
  532. mode->clock = sdev->pdata->panel.mode.clock;
  533. mode->hdisplay = sdev->pdata->panel.mode.hdisplay;
  534. mode->hsync_start = sdev->pdata->panel.mode.hsync_start;
  535. mode->hsync_end = sdev->pdata->panel.mode.hsync_end;
  536. mode->htotal = sdev->pdata->panel.mode.htotal;
  537. mode->vdisplay = sdev->pdata->panel.mode.vdisplay;
  538. mode->vsync_start = sdev->pdata->panel.mode.vsync_start;
  539. mode->vsync_end = sdev->pdata->panel.mode.vsync_end;
  540. mode->vtotal = sdev->pdata->panel.mode.vtotal;
  541. mode->flags = sdev->pdata->panel.mode.flags;
  542. drm_mode_set_name(mode);
  543. drm_mode_probed_add(connector, mode);
  544. connector->display_info.width_mm = sdev->pdata->panel.width_mm;
  545. connector->display_info.height_mm = sdev->pdata->panel.height_mm;
  546. return 1;
  547. }
  548. static int shmob_drm_connector_mode_valid(struct drm_connector *connector,
  549. struct drm_display_mode *mode)
  550. {
  551. return MODE_OK;
  552. }
  553. static struct drm_encoder *
  554. shmob_drm_connector_best_encoder(struct drm_connector *connector)
  555. {
  556. struct shmob_drm_connector *scon = to_shmob_connector(connector);
  557. return scon->encoder;
  558. }
  559. static const struct drm_connector_helper_funcs connector_helper_funcs = {
  560. .get_modes = shmob_drm_connector_get_modes,
  561. .mode_valid = shmob_drm_connector_mode_valid,
  562. .best_encoder = shmob_drm_connector_best_encoder,
  563. };
  564. static void shmob_drm_connector_destroy(struct drm_connector *connector)
  565. {
  566. struct shmob_drm_connector *scon = to_shmob_connector(connector);
  567. shmob_drm_backlight_exit(scon);
  568. drm_sysfs_connector_remove(connector);
  569. drm_connector_cleanup(connector);
  570. }
  571. static enum drm_connector_status
  572. shmob_drm_connector_detect(struct drm_connector *connector, bool force)
  573. {
  574. return connector_status_connected;
  575. }
  576. static const struct drm_connector_funcs connector_funcs = {
  577. .dpms = drm_helper_connector_dpms,
  578. .detect = shmob_drm_connector_detect,
  579. .fill_modes = drm_helper_probe_single_connector_modes,
  580. .destroy = shmob_drm_connector_destroy,
  581. };
  582. int shmob_drm_connector_create(struct shmob_drm_device *sdev,
  583. struct drm_encoder *encoder)
  584. {
  585. struct drm_connector *connector = &sdev->connector.connector;
  586. int ret;
  587. sdev->connector.encoder = encoder;
  588. connector->display_info.width_mm = sdev->pdata->panel.width_mm;
  589. connector->display_info.height_mm = sdev->pdata->panel.height_mm;
  590. ret = drm_connector_init(sdev->ddev, connector, &connector_funcs,
  591. DRM_MODE_CONNECTOR_LVDS);
  592. if (ret < 0)
  593. return ret;
  594. drm_connector_helper_add(connector, &connector_helper_funcs);
  595. ret = drm_sysfs_connector_add(connector);
  596. if (ret < 0)
  597. goto err_cleanup;
  598. ret = shmob_drm_backlight_init(&sdev->connector);
  599. if (ret < 0)
  600. goto err_sysfs;
  601. ret = drm_mode_connector_attach_encoder(connector, encoder);
  602. if (ret < 0)
  603. goto err_backlight;
  604. connector->encoder = encoder;
  605. drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
  606. drm_object_property_set_value(&connector->base,
  607. sdev->ddev->mode_config.dpms_property, DRM_MODE_DPMS_OFF);
  608. return 0;
  609. err_backlight:
  610. shmob_drm_backlight_exit(&sdev->connector);
  611. err_sysfs:
  612. drm_sysfs_connector_remove(connector);
  613. err_cleanup:
  614. drm_connector_cleanup(connector);
  615. return ret;
  616. }