radeon_gem.c 15 KB

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  1. /*
  2. * Copyright 2008 Advanced Micro Devices, Inc.
  3. * Copyright 2008 Red Hat Inc.
  4. * Copyright 2009 Jerome Glisse.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors: Dave Airlie
  25. * Alex Deucher
  26. * Jerome Glisse
  27. */
  28. #include <drm/drmP.h>
  29. #include <drm/radeon_drm.h>
  30. #include "radeon.h"
  31. int radeon_gem_object_init(struct drm_gem_object *obj)
  32. {
  33. BUG();
  34. return 0;
  35. }
  36. void radeon_gem_object_free(struct drm_gem_object *gobj)
  37. {
  38. struct radeon_bo *robj = gem_to_radeon_bo(gobj);
  39. if (robj) {
  40. if (robj->gem_base.import_attach)
  41. drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
  42. radeon_bo_unref(&robj);
  43. }
  44. }
  45. int radeon_gem_object_create(struct radeon_device *rdev, int size,
  46. int alignment, int initial_domain,
  47. bool discardable, bool kernel,
  48. struct drm_gem_object **obj)
  49. {
  50. struct radeon_bo *robj;
  51. unsigned long max_size;
  52. int r;
  53. *obj = NULL;
  54. /* At least align on page size */
  55. if (alignment < PAGE_SIZE) {
  56. alignment = PAGE_SIZE;
  57. }
  58. /* maximun bo size is the minimun btw visible vram and gtt size */
  59. max_size = min(rdev->mc.visible_vram_size, rdev->mc.gtt_size);
  60. if (size > max_size) {
  61. printk(KERN_WARNING "%s:%d alloc size %dMb bigger than %ldMb limit\n",
  62. __func__, __LINE__, size >> 20, max_size >> 20);
  63. return -ENOMEM;
  64. }
  65. retry:
  66. r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, NULL, &robj);
  67. if (r) {
  68. if (r != -ERESTARTSYS) {
  69. if (initial_domain == RADEON_GEM_DOMAIN_VRAM) {
  70. initial_domain |= RADEON_GEM_DOMAIN_GTT;
  71. goto retry;
  72. }
  73. DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
  74. size, initial_domain, alignment, r);
  75. }
  76. return r;
  77. }
  78. *obj = &robj->gem_base;
  79. mutex_lock(&rdev->gem.mutex);
  80. list_add_tail(&robj->list, &rdev->gem.objects);
  81. mutex_unlock(&rdev->gem.mutex);
  82. return 0;
  83. }
  84. int radeon_gem_set_domain(struct drm_gem_object *gobj,
  85. uint32_t rdomain, uint32_t wdomain)
  86. {
  87. struct radeon_bo *robj;
  88. uint32_t domain;
  89. int r;
  90. /* FIXME: reeimplement */
  91. robj = gem_to_radeon_bo(gobj);
  92. /* work out where to validate the buffer to */
  93. domain = wdomain;
  94. if (!domain) {
  95. domain = rdomain;
  96. }
  97. if (!domain) {
  98. /* Do nothings */
  99. printk(KERN_WARNING "Set domain without domain !\n");
  100. return 0;
  101. }
  102. if (domain == RADEON_GEM_DOMAIN_CPU) {
  103. /* Asking for cpu access wait for object idle */
  104. r = radeon_bo_wait(robj, NULL, false);
  105. if (r) {
  106. printk(KERN_ERR "Failed to wait for object !\n");
  107. return r;
  108. }
  109. }
  110. return 0;
  111. }
  112. int radeon_gem_init(struct radeon_device *rdev)
  113. {
  114. INIT_LIST_HEAD(&rdev->gem.objects);
  115. return 0;
  116. }
  117. void radeon_gem_fini(struct radeon_device *rdev)
  118. {
  119. radeon_bo_force_delete(rdev);
  120. }
  121. /*
  122. * Call from drm_gem_handle_create which appear in both new and open ioctl
  123. * case.
  124. */
  125. int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
  126. {
  127. struct radeon_bo *rbo = gem_to_radeon_bo(obj);
  128. struct radeon_device *rdev = rbo->rdev;
  129. struct radeon_fpriv *fpriv = file_priv->driver_priv;
  130. struct radeon_vm *vm = &fpriv->vm;
  131. struct radeon_bo_va *bo_va;
  132. int r;
  133. if (rdev->family < CHIP_CAYMAN) {
  134. return 0;
  135. }
  136. r = radeon_bo_reserve(rbo, false);
  137. if (r) {
  138. return r;
  139. }
  140. bo_va = radeon_vm_bo_find(vm, rbo);
  141. if (!bo_va) {
  142. bo_va = radeon_vm_bo_add(rdev, vm, rbo);
  143. } else {
  144. ++bo_va->ref_count;
  145. }
  146. radeon_bo_unreserve(rbo);
  147. return 0;
  148. }
  149. void radeon_gem_object_close(struct drm_gem_object *obj,
  150. struct drm_file *file_priv)
  151. {
  152. struct radeon_bo *rbo = gem_to_radeon_bo(obj);
  153. struct radeon_device *rdev = rbo->rdev;
  154. struct radeon_fpriv *fpriv = file_priv->driver_priv;
  155. struct radeon_vm *vm = &fpriv->vm;
  156. struct radeon_bo_va *bo_va;
  157. int r;
  158. if (rdev->family < CHIP_CAYMAN) {
  159. return;
  160. }
  161. r = radeon_bo_reserve(rbo, true);
  162. if (r) {
  163. dev_err(rdev->dev, "leaking bo va because "
  164. "we fail to reserve bo (%d)\n", r);
  165. return;
  166. }
  167. bo_va = radeon_vm_bo_find(vm, rbo);
  168. if (bo_va) {
  169. if (--bo_va->ref_count == 0) {
  170. radeon_vm_bo_rmv(rdev, bo_va);
  171. }
  172. }
  173. radeon_bo_unreserve(rbo);
  174. }
  175. static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
  176. {
  177. if (r == -EDEADLK) {
  178. r = radeon_gpu_reset(rdev);
  179. if (!r)
  180. r = -EAGAIN;
  181. }
  182. return r;
  183. }
  184. /*
  185. * GEM ioctls.
  186. */
  187. int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
  188. struct drm_file *filp)
  189. {
  190. struct radeon_device *rdev = dev->dev_private;
  191. struct drm_radeon_gem_info *args = data;
  192. struct ttm_mem_type_manager *man;
  193. unsigned i;
  194. man = &rdev->mman.bdev.man[TTM_PL_VRAM];
  195. args->vram_size = rdev->mc.real_vram_size;
  196. args->vram_visible = (u64)man->size << PAGE_SHIFT;
  197. if (rdev->stollen_vga_memory)
  198. args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
  199. args->vram_visible -= radeon_fbdev_total_size(rdev);
  200. args->gart_size = rdev->mc.gtt_size - 4096 - RADEON_IB_POOL_SIZE*64*1024;
  201. for(i = 0; i < RADEON_NUM_RINGS; ++i)
  202. args->gart_size -= rdev->ring[i].ring_size;
  203. return 0;
  204. }
  205. int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
  206. struct drm_file *filp)
  207. {
  208. /* TODO: implement */
  209. DRM_ERROR("unimplemented %s\n", __func__);
  210. return -ENOSYS;
  211. }
  212. int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
  213. struct drm_file *filp)
  214. {
  215. /* TODO: implement */
  216. DRM_ERROR("unimplemented %s\n", __func__);
  217. return -ENOSYS;
  218. }
  219. int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
  220. struct drm_file *filp)
  221. {
  222. struct radeon_device *rdev = dev->dev_private;
  223. struct drm_radeon_gem_create *args = data;
  224. struct drm_gem_object *gobj;
  225. uint32_t handle;
  226. int r;
  227. down_read(&rdev->exclusive_lock);
  228. /* create a gem object to contain this object in */
  229. args->size = roundup(args->size, PAGE_SIZE);
  230. r = radeon_gem_object_create(rdev, args->size, args->alignment,
  231. args->initial_domain, false,
  232. false, &gobj);
  233. if (r) {
  234. up_read(&rdev->exclusive_lock);
  235. r = radeon_gem_handle_lockup(rdev, r);
  236. return r;
  237. }
  238. r = drm_gem_handle_create(filp, gobj, &handle);
  239. /* drop reference from allocate - handle holds it now */
  240. drm_gem_object_unreference_unlocked(gobj);
  241. if (r) {
  242. up_read(&rdev->exclusive_lock);
  243. r = radeon_gem_handle_lockup(rdev, r);
  244. return r;
  245. }
  246. args->handle = handle;
  247. up_read(&rdev->exclusive_lock);
  248. return 0;
  249. }
  250. int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
  251. struct drm_file *filp)
  252. {
  253. /* transition the BO to a domain -
  254. * just validate the BO into a certain domain */
  255. struct radeon_device *rdev = dev->dev_private;
  256. struct drm_radeon_gem_set_domain *args = data;
  257. struct drm_gem_object *gobj;
  258. struct radeon_bo *robj;
  259. int r;
  260. /* for now if someone requests domain CPU -
  261. * just make sure the buffer is finished with */
  262. down_read(&rdev->exclusive_lock);
  263. /* just do a BO wait for now */
  264. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  265. if (gobj == NULL) {
  266. up_read(&rdev->exclusive_lock);
  267. return -ENOENT;
  268. }
  269. robj = gem_to_radeon_bo(gobj);
  270. r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
  271. drm_gem_object_unreference_unlocked(gobj);
  272. up_read(&rdev->exclusive_lock);
  273. r = radeon_gem_handle_lockup(robj->rdev, r);
  274. return r;
  275. }
  276. int radeon_mode_dumb_mmap(struct drm_file *filp,
  277. struct drm_device *dev,
  278. uint32_t handle, uint64_t *offset_p)
  279. {
  280. struct drm_gem_object *gobj;
  281. struct radeon_bo *robj;
  282. gobj = drm_gem_object_lookup(dev, filp, handle);
  283. if (gobj == NULL) {
  284. return -ENOENT;
  285. }
  286. robj = gem_to_radeon_bo(gobj);
  287. *offset_p = radeon_bo_mmap_offset(robj);
  288. drm_gem_object_unreference_unlocked(gobj);
  289. return 0;
  290. }
  291. int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
  292. struct drm_file *filp)
  293. {
  294. struct drm_radeon_gem_mmap *args = data;
  295. return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
  296. }
  297. int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
  298. struct drm_file *filp)
  299. {
  300. struct radeon_device *rdev = dev->dev_private;
  301. struct drm_radeon_gem_busy *args = data;
  302. struct drm_gem_object *gobj;
  303. struct radeon_bo *robj;
  304. int r;
  305. uint32_t cur_placement = 0;
  306. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  307. if (gobj == NULL) {
  308. return -ENOENT;
  309. }
  310. robj = gem_to_radeon_bo(gobj);
  311. r = radeon_bo_wait(robj, &cur_placement, true);
  312. switch (cur_placement) {
  313. case TTM_PL_VRAM:
  314. args->domain = RADEON_GEM_DOMAIN_VRAM;
  315. break;
  316. case TTM_PL_TT:
  317. args->domain = RADEON_GEM_DOMAIN_GTT;
  318. break;
  319. case TTM_PL_SYSTEM:
  320. args->domain = RADEON_GEM_DOMAIN_CPU;
  321. default:
  322. break;
  323. }
  324. drm_gem_object_unreference_unlocked(gobj);
  325. r = radeon_gem_handle_lockup(rdev, r);
  326. return r;
  327. }
  328. int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
  329. struct drm_file *filp)
  330. {
  331. struct radeon_device *rdev = dev->dev_private;
  332. struct drm_radeon_gem_wait_idle *args = data;
  333. struct drm_gem_object *gobj;
  334. struct radeon_bo *robj;
  335. int r;
  336. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  337. if (gobj == NULL) {
  338. return -ENOENT;
  339. }
  340. robj = gem_to_radeon_bo(gobj);
  341. r = radeon_bo_wait(robj, NULL, false);
  342. /* callback hw specific functions if any */
  343. if (rdev->asic->ioctl_wait_idle)
  344. robj->rdev->asic->ioctl_wait_idle(rdev, robj);
  345. drm_gem_object_unreference_unlocked(gobj);
  346. r = radeon_gem_handle_lockup(rdev, r);
  347. return r;
  348. }
  349. int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
  350. struct drm_file *filp)
  351. {
  352. struct drm_radeon_gem_set_tiling *args = data;
  353. struct drm_gem_object *gobj;
  354. struct radeon_bo *robj;
  355. int r = 0;
  356. DRM_DEBUG("%d \n", args->handle);
  357. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  358. if (gobj == NULL)
  359. return -ENOENT;
  360. robj = gem_to_radeon_bo(gobj);
  361. r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
  362. drm_gem_object_unreference_unlocked(gobj);
  363. return r;
  364. }
  365. int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
  366. struct drm_file *filp)
  367. {
  368. struct drm_radeon_gem_get_tiling *args = data;
  369. struct drm_gem_object *gobj;
  370. struct radeon_bo *rbo;
  371. int r = 0;
  372. DRM_DEBUG("\n");
  373. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  374. if (gobj == NULL)
  375. return -ENOENT;
  376. rbo = gem_to_radeon_bo(gobj);
  377. r = radeon_bo_reserve(rbo, false);
  378. if (unlikely(r != 0))
  379. goto out;
  380. radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
  381. radeon_bo_unreserve(rbo);
  382. out:
  383. drm_gem_object_unreference_unlocked(gobj);
  384. return r;
  385. }
  386. int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
  387. struct drm_file *filp)
  388. {
  389. struct drm_radeon_gem_va *args = data;
  390. struct drm_gem_object *gobj;
  391. struct radeon_device *rdev = dev->dev_private;
  392. struct radeon_fpriv *fpriv = filp->driver_priv;
  393. struct radeon_bo *rbo;
  394. struct radeon_bo_va *bo_va;
  395. u32 invalid_flags;
  396. int r = 0;
  397. if (!rdev->vm_manager.enabled) {
  398. args->operation = RADEON_VA_RESULT_ERROR;
  399. return -ENOTTY;
  400. }
  401. /* !! DONT REMOVE !!
  402. * We don't support vm_id yet, to be sure we don't have have broken
  403. * userspace, reject anyone trying to use non 0 value thus moving
  404. * forward we can use those fields without breaking existant userspace
  405. */
  406. if (args->vm_id) {
  407. args->operation = RADEON_VA_RESULT_ERROR;
  408. return -EINVAL;
  409. }
  410. if (args->offset < RADEON_VA_RESERVED_SIZE) {
  411. dev_err(&dev->pdev->dev,
  412. "offset 0x%lX is in reserved area 0x%X\n",
  413. (unsigned long)args->offset,
  414. RADEON_VA_RESERVED_SIZE);
  415. args->operation = RADEON_VA_RESULT_ERROR;
  416. return -EINVAL;
  417. }
  418. /* don't remove, we need to enforce userspace to set the snooped flag
  419. * otherwise we will endup with broken userspace and we won't be able
  420. * to enable this feature without adding new interface
  421. */
  422. invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
  423. if ((args->flags & invalid_flags)) {
  424. dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
  425. args->flags, invalid_flags);
  426. args->operation = RADEON_VA_RESULT_ERROR;
  427. return -EINVAL;
  428. }
  429. if (!(args->flags & RADEON_VM_PAGE_SNOOPED)) {
  430. dev_err(&dev->pdev->dev, "only supported snooped mapping for now\n");
  431. args->operation = RADEON_VA_RESULT_ERROR;
  432. return -EINVAL;
  433. }
  434. switch (args->operation) {
  435. case RADEON_VA_MAP:
  436. case RADEON_VA_UNMAP:
  437. break;
  438. default:
  439. dev_err(&dev->pdev->dev, "unsupported operation %d\n",
  440. args->operation);
  441. args->operation = RADEON_VA_RESULT_ERROR;
  442. return -EINVAL;
  443. }
  444. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  445. if (gobj == NULL) {
  446. args->operation = RADEON_VA_RESULT_ERROR;
  447. return -ENOENT;
  448. }
  449. rbo = gem_to_radeon_bo(gobj);
  450. r = radeon_bo_reserve(rbo, false);
  451. if (r) {
  452. args->operation = RADEON_VA_RESULT_ERROR;
  453. drm_gem_object_unreference_unlocked(gobj);
  454. return r;
  455. }
  456. bo_va = radeon_vm_bo_find(&fpriv->vm, rbo);
  457. if (!bo_va) {
  458. args->operation = RADEON_VA_RESULT_ERROR;
  459. drm_gem_object_unreference_unlocked(gobj);
  460. return -ENOENT;
  461. }
  462. switch (args->operation) {
  463. case RADEON_VA_MAP:
  464. if (bo_va->soffset) {
  465. args->operation = RADEON_VA_RESULT_VA_EXIST;
  466. args->offset = bo_va->soffset;
  467. goto out;
  468. }
  469. r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);
  470. break;
  471. case RADEON_VA_UNMAP:
  472. r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0);
  473. break;
  474. default:
  475. break;
  476. }
  477. args->operation = RADEON_VA_RESULT_OK;
  478. if (r) {
  479. args->operation = RADEON_VA_RESULT_ERROR;
  480. }
  481. out:
  482. radeon_bo_unreserve(rbo);
  483. drm_gem_object_unreference_unlocked(gobj);
  484. return r;
  485. }
  486. int radeon_mode_dumb_create(struct drm_file *file_priv,
  487. struct drm_device *dev,
  488. struct drm_mode_create_dumb *args)
  489. {
  490. struct radeon_device *rdev = dev->dev_private;
  491. struct drm_gem_object *gobj;
  492. uint32_t handle;
  493. int r;
  494. args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
  495. args->size = args->pitch * args->height;
  496. args->size = ALIGN(args->size, PAGE_SIZE);
  497. r = radeon_gem_object_create(rdev, args->size, 0,
  498. RADEON_GEM_DOMAIN_VRAM,
  499. false, ttm_bo_type_device,
  500. &gobj);
  501. if (r)
  502. return -ENOMEM;
  503. r = drm_gem_handle_create(file_priv, gobj, &handle);
  504. /* drop reference from allocate - handle holds it now */
  505. drm_gem_object_unreference_unlocked(gobj);
  506. if (r) {
  507. return r;
  508. }
  509. args->handle = handle;
  510. return 0;
  511. }
  512. int radeon_mode_dumb_destroy(struct drm_file *file_priv,
  513. struct drm_device *dev,
  514. uint32_t handle)
  515. {
  516. return drm_gem_handle_delete(file_priv, handle);
  517. }