radeon_fb.c 10 KB

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  1. /*
  2. * Copyright © 2007 David Airlie
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * David Airlie
  25. */
  26. #include <linux/module.h>
  27. #include <linux/slab.h>
  28. #include <linux/fb.h>
  29. #include <drm/drmP.h>
  30. #include <drm/drm_crtc.h>
  31. #include <drm/drm_crtc_helper.h>
  32. #include <drm/radeon_drm.h>
  33. #include "radeon.h"
  34. #include <drm/drm_fb_helper.h>
  35. #include <linux/vga_switcheroo.h>
  36. /* object hierarchy -
  37. this contains a helper + a radeon fb
  38. the helper contains a pointer to radeon framebuffer baseclass.
  39. */
  40. struct radeon_fbdev {
  41. struct drm_fb_helper helper;
  42. struct radeon_framebuffer rfb;
  43. struct list_head fbdev_list;
  44. struct radeon_device *rdev;
  45. };
  46. static struct fb_ops radeonfb_ops = {
  47. .owner = THIS_MODULE,
  48. .fb_check_var = drm_fb_helper_check_var,
  49. .fb_set_par = drm_fb_helper_set_par,
  50. .fb_fillrect = cfb_fillrect,
  51. .fb_copyarea = cfb_copyarea,
  52. .fb_imageblit = cfb_imageblit,
  53. .fb_pan_display = drm_fb_helper_pan_display,
  54. .fb_blank = drm_fb_helper_blank,
  55. .fb_setcmap = drm_fb_helper_setcmap,
  56. .fb_debug_enter = drm_fb_helper_debug_enter,
  57. .fb_debug_leave = drm_fb_helper_debug_leave,
  58. };
  59. int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
  60. {
  61. int aligned = width;
  62. int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
  63. int pitch_mask = 0;
  64. switch (bpp / 8) {
  65. case 1:
  66. pitch_mask = align_large ? 255 : 127;
  67. break;
  68. case 2:
  69. pitch_mask = align_large ? 127 : 31;
  70. break;
  71. case 3:
  72. case 4:
  73. pitch_mask = align_large ? 63 : 15;
  74. break;
  75. }
  76. aligned += pitch_mask;
  77. aligned &= ~pitch_mask;
  78. return aligned;
  79. }
  80. static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj)
  81. {
  82. struct radeon_bo *rbo = gem_to_radeon_bo(gobj);
  83. int ret;
  84. ret = radeon_bo_reserve(rbo, false);
  85. if (likely(ret == 0)) {
  86. radeon_bo_kunmap(rbo);
  87. radeon_bo_unpin(rbo);
  88. radeon_bo_unreserve(rbo);
  89. }
  90. drm_gem_object_unreference_unlocked(gobj);
  91. }
  92. static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
  93. struct drm_mode_fb_cmd2 *mode_cmd,
  94. struct drm_gem_object **gobj_p)
  95. {
  96. struct radeon_device *rdev = rfbdev->rdev;
  97. struct drm_gem_object *gobj = NULL;
  98. struct radeon_bo *rbo = NULL;
  99. bool fb_tiled = false; /* useful for testing */
  100. u32 tiling_flags = 0;
  101. int ret;
  102. int aligned_size, size;
  103. int height = mode_cmd->height;
  104. u32 bpp, depth;
  105. drm_fb_get_bpp_depth(mode_cmd->pixel_format, &depth, &bpp);
  106. /* need to align pitch with crtc limits */
  107. mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, bpp,
  108. fb_tiled) * ((bpp + 1) / 8);
  109. if (rdev->family >= CHIP_R600)
  110. height = ALIGN(mode_cmd->height, 8);
  111. size = mode_cmd->pitches[0] * height;
  112. aligned_size = ALIGN(size, PAGE_SIZE);
  113. ret = radeon_gem_object_create(rdev, aligned_size, 0,
  114. RADEON_GEM_DOMAIN_VRAM,
  115. false, true,
  116. &gobj);
  117. if (ret) {
  118. printk(KERN_ERR "failed to allocate framebuffer (%d)\n",
  119. aligned_size);
  120. return -ENOMEM;
  121. }
  122. rbo = gem_to_radeon_bo(gobj);
  123. if (fb_tiled)
  124. tiling_flags = RADEON_TILING_MACRO;
  125. #ifdef __BIG_ENDIAN
  126. switch (bpp) {
  127. case 32:
  128. tiling_flags |= RADEON_TILING_SWAP_32BIT;
  129. break;
  130. case 16:
  131. tiling_flags |= RADEON_TILING_SWAP_16BIT;
  132. default:
  133. break;
  134. }
  135. #endif
  136. if (tiling_flags) {
  137. ret = radeon_bo_set_tiling_flags(rbo,
  138. tiling_flags | RADEON_TILING_SURFACE,
  139. mode_cmd->pitches[0]);
  140. if (ret)
  141. dev_err(rdev->dev, "FB failed to set tiling flags\n");
  142. }
  143. ret = radeon_bo_reserve(rbo, false);
  144. if (unlikely(ret != 0))
  145. goto out_unref;
  146. /* Only 27 bit offset for legacy CRTC */
  147. ret = radeon_bo_pin_restricted(rbo, RADEON_GEM_DOMAIN_VRAM,
  148. ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27,
  149. NULL);
  150. if (ret) {
  151. radeon_bo_unreserve(rbo);
  152. goto out_unref;
  153. }
  154. if (fb_tiled)
  155. radeon_bo_check_tiling(rbo, 0, 0);
  156. ret = radeon_bo_kmap(rbo, NULL);
  157. radeon_bo_unreserve(rbo);
  158. if (ret) {
  159. goto out_unref;
  160. }
  161. *gobj_p = gobj;
  162. return 0;
  163. out_unref:
  164. radeonfb_destroy_pinned_object(gobj);
  165. *gobj_p = NULL;
  166. return ret;
  167. }
  168. static int radeonfb_create(struct drm_fb_helper *helper,
  169. struct drm_fb_helper_surface_size *sizes)
  170. {
  171. struct radeon_fbdev *rfbdev = (struct radeon_fbdev *)helper;
  172. struct radeon_device *rdev = rfbdev->rdev;
  173. struct fb_info *info;
  174. struct drm_framebuffer *fb = NULL;
  175. struct drm_mode_fb_cmd2 mode_cmd;
  176. struct drm_gem_object *gobj = NULL;
  177. struct radeon_bo *rbo = NULL;
  178. struct device *device = &rdev->pdev->dev;
  179. int ret;
  180. unsigned long tmp;
  181. mode_cmd.width = sizes->surface_width;
  182. mode_cmd.height = sizes->surface_height;
  183. /* avivo can't scanout real 24bpp */
  184. if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
  185. sizes->surface_bpp = 32;
  186. mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
  187. sizes->surface_depth);
  188. ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
  189. if (ret) {
  190. DRM_ERROR("failed to create fbcon object %d\n", ret);
  191. return ret;
  192. }
  193. rbo = gem_to_radeon_bo(gobj);
  194. /* okay we have an object now allocate the framebuffer */
  195. info = framebuffer_alloc(0, device);
  196. if (info == NULL) {
  197. ret = -ENOMEM;
  198. goto out_unref;
  199. }
  200. info->par = rfbdev;
  201. ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj);
  202. if (ret) {
  203. DRM_ERROR("failed to initalise framebuffer %d\n", ret);
  204. goto out_unref;
  205. }
  206. fb = &rfbdev->rfb.base;
  207. /* setup helper */
  208. rfbdev->helper.fb = fb;
  209. rfbdev->helper.fbdev = info;
  210. memset_io(rbo->kptr, 0x0, radeon_bo_size(rbo));
  211. strcpy(info->fix.id, "radeondrmfb");
  212. drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth);
  213. info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;
  214. info->fbops = &radeonfb_ops;
  215. tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;
  216. info->fix.smem_start = rdev->mc.aper_base + tmp;
  217. info->fix.smem_len = radeon_bo_size(rbo);
  218. info->screen_base = rbo->kptr;
  219. info->screen_size = radeon_bo_size(rbo);
  220. drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height);
  221. /* setup aperture base/size for vesafb takeover */
  222. info->apertures = alloc_apertures(1);
  223. if (!info->apertures) {
  224. ret = -ENOMEM;
  225. goto out_unref;
  226. }
  227. info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base;
  228. info->apertures->ranges[0].size = rdev->mc.aper_size;
  229. /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
  230. if (info->screen_base == NULL) {
  231. ret = -ENOSPC;
  232. goto out_unref;
  233. }
  234. ret = fb_alloc_cmap(&info->cmap, 256, 0);
  235. if (ret) {
  236. ret = -ENOMEM;
  237. goto out_unref;
  238. }
  239. DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start);
  240. DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base);
  241. DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo));
  242. DRM_INFO("fb depth is %d\n", fb->depth);
  243. DRM_INFO(" pitch is %d\n", fb->pitches[0]);
  244. vga_switcheroo_client_fb_set(rdev->ddev->pdev, info);
  245. return 0;
  246. out_unref:
  247. if (rbo) {
  248. }
  249. if (fb && ret) {
  250. drm_gem_object_unreference(gobj);
  251. drm_framebuffer_unregister_private(fb);
  252. drm_framebuffer_cleanup(fb);
  253. kfree(fb);
  254. }
  255. return ret;
  256. }
  257. void radeon_fb_output_poll_changed(struct radeon_device *rdev)
  258. {
  259. drm_fb_helper_hotplug_event(&rdev->mode_info.rfbdev->helper);
  260. }
  261. static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev)
  262. {
  263. struct fb_info *info;
  264. struct radeon_framebuffer *rfb = &rfbdev->rfb;
  265. if (rfbdev->helper.fbdev) {
  266. info = rfbdev->helper.fbdev;
  267. unregister_framebuffer(info);
  268. if (info->cmap.len)
  269. fb_dealloc_cmap(&info->cmap);
  270. framebuffer_release(info);
  271. }
  272. if (rfb->obj) {
  273. radeonfb_destroy_pinned_object(rfb->obj);
  274. rfb->obj = NULL;
  275. }
  276. drm_fb_helper_fini(&rfbdev->helper);
  277. drm_framebuffer_unregister_private(&rfb->base);
  278. drm_framebuffer_cleanup(&rfb->base);
  279. return 0;
  280. }
  281. static struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
  282. .gamma_set = radeon_crtc_fb_gamma_set,
  283. .gamma_get = radeon_crtc_fb_gamma_get,
  284. .fb_probe = radeonfb_create,
  285. };
  286. int radeon_fbdev_init(struct radeon_device *rdev)
  287. {
  288. struct radeon_fbdev *rfbdev;
  289. int bpp_sel = 32;
  290. int ret;
  291. /* select 8 bpp console on RN50 or 16MB cards */
  292. if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024))
  293. bpp_sel = 8;
  294. rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL);
  295. if (!rfbdev)
  296. return -ENOMEM;
  297. rfbdev->rdev = rdev;
  298. rdev->mode_info.rfbdev = rfbdev;
  299. rfbdev->helper.funcs = &radeon_fb_helper_funcs;
  300. ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper,
  301. rdev->num_crtc,
  302. RADEONFB_CONN_LIMIT);
  303. if (ret) {
  304. kfree(rfbdev);
  305. return ret;
  306. }
  307. drm_fb_helper_single_add_all_connectors(&rfbdev->helper);
  308. /* disable all the possible outputs/crtcs before entering KMS mode */
  309. drm_helper_disable_unused_functions(rdev->ddev);
  310. drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
  311. return 0;
  312. }
  313. void radeon_fbdev_fini(struct radeon_device *rdev)
  314. {
  315. if (!rdev->mode_info.rfbdev)
  316. return;
  317. radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev);
  318. kfree(rdev->mode_info.rfbdev);
  319. rdev->mode_info.rfbdev = NULL;
  320. }
  321. void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state)
  322. {
  323. fb_set_suspend(rdev->mode_info.rfbdev->helper.fbdev, state);
  324. }
  325. int radeon_fbdev_total_size(struct radeon_device *rdev)
  326. {
  327. struct radeon_bo *robj;
  328. int size = 0;
  329. robj = gem_to_radeon_bo(rdev->mode_info.rfbdev->rfb.obj);
  330. size += radeon_bo_size(robj);
  331. return size;
  332. }
  333. bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
  334. {
  335. if (robj == gem_to_radeon_bo(rdev->mode_info.rfbdev->rfb.obj))
  336. return true;
  337. return false;
  338. }