omap_crtc.c 17 KB

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  1. /*
  2. * drivers/gpu/drm/omapdrm/omap_crtc.c
  3. *
  4. * Copyright (C) 2011 Texas Instruments
  5. * Author: Rob Clark <rob@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include "omap_drv.h"
  20. #include <drm/drm_mode.h>
  21. #include "drm_crtc.h"
  22. #include "drm_crtc_helper.h"
  23. #define to_omap_crtc(x) container_of(x, struct omap_crtc, base)
  24. struct omap_crtc {
  25. struct drm_crtc base;
  26. struct drm_plane *plane;
  27. const char *name;
  28. int pipe;
  29. enum omap_channel channel;
  30. struct omap_overlay_manager_info info;
  31. /*
  32. * Temporary: eventually this will go away, but it is needed
  33. * for now to keep the output's happy. (They only need
  34. * mgr->id.) Eventually this will be replaced w/ something
  35. * more common-panel-framework-y
  36. */
  37. struct omap_overlay_manager mgr;
  38. struct omap_video_timings timings;
  39. bool enabled;
  40. bool full_update;
  41. struct omap_drm_apply apply;
  42. struct omap_drm_irq apply_irq;
  43. struct omap_drm_irq error_irq;
  44. /* list of in-progress apply's: */
  45. struct list_head pending_applies;
  46. /* list of queued apply's: */
  47. struct list_head queued_applies;
  48. /* for handling queued and in-progress applies: */
  49. struct work_struct apply_work;
  50. /* if there is a pending flip, these will be non-null: */
  51. struct drm_pending_vblank_event *event;
  52. struct drm_framebuffer *old_fb;
  53. /* for handling page flips without caring about what
  54. * the callback is called from. Possibly we should just
  55. * make omap_gem always call the cb from the worker so
  56. * we don't have to care about this..
  57. *
  58. * XXX maybe fold into apply_work??
  59. */
  60. struct work_struct page_flip_work;
  61. };
  62. /*
  63. * Manager-ops, callbacks from output when they need to configure
  64. * the upstream part of the video pipe.
  65. *
  66. * Most of these we can ignore until we add support for command-mode
  67. * panels.. for video-mode the crtc-helpers already do an adequate
  68. * job of sequencing the setup of the video pipe in the proper order
  69. */
  70. /* we can probably ignore these until we support command-mode panels: */
  71. static void omap_crtc_start_update(struct omap_overlay_manager *mgr)
  72. {
  73. }
  74. static int omap_crtc_enable(struct omap_overlay_manager *mgr)
  75. {
  76. return 0;
  77. }
  78. static void omap_crtc_disable(struct omap_overlay_manager *mgr)
  79. {
  80. }
  81. static void omap_crtc_set_timings(struct omap_overlay_manager *mgr,
  82. const struct omap_video_timings *timings)
  83. {
  84. struct omap_crtc *omap_crtc = container_of(mgr, struct omap_crtc, mgr);
  85. DBG("%s", omap_crtc->name);
  86. omap_crtc->timings = *timings;
  87. omap_crtc->full_update = true;
  88. }
  89. static void omap_crtc_set_lcd_config(struct omap_overlay_manager *mgr,
  90. const struct dss_lcd_mgr_config *config)
  91. {
  92. struct omap_crtc *omap_crtc = container_of(mgr, struct omap_crtc, mgr);
  93. DBG("%s", omap_crtc->name);
  94. dispc_mgr_set_lcd_config(omap_crtc->channel, config);
  95. }
  96. static int omap_crtc_register_framedone_handler(
  97. struct omap_overlay_manager *mgr,
  98. void (*handler)(void *), void *data)
  99. {
  100. return 0;
  101. }
  102. static void omap_crtc_unregister_framedone_handler(
  103. struct omap_overlay_manager *mgr,
  104. void (*handler)(void *), void *data)
  105. {
  106. }
  107. static const struct dss_mgr_ops mgr_ops = {
  108. .start_update = omap_crtc_start_update,
  109. .enable = omap_crtc_enable,
  110. .disable = omap_crtc_disable,
  111. .set_timings = omap_crtc_set_timings,
  112. .set_lcd_config = omap_crtc_set_lcd_config,
  113. .register_framedone_handler = omap_crtc_register_framedone_handler,
  114. .unregister_framedone_handler = omap_crtc_unregister_framedone_handler,
  115. };
  116. /*
  117. * CRTC funcs:
  118. */
  119. static void omap_crtc_destroy(struct drm_crtc *crtc)
  120. {
  121. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  122. DBG("%s", omap_crtc->name);
  123. WARN_ON(omap_crtc->apply_irq.registered);
  124. omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
  125. omap_crtc->plane->funcs->destroy(omap_crtc->plane);
  126. drm_crtc_cleanup(crtc);
  127. kfree(omap_crtc);
  128. }
  129. static void omap_crtc_dpms(struct drm_crtc *crtc, int mode)
  130. {
  131. struct omap_drm_private *priv = crtc->dev->dev_private;
  132. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  133. bool enabled = (mode == DRM_MODE_DPMS_ON);
  134. int i;
  135. DBG("%s: %d", omap_crtc->name, mode);
  136. if (enabled != omap_crtc->enabled) {
  137. omap_crtc->enabled = enabled;
  138. omap_crtc->full_update = true;
  139. omap_crtc_apply(crtc, &omap_crtc->apply);
  140. /* also enable our private plane: */
  141. WARN_ON(omap_plane_dpms(omap_crtc->plane, mode));
  142. /* and any attached overlay planes: */
  143. for (i = 0; i < priv->num_planes; i++) {
  144. struct drm_plane *plane = priv->planes[i];
  145. if (plane->crtc == crtc)
  146. WARN_ON(omap_plane_dpms(plane, mode));
  147. }
  148. }
  149. }
  150. static bool omap_crtc_mode_fixup(struct drm_crtc *crtc,
  151. const struct drm_display_mode *mode,
  152. struct drm_display_mode *adjusted_mode)
  153. {
  154. return true;
  155. }
  156. static int omap_crtc_mode_set(struct drm_crtc *crtc,
  157. struct drm_display_mode *mode,
  158. struct drm_display_mode *adjusted_mode,
  159. int x, int y,
  160. struct drm_framebuffer *old_fb)
  161. {
  162. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  163. mode = adjusted_mode;
  164. DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
  165. omap_crtc->name, mode->base.id, mode->name,
  166. mode->vrefresh, mode->clock,
  167. mode->hdisplay, mode->hsync_start,
  168. mode->hsync_end, mode->htotal,
  169. mode->vdisplay, mode->vsync_start,
  170. mode->vsync_end, mode->vtotal,
  171. mode->type, mode->flags);
  172. copy_timings_drm_to_omap(&omap_crtc->timings, mode);
  173. omap_crtc->full_update = true;
  174. return omap_plane_mode_set(omap_crtc->plane, crtc, crtc->fb,
  175. 0, 0, mode->hdisplay, mode->vdisplay,
  176. x << 16, y << 16,
  177. mode->hdisplay << 16, mode->vdisplay << 16,
  178. NULL, NULL);
  179. }
  180. static void omap_crtc_prepare(struct drm_crtc *crtc)
  181. {
  182. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  183. DBG("%s", omap_crtc->name);
  184. omap_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
  185. }
  186. static void omap_crtc_commit(struct drm_crtc *crtc)
  187. {
  188. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  189. DBG("%s", omap_crtc->name);
  190. omap_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
  191. }
  192. static int omap_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
  193. struct drm_framebuffer *old_fb)
  194. {
  195. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  196. struct drm_plane *plane = omap_crtc->plane;
  197. struct drm_display_mode *mode = &crtc->mode;
  198. return omap_plane_mode_set(plane, crtc, crtc->fb,
  199. 0, 0, mode->hdisplay, mode->vdisplay,
  200. x << 16, y << 16,
  201. mode->hdisplay << 16, mode->vdisplay << 16,
  202. NULL, NULL);
  203. }
  204. static void omap_crtc_load_lut(struct drm_crtc *crtc)
  205. {
  206. }
  207. static void vblank_cb(void *arg)
  208. {
  209. struct drm_crtc *crtc = arg;
  210. struct drm_device *dev = crtc->dev;
  211. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  212. unsigned long flags;
  213. spin_lock_irqsave(&dev->event_lock, flags);
  214. /* wakeup userspace */
  215. if (omap_crtc->event)
  216. drm_send_vblank_event(dev, omap_crtc->pipe, omap_crtc->event);
  217. omap_crtc->event = NULL;
  218. omap_crtc->old_fb = NULL;
  219. spin_unlock_irqrestore(&dev->event_lock, flags);
  220. }
  221. static void page_flip_worker(struct work_struct *work)
  222. {
  223. struct omap_crtc *omap_crtc =
  224. container_of(work, struct omap_crtc, page_flip_work);
  225. struct drm_crtc *crtc = &omap_crtc->base;
  226. struct drm_display_mode *mode = &crtc->mode;
  227. struct drm_gem_object *bo;
  228. mutex_lock(&crtc->mutex);
  229. omap_plane_mode_set(omap_crtc->plane, crtc, crtc->fb,
  230. 0, 0, mode->hdisplay, mode->vdisplay,
  231. crtc->x << 16, crtc->y << 16,
  232. mode->hdisplay << 16, mode->vdisplay << 16,
  233. vblank_cb, crtc);
  234. mutex_unlock(&crtc->mutex);
  235. bo = omap_framebuffer_bo(crtc->fb, 0);
  236. drm_gem_object_unreference_unlocked(bo);
  237. }
  238. static void page_flip_cb(void *arg)
  239. {
  240. struct drm_crtc *crtc = arg;
  241. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  242. struct omap_drm_private *priv = crtc->dev->dev_private;
  243. /* avoid assumptions about what ctxt we are called from: */
  244. queue_work(priv->wq, &omap_crtc->page_flip_work);
  245. }
  246. static int omap_crtc_page_flip_locked(struct drm_crtc *crtc,
  247. struct drm_framebuffer *fb,
  248. struct drm_pending_vblank_event *event)
  249. {
  250. struct drm_device *dev = crtc->dev;
  251. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  252. struct drm_gem_object *bo;
  253. DBG("%d -> %d (event=%p)", crtc->fb ? crtc->fb->base.id : -1,
  254. fb->base.id, event);
  255. if (omap_crtc->old_fb) {
  256. dev_err(dev->dev, "already a pending flip\n");
  257. return -EINVAL;
  258. }
  259. omap_crtc->event = event;
  260. crtc->fb = fb;
  261. /*
  262. * Hold a reference temporarily until the crtc is updated
  263. * and takes the reference to the bo. This avoids it
  264. * getting freed from under us:
  265. */
  266. bo = omap_framebuffer_bo(fb, 0);
  267. drm_gem_object_reference(bo);
  268. omap_gem_op_async(bo, OMAP_GEM_READ, page_flip_cb, crtc);
  269. return 0;
  270. }
  271. static int omap_crtc_set_property(struct drm_crtc *crtc,
  272. struct drm_property *property, uint64_t val)
  273. {
  274. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  275. struct omap_drm_private *priv = crtc->dev->dev_private;
  276. if (property == priv->rotation_prop) {
  277. crtc->invert_dimensions =
  278. !!(val & ((1LL << DRM_ROTATE_90) | (1LL << DRM_ROTATE_270)));
  279. }
  280. return omap_plane_set_property(omap_crtc->plane, property, val);
  281. }
  282. static const struct drm_crtc_funcs omap_crtc_funcs = {
  283. .set_config = drm_crtc_helper_set_config,
  284. .destroy = omap_crtc_destroy,
  285. .page_flip = omap_crtc_page_flip_locked,
  286. .set_property = omap_crtc_set_property,
  287. };
  288. static const struct drm_crtc_helper_funcs omap_crtc_helper_funcs = {
  289. .dpms = omap_crtc_dpms,
  290. .mode_fixup = omap_crtc_mode_fixup,
  291. .mode_set = omap_crtc_mode_set,
  292. .prepare = omap_crtc_prepare,
  293. .commit = omap_crtc_commit,
  294. .mode_set_base = omap_crtc_mode_set_base,
  295. .load_lut = omap_crtc_load_lut,
  296. };
  297. const struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc)
  298. {
  299. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  300. return &omap_crtc->timings;
  301. }
  302. enum omap_channel omap_crtc_channel(struct drm_crtc *crtc)
  303. {
  304. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  305. return omap_crtc->channel;
  306. }
  307. static void omap_crtc_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
  308. {
  309. struct omap_crtc *omap_crtc =
  310. container_of(irq, struct omap_crtc, error_irq);
  311. struct drm_crtc *crtc = &omap_crtc->base;
  312. DRM_ERROR("%s: errors: %08x\n", omap_crtc->name, irqstatus);
  313. /* avoid getting in a flood, unregister the irq until next vblank */
  314. omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
  315. }
  316. static void omap_crtc_apply_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
  317. {
  318. struct omap_crtc *omap_crtc =
  319. container_of(irq, struct omap_crtc, apply_irq);
  320. struct drm_crtc *crtc = &omap_crtc->base;
  321. if (!omap_crtc->error_irq.registered)
  322. omap_irq_register(crtc->dev, &omap_crtc->error_irq);
  323. if (!dispc_mgr_go_busy(omap_crtc->channel)) {
  324. struct omap_drm_private *priv =
  325. crtc->dev->dev_private;
  326. DBG("%s: apply done", omap_crtc->name);
  327. omap_irq_unregister(crtc->dev, &omap_crtc->apply_irq);
  328. queue_work(priv->wq, &omap_crtc->apply_work);
  329. }
  330. }
  331. static void apply_worker(struct work_struct *work)
  332. {
  333. struct omap_crtc *omap_crtc =
  334. container_of(work, struct omap_crtc, apply_work);
  335. struct drm_crtc *crtc = &omap_crtc->base;
  336. struct drm_device *dev = crtc->dev;
  337. struct omap_drm_apply *apply, *n;
  338. bool need_apply;
  339. /*
  340. * Synchronize everything on mode_config.mutex, to keep
  341. * the callbacks and list modification all serialized
  342. * with respect to modesetting ioctls from userspace.
  343. */
  344. mutex_lock(&crtc->mutex);
  345. dispc_runtime_get();
  346. /*
  347. * If we are still pending a previous update, wait.. when the
  348. * pending update completes, we get kicked again.
  349. */
  350. if (omap_crtc->apply_irq.registered)
  351. goto out;
  352. /* finish up previous apply's: */
  353. list_for_each_entry_safe(apply, n,
  354. &omap_crtc->pending_applies, pending_node) {
  355. apply->post_apply(apply);
  356. list_del(&apply->pending_node);
  357. }
  358. need_apply = !list_empty(&omap_crtc->queued_applies);
  359. /* then handle the next round of of queued apply's: */
  360. list_for_each_entry_safe(apply, n,
  361. &omap_crtc->queued_applies, queued_node) {
  362. apply->pre_apply(apply);
  363. list_del(&apply->queued_node);
  364. apply->queued = false;
  365. list_add_tail(&apply->pending_node,
  366. &omap_crtc->pending_applies);
  367. }
  368. if (need_apply) {
  369. enum omap_channel channel = omap_crtc->channel;
  370. DBG("%s: GO", omap_crtc->name);
  371. if (dispc_mgr_is_enabled(channel)) {
  372. omap_irq_register(dev, &omap_crtc->apply_irq);
  373. dispc_mgr_go(channel);
  374. } else {
  375. struct omap_drm_private *priv = dev->dev_private;
  376. queue_work(priv->wq, &omap_crtc->apply_work);
  377. }
  378. }
  379. out:
  380. dispc_runtime_put();
  381. mutex_unlock(&crtc->mutex);
  382. }
  383. int omap_crtc_apply(struct drm_crtc *crtc,
  384. struct omap_drm_apply *apply)
  385. {
  386. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  387. WARN_ON(!mutex_is_locked(&crtc->mutex));
  388. /* no need to queue it again if it is already queued: */
  389. if (apply->queued)
  390. return 0;
  391. apply->queued = true;
  392. list_add_tail(&apply->queued_node, &omap_crtc->queued_applies);
  393. /*
  394. * If there are no currently pending updates, then go ahead and
  395. * kick the worker immediately, otherwise it will run again when
  396. * the current update finishes.
  397. */
  398. if (list_empty(&omap_crtc->pending_applies)) {
  399. struct omap_drm_private *priv = crtc->dev->dev_private;
  400. queue_work(priv->wq, &omap_crtc->apply_work);
  401. }
  402. return 0;
  403. }
  404. /* called only from apply */
  405. static void set_enabled(struct drm_crtc *crtc, bool enable)
  406. {
  407. struct drm_device *dev = crtc->dev;
  408. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  409. enum omap_channel channel = omap_crtc->channel;
  410. struct omap_irq_wait *wait = NULL;
  411. if (dispc_mgr_is_enabled(channel) == enable)
  412. return;
  413. /* ignore sync-lost irqs during enable/disable */
  414. omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
  415. if (dispc_mgr_get_framedone_irq(channel)) {
  416. if (!enable) {
  417. wait = omap_irq_wait_init(dev,
  418. dispc_mgr_get_framedone_irq(channel), 1);
  419. }
  420. } else {
  421. /*
  422. * When we disable digit output, we need to wait until fields
  423. * are done. Otherwise the DSS is still working, and turning
  424. * off the clocks prevents DSS from going to OFF mode. And when
  425. * enabling, we need to wait for the extra sync losts
  426. */
  427. wait = omap_irq_wait_init(dev,
  428. dispc_mgr_get_vsync_irq(channel), 2);
  429. }
  430. dispc_mgr_enable(channel, enable);
  431. if (wait) {
  432. int ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
  433. if (ret) {
  434. dev_err(dev->dev, "%s: timeout waiting for %s\n",
  435. omap_crtc->name, enable ? "enable" : "disable");
  436. }
  437. }
  438. omap_irq_register(crtc->dev, &omap_crtc->error_irq);
  439. }
  440. static void omap_crtc_pre_apply(struct omap_drm_apply *apply)
  441. {
  442. struct omap_crtc *omap_crtc =
  443. container_of(apply, struct omap_crtc, apply);
  444. struct drm_crtc *crtc = &omap_crtc->base;
  445. struct drm_encoder *encoder = NULL;
  446. DBG("%s: enabled=%d, full=%d", omap_crtc->name,
  447. omap_crtc->enabled, omap_crtc->full_update);
  448. if (omap_crtc->full_update) {
  449. struct omap_drm_private *priv = crtc->dev->dev_private;
  450. int i;
  451. for (i = 0; i < priv->num_encoders; i++) {
  452. if (priv->encoders[i]->crtc == crtc) {
  453. encoder = priv->encoders[i];
  454. break;
  455. }
  456. }
  457. }
  458. if (!omap_crtc->enabled) {
  459. set_enabled(&omap_crtc->base, false);
  460. if (encoder)
  461. omap_encoder_set_enabled(encoder, false);
  462. } else {
  463. if (encoder) {
  464. omap_encoder_set_enabled(encoder, false);
  465. omap_encoder_update(encoder, &omap_crtc->mgr,
  466. &omap_crtc->timings);
  467. omap_encoder_set_enabled(encoder, true);
  468. omap_crtc->full_update = false;
  469. }
  470. dispc_mgr_setup(omap_crtc->channel, &omap_crtc->info);
  471. dispc_mgr_set_timings(omap_crtc->channel,
  472. &omap_crtc->timings);
  473. set_enabled(&omap_crtc->base, true);
  474. }
  475. omap_crtc->full_update = false;
  476. }
  477. static void omap_crtc_post_apply(struct omap_drm_apply *apply)
  478. {
  479. /* nothing needed for post-apply */
  480. }
  481. static const char *channel_names[] = {
  482. [OMAP_DSS_CHANNEL_LCD] = "lcd",
  483. [OMAP_DSS_CHANNEL_DIGIT] = "tv",
  484. [OMAP_DSS_CHANNEL_LCD2] = "lcd2",
  485. };
  486. /* initialize crtc */
  487. struct drm_crtc *omap_crtc_init(struct drm_device *dev,
  488. struct drm_plane *plane, enum omap_channel channel, int id)
  489. {
  490. struct drm_crtc *crtc = NULL;
  491. struct omap_crtc *omap_crtc;
  492. struct omap_overlay_manager_info *info;
  493. DBG("%s", channel_names[channel]);
  494. omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
  495. if (!omap_crtc)
  496. goto fail;
  497. crtc = &omap_crtc->base;
  498. INIT_WORK(&omap_crtc->page_flip_work, page_flip_worker);
  499. INIT_WORK(&omap_crtc->apply_work, apply_worker);
  500. INIT_LIST_HEAD(&omap_crtc->pending_applies);
  501. INIT_LIST_HEAD(&omap_crtc->queued_applies);
  502. omap_crtc->apply.pre_apply = omap_crtc_pre_apply;
  503. omap_crtc->apply.post_apply = omap_crtc_post_apply;
  504. omap_crtc->apply_irq.irqmask = pipe2vbl(id);
  505. omap_crtc->apply_irq.irq = omap_crtc_apply_irq;
  506. omap_crtc->error_irq.irqmask =
  507. dispc_mgr_get_sync_lost_irq(channel);
  508. omap_crtc->error_irq.irq = omap_crtc_error_irq;
  509. omap_irq_register(dev, &omap_crtc->error_irq);
  510. omap_crtc->channel = channel;
  511. omap_crtc->plane = plane;
  512. omap_crtc->plane->crtc = crtc;
  513. omap_crtc->name = channel_names[channel];
  514. omap_crtc->pipe = id;
  515. /* temporary: */
  516. omap_crtc->mgr.id = channel;
  517. dss_install_mgr_ops(&mgr_ops);
  518. /* TODO: fix hard-coded setup.. add properties! */
  519. info = &omap_crtc->info;
  520. info->default_color = 0x00000000;
  521. info->trans_key = 0x00000000;
  522. info->trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
  523. info->trans_enabled = false;
  524. drm_crtc_init(dev, crtc, &omap_crtc_funcs);
  525. drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);
  526. omap_plane_install_properties(omap_crtc->plane, &crtc->base);
  527. return crtc;
  528. fail:
  529. if (crtc)
  530. omap_crtc_destroy(crtc);
  531. return NULL;
  532. }