nouveau_drm.c 20 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/console.h>
  25. #include <linux/module.h>
  26. #include <linux/pci.h>
  27. #include <core/device.h>
  28. #include <core/client.h>
  29. #include <core/gpuobj.h>
  30. #include <core/class.h>
  31. #include <subdev/device.h>
  32. #include <subdev/vm.h>
  33. #include <engine/disp.h>
  34. #include "nouveau_drm.h"
  35. #include "nouveau_irq.h"
  36. #include "nouveau_dma.h"
  37. #include "nouveau_ttm.h"
  38. #include "nouveau_gem.h"
  39. #include "nouveau_agp.h"
  40. #include "nouveau_vga.h"
  41. #include "nouveau_pm.h"
  42. #include "nouveau_acpi.h"
  43. #include "nouveau_bios.h"
  44. #include "nouveau_ioctl.h"
  45. #include "nouveau_abi16.h"
  46. #include "nouveau_fbcon.h"
  47. #include "nouveau_fence.h"
  48. #include "nouveau_debugfs.h"
  49. MODULE_PARM_DESC(config, "option string to pass to driver core");
  50. static char *nouveau_config;
  51. module_param_named(config, nouveau_config, charp, 0400);
  52. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  53. static char *nouveau_debug;
  54. module_param_named(debug, nouveau_debug, charp, 0400);
  55. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  56. static int nouveau_noaccel = 0;
  57. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  58. MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
  59. "0 = disabled, 1 = enabled, 2 = headless)");
  60. int nouveau_modeset = -1;
  61. module_param_named(modeset, nouveau_modeset, int, 0400);
  62. static struct drm_driver driver;
  63. static int
  64. nouveau_drm_vblank_enable(struct drm_device *dev, int head)
  65. {
  66. struct nouveau_drm *drm = nouveau_drm(dev);
  67. struct nouveau_disp *pdisp = nouveau_disp(drm->device);
  68. nouveau_event_get(pdisp->vblank, head, &drm->vblank);
  69. return 0;
  70. }
  71. static void
  72. nouveau_drm_vblank_disable(struct drm_device *dev, int head)
  73. {
  74. struct nouveau_drm *drm = nouveau_drm(dev);
  75. struct nouveau_disp *pdisp = nouveau_disp(drm->device);
  76. nouveau_event_put(pdisp->vblank, head, &drm->vblank);
  77. }
  78. static int
  79. nouveau_drm_vblank_handler(struct nouveau_eventh *event, int head)
  80. {
  81. struct nouveau_drm *drm =
  82. container_of(event, struct nouveau_drm, vblank);
  83. drm_handle_vblank(drm->dev, head);
  84. return NVKM_EVENT_KEEP;
  85. }
  86. static u64
  87. nouveau_name(struct pci_dev *pdev)
  88. {
  89. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  90. name |= pdev->bus->number << 16;
  91. name |= PCI_SLOT(pdev->devfn) << 8;
  92. return name | PCI_FUNC(pdev->devfn);
  93. }
  94. static int
  95. nouveau_cli_create(struct pci_dev *pdev, const char *name,
  96. int size, void **pcli)
  97. {
  98. struct nouveau_cli *cli;
  99. int ret;
  100. *pcli = NULL;
  101. ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config,
  102. nouveau_debug, size, pcli);
  103. cli = *pcli;
  104. if (ret) {
  105. if (cli)
  106. nouveau_client_destroy(&cli->base);
  107. *pcli = NULL;
  108. return ret;
  109. }
  110. mutex_init(&cli->mutex);
  111. return 0;
  112. }
  113. static void
  114. nouveau_cli_destroy(struct nouveau_cli *cli)
  115. {
  116. struct nouveau_object *client = nv_object(cli);
  117. nouveau_vm_ref(NULL, &cli->base.vm, NULL);
  118. nouveau_client_fini(&cli->base, false);
  119. atomic_set(&client->refcount, 1);
  120. nouveau_object_ref(NULL, &client);
  121. }
  122. static void
  123. nouveau_accel_fini(struct nouveau_drm *drm)
  124. {
  125. nouveau_gpuobj_ref(NULL, &drm->notify);
  126. nouveau_channel_del(&drm->channel);
  127. nouveau_channel_del(&drm->cechan);
  128. if (drm->fence)
  129. nouveau_fence(drm)->dtor(drm);
  130. }
  131. static void
  132. nouveau_accel_init(struct nouveau_drm *drm)
  133. {
  134. struct nouveau_device *device = nv_device(drm->device);
  135. struct nouveau_object *object;
  136. u32 arg0, arg1;
  137. int ret;
  138. if (nouveau_noaccel)
  139. return;
  140. /* initialise synchronisation routines */
  141. if (device->card_type < NV_10) ret = nv04_fence_create(drm);
  142. else if (device->chipset < 0x17) ret = nv10_fence_create(drm);
  143. else if (device->card_type < NV_50) ret = nv17_fence_create(drm);
  144. else if (device->chipset < 0x84) ret = nv50_fence_create(drm);
  145. else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
  146. else ret = nvc0_fence_create(drm);
  147. if (ret) {
  148. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  149. nouveau_accel_fini(drm);
  150. return;
  151. }
  152. if (device->card_type >= NV_E0) {
  153. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
  154. NVDRM_CHAN + 1,
  155. NVE0_CHANNEL_IND_ENGINE_CE0 |
  156. NVE0_CHANNEL_IND_ENGINE_CE1, 0,
  157. &drm->cechan);
  158. if (ret)
  159. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  160. arg0 = NVE0_CHANNEL_IND_ENGINE_GR;
  161. arg1 = 1;
  162. } else {
  163. arg0 = NvDmaFB;
  164. arg1 = NvDmaTT;
  165. }
  166. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
  167. arg0, arg1, &drm->channel);
  168. if (ret) {
  169. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  170. nouveau_accel_fini(drm);
  171. return;
  172. }
  173. if (device->card_type < NV_C0) {
  174. ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
  175. &drm->notify);
  176. if (ret) {
  177. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  178. nouveau_accel_fini(drm);
  179. return;
  180. }
  181. ret = nouveau_object_new(nv_object(drm),
  182. drm->channel->handle, NvNotify0,
  183. 0x003d, &(struct nv_dma_class) {
  184. .flags = NV_DMA_TARGET_VRAM |
  185. NV_DMA_ACCESS_RDWR,
  186. .start = drm->notify->addr,
  187. .limit = drm->notify->addr + 31
  188. }, sizeof(struct nv_dma_class),
  189. &object);
  190. if (ret) {
  191. nouveau_accel_fini(drm);
  192. return;
  193. }
  194. }
  195. nouveau_bo_move_init(drm);
  196. }
  197. static int nouveau_drm_probe(struct pci_dev *pdev,
  198. const struct pci_device_id *pent)
  199. {
  200. struct nouveau_device *device;
  201. struct apertures_struct *aper;
  202. bool boot = false;
  203. int ret;
  204. /* remove conflicting drivers (vesafb, efifb etc) */
  205. aper = alloc_apertures(3);
  206. if (!aper)
  207. return -ENOMEM;
  208. aper->ranges[0].base = pci_resource_start(pdev, 1);
  209. aper->ranges[0].size = pci_resource_len(pdev, 1);
  210. aper->count = 1;
  211. if (pci_resource_len(pdev, 2)) {
  212. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  213. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  214. aper->count++;
  215. }
  216. if (pci_resource_len(pdev, 3)) {
  217. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  218. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  219. aper->count++;
  220. }
  221. #ifdef CONFIG_X86
  222. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  223. #endif
  224. remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  225. kfree(aper);
  226. ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev),
  227. nouveau_config, nouveau_debug, &device);
  228. if (ret)
  229. return ret;
  230. pci_set_master(pdev);
  231. ret = drm_get_pci_dev(pdev, pent, &driver);
  232. if (ret) {
  233. nouveau_object_ref(NULL, (struct nouveau_object **)&device);
  234. return ret;
  235. }
  236. return 0;
  237. }
  238. static struct lock_class_key drm_client_lock_class_key;
  239. static int
  240. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  241. {
  242. struct pci_dev *pdev = dev->pdev;
  243. struct nouveau_device *device;
  244. struct nouveau_drm *drm;
  245. int ret;
  246. ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm);
  247. if (ret)
  248. return ret;
  249. lockdep_set_class(&drm->client.mutex, &drm_client_lock_class_key);
  250. dev->dev_private = drm;
  251. drm->dev = dev;
  252. drm->vblank.func = nouveau_drm_vblank_handler;
  253. INIT_LIST_HEAD(&drm->clients);
  254. spin_lock_init(&drm->tile.lock);
  255. /* make sure AGP controller is in a consistent state before we
  256. * (possibly) execute vbios init tables (see nouveau_agp.h)
  257. */
  258. if (drm_pci_device_is_agp(dev) && dev->agp) {
  259. /* dummy device object, doesn't init anything, but allows
  260. * agp code access to registers
  261. */
  262. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
  263. NVDRM_DEVICE, 0x0080,
  264. &(struct nv_device_class) {
  265. .device = ~0,
  266. .disable =
  267. ~(NV_DEVICE_DISABLE_MMIO |
  268. NV_DEVICE_DISABLE_IDENTIFY),
  269. .debug0 = ~0,
  270. }, sizeof(struct nv_device_class),
  271. &drm->device);
  272. if (ret)
  273. goto fail_device;
  274. nouveau_agp_reset(drm);
  275. nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
  276. }
  277. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
  278. 0x0080, &(struct nv_device_class) {
  279. .device = ~0,
  280. .disable = 0,
  281. .debug0 = 0,
  282. }, sizeof(struct nv_device_class),
  283. &drm->device);
  284. if (ret)
  285. goto fail_device;
  286. /* workaround an odd issue on nvc1 by disabling the device's
  287. * nosnoop capability. hopefully won't cause issues until a
  288. * better fix is found - assuming there is one...
  289. */
  290. device = nv_device(drm->device);
  291. if (nv_device(drm->device)->chipset == 0xc1)
  292. nv_mask(device, 0x00088080, 0x00000800, 0x00000000);
  293. nouveau_vga_init(drm);
  294. nouveau_agp_init(drm);
  295. if (device->card_type >= NV_50) {
  296. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  297. 0x1000, &drm->client.base.vm);
  298. if (ret)
  299. goto fail_device;
  300. }
  301. ret = nouveau_ttm_init(drm);
  302. if (ret)
  303. goto fail_ttm;
  304. ret = nouveau_bios_init(dev);
  305. if (ret)
  306. goto fail_bios;
  307. ret = nouveau_irq_init(dev);
  308. if (ret)
  309. goto fail_irq;
  310. ret = nouveau_display_create(dev);
  311. if (ret)
  312. goto fail_dispctor;
  313. if (dev->mode_config.num_crtc) {
  314. ret = nouveau_display_init(dev);
  315. if (ret)
  316. goto fail_dispinit;
  317. }
  318. nouveau_pm_init(dev);
  319. nouveau_accel_init(drm);
  320. nouveau_fbcon_init(dev);
  321. return 0;
  322. fail_dispinit:
  323. nouveau_display_destroy(dev);
  324. fail_dispctor:
  325. nouveau_irq_fini(dev);
  326. fail_irq:
  327. nouveau_bios_takedown(dev);
  328. fail_bios:
  329. nouveau_ttm_fini(drm);
  330. fail_ttm:
  331. nouveau_agp_fini(drm);
  332. nouveau_vga_fini(drm);
  333. fail_device:
  334. nouveau_cli_destroy(&drm->client);
  335. return ret;
  336. }
  337. static int
  338. nouveau_drm_unload(struct drm_device *dev)
  339. {
  340. struct nouveau_drm *drm = nouveau_drm(dev);
  341. nouveau_fbcon_fini(dev);
  342. nouveau_accel_fini(drm);
  343. nouveau_pm_fini(dev);
  344. if (dev->mode_config.num_crtc)
  345. nouveau_display_fini(dev);
  346. nouveau_display_destroy(dev);
  347. nouveau_irq_fini(dev);
  348. nouveau_bios_takedown(dev);
  349. nouveau_ttm_fini(drm);
  350. nouveau_agp_fini(drm);
  351. nouveau_vga_fini(drm);
  352. nouveau_cli_destroy(&drm->client);
  353. return 0;
  354. }
  355. static void
  356. nouveau_drm_remove(struct pci_dev *pdev)
  357. {
  358. struct drm_device *dev = pci_get_drvdata(pdev);
  359. struct nouveau_drm *drm = nouveau_drm(dev);
  360. struct nouveau_object *device;
  361. device = drm->client.base.device;
  362. drm_put_dev(dev);
  363. nouveau_object_ref(NULL, &device);
  364. nouveau_object_debug();
  365. }
  366. static int
  367. nouveau_do_suspend(struct drm_device *dev)
  368. {
  369. struct nouveau_drm *drm = nouveau_drm(dev);
  370. struct nouveau_cli *cli;
  371. int ret;
  372. if (dev->mode_config.num_crtc) {
  373. NV_INFO(drm, "suspending fbcon...\n");
  374. nouveau_fbcon_set_suspend(dev, 1);
  375. NV_INFO(drm, "suspending display...\n");
  376. ret = nouveau_display_suspend(dev);
  377. if (ret)
  378. return ret;
  379. }
  380. NV_INFO(drm, "evicting buffers...\n");
  381. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  382. if (drm->fence && nouveau_fence(drm)->suspend) {
  383. if (!nouveau_fence(drm)->suspend(drm))
  384. return -ENOMEM;
  385. }
  386. NV_INFO(drm, "suspending client object trees...\n");
  387. list_for_each_entry(cli, &drm->clients, head) {
  388. ret = nouveau_client_fini(&cli->base, true);
  389. if (ret)
  390. goto fail_client;
  391. }
  392. ret = nouveau_client_fini(&drm->client.base, true);
  393. if (ret)
  394. goto fail_client;
  395. nouveau_agp_fini(drm);
  396. return 0;
  397. fail_client:
  398. list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
  399. nouveau_client_init(&cli->base);
  400. }
  401. if (dev->mode_config.num_crtc) {
  402. NV_INFO(drm, "resuming display...\n");
  403. nouveau_display_resume(dev);
  404. }
  405. return ret;
  406. }
  407. int nouveau_pmops_suspend(struct device *dev)
  408. {
  409. struct pci_dev *pdev = to_pci_dev(dev);
  410. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  411. int ret;
  412. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  413. return 0;
  414. ret = nouveau_do_suspend(drm_dev);
  415. if (ret)
  416. return ret;
  417. pci_save_state(pdev);
  418. pci_disable_device(pdev);
  419. pci_set_power_state(pdev, PCI_D3hot);
  420. return 0;
  421. }
  422. static int
  423. nouveau_do_resume(struct drm_device *dev)
  424. {
  425. struct nouveau_drm *drm = nouveau_drm(dev);
  426. struct nouveau_cli *cli;
  427. NV_INFO(drm, "re-enabling device...\n");
  428. nouveau_agp_reset(drm);
  429. NV_INFO(drm, "resuming client object trees...\n");
  430. nouveau_client_init(&drm->client.base);
  431. nouveau_agp_init(drm);
  432. list_for_each_entry(cli, &drm->clients, head) {
  433. nouveau_client_init(&cli->base);
  434. }
  435. if (drm->fence && nouveau_fence(drm)->resume)
  436. nouveau_fence(drm)->resume(drm);
  437. nouveau_run_vbios_init(dev);
  438. nouveau_irq_postinstall(dev);
  439. nouveau_pm_resume(dev);
  440. if (dev->mode_config.num_crtc) {
  441. NV_INFO(drm, "resuming display...\n");
  442. nouveau_display_resume(dev);
  443. }
  444. return 0;
  445. }
  446. int nouveau_pmops_resume(struct device *dev)
  447. {
  448. struct pci_dev *pdev = to_pci_dev(dev);
  449. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  450. int ret;
  451. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  452. return 0;
  453. pci_set_power_state(pdev, PCI_D0);
  454. pci_restore_state(pdev);
  455. ret = pci_enable_device(pdev);
  456. if (ret)
  457. return ret;
  458. pci_set_master(pdev);
  459. return nouveau_do_resume(drm_dev);
  460. }
  461. static int nouveau_pmops_freeze(struct device *dev)
  462. {
  463. struct pci_dev *pdev = to_pci_dev(dev);
  464. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  465. return nouveau_do_suspend(drm_dev);
  466. }
  467. static int nouveau_pmops_thaw(struct device *dev)
  468. {
  469. struct pci_dev *pdev = to_pci_dev(dev);
  470. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  471. return nouveau_do_resume(drm_dev);
  472. }
  473. static int
  474. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  475. {
  476. struct pci_dev *pdev = dev->pdev;
  477. struct nouveau_drm *drm = nouveau_drm(dev);
  478. struct nouveau_cli *cli;
  479. char name[32], tmpname[TASK_COMM_LEN];
  480. int ret;
  481. get_task_comm(tmpname, current);
  482. snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
  483. ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli);
  484. if (ret)
  485. return ret;
  486. if (nv_device(drm->device)->card_type >= NV_50) {
  487. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  488. 0x1000, &cli->base.vm);
  489. if (ret) {
  490. nouveau_cli_destroy(cli);
  491. return ret;
  492. }
  493. }
  494. fpriv->driver_priv = cli;
  495. mutex_lock(&drm->client.mutex);
  496. list_add(&cli->head, &drm->clients);
  497. mutex_unlock(&drm->client.mutex);
  498. return 0;
  499. }
  500. static void
  501. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  502. {
  503. struct nouveau_cli *cli = nouveau_cli(fpriv);
  504. struct nouveau_drm *drm = nouveau_drm(dev);
  505. if (cli->abi16)
  506. nouveau_abi16_fini(cli->abi16);
  507. mutex_lock(&drm->client.mutex);
  508. list_del(&cli->head);
  509. mutex_unlock(&drm->client.mutex);
  510. }
  511. static void
  512. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  513. {
  514. struct nouveau_cli *cli = nouveau_cli(fpriv);
  515. nouveau_cli_destroy(cli);
  516. }
  517. static struct drm_ioctl_desc
  518. nouveau_ioctls[] = {
  519. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH),
  520. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  521. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH),
  522. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH),
  523. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  524. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  525. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH),
  526. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH),
  527. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH),
  528. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
  529. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
  530. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH),
  531. };
  532. static const struct file_operations
  533. nouveau_driver_fops = {
  534. .owner = THIS_MODULE,
  535. .open = drm_open,
  536. .release = drm_release,
  537. .unlocked_ioctl = drm_ioctl,
  538. .mmap = nouveau_ttm_mmap,
  539. .poll = drm_poll,
  540. .fasync = drm_fasync,
  541. .read = drm_read,
  542. #if defined(CONFIG_COMPAT)
  543. .compat_ioctl = nouveau_compat_ioctl,
  544. #endif
  545. .llseek = noop_llseek,
  546. };
  547. static struct drm_driver
  548. driver = {
  549. .driver_features =
  550. DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
  551. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
  552. DRIVER_MODESET | DRIVER_PRIME,
  553. .load = nouveau_drm_load,
  554. .unload = nouveau_drm_unload,
  555. .open = nouveau_drm_open,
  556. .preclose = nouveau_drm_preclose,
  557. .postclose = nouveau_drm_postclose,
  558. .lastclose = nouveau_vga_lastclose,
  559. #if defined(CONFIG_DEBUG_FS)
  560. .debugfs_init = nouveau_debugfs_init,
  561. .debugfs_cleanup = nouveau_debugfs_takedown,
  562. #endif
  563. .irq_preinstall = nouveau_irq_preinstall,
  564. .irq_postinstall = nouveau_irq_postinstall,
  565. .irq_uninstall = nouveau_irq_uninstall,
  566. .irq_handler = nouveau_irq_handler,
  567. .get_vblank_counter = drm_vblank_count,
  568. .enable_vblank = nouveau_drm_vblank_enable,
  569. .disable_vblank = nouveau_drm_vblank_disable,
  570. .ioctls = nouveau_ioctls,
  571. .fops = &nouveau_driver_fops,
  572. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  573. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  574. .gem_prime_export = drm_gem_prime_export,
  575. .gem_prime_import = drm_gem_prime_import,
  576. .gem_prime_pin = nouveau_gem_prime_pin,
  577. .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
  578. .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
  579. .gem_prime_vmap = nouveau_gem_prime_vmap,
  580. .gem_prime_vunmap = nouveau_gem_prime_vunmap,
  581. .gem_init_object = nouveau_gem_object_new,
  582. .gem_free_object = nouveau_gem_object_del,
  583. .gem_open_object = nouveau_gem_object_open,
  584. .gem_close_object = nouveau_gem_object_close,
  585. .dumb_create = nouveau_display_dumb_create,
  586. .dumb_map_offset = nouveau_display_dumb_map_offset,
  587. .dumb_destroy = nouveau_display_dumb_destroy,
  588. .name = DRIVER_NAME,
  589. .desc = DRIVER_DESC,
  590. #ifdef GIT_REVISION
  591. .date = GIT_REVISION,
  592. #else
  593. .date = DRIVER_DATE,
  594. #endif
  595. .major = DRIVER_MAJOR,
  596. .minor = DRIVER_MINOR,
  597. .patchlevel = DRIVER_PATCHLEVEL,
  598. };
  599. static struct pci_device_id
  600. nouveau_drm_pci_table[] = {
  601. {
  602. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  603. .class = PCI_BASE_CLASS_DISPLAY << 16,
  604. .class_mask = 0xff << 16,
  605. },
  606. {
  607. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  608. .class = PCI_BASE_CLASS_DISPLAY << 16,
  609. .class_mask = 0xff << 16,
  610. },
  611. {}
  612. };
  613. static const struct dev_pm_ops nouveau_pm_ops = {
  614. .suspend = nouveau_pmops_suspend,
  615. .resume = nouveau_pmops_resume,
  616. .freeze = nouveau_pmops_freeze,
  617. .thaw = nouveau_pmops_thaw,
  618. .poweroff = nouveau_pmops_freeze,
  619. .restore = nouveau_pmops_resume,
  620. };
  621. static struct pci_driver
  622. nouveau_drm_pci_driver = {
  623. .name = "nouveau",
  624. .id_table = nouveau_drm_pci_table,
  625. .probe = nouveau_drm_probe,
  626. .remove = nouveau_drm_remove,
  627. .driver.pm = &nouveau_pm_ops,
  628. };
  629. static int __init
  630. nouveau_drm_init(void)
  631. {
  632. driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);
  633. if (nouveau_modeset == -1) {
  634. #ifdef CONFIG_VGA_CONSOLE
  635. if (vgacon_text_force())
  636. nouveau_modeset = 0;
  637. #endif
  638. }
  639. if (!nouveau_modeset)
  640. return 0;
  641. nouveau_register_dsm_handler();
  642. return drm_pci_init(&driver, &nouveau_drm_pci_driver);
  643. }
  644. static void __exit
  645. nouveau_drm_exit(void)
  646. {
  647. if (!nouveau_modeset)
  648. return;
  649. drm_pci_exit(&driver, &nouveau_drm_pci_driver);
  650. nouveau_unregister_dsm_handler();
  651. }
  652. module_init(nouveau_drm_init);
  653. module_exit(nouveau_drm_exit);
  654. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  655. MODULE_AUTHOR(DRIVER_AUTHOR);
  656. MODULE_DESCRIPTION(DRIVER_DESC);
  657. MODULE_LICENSE("GPL and additional rights");