exynos_drm_g2d.c 36 KB

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  1. /*
  2. * Copyright (C) 2012 Samsung Electronics Co.Ltd
  3. * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundationr
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/module.h>
  11. #include <linux/clk.h>
  12. #include <linux/err.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/io.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/pm_runtime.h>
  17. #include <linux/slab.h>
  18. #include <linux/workqueue.h>
  19. #include <linux/dma-mapping.h>
  20. #include <linux/dma-attrs.h>
  21. #include <linux/of.h>
  22. #include <drm/drmP.h>
  23. #include <drm/exynos_drm.h>
  24. #include "exynos_drm_drv.h"
  25. #include "exynos_drm_gem.h"
  26. #include "exynos_drm_iommu.h"
  27. #define G2D_HW_MAJOR_VER 4
  28. #define G2D_HW_MINOR_VER 1
  29. /* vaild register range set from user: 0x0104 ~ 0x0880 */
  30. #define G2D_VALID_START 0x0104
  31. #define G2D_VALID_END 0x0880
  32. /* general registers */
  33. #define G2D_SOFT_RESET 0x0000
  34. #define G2D_INTEN 0x0004
  35. #define G2D_INTC_PEND 0x000C
  36. #define G2D_DMA_SFR_BASE_ADDR 0x0080
  37. #define G2D_DMA_COMMAND 0x0084
  38. #define G2D_DMA_STATUS 0x008C
  39. #define G2D_DMA_HOLD_CMD 0x0090
  40. /* command registers */
  41. #define G2D_BITBLT_START 0x0100
  42. /* registers for base address */
  43. #define G2D_SRC_BASE_ADDR 0x0304
  44. #define G2D_SRC_COLOR_MODE 0x030C
  45. #define G2D_SRC_LEFT_TOP 0x0310
  46. #define G2D_SRC_RIGHT_BOTTOM 0x0314
  47. #define G2D_SRC_PLANE2_BASE_ADDR 0x0318
  48. #define G2D_DST_BASE_ADDR 0x0404
  49. #define G2D_DST_COLOR_MODE 0x040C
  50. #define G2D_DST_LEFT_TOP 0x0410
  51. #define G2D_DST_RIGHT_BOTTOM 0x0414
  52. #define G2D_DST_PLANE2_BASE_ADDR 0x0418
  53. #define G2D_PAT_BASE_ADDR 0x0500
  54. #define G2D_MSK_BASE_ADDR 0x0520
  55. /* G2D_SOFT_RESET */
  56. #define G2D_SFRCLEAR (1 << 1)
  57. #define G2D_R (1 << 0)
  58. /* G2D_INTEN */
  59. #define G2D_INTEN_ACF (1 << 3)
  60. #define G2D_INTEN_UCF (1 << 2)
  61. #define G2D_INTEN_GCF (1 << 1)
  62. #define G2D_INTEN_SCF (1 << 0)
  63. /* G2D_INTC_PEND */
  64. #define G2D_INTP_ACMD_FIN (1 << 3)
  65. #define G2D_INTP_UCMD_FIN (1 << 2)
  66. #define G2D_INTP_GCMD_FIN (1 << 1)
  67. #define G2D_INTP_SCMD_FIN (1 << 0)
  68. /* G2D_DMA_COMMAND */
  69. #define G2D_DMA_HALT (1 << 2)
  70. #define G2D_DMA_CONTINUE (1 << 1)
  71. #define G2D_DMA_START (1 << 0)
  72. /* G2D_DMA_STATUS */
  73. #define G2D_DMA_LIST_DONE_COUNT (0xFF << 17)
  74. #define G2D_DMA_BITBLT_DONE_COUNT (0xFFFF << 1)
  75. #define G2D_DMA_DONE (1 << 0)
  76. #define G2D_DMA_LIST_DONE_COUNT_OFFSET 17
  77. /* G2D_DMA_HOLD_CMD */
  78. #define G2D_USER_HOLD (1 << 2)
  79. #define G2D_LIST_HOLD (1 << 1)
  80. #define G2D_BITBLT_HOLD (1 << 0)
  81. /* G2D_BITBLT_START */
  82. #define G2D_START_CASESEL (1 << 2)
  83. #define G2D_START_NHOLT (1 << 1)
  84. #define G2D_START_BITBLT (1 << 0)
  85. /* buffer color format */
  86. #define G2D_FMT_XRGB8888 0
  87. #define G2D_FMT_ARGB8888 1
  88. #define G2D_FMT_RGB565 2
  89. #define G2D_FMT_XRGB1555 3
  90. #define G2D_FMT_ARGB1555 4
  91. #define G2D_FMT_XRGB4444 5
  92. #define G2D_FMT_ARGB4444 6
  93. #define G2D_FMT_PACKED_RGB888 7
  94. #define G2D_FMT_A8 11
  95. #define G2D_FMT_L8 12
  96. /* buffer valid length */
  97. #define G2D_LEN_MIN 1
  98. #define G2D_LEN_MAX 8000
  99. #define G2D_CMDLIST_SIZE (PAGE_SIZE / 4)
  100. #define G2D_CMDLIST_NUM 64
  101. #define G2D_CMDLIST_POOL_SIZE (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM)
  102. #define G2D_CMDLIST_DATA_NUM (G2D_CMDLIST_SIZE / sizeof(u32) - 2)
  103. /* maximum buffer pool size of userptr is 64MB as default */
  104. #define MAX_POOL (64 * 1024 * 1024)
  105. enum {
  106. BUF_TYPE_GEM = 1,
  107. BUF_TYPE_USERPTR,
  108. };
  109. enum g2d_reg_type {
  110. REG_TYPE_NONE = -1,
  111. REG_TYPE_SRC,
  112. REG_TYPE_SRC_PLANE2,
  113. REG_TYPE_DST,
  114. REG_TYPE_DST_PLANE2,
  115. REG_TYPE_PAT,
  116. REG_TYPE_MSK,
  117. MAX_REG_TYPE_NR
  118. };
  119. /* cmdlist data structure */
  120. struct g2d_cmdlist {
  121. u32 head;
  122. unsigned long data[G2D_CMDLIST_DATA_NUM];
  123. u32 last; /* last data offset */
  124. };
  125. /*
  126. * A structure of buffer description
  127. *
  128. * @format: color format
  129. * @left_x: the x coordinates of left top corner
  130. * @top_y: the y coordinates of left top corner
  131. * @right_x: the x coordinates of right bottom corner
  132. * @bottom_y: the y coordinates of right bottom corner
  133. *
  134. */
  135. struct g2d_buf_desc {
  136. unsigned int format;
  137. unsigned int left_x;
  138. unsigned int top_y;
  139. unsigned int right_x;
  140. unsigned int bottom_y;
  141. };
  142. /*
  143. * A structure of buffer information
  144. *
  145. * @map_nr: manages the number of mapped buffers
  146. * @reg_types: stores regitster type in the order of requested command
  147. * @handles: stores buffer handle in its reg_type position
  148. * @types: stores buffer type in its reg_type position
  149. * @descs: stores buffer description in its reg_type position
  150. *
  151. */
  152. struct g2d_buf_info {
  153. unsigned int map_nr;
  154. enum g2d_reg_type reg_types[MAX_REG_TYPE_NR];
  155. unsigned long handles[MAX_REG_TYPE_NR];
  156. unsigned int types[MAX_REG_TYPE_NR];
  157. struct g2d_buf_desc descs[MAX_REG_TYPE_NR];
  158. };
  159. struct drm_exynos_pending_g2d_event {
  160. struct drm_pending_event base;
  161. struct drm_exynos_g2d_event event;
  162. };
  163. struct g2d_cmdlist_userptr {
  164. struct list_head list;
  165. dma_addr_t dma_addr;
  166. unsigned long userptr;
  167. unsigned long size;
  168. struct page **pages;
  169. unsigned int npages;
  170. struct sg_table *sgt;
  171. struct vm_area_struct *vma;
  172. atomic_t refcount;
  173. bool in_pool;
  174. bool out_of_list;
  175. };
  176. struct g2d_cmdlist_node {
  177. struct list_head list;
  178. struct g2d_cmdlist *cmdlist;
  179. dma_addr_t dma_addr;
  180. struct g2d_buf_info buf_info;
  181. struct drm_exynos_pending_g2d_event *event;
  182. };
  183. struct g2d_runqueue_node {
  184. struct list_head list;
  185. struct list_head run_cmdlist;
  186. struct list_head event_list;
  187. struct drm_file *filp;
  188. pid_t pid;
  189. struct completion complete;
  190. int async;
  191. };
  192. struct g2d_data {
  193. struct device *dev;
  194. struct clk *gate_clk;
  195. void __iomem *regs;
  196. int irq;
  197. struct workqueue_struct *g2d_workq;
  198. struct work_struct runqueue_work;
  199. struct exynos_drm_subdrv subdrv;
  200. bool suspended;
  201. /* cmdlist */
  202. struct g2d_cmdlist_node *cmdlist_node;
  203. struct list_head free_cmdlist;
  204. struct mutex cmdlist_mutex;
  205. dma_addr_t cmdlist_pool;
  206. void *cmdlist_pool_virt;
  207. struct dma_attrs cmdlist_dma_attrs;
  208. /* runqueue*/
  209. struct g2d_runqueue_node *runqueue_node;
  210. struct list_head runqueue;
  211. struct mutex runqueue_mutex;
  212. struct kmem_cache *runqueue_slab;
  213. unsigned long current_pool;
  214. unsigned long max_pool;
  215. };
  216. static int g2d_init_cmdlist(struct g2d_data *g2d)
  217. {
  218. struct device *dev = g2d->dev;
  219. struct g2d_cmdlist_node *node = g2d->cmdlist_node;
  220. struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
  221. int nr;
  222. int ret;
  223. struct g2d_buf_info *buf_info;
  224. init_dma_attrs(&g2d->cmdlist_dma_attrs);
  225. dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs);
  226. g2d->cmdlist_pool_virt = dma_alloc_attrs(subdrv->drm_dev->dev,
  227. G2D_CMDLIST_POOL_SIZE,
  228. &g2d->cmdlist_pool, GFP_KERNEL,
  229. &g2d->cmdlist_dma_attrs);
  230. if (!g2d->cmdlist_pool_virt) {
  231. dev_err(dev, "failed to allocate dma memory\n");
  232. return -ENOMEM;
  233. }
  234. node = kcalloc(G2D_CMDLIST_NUM, sizeof(*node), GFP_KERNEL);
  235. if (!node) {
  236. dev_err(dev, "failed to allocate memory\n");
  237. ret = -ENOMEM;
  238. goto err;
  239. }
  240. for (nr = 0; nr < G2D_CMDLIST_NUM; nr++) {
  241. unsigned int i;
  242. node[nr].cmdlist =
  243. g2d->cmdlist_pool_virt + nr * G2D_CMDLIST_SIZE;
  244. node[nr].dma_addr =
  245. g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE;
  246. buf_info = &node[nr].buf_info;
  247. for (i = 0; i < MAX_REG_TYPE_NR; i++)
  248. buf_info->reg_types[i] = REG_TYPE_NONE;
  249. list_add_tail(&node[nr].list, &g2d->free_cmdlist);
  250. }
  251. return 0;
  252. err:
  253. dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE,
  254. g2d->cmdlist_pool_virt,
  255. g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs);
  256. return ret;
  257. }
  258. static void g2d_fini_cmdlist(struct g2d_data *g2d)
  259. {
  260. struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
  261. kfree(g2d->cmdlist_node);
  262. dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE,
  263. g2d->cmdlist_pool_virt,
  264. g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs);
  265. }
  266. static struct g2d_cmdlist_node *g2d_get_cmdlist(struct g2d_data *g2d)
  267. {
  268. struct device *dev = g2d->dev;
  269. struct g2d_cmdlist_node *node;
  270. mutex_lock(&g2d->cmdlist_mutex);
  271. if (list_empty(&g2d->free_cmdlist)) {
  272. dev_err(dev, "there is no free cmdlist\n");
  273. mutex_unlock(&g2d->cmdlist_mutex);
  274. return NULL;
  275. }
  276. node = list_first_entry(&g2d->free_cmdlist, struct g2d_cmdlist_node,
  277. list);
  278. list_del_init(&node->list);
  279. mutex_unlock(&g2d->cmdlist_mutex);
  280. return node;
  281. }
  282. static void g2d_put_cmdlist(struct g2d_data *g2d, struct g2d_cmdlist_node *node)
  283. {
  284. mutex_lock(&g2d->cmdlist_mutex);
  285. list_move_tail(&node->list, &g2d->free_cmdlist);
  286. mutex_unlock(&g2d->cmdlist_mutex);
  287. }
  288. static void g2d_add_cmdlist_to_inuse(struct exynos_drm_g2d_private *g2d_priv,
  289. struct g2d_cmdlist_node *node)
  290. {
  291. struct g2d_cmdlist_node *lnode;
  292. if (list_empty(&g2d_priv->inuse_cmdlist))
  293. goto add_to_list;
  294. /* this links to base address of new cmdlist */
  295. lnode = list_entry(g2d_priv->inuse_cmdlist.prev,
  296. struct g2d_cmdlist_node, list);
  297. lnode->cmdlist->data[lnode->cmdlist->last] = node->dma_addr;
  298. add_to_list:
  299. list_add_tail(&node->list, &g2d_priv->inuse_cmdlist);
  300. if (node->event)
  301. list_add_tail(&node->event->base.link, &g2d_priv->event_list);
  302. }
  303. static void g2d_userptr_put_dma_addr(struct drm_device *drm_dev,
  304. unsigned long obj,
  305. bool force)
  306. {
  307. struct g2d_cmdlist_userptr *g2d_userptr =
  308. (struct g2d_cmdlist_userptr *)obj;
  309. if (!obj)
  310. return;
  311. if (force)
  312. goto out;
  313. atomic_dec(&g2d_userptr->refcount);
  314. if (atomic_read(&g2d_userptr->refcount) > 0)
  315. return;
  316. if (g2d_userptr->in_pool)
  317. return;
  318. out:
  319. exynos_gem_unmap_sgt_from_dma(drm_dev, g2d_userptr->sgt,
  320. DMA_BIDIRECTIONAL);
  321. exynos_gem_put_pages_to_userptr(g2d_userptr->pages,
  322. g2d_userptr->npages,
  323. g2d_userptr->vma);
  324. if (!g2d_userptr->out_of_list)
  325. list_del_init(&g2d_userptr->list);
  326. sg_free_table(g2d_userptr->sgt);
  327. kfree(g2d_userptr->sgt);
  328. g2d_userptr->sgt = NULL;
  329. kfree(g2d_userptr->pages);
  330. g2d_userptr->pages = NULL;
  331. kfree(g2d_userptr);
  332. g2d_userptr = NULL;
  333. }
  334. static dma_addr_t *g2d_userptr_get_dma_addr(struct drm_device *drm_dev,
  335. unsigned long userptr,
  336. unsigned long size,
  337. struct drm_file *filp,
  338. unsigned long *obj)
  339. {
  340. struct drm_exynos_file_private *file_priv = filp->driver_priv;
  341. struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
  342. struct g2d_cmdlist_userptr *g2d_userptr;
  343. struct g2d_data *g2d;
  344. struct page **pages;
  345. struct sg_table *sgt;
  346. struct vm_area_struct *vma;
  347. unsigned long start, end;
  348. unsigned int npages, offset;
  349. int ret;
  350. if (!size) {
  351. DRM_ERROR("invalid userptr size.\n");
  352. return ERR_PTR(-EINVAL);
  353. }
  354. g2d = dev_get_drvdata(g2d_priv->dev);
  355. /* check if userptr already exists in userptr_list. */
  356. list_for_each_entry(g2d_userptr, &g2d_priv->userptr_list, list) {
  357. if (g2d_userptr->userptr == userptr) {
  358. /*
  359. * also check size because there could be same address
  360. * and different size.
  361. */
  362. if (g2d_userptr->size == size) {
  363. atomic_inc(&g2d_userptr->refcount);
  364. *obj = (unsigned long)g2d_userptr;
  365. return &g2d_userptr->dma_addr;
  366. }
  367. /*
  368. * at this moment, maybe g2d dma is accessing this
  369. * g2d_userptr memory region so just remove this
  370. * g2d_userptr object from userptr_list not to be
  371. * referred again and also except it the userptr
  372. * pool to be released after the dma access completion.
  373. */
  374. g2d_userptr->out_of_list = true;
  375. g2d_userptr->in_pool = false;
  376. list_del_init(&g2d_userptr->list);
  377. break;
  378. }
  379. }
  380. g2d_userptr = kzalloc(sizeof(*g2d_userptr), GFP_KERNEL);
  381. if (!g2d_userptr) {
  382. DRM_ERROR("failed to allocate g2d_userptr.\n");
  383. return ERR_PTR(-ENOMEM);
  384. }
  385. atomic_set(&g2d_userptr->refcount, 1);
  386. start = userptr & PAGE_MASK;
  387. offset = userptr & ~PAGE_MASK;
  388. end = PAGE_ALIGN(userptr + size);
  389. npages = (end - start) >> PAGE_SHIFT;
  390. g2d_userptr->npages = npages;
  391. pages = kzalloc(npages * sizeof(struct page *), GFP_KERNEL);
  392. if (!pages) {
  393. DRM_ERROR("failed to allocate pages.\n");
  394. kfree(g2d_userptr);
  395. return ERR_PTR(-ENOMEM);
  396. }
  397. vma = find_vma(current->mm, userptr);
  398. if (!vma) {
  399. DRM_ERROR("failed to get vm region.\n");
  400. ret = -EFAULT;
  401. goto err_free_pages;
  402. }
  403. if (vma->vm_end < userptr + size) {
  404. DRM_ERROR("vma is too small.\n");
  405. ret = -EFAULT;
  406. goto err_free_pages;
  407. }
  408. g2d_userptr->vma = exynos_gem_get_vma(vma);
  409. if (!g2d_userptr->vma) {
  410. DRM_ERROR("failed to copy vma.\n");
  411. ret = -ENOMEM;
  412. goto err_free_pages;
  413. }
  414. g2d_userptr->size = size;
  415. ret = exynos_gem_get_pages_from_userptr(start & PAGE_MASK,
  416. npages, pages, vma);
  417. if (ret < 0) {
  418. DRM_ERROR("failed to get user pages from userptr.\n");
  419. goto err_put_vma;
  420. }
  421. g2d_userptr->pages = pages;
  422. sgt = kzalloc(sizeof(*sgt), GFP_KERNEL);
  423. if (!sgt) {
  424. DRM_ERROR("failed to allocate sg table.\n");
  425. ret = -ENOMEM;
  426. goto err_free_userptr;
  427. }
  428. ret = sg_alloc_table_from_pages(sgt, pages, npages, offset,
  429. size, GFP_KERNEL);
  430. if (ret < 0) {
  431. DRM_ERROR("failed to get sgt from pages.\n");
  432. goto err_free_sgt;
  433. }
  434. g2d_userptr->sgt = sgt;
  435. ret = exynos_gem_map_sgt_with_dma(drm_dev, g2d_userptr->sgt,
  436. DMA_BIDIRECTIONAL);
  437. if (ret < 0) {
  438. DRM_ERROR("failed to map sgt with dma region.\n");
  439. goto err_sg_free_table;
  440. }
  441. g2d_userptr->dma_addr = sgt->sgl[0].dma_address;
  442. g2d_userptr->userptr = userptr;
  443. list_add_tail(&g2d_userptr->list, &g2d_priv->userptr_list);
  444. if (g2d->current_pool + (npages << PAGE_SHIFT) < g2d->max_pool) {
  445. g2d->current_pool += npages << PAGE_SHIFT;
  446. g2d_userptr->in_pool = true;
  447. }
  448. *obj = (unsigned long)g2d_userptr;
  449. return &g2d_userptr->dma_addr;
  450. err_sg_free_table:
  451. sg_free_table(sgt);
  452. err_free_sgt:
  453. kfree(sgt);
  454. sgt = NULL;
  455. err_free_userptr:
  456. exynos_gem_put_pages_to_userptr(g2d_userptr->pages,
  457. g2d_userptr->npages,
  458. g2d_userptr->vma);
  459. err_put_vma:
  460. exynos_gem_put_vma(g2d_userptr->vma);
  461. err_free_pages:
  462. kfree(pages);
  463. kfree(g2d_userptr);
  464. pages = NULL;
  465. g2d_userptr = NULL;
  466. return ERR_PTR(ret);
  467. }
  468. static void g2d_userptr_free_all(struct drm_device *drm_dev,
  469. struct g2d_data *g2d,
  470. struct drm_file *filp)
  471. {
  472. struct drm_exynos_file_private *file_priv = filp->driver_priv;
  473. struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
  474. struct g2d_cmdlist_userptr *g2d_userptr, *n;
  475. list_for_each_entry_safe(g2d_userptr, n, &g2d_priv->userptr_list, list)
  476. if (g2d_userptr->in_pool)
  477. g2d_userptr_put_dma_addr(drm_dev,
  478. (unsigned long)g2d_userptr,
  479. true);
  480. g2d->current_pool = 0;
  481. }
  482. static enum g2d_reg_type g2d_get_reg_type(int reg_offset)
  483. {
  484. enum g2d_reg_type reg_type;
  485. switch (reg_offset) {
  486. case G2D_SRC_BASE_ADDR:
  487. case G2D_SRC_COLOR_MODE:
  488. case G2D_SRC_LEFT_TOP:
  489. case G2D_SRC_RIGHT_BOTTOM:
  490. reg_type = REG_TYPE_SRC;
  491. break;
  492. case G2D_SRC_PLANE2_BASE_ADDR:
  493. reg_type = REG_TYPE_SRC_PLANE2;
  494. break;
  495. case G2D_DST_BASE_ADDR:
  496. case G2D_DST_COLOR_MODE:
  497. case G2D_DST_LEFT_TOP:
  498. case G2D_DST_RIGHT_BOTTOM:
  499. reg_type = REG_TYPE_DST;
  500. break;
  501. case G2D_DST_PLANE2_BASE_ADDR:
  502. reg_type = REG_TYPE_DST_PLANE2;
  503. break;
  504. case G2D_PAT_BASE_ADDR:
  505. reg_type = REG_TYPE_PAT;
  506. break;
  507. case G2D_MSK_BASE_ADDR:
  508. reg_type = REG_TYPE_MSK;
  509. break;
  510. default:
  511. reg_type = REG_TYPE_NONE;
  512. DRM_ERROR("Unknown register offset![%d]\n", reg_offset);
  513. break;
  514. };
  515. return reg_type;
  516. }
  517. static unsigned long g2d_get_buf_bpp(unsigned int format)
  518. {
  519. unsigned long bpp;
  520. switch (format) {
  521. case G2D_FMT_XRGB8888:
  522. case G2D_FMT_ARGB8888:
  523. bpp = 4;
  524. break;
  525. case G2D_FMT_RGB565:
  526. case G2D_FMT_XRGB1555:
  527. case G2D_FMT_ARGB1555:
  528. case G2D_FMT_XRGB4444:
  529. case G2D_FMT_ARGB4444:
  530. bpp = 2;
  531. break;
  532. case G2D_FMT_PACKED_RGB888:
  533. bpp = 3;
  534. break;
  535. default:
  536. bpp = 1;
  537. break;
  538. }
  539. return bpp;
  540. }
  541. static bool g2d_check_buf_desc_is_valid(struct g2d_buf_desc *buf_desc,
  542. enum g2d_reg_type reg_type,
  543. unsigned long size)
  544. {
  545. unsigned int width, height;
  546. unsigned long area;
  547. /*
  548. * check source and destination buffers only.
  549. * so the others are always valid.
  550. */
  551. if (reg_type != REG_TYPE_SRC && reg_type != REG_TYPE_DST)
  552. return true;
  553. width = buf_desc->right_x - buf_desc->left_x;
  554. if (width < G2D_LEN_MIN || width > G2D_LEN_MAX) {
  555. DRM_ERROR("width[%u] is out of range!\n", width);
  556. return false;
  557. }
  558. height = buf_desc->bottom_y - buf_desc->top_y;
  559. if (height < G2D_LEN_MIN || height > G2D_LEN_MAX) {
  560. DRM_ERROR("height[%u] is out of range!\n", height);
  561. return false;
  562. }
  563. area = (unsigned long)width * (unsigned long)height *
  564. g2d_get_buf_bpp(buf_desc->format);
  565. if (area > size) {
  566. DRM_ERROR("area[%lu] is out of range[%lu]!\n", area, size);
  567. return false;
  568. }
  569. return true;
  570. }
  571. static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
  572. struct g2d_cmdlist_node *node,
  573. struct drm_device *drm_dev,
  574. struct drm_file *file)
  575. {
  576. struct g2d_cmdlist *cmdlist = node->cmdlist;
  577. struct g2d_buf_info *buf_info = &node->buf_info;
  578. int offset;
  579. int ret;
  580. int i;
  581. for (i = 0; i < buf_info->map_nr; i++) {
  582. struct g2d_buf_desc *buf_desc;
  583. enum g2d_reg_type reg_type;
  584. int reg_pos;
  585. unsigned long handle;
  586. dma_addr_t *addr;
  587. reg_pos = cmdlist->last - 2 * (i + 1);
  588. offset = cmdlist->data[reg_pos];
  589. handle = cmdlist->data[reg_pos + 1];
  590. reg_type = g2d_get_reg_type(offset);
  591. if (reg_type == REG_TYPE_NONE) {
  592. ret = -EFAULT;
  593. goto err;
  594. }
  595. buf_desc = &buf_info->descs[reg_type];
  596. if (buf_info->types[reg_type] == BUF_TYPE_GEM) {
  597. unsigned long size;
  598. size = exynos_drm_gem_get_size(drm_dev, handle, file);
  599. if (!size) {
  600. ret = -EFAULT;
  601. goto err;
  602. }
  603. if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
  604. size)) {
  605. ret = -EFAULT;
  606. goto err;
  607. }
  608. addr = exynos_drm_gem_get_dma_addr(drm_dev, handle,
  609. file);
  610. if (IS_ERR(addr)) {
  611. ret = -EFAULT;
  612. goto err;
  613. }
  614. } else {
  615. struct drm_exynos_g2d_userptr g2d_userptr;
  616. if (copy_from_user(&g2d_userptr, (void __user *)handle,
  617. sizeof(struct drm_exynos_g2d_userptr))) {
  618. ret = -EFAULT;
  619. goto err;
  620. }
  621. if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
  622. g2d_userptr.size)) {
  623. ret = -EFAULT;
  624. goto err;
  625. }
  626. addr = g2d_userptr_get_dma_addr(drm_dev,
  627. g2d_userptr.userptr,
  628. g2d_userptr.size,
  629. file,
  630. &handle);
  631. if (IS_ERR(addr)) {
  632. ret = -EFAULT;
  633. goto err;
  634. }
  635. }
  636. cmdlist->data[reg_pos + 1] = *addr;
  637. buf_info->reg_types[i] = reg_type;
  638. buf_info->handles[reg_type] = handle;
  639. }
  640. return 0;
  641. err:
  642. buf_info->map_nr = i;
  643. return ret;
  644. }
  645. static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
  646. struct g2d_cmdlist_node *node,
  647. struct drm_file *filp)
  648. {
  649. struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
  650. struct g2d_buf_info *buf_info = &node->buf_info;
  651. int i;
  652. for (i = 0; i < buf_info->map_nr; i++) {
  653. struct g2d_buf_desc *buf_desc;
  654. enum g2d_reg_type reg_type;
  655. unsigned long handle;
  656. reg_type = buf_info->reg_types[i];
  657. buf_desc = &buf_info->descs[reg_type];
  658. handle = buf_info->handles[reg_type];
  659. if (buf_info->types[reg_type] == BUF_TYPE_GEM)
  660. exynos_drm_gem_put_dma_addr(subdrv->drm_dev, handle,
  661. filp);
  662. else
  663. g2d_userptr_put_dma_addr(subdrv->drm_dev, handle,
  664. false);
  665. buf_info->reg_types[i] = REG_TYPE_NONE;
  666. buf_info->handles[reg_type] = 0;
  667. buf_info->types[reg_type] = 0;
  668. memset(buf_desc, 0x00, sizeof(*buf_desc));
  669. }
  670. buf_info->map_nr = 0;
  671. }
  672. static void g2d_dma_start(struct g2d_data *g2d,
  673. struct g2d_runqueue_node *runqueue_node)
  674. {
  675. struct g2d_cmdlist_node *node =
  676. list_first_entry(&runqueue_node->run_cmdlist,
  677. struct g2d_cmdlist_node, list);
  678. pm_runtime_get_sync(g2d->dev);
  679. clk_enable(g2d->gate_clk);
  680. writel_relaxed(node->dma_addr, g2d->regs + G2D_DMA_SFR_BASE_ADDR);
  681. writel_relaxed(G2D_DMA_START, g2d->regs + G2D_DMA_COMMAND);
  682. }
  683. static struct g2d_runqueue_node *g2d_get_runqueue_node(struct g2d_data *g2d)
  684. {
  685. struct g2d_runqueue_node *runqueue_node;
  686. if (list_empty(&g2d->runqueue))
  687. return NULL;
  688. runqueue_node = list_first_entry(&g2d->runqueue,
  689. struct g2d_runqueue_node, list);
  690. list_del_init(&runqueue_node->list);
  691. return runqueue_node;
  692. }
  693. static void g2d_free_runqueue_node(struct g2d_data *g2d,
  694. struct g2d_runqueue_node *runqueue_node)
  695. {
  696. struct g2d_cmdlist_node *node;
  697. if (!runqueue_node)
  698. return;
  699. mutex_lock(&g2d->cmdlist_mutex);
  700. /*
  701. * commands in run_cmdlist have been completed so unmap all gem
  702. * objects in each command node so that they are unreferenced.
  703. */
  704. list_for_each_entry(node, &runqueue_node->run_cmdlist, list)
  705. g2d_unmap_cmdlist_gem(g2d, node, runqueue_node->filp);
  706. list_splice_tail_init(&runqueue_node->run_cmdlist, &g2d->free_cmdlist);
  707. mutex_unlock(&g2d->cmdlist_mutex);
  708. kmem_cache_free(g2d->runqueue_slab, runqueue_node);
  709. }
  710. static void g2d_exec_runqueue(struct g2d_data *g2d)
  711. {
  712. g2d->runqueue_node = g2d_get_runqueue_node(g2d);
  713. if (g2d->runqueue_node)
  714. g2d_dma_start(g2d, g2d->runqueue_node);
  715. }
  716. static void g2d_runqueue_worker(struct work_struct *work)
  717. {
  718. struct g2d_data *g2d = container_of(work, struct g2d_data,
  719. runqueue_work);
  720. mutex_lock(&g2d->runqueue_mutex);
  721. clk_disable(g2d->gate_clk);
  722. pm_runtime_put_sync(g2d->dev);
  723. complete(&g2d->runqueue_node->complete);
  724. if (g2d->runqueue_node->async)
  725. g2d_free_runqueue_node(g2d, g2d->runqueue_node);
  726. if (g2d->suspended)
  727. g2d->runqueue_node = NULL;
  728. else
  729. g2d_exec_runqueue(g2d);
  730. mutex_unlock(&g2d->runqueue_mutex);
  731. }
  732. static void g2d_finish_event(struct g2d_data *g2d, u32 cmdlist_no)
  733. {
  734. struct drm_device *drm_dev = g2d->subdrv.drm_dev;
  735. struct g2d_runqueue_node *runqueue_node = g2d->runqueue_node;
  736. struct drm_exynos_pending_g2d_event *e;
  737. struct timeval now;
  738. unsigned long flags;
  739. if (list_empty(&runqueue_node->event_list))
  740. return;
  741. e = list_first_entry(&runqueue_node->event_list,
  742. struct drm_exynos_pending_g2d_event, base.link);
  743. do_gettimeofday(&now);
  744. e->event.tv_sec = now.tv_sec;
  745. e->event.tv_usec = now.tv_usec;
  746. e->event.cmdlist_no = cmdlist_no;
  747. spin_lock_irqsave(&drm_dev->event_lock, flags);
  748. list_move_tail(&e->base.link, &e->base.file_priv->event_list);
  749. wake_up_interruptible(&e->base.file_priv->event_wait);
  750. spin_unlock_irqrestore(&drm_dev->event_lock, flags);
  751. }
  752. static irqreturn_t g2d_irq_handler(int irq, void *dev_id)
  753. {
  754. struct g2d_data *g2d = dev_id;
  755. u32 pending;
  756. pending = readl_relaxed(g2d->regs + G2D_INTC_PEND);
  757. if (pending)
  758. writel_relaxed(pending, g2d->regs + G2D_INTC_PEND);
  759. if (pending & G2D_INTP_GCMD_FIN) {
  760. u32 cmdlist_no = readl_relaxed(g2d->regs + G2D_DMA_STATUS);
  761. cmdlist_no = (cmdlist_no & G2D_DMA_LIST_DONE_COUNT) >>
  762. G2D_DMA_LIST_DONE_COUNT_OFFSET;
  763. g2d_finish_event(g2d, cmdlist_no);
  764. writel_relaxed(0, g2d->regs + G2D_DMA_HOLD_CMD);
  765. if (!(pending & G2D_INTP_ACMD_FIN)) {
  766. writel_relaxed(G2D_DMA_CONTINUE,
  767. g2d->regs + G2D_DMA_COMMAND);
  768. }
  769. }
  770. if (pending & G2D_INTP_ACMD_FIN)
  771. queue_work(g2d->g2d_workq, &g2d->runqueue_work);
  772. return IRQ_HANDLED;
  773. }
  774. static int g2d_check_reg_offset(struct device *dev,
  775. struct g2d_cmdlist_node *node,
  776. int nr, bool for_addr)
  777. {
  778. struct g2d_cmdlist *cmdlist = node->cmdlist;
  779. int reg_offset;
  780. int index;
  781. int i;
  782. for (i = 0; i < nr; i++) {
  783. struct g2d_buf_info *buf_info = &node->buf_info;
  784. struct g2d_buf_desc *buf_desc;
  785. enum g2d_reg_type reg_type;
  786. unsigned long value;
  787. index = cmdlist->last - 2 * (i + 1);
  788. reg_offset = cmdlist->data[index] & ~0xfffff000;
  789. if (reg_offset < G2D_VALID_START || reg_offset > G2D_VALID_END)
  790. goto err;
  791. if (reg_offset % 4)
  792. goto err;
  793. switch (reg_offset) {
  794. case G2D_SRC_BASE_ADDR:
  795. case G2D_SRC_PLANE2_BASE_ADDR:
  796. case G2D_DST_BASE_ADDR:
  797. case G2D_DST_PLANE2_BASE_ADDR:
  798. case G2D_PAT_BASE_ADDR:
  799. case G2D_MSK_BASE_ADDR:
  800. if (!for_addr)
  801. goto err;
  802. reg_type = g2d_get_reg_type(reg_offset);
  803. if (reg_type == REG_TYPE_NONE)
  804. goto err;
  805. /* check userptr buffer type. */
  806. if ((cmdlist->data[index] & ~0x7fffffff) >> 31) {
  807. buf_info->types[reg_type] = BUF_TYPE_USERPTR;
  808. cmdlist->data[index] &= ~G2D_BUF_USERPTR;
  809. } else
  810. buf_info->types[reg_type] = BUF_TYPE_GEM;
  811. break;
  812. case G2D_SRC_COLOR_MODE:
  813. case G2D_DST_COLOR_MODE:
  814. if (for_addr)
  815. goto err;
  816. reg_type = g2d_get_reg_type(reg_offset);
  817. if (reg_type == REG_TYPE_NONE)
  818. goto err;
  819. buf_desc = &buf_info->descs[reg_type];
  820. value = cmdlist->data[index + 1];
  821. buf_desc->format = value & 0xf;
  822. break;
  823. case G2D_SRC_LEFT_TOP:
  824. case G2D_DST_LEFT_TOP:
  825. if (for_addr)
  826. goto err;
  827. reg_type = g2d_get_reg_type(reg_offset);
  828. if (reg_type == REG_TYPE_NONE)
  829. goto err;
  830. buf_desc = &buf_info->descs[reg_type];
  831. value = cmdlist->data[index + 1];
  832. buf_desc->left_x = value & 0x1fff;
  833. buf_desc->top_y = (value & 0x1fff0000) >> 16;
  834. break;
  835. case G2D_SRC_RIGHT_BOTTOM:
  836. case G2D_DST_RIGHT_BOTTOM:
  837. if (for_addr)
  838. goto err;
  839. reg_type = g2d_get_reg_type(reg_offset);
  840. if (reg_type == REG_TYPE_NONE)
  841. goto err;
  842. buf_desc = &buf_info->descs[reg_type];
  843. value = cmdlist->data[index + 1];
  844. buf_desc->right_x = value & 0x1fff;
  845. buf_desc->bottom_y = (value & 0x1fff0000) >> 16;
  846. break;
  847. default:
  848. if (for_addr)
  849. goto err;
  850. break;
  851. }
  852. }
  853. return 0;
  854. err:
  855. dev_err(dev, "Bad register offset: 0x%lx\n", cmdlist->data[index]);
  856. return -EINVAL;
  857. }
  858. /* ioctl functions */
  859. int exynos_g2d_get_ver_ioctl(struct drm_device *drm_dev, void *data,
  860. struct drm_file *file)
  861. {
  862. struct drm_exynos_g2d_get_ver *ver = data;
  863. ver->major = G2D_HW_MAJOR_VER;
  864. ver->minor = G2D_HW_MINOR_VER;
  865. return 0;
  866. }
  867. EXPORT_SYMBOL_GPL(exynos_g2d_get_ver_ioctl);
  868. int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,
  869. struct drm_file *file)
  870. {
  871. struct drm_exynos_file_private *file_priv = file->driver_priv;
  872. struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
  873. struct device *dev = g2d_priv->dev;
  874. struct g2d_data *g2d;
  875. struct drm_exynos_g2d_set_cmdlist *req = data;
  876. struct drm_exynos_g2d_cmd *cmd;
  877. struct drm_exynos_pending_g2d_event *e;
  878. struct g2d_cmdlist_node *node;
  879. struct g2d_cmdlist *cmdlist;
  880. unsigned long flags;
  881. int size;
  882. int ret;
  883. if (!dev)
  884. return -ENODEV;
  885. g2d = dev_get_drvdata(dev);
  886. if (!g2d)
  887. return -EFAULT;
  888. node = g2d_get_cmdlist(g2d);
  889. if (!node)
  890. return -ENOMEM;
  891. node->event = NULL;
  892. if (req->event_type != G2D_EVENT_NOT) {
  893. spin_lock_irqsave(&drm_dev->event_lock, flags);
  894. if (file->event_space < sizeof(e->event)) {
  895. spin_unlock_irqrestore(&drm_dev->event_lock, flags);
  896. ret = -ENOMEM;
  897. goto err;
  898. }
  899. file->event_space -= sizeof(e->event);
  900. spin_unlock_irqrestore(&drm_dev->event_lock, flags);
  901. e = kzalloc(sizeof(*node->event), GFP_KERNEL);
  902. if (!e) {
  903. dev_err(dev, "failed to allocate event\n");
  904. spin_lock_irqsave(&drm_dev->event_lock, flags);
  905. file->event_space += sizeof(e->event);
  906. spin_unlock_irqrestore(&drm_dev->event_lock, flags);
  907. ret = -ENOMEM;
  908. goto err;
  909. }
  910. e->event.base.type = DRM_EXYNOS_G2D_EVENT;
  911. e->event.base.length = sizeof(e->event);
  912. e->event.user_data = req->user_data;
  913. e->base.event = &e->event.base;
  914. e->base.file_priv = file;
  915. e->base.destroy = (void (*) (struct drm_pending_event *)) kfree;
  916. node->event = e;
  917. }
  918. cmdlist = node->cmdlist;
  919. cmdlist->last = 0;
  920. /*
  921. * If don't clear SFR registers, the cmdlist is affected by register
  922. * values of previous cmdlist. G2D hw executes SFR clear command and
  923. * a next command at the same time then the next command is ignored and
  924. * is executed rightly from next next command, so needs a dummy command
  925. * to next command of SFR clear command.
  926. */
  927. cmdlist->data[cmdlist->last++] = G2D_SOFT_RESET;
  928. cmdlist->data[cmdlist->last++] = G2D_SFRCLEAR;
  929. cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
  930. cmdlist->data[cmdlist->last++] = 0;
  931. /*
  932. * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
  933. * and GCF bit should be set to INTEN register if user wants
  934. * G2D interrupt event once current command list execution is
  935. * finished.
  936. * Otherwise only ACF bit should be set to INTEN register so
  937. * that one interrupt is occured after all command lists
  938. * have been completed.
  939. */
  940. if (node->event) {
  941. cmdlist->data[cmdlist->last++] = G2D_INTEN;
  942. cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF | G2D_INTEN_GCF;
  943. cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
  944. cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
  945. } else {
  946. cmdlist->data[cmdlist->last++] = G2D_INTEN;
  947. cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF;
  948. }
  949. /* Check size of cmdlist: last 2 is about G2D_BITBLT_START */
  950. size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;
  951. if (size > G2D_CMDLIST_DATA_NUM) {
  952. dev_err(dev, "cmdlist size is too big\n");
  953. ret = -EINVAL;
  954. goto err_free_event;
  955. }
  956. cmd = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd;
  957. if (copy_from_user(cmdlist->data + cmdlist->last,
  958. (void __user *)cmd,
  959. sizeof(*cmd) * req->cmd_nr)) {
  960. ret = -EFAULT;
  961. goto err_free_event;
  962. }
  963. cmdlist->last += req->cmd_nr * 2;
  964. ret = g2d_check_reg_offset(dev, node, req->cmd_nr, false);
  965. if (ret < 0)
  966. goto err_free_event;
  967. node->buf_info.map_nr = req->cmd_buf_nr;
  968. if (req->cmd_buf_nr) {
  969. struct drm_exynos_g2d_cmd *cmd_buf;
  970. cmd_buf = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd_buf;
  971. if (copy_from_user(cmdlist->data + cmdlist->last,
  972. (void __user *)cmd_buf,
  973. sizeof(*cmd_buf) * req->cmd_buf_nr)) {
  974. ret = -EFAULT;
  975. goto err_free_event;
  976. }
  977. cmdlist->last += req->cmd_buf_nr * 2;
  978. ret = g2d_check_reg_offset(dev, node, req->cmd_buf_nr, true);
  979. if (ret < 0)
  980. goto err_free_event;
  981. ret = g2d_map_cmdlist_gem(g2d, node, drm_dev, file);
  982. if (ret < 0)
  983. goto err_unmap;
  984. }
  985. cmdlist->data[cmdlist->last++] = G2D_BITBLT_START;
  986. cmdlist->data[cmdlist->last++] = G2D_START_BITBLT;
  987. /* head */
  988. cmdlist->head = cmdlist->last / 2;
  989. /* tail */
  990. cmdlist->data[cmdlist->last] = 0;
  991. g2d_add_cmdlist_to_inuse(g2d_priv, node);
  992. return 0;
  993. err_unmap:
  994. g2d_unmap_cmdlist_gem(g2d, node, file);
  995. err_free_event:
  996. if (node->event) {
  997. spin_lock_irqsave(&drm_dev->event_lock, flags);
  998. file->event_space += sizeof(e->event);
  999. spin_unlock_irqrestore(&drm_dev->event_lock, flags);
  1000. kfree(node->event);
  1001. }
  1002. err:
  1003. g2d_put_cmdlist(g2d, node);
  1004. return ret;
  1005. }
  1006. EXPORT_SYMBOL_GPL(exynos_g2d_set_cmdlist_ioctl);
  1007. int exynos_g2d_exec_ioctl(struct drm_device *drm_dev, void *data,
  1008. struct drm_file *file)
  1009. {
  1010. struct drm_exynos_file_private *file_priv = file->driver_priv;
  1011. struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
  1012. struct device *dev = g2d_priv->dev;
  1013. struct g2d_data *g2d;
  1014. struct drm_exynos_g2d_exec *req = data;
  1015. struct g2d_runqueue_node *runqueue_node;
  1016. struct list_head *run_cmdlist;
  1017. struct list_head *event_list;
  1018. if (!dev)
  1019. return -ENODEV;
  1020. g2d = dev_get_drvdata(dev);
  1021. if (!g2d)
  1022. return -EFAULT;
  1023. runqueue_node = kmem_cache_alloc(g2d->runqueue_slab, GFP_KERNEL);
  1024. if (!runqueue_node) {
  1025. dev_err(dev, "failed to allocate memory\n");
  1026. return -ENOMEM;
  1027. }
  1028. run_cmdlist = &runqueue_node->run_cmdlist;
  1029. event_list = &runqueue_node->event_list;
  1030. INIT_LIST_HEAD(run_cmdlist);
  1031. INIT_LIST_HEAD(event_list);
  1032. init_completion(&runqueue_node->complete);
  1033. runqueue_node->async = req->async;
  1034. list_splice_init(&g2d_priv->inuse_cmdlist, run_cmdlist);
  1035. list_splice_init(&g2d_priv->event_list, event_list);
  1036. if (list_empty(run_cmdlist)) {
  1037. dev_err(dev, "there is no inuse cmdlist\n");
  1038. kmem_cache_free(g2d->runqueue_slab, runqueue_node);
  1039. return -EPERM;
  1040. }
  1041. mutex_lock(&g2d->runqueue_mutex);
  1042. runqueue_node->pid = current->pid;
  1043. runqueue_node->filp = file;
  1044. list_add_tail(&runqueue_node->list, &g2d->runqueue);
  1045. if (!g2d->runqueue_node)
  1046. g2d_exec_runqueue(g2d);
  1047. mutex_unlock(&g2d->runqueue_mutex);
  1048. if (runqueue_node->async)
  1049. goto out;
  1050. wait_for_completion(&runqueue_node->complete);
  1051. g2d_free_runqueue_node(g2d, runqueue_node);
  1052. out:
  1053. return 0;
  1054. }
  1055. EXPORT_SYMBOL_GPL(exynos_g2d_exec_ioctl);
  1056. static int g2d_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
  1057. {
  1058. struct g2d_data *g2d;
  1059. int ret;
  1060. g2d = dev_get_drvdata(dev);
  1061. if (!g2d)
  1062. return -EFAULT;
  1063. /* allocate dma-aware cmdlist buffer. */
  1064. ret = g2d_init_cmdlist(g2d);
  1065. if (ret < 0) {
  1066. dev_err(dev, "cmdlist init failed\n");
  1067. return ret;
  1068. }
  1069. if (!is_drm_iommu_supported(drm_dev))
  1070. return 0;
  1071. ret = drm_iommu_attach_device(drm_dev, dev);
  1072. if (ret < 0) {
  1073. dev_err(dev, "failed to enable iommu.\n");
  1074. g2d_fini_cmdlist(g2d);
  1075. }
  1076. return ret;
  1077. }
  1078. static void g2d_subdrv_remove(struct drm_device *drm_dev, struct device *dev)
  1079. {
  1080. if (!is_drm_iommu_supported(drm_dev))
  1081. return;
  1082. drm_iommu_detach_device(drm_dev, dev);
  1083. }
  1084. static int g2d_open(struct drm_device *drm_dev, struct device *dev,
  1085. struct drm_file *file)
  1086. {
  1087. struct drm_exynos_file_private *file_priv = file->driver_priv;
  1088. struct exynos_drm_g2d_private *g2d_priv;
  1089. g2d_priv = kzalloc(sizeof(*g2d_priv), GFP_KERNEL);
  1090. if (!g2d_priv) {
  1091. dev_err(dev, "failed to allocate g2d private data\n");
  1092. return -ENOMEM;
  1093. }
  1094. g2d_priv->dev = dev;
  1095. file_priv->g2d_priv = g2d_priv;
  1096. INIT_LIST_HEAD(&g2d_priv->inuse_cmdlist);
  1097. INIT_LIST_HEAD(&g2d_priv->event_list);
  1098. INIT_LIST_HEAD(&g2d_priv->userptr_list);
  1099. return 0;
  1100. }
  1101. static void g2d_close(struct drm_device *drm_dev, struct device *dev,
  1102. struct drm_file *file)
  1103. {
  1104. struct drm_exynos_file_private *file_priv = file->driver_priv;
  1105. struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
  1106. struct g2d_data *g2d;
  1107. struct g2d_cmdlist_node *node, *n;
  1108. if (!dev)
  1109. return;
  1110. g2d = dev_get_drvdata(dev);
  1111. if (!g2d)
  1112. return;
  1113. mutex_lock(&g2d->cmdlist_mutex);
  1114. list_for_each_entry_safe(node, n, &g2d_priv->inuse_cmdlist, list) {
  1115. /*
  1116. * unmap all gem objects not completed.
  1117. *
  1118. * P.S. if current process was terminated forcely then
  1119. * there may be some commands in inuse_cmdlist so unmap
  1120. * them.
  1121. */
  1122. g2d_unmap_cmdlist_gem(g2d, node, file);
  1123. list_move_tail(&node->list, &g2d->free_cmdlist);
  1124. }
  1125. mutex_unlock(&g2d->cmdlist_mutex);
  1126. /* release all g2d_userptr in pool. */
  1127. g2d_userptr_free_all(drm_dev, g2d, file);
  1128. kfree(file_priv->g2d_priv);
  1129. }
  1130. static int g2d_probe(struct platform_device *pdev)
  1131. {
  1132. struct device *dev = &pdev->dev;
  1133. struct resource *res;
  1134. struct g2d_data *g2d;
  1135. struct exynos_drm_subdrv *subdrv;
  1136. int ret;
  1137. g2d = devm_kzalloc(&pdev->dev, sizeof(*g2d), GFP_KERNEL);
  1138. if (!g2d) {
  1139. dev_err(dev, "failed to allocate driver data\n");
  1140. return -ENOMEM;
  1141. }
  1142. g2d->runqueue_slab = kmem_cache_create("g2d_runqueue_slab",
  1143. sizeof(struct g2d_runqueue_node), 0, 0, NULL);
  1144. if (!g2d->runqueue_slab)
  1145. return -ENOMEM;
  1146. g2d->dev = dev;
  1147. g2d->g2d_workq = create_singlethread_workqueue("g2d");
  1148. if (!g2d->g2d_workq) {
  1149. dev_err(dev, "failed to create workqueue\n");
  1150. ret = -EINVAL;
  1151. goto err_destroy_slab;
  1152. }
  1153. INIT_WORK(&g2d->runqueue_work, g2d_runqueue_worker);
  1154. INIT_LIST_HEAD(&g2d->free_cmdlist);
  1155. INIT_LIST_HEAD(&g2d->runqueue);
  1156. mutex_init(&g2d->cmdlist_mutex);
  1157. mutex_init(&g2d->runqueue_mutex);
  1158. g2d->gate_clk = devm_clk_get(dev, "fimg2d");
  1159. if (IS_ERR(g2d->gate_clk)) {
  1160. dev_err(dev, "failed to get gate clock\n");
  1161. ret = PTR_ERR(g2d->gate_clk);
  1162. goto err_destroy_workqueue;
  1163. }
  1164. pm_runtime_enable(dev);
  1165. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1166. g2d->regs = devm_ioremap_resource(&pdev->dev, res);
  1167. if (IS_ERR(g2d->regs)) {
  1168. ret = PTR_ERR(g2d->regs);
  1169. goto err_put_clk;
  1170. }
  1171. g2d->irq = platform_get_irq(pdev, 0);
  1172. if (g2d->irq < 0) {
  1173. dev_err(dev, "failed to get irq\n");
  1174. ret = g2d->irq;
  1175. goto err_put_clk;
  1176. }
  1177. ret = devm_request_irq(&pdev->dev, g2d->irq, g2d_irq_handler, 0,
  1178. "drm_g2d", g2d);
  1179. if (ret < 0) {
  1180. dev_err(dev, "irq request failed\n");
  1181. goto err_put_clk;
  1182. }
  1183. g2d->max_pool = MAX_POOL;
  1184. platform_set_drvdata(pdev, g2d);
  1185. subdrv = &g2d->subdrv;
  1186. subdrv->dev = dev;
  1187. subdrv->probe = g2d_subdrv_probe;
  1188. subdrv->remove = g2d_subdrv_remove;
  1189. subdrv->open = g2d_open;
  1190. subdrv->close = g2d_close;
  1191. ret = exynos_drm_subdrv_register(subdrv);
  1192. if (ret < 0) {
  1193. dev_err(dev, "failed to register drm g2d device\n");
  1194. goto err_put_clk;
  1195. }
  1196. dev_info(dev, "The exynos g2d(ver %d.%d) successfully probed\n",
  1197. G2D_HW_MAJOR_VER, G2D_HW_MINOR_VER);
  1198. return 0;
  1199. err_put_clk:
  1200. pm_runtime_disable(dev);
  1201. err_destroy_workqueue:
  1202. destroy_workqueue(g2d->g2d_workq);
  1203. err_destroy_slab:
  1204. kmem_cache_destroy(g2d->runqueue_slab);
  1205. return ret;
  1206. }
  1207. static int g2d_remove(struct platform_device *pdev)
  1208. {
  1209. struct g2d_data *g2d = platform_get_drvdata(pdev);
  1210. cancel_work_sync(&g2d->runqueue_work);
  1211. exynos_drm_subdrv_unregister(&g2d->subdrv);
  1212. while (g2d->runqueue_node) {
  1213. g2d_free_runqueue_node(g2d, g2d->runqueue_node);
  1214. g2d->runqueue_node = g2d_get_runqueue_node(g2d);
  1215. }
  1216. pm_runtime_disable(&pdev->dev);
  1217. g2d_fini_cmdlist(g2d);
  1218. destroy_workqueue(g2d->g2d_workq);
  1219. kmem_cache_destroy(g2d->runqueue_slab);
  1220. return 0;
  1221. }
  1222. #ifdef CONFIG_PM_SLEEP
  1223. static int g2d_suspend(struct device *dev)
  1224. {
  1225. struct g2d_data *g2d = dev_get_drvdata(dev);
  1226. mutex_lock(&g2d->runqueue_mutex);
  1227. g2d->suspended = true;
  1228. mutex_unlock(&g2d->runqueue_mutex);
  1229. while (g2d->runqueue_node)
  1230. /* FIXME: good range? */
  1231. usleep_range(500, 1000);
  1232. flush_work(&g2d->runqueue_work);
  1233. return 0;
  1234. }
  1235. static int g2d_resume(struct device *dev)
  1236. {
  1237. struct g2d_data *g2d = dev_get_drvdata(dev);
  1238. g2d->suspended = false;
  1239. g2d_exec_runqueue(g2d);
  1240. return 0;
  1241. }
  1242. #endif
  1243. static SIMPLE_DEV_PM_OPS(g2d_pm_ops, g2d_suspend, g2d_resume);
  1244. #ifdef CONFIG_OF
  1245. static const struct of_device_id exynos_g2d_match[] = {
  1246. { .compatible = "samsung,exynos5250-g2d" },
  1247. {},
  1248. };
  1249. MODULE_DEVICE_TABLE(of, exynos_g2d_match);
  1250. #endif
  1251. struct platform_driver g2d_driver = {
  1252. .probe = g2d_probe,
  1253. .remove = g2d_remove,
  1254. .driver = {
  1255. .name = "s5p-g2d",
  1256. .owner = THIS_MODULE,
  1257. .pm = &g2d_pm_ops,
  1258. .of_match_table = of_match_ptr(exynos_g2d_match),
  1259. },
  1260. };