Kconfig 9.6 KB

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  1. #
  2. # DMA engine configuration
  3. #
  4. menuconfig DMADEVICES
  5. bool "DMA Engine support"
  6. depends on HAS_DMA
  7. help
  8. DMA engines can do asynchronous data transfers without
  9. involving the host CPU. Currently, this framework can be
  10. used to offload memory copies in the network stack and
  11. RAID operations in the MD driver. This menu only presents
  12. DMA Device drivers supported by the configured arch, it may
  13. be empty in some cases.
  14. config DMADEVICES_DEBUG
  15. bool "DMA Engine debugging"
  16. depends on DMADEVICES != n
  17. help
  18. This is an option for use by developers; most people should
  19. say N here. This enables DMA engine core and driver debugging.
  20. config DMADEVICES_VDEBUG
  21. bool "DMA Engine verbose debugging"
  22. depends on DMADEVICES_DEBUG != n
  23. help
  24. This is an option for use by developers; most people should
  25. say N here. This enables deeper (more verbose) debugging of
  26. the DMA engine core and drivers.
  27. if DMADEVICES
  28. comment "DMA Devices"
  29. config INTEL_MID_DMAC
  30. tristate "Intel MID DMA support for Peripheral DMA controllers"
  31. depends on PCI && X86
  32. select DMA_ENGINE
  33. default n
  34. help
  35. Enable support for the Intel(R) MID DMA engine present
  36. in Intel MID chipsets.
  37. Say Y here if you have such a chipset.
  38. If unsure, say N.
  39. config ASYNC_TX_ENABLE_CHANNEL_SWITCH
  40. bool
  41. config AMBA_PL08X
  42. bool "ARM PrimeCell PL080 or PL081 support"
  43. depends on ARM_AMBA
  44. select DMA_ENGINE
  45. select DMA_VIRTUAL_CHANNELS
  46. help
  47. Platform has a PL08x DMAC device
  48. which can provide DMA engine support
  49. config INTEL_IOATDMA
  50. tristate "Intel I/OAT DMA support"
  51. depends on PCI && X86
  52. select DMA_ENGINE
  53. select DCA
  54. select ASYNC_TX_DISABLE_PQ_VAL_DMA
  55. select ASYNC_TX_DISABLE_XOR_VAL_DMA
  56. help
  57. Enable support for the Intel(R) I/OAT DMA engine present
  58. in recent Intel Xeon chipsets.
  59. Say Y here if you have such a chipset.
  60. If unsure, say N.
  61. config INTEL_IOP_ADMA
  62. tristate "Intel IOP ADMA support"
  63. depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
  64. select DMA_ENGINE
  65. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  66. help
  67. Enable support for the Intel(R) IOP Series RAID engines.
  68. config DW_DMAC
  69. tristate "Synopsys DesignWare AHB DMA support"
  70. select DMA_ENGINE
  71. default y if CPU_AT32AP7000
  72. help
  73. Support the Synopsys DesignWare AHB DMA controller. This
  74. can be integrated in chips such as the Atmel AT32ap7000.
  75. config DW_DMAC_BIG_ENDIAN_IO
  76. bool "Use big endian I/O register access"
  77. default y if AVR32
  78. depends on DW_DMAC
  79. help
  80. Say yes here to use big endian I/O access when reading and writing
  81. to the DMA controller registers. This is needed on some platforms,
  82. like the Atmel AVR32 architecture.
  83. If unsure, use the default setting.
  84. config AT_HDMAC
  85. tristate "Atmel AHB DMA support"
  86. depends on ARCH_AT91
  87. select DMA_ENGINE
  88. help
  89. Support the Atmel AHB DMA controller.
  90. config FSL_DMA
  91. tristate "Freescale Elo and Elo Plus DMA support"
  92. depends on FSL_SOC
  93. select DMA_ENGINE
  94. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  95. ---help---
  96. Enable support for the Freescale Elo and Elo Plus DMA controllers.
  97. The Elo is the DMA controller on some 82xx and 83xx parts, and the
  98. Elo Plus is the DMA controller on 85xx and 86xx parts.
  99. config MPC512X_DMA
  100. tristate "Freescale MPC512x built-in DMA engine support"
  101. depends on PPC_MPC512x || PPC_MPC831x
  102. select DMA_ENGINE
  103. ---help---
  104. Enable support for the Freescale MPC512x built-in DMA engine.
  105. source "drivers/dma/bestcomm/Kconfig"
  106. config MV_XOR
  107. bool "Marvell XOR engine support"
  108. depends on PLAT_ORION
  109. select DMA_ENGINE
  110. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  111. ---help---
  112. Enable support for the Marvell XOR engine.
  113. config MX3_IPU
  114. bool "MX3x Image Processing Unit support"
  115. depends on ARCH_MXC
  116. select DMA_ENGINE
  117. default y
  118. help
  119. If you plan to use the Image Processing unit in the i.MX3x, say
  120. Y here. If unsure, select Y.
  121. config MX3_IPU_IRQS
  122. int "Number of dynamically mapped interrupts for IPU"
  123. depends on MX3_IPU
  124. range 2 137
  125. default 4
  126. help
  127. Out of 137 interrupt sources on i.MX31 IPU only very few are used.
  128. To avoid bloating the irq_desc[] array we allocate a sufficient
  129. number of IRQ slots and map them dynamically to specific sources.
  130. config TXX9_DMAC
  131. tristate "Toshiba TXx9 SoC DMA support"
  132. depends on MACH_TX49XX || MACH_TX39XX
  133. select DMA_ENGINE
  134. help
  135. Support the TXx9 SoC internal DMA controller. This can be
  136. integrated in chips such as the Toshiba TX4927/38/39.
  137. config TEGRA20_APB_DMA
  138. bool "NVIDIA Tegra20 APB DMA support"
  139. depends on ARCH_TEGRA
  140. select DMA_ENGINE
  141. help
  142. Support for the NVIDIA Tegra20 APB DMA controller driver. The
  143. DMA controller is having multiple DMA channel which can be
  144. configured for different peripherals like audio, UART, SPI,
  145. I2C etc which is in APB bus.
  146. This DMA controller transfers data from memory to peripheral fifo
  147. or vice versa. It does not support memory to memory data transfer.
  148. config SH_DMAE
  149. tristate "Renesas SuperH DMAC support"
  150. depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
  151. depends on !SH_DMA_API
  152. select DMA_ENGINE
  153. help
  154. Enable support for the Renesas SuperH DMA controllers.
  155. config COH901318
  156. bool "ST-Ericsson COH901318 DMA support"
  157. select DMA_ENGINE
  158. depends on ARCH_U300
  159. help
  160. Enable support for ST-Ericsson COH 901 318 DMA.
  161. config STE_DMA40
  162. bool "ST-Ericsson DMA40 support"
  163. depends on ARCH_U8500
  164. select DMA_ENGINE
  165. help
  166. Support for ST-Ericsson DMA40 controller
  167. config AMCC_PPC440SPE_ADMA
  168. tristate "AMCC PPC440SPe ADMA support"
  169. depends on 440SPe || 440SP
  170. select DMA_ENGINE
  171. select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
  172. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  173. help
  174. Enable support for the AMCC PPC440SPe RAID engines.
  175. config TIMB_DMA
  176. tristate "Timberdale FPGA DMA support"
  177. depends on MFD_TIMBERDALE || HAS_IOMEM
  178. select DMA_ENGINE
  179. help
  180. Enable support for the Timberdale FPGA DMA engine.
  181. config SIRF_DMA
  182. tristate "CSR SiRFprimaII/SiRFmarco DMA support"
  183. depends on ARCH_SIRF
  184. select DMA_ENGINE
  185. help
  186. Enable support for the CSR SiRFprimaII DMA engine.
  187. config TI_EDMA
  188. tristate "TI EDMA support"
  189. depends on ARCH_DAVINCI
  190. select DMA_ENGINE
  191. select DMA_VIRTUAL_CHANNELS
  192. default n
  193. help
  194. Enable support for the TI EDMA controller. This DMA
  195. engine is found on TI DaVinci and AM33xx parts.
  196. config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
  197. bool
  198. config PL330_DMA
  199. tristate "DMA API Driver for PL330"
  200. select DMA_ENGINE
  201. depends on ARM_AMBA
  202. help
  203. Select if your platform has one or more PL330 DMACs.
  204. You need to provide platform specific settings via
  205. platform_data for a dma-pl330 device.
  206. config PCH_DMA
  207. tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
  208. depends on PCI && X86
  209. select DMA_ENGINE
  210. help
  211. Enable support for Intel EG20T PCH DMA engine.
  212. This driver also can be used for LAPIS Semiconductor IOH(Input/
  213. Output Hub), ML7213, ML7223 and ML7831.
  214. ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
  215. for MP(Media Phone) use and ML7831 IOH is for general purpose use.
  216. ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
  217. ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
  218. config IMX_SDMA
  219. tristate "i.MX SDMA support"
  220. depends on ARCH_MXC
  221. select DMA_ENGINE
  222. help
  223. Support the i.MX SDMA engine. This engine is integrated into
  224. Freescale i.MX25/31/35/51/53 chips.
  225. config IMX_DMA
  226. tristate "i.MX DMA support"
  227. depends on ARCH_MXC
  228. select DMA_ENGINE
  229. help
  230. Support the i.MX DMA engine. This engine is integrated into
  231. Freescale i.MX1/21/27 chips.
  232. config MXS_DMA
  233. bool "MXS DMA support"
  234. depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
  235. select STMP_DEVICE
  236. select DMA_ENGINE
  237. help
  238. Support the MXS DMA engine. This engine including APBH-DMA
  239. and APBX-DMA is integrated into Freescale i.MX23/28 chips.
  240. config EP93XX_DMA
  241. bool "Cirrus Logic EP93xx DMA support"
  242. depends on ARCH_EP93XX
  243. select DMA_ENGINE
  244. help
  245. Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
  246. config DMA_SA11X0
  247. tristate "SA-11x0 DMA support"
  248. depends on ARCH_SA1100
  249. select DMA_ENGINE
  250. select DMA_VIRTUAL_CHANNELS
  251. help
  252. Support the DMA engine found on Intel StrongARM SA-1100 and
  253. SA-1110 SoCs. This DMA engine can only be used with on-chip
  254. devices.
  255. config MMP_TDMA
  256. bool "MMP Two-Channel DMA support"
  257. depends on ARCH_MMP
  258. select DMA_ENGINE
  259. help
  260. Support the MMP Two-Channel DMA engine.
  261. This engine used for MMP Audio DMA and pxa910 SQU.
  262. Say Y here if you enabled MMP ADMA, otherwise say N.
  263. config DMA_OMAP
  264. tristate "OMAP DMA support"
  265. depends on ARCH_OMAP
  266. select DMA_ENGINE
  267. select DMA_VIRTUAL_CHANNELS
  268. config MMP_PDMA
  269. bool "MMP PDMA support"
  270. depends on (ARCH_MMP || ARCH_PXA)
  271. select DMA_ENGINE
  272. help
  273. Support the MMP PDMA engine for PXA and MMP platfrom.
  274. config DMA_ENGINE
  275. bool
  276. config DMA_VIRTUAL_CHANNELS
  277. tristate
  278. config DMA_OF
  279. def_bool y
  280. depends on OF
  281. comment "DMA Clients"
  282. depends on DMA_ENGINE
  283. config NET_DMA
  284. bool "Network: TCP receive copy offload"
  285. depends on DMA_ENGINE && NET
  286. default (INTEL_IOATDMA || FSL_DMA)
  287. help
  288. This enables the use of DMA engines in the network stack to
  289. offload receive copy-to-user operations, freeing CPU cycles.
  290. Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
  291. say N.
  292. config ASYNC_TX_DMA
  293. bool "Async_tx: Offload support for the async_tx api"
  294. depends on DMA_ENGINE
  295. help
  296. This allows the async_tx api to take advantage of offload engines for
  297. memcpy, memset, xor, and raid6 p+q operations. If your platform has
  298. a dma engine that can perform raid operations and you have enabled
  299. MD_RAID456 say Y.
  300. If unsure, say N.
  301. config DMATEST
  302. tristate "DMA Test client"
  303. depends on DMA_ENGINE
  304. help
  305. Simple DMA test client. Say N unless you're debugging a
  306. DMA Device driver.
  307. endif