cryp.h 7.6 KB

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  1. /**
  2. * Copyright (C) ST-Ericsson SA 2010
  3. * Author: Shujuan Chen <shujuan.chen@stericsson.com> for ST-Ericsson.
  4. * Author: Jonas Linde <jonas.linde@stericsson.com> for ST-Ericsson.
  5. * Author: Joakim Bech <joakim.xx.bech@stericsson.com> for ST-Ericsson.
  6. * Author: Berne Hebark <berne.herbark@stericsson.com> for ST-Ericsson.
  7. * Author: Niklas Hernaeus <niklas.hernaeus@stericsson.com> for ST-Ericsson.
  8. * License terms: GNU General Public License (GPL) version 2
  9. */
  10. #ifndef _CRYP_H_
  11. #define _CRYP_H_
  12. #include <linux/completion.h>
  13. #include <linux/dmaengine.h>
  14. #include <linux/klist.h>
  15. #include <linux/mutex.h>
  16. #define DEV_DBG_NAME "crypX crypX:"
  17. /* CRYP enable/disable */
  18. enum cryp_crypen {
  19. CRYP_CRYPEN_DISABLE = 0,
  20. CRYP_CRYPEN_ENABLE = 1
  21. };
  22. /* CRYP Start Computation enable/disable */
  23. enum cryp_start {
  24. CRYP_START_DISABLE = 0,
  25. CRYP_START_ENABLE = 1
  26. };
  27. /* CRYP Init Signal enable/disable */
  28. enum cryp_init {
  29. CRYP_INIT_DISABLE = 0,
  30. CRYP_INIT_ENABLE = 1
  31. };
  32. /* Cryp State enable/disable */
  33. enum cryp_state {
  34. CRYP_STATE_DISABLE = 0,
  35. CRYP_STATE_ENABLE = 1
  36. };
  37. /* Key preparation bit enable */
  38. enum cryp_key_prep {
  39. KSE_DISABLED = 0,
  40. KSE_ENABLED = 1
  41. };
  42. /* Key size for AES */
  43. #define CRYP_KEY_SIZE_128 (0)
  44. #define CRYP_KEY_SIZE_192 (1)
  45. #define CRYP_KEY_SIZE_256 (2)
  46. /* AES modes */
  47. enum cryp_algo_mode {
  48. CRYP_ALGO_TDES_ECB,
  49. CRYP_ALGO_TDES_CBC,
  50. CRYP_ALGO_DES_ECB,
  51. CRYP_ALGO_DES_CBC,
  52. CRYP_ALGO_AES_ECB,
  53. CRYP_ALGO_AES_CBC,
  54. CRYP_ALGO_AES_CTR,
  55. CRYP_ALGO_AES_XTS
  56. };
  57. /* Cryp Encryption or Decryption */
  58. enum cryp_algorithm_dir {
  59. CRYP_ALGORITHM_ENCRYPT,
  60. CRYP_ALGORITHM_DECRYPT
  61. };
  62. /* Hardware access method */
  63. enum cryp_mode {
  64. CRYP_MODE_POLLING,
  65. CRYP_MODE_INTERRUPT,
  66. CRYP_MODE_DMA
  67. };
  68. /**
  69. * struct cryp_config -
  70. * @keysize: Key size for AES
  71. * @algomode: AES modes
  72. * @algodir: Cryp Encryption or Decryption
  73. *
  74. * CRYP configuration structure to be passed to set configuration
  75. */
  76. struct cryp_config {
  77. int keysize;
  78. enum cryp_algo_mode algomode;
  79. enum cryp_algorithm_dir algodir;
  80. };
  81. /**
  82. * struct cryp_protection_config -
  83. * @privilege_access: Privileged cryp state enable/disable
  84. * @secure_access: Secure cryp state enable/disable
  85. *
  86. * Protection configuration structure for setting privilage access
  87. */
  88. struct cryp_protection_config {
  89. enum cryp_state privilege_access;
  90. enum cryp_state secure_access;
  91. };
  92. /* Cryp status */
  93. enum cryp_status_id {
  94. CRYP_STATUS_BUSY = 0x10,
  95. CRYP_STATUS_OUTPUT_FIFO_FULL = 0x08,
  96. CRYP_STATUS_OUTPUT_FIFO_NOT_EMPTY = 0x04,
  97. CRYP_STATUS_INPUT_FIFO_NOT_FULL = 0x02,
  98. CRYP_STATUS_INPUT_FIFO_EMPTY = 0x01
  99. };
  100. /* Cryp DMA interface */
  101. enum cryp_dma_req_type {
  102. CRYP_DMA_DISABLE_BOTH,
  103. CRYP_DMA_ENABLE_IN_DATA,
  104. CRYP_DMA_ENABLE_OUT_DATA,
  105. CRYP_DMA_ENABLE_BOTH_DIRECTIONS
  106. };
  107. enum cryp_dma_channel {
  108. CRYP_DMA_RX = 0,
  109. CRYP_DMA_TX
  110. };
  111. /* Key registers */
  112. enum cryp_key_reg_index {
  113. CRYP_KEY_REG_1,
  114. CRYP_KEY_REG_2,
  115. CRYP_KEY_REG_3,
  116. CRYP_KEY_REG_4
  117. };
  118. /* Key register left and right */
  119. struct cryp_key_value {
  120. u32 key_value_left;
  121. u32 key_value_right;
  122. };
  123. /* Cryp Initialization structure */
  124. enum cryp_init_vector_index {
  125. CRYP_INIT_VECTOR_INDEX_0,
  126. CRYP_INIT_VECTOR_INDEX_1
  127. };
  128. /* struct cryp_init_vector_value -
  129. * @init_value_left
  130. * @init_value_right
  131. * */
  132. struct cryp_init_vector_value {
  133. u32 init_value_left;
  134. u32 init_value_right;
  135. };
  136. /**
  137. * struct cryp_device_context - structure for a cryp context.
  138. * @cr: control register
  139. * @dmacr: DMA control register
  140. * @imsc: Interrupt mask set/clear register
  141. * @key_1_l: Key 1l register
  142. * @key_1_r: Key 1r register
  143. * @key_2_l: Key 2l register
  144. * @key_2_r: Key 2r register
  145. * @key_3_l: Key 3l register
  146. * @key_3_r: Key 3r register
  147. * @key_4_l: Key 4l register
  148. * @key_4_r: Key 4r register
  149. * @init_vect_0_l: Initialization vector 0l register
  150. * @init_vect_0_r: Initialization vector 0r register
  151. * @init_vect_1_l: Initialization vector 1l register
  152. * @init_vect_1_r: Initialization vector 0r register
  153. * @din: Data in register
  154. * @dout: Data out register
  155. *
  156. * CRYP power management specifc structure.
  157. */
  158. struct cryp_device_context {
  159. u32 cr;
  160. u32 dmacr;
  161. u32 imsc;
  162. u32 key_1_l;
  163. u32 key_1_r;
  164. u32 key_2_l;
  165. u32 key_2_r;
  166. u32 key_3_l;
  167. u32 key_3_r;
  168. u32 key_4_l;
  169. u32 key_4_r;
  170. u32 init_vect_0_l;
  171. u32 init_vect_0_r;
  172. u32 init_vect_1_l;
  173. u32 init_vect_1_r;
  174. u32 din;
  175. u32 dout;
  176. };
  177. struct cryp_dma {
  178. dma_cap_mask_t mask;
  179. struct completion cryp_dma_complete;
  180. struct dma_chan *chan_cryp2mem;
  181. struct dma_chan *chan_mem2cryp;
  182. struct stedma40_chan_cfg *cfg_cryp2mem;
  183. struct stedma40_chan_cfg *cfg_mem2cryp;
  184. int sg_src_len;
  185. int sg_dst_len;
  186. struct scatterlist *sg_src;
  187. struct scatterlist *sg_dst;
  188. int nents_src;
  189. int nents_dst;
  190. };
  191. /**
  192. * struct cryp_device_data - structure for a cryp device.
  193. * @base: Pointer to the hardware base address.
  194. * @dev: Pointer to the devices dev structure.
  195. * @clk: Pointer to the device's clock control.
  196. * @pwr_regulator: Pointer to the device's power control.
  197. * @power_status: Current status of the power.
  198. * @ctx_lock: Lock for current_ctx.
  199. * @current_ctx: Pointer to the currently allocated context.
  200. * @list_node: For inclusion into a klist.
  201. * @dma: The dma structure holding channel configuration.
  202. * @power_state: TRUE = power state on, FALSE = power state off.
  203. * @power_state_spinlock: Spinlock for power_state.
  204. * @restore_dev_ctx: TRUE = saved ctx, FALSE = no saved ctx.
  205. */
  206. struct cryp_device_data {
  207. struct cryp_register __iomem *base;
  208. struct device *dev;
  209. struct clk *clk;
  210. struct regulator *pwr_regulator;
  211. int power_status;
  212. struct spinlock ctx_lock;
  213. struct cryp_ctx *current_ctx;
  214. struct klist_node list_node;
  215. struct cryp_dma dma;
  216. bool power_state;
  217. struct spinlock power_state_spinlock;
  218. bool restore_dev_ctx;
  219. };
  220. void cryp_wait_until_done(struct cryp_device_data *device_data);
  221. /* Initialization functions */
  222. int cryp_check(struct cryp_device_data *device_data);
  223. void cryp_activity(struct cryp_device_data *device_data,
  224. enum cryp_crypen cryp_crypen);
  225. void cryp_flush_inoutfifo(struct cryp_device_data *device_data);
  226. int cryp_set_configuration(struct cryp_device_data *device_data,
  227. struct cryp_config *cryp_config,
  228. u32 *control_register);
  229. void cryp_configure_for_dma(struct cryp_device_data *device_data,
  230. enum cryp_dma_req_type dma_req);
  231. int cryp_configure_key_values(struct cryp_device_data *device_data,
  232. enum cryp_key_reg_index key_reg_index,
  233. struct cryp_key_value key_value);
  234. int cryp_configure_init_vector(struct cryp_device_data *device_data,
  235. enum cryp_init_vector_index
  236. init_vector_index,
  237. struct cryp_init_vector_value
  238. init_vector_value);
  239. int cryp_configure_protection(struct cryp_device_data *device_data,
  240. struct cryp_protection_config *p_protect_config);
  241. /* Power management funtions */
  242. void cryp_save_device_context(struct cryp_device_data *device_data,
  243. struct cryp_device_context *ctx,
  244. int cryp_mode);
  245. void cryp_restore_device_context(struct cryp_device_data *device_data,
  246. struct cryp_device_context *ctx);
  247. /* Data transfer and status bits. */
  248. int cryp_is_logic_busy(struct cryp_device_data *device_data);
  249. int cryp_get_status(struct cryp_device_data *device_data);
  250. /**
  251. * cryp_write_indata - This routine writes 32 bit data into the data input
  252. * register of the cryptography IP.
  253. * @device_data: Pointer to the device data struct for base address.
  254. * @write_data: Data to write.
  255. */
  256. int cryp_write_indata(struct cryp_device_data *device_data, u32 write_data);
  257. /**
  258. * cryp_read_outdata - This routine reads the data from the data output
  259. * register of the CRYP logic
  260. * @device_data: Pointer to the device data struct for base address.
  261. * @read_data: Read the data from the output FIFO.
  262. */
  263. int cryp_read_outdata(struct cryp_device_data *device_data, u32 *read_data);
  264. #endif /* _CRYP_H_ */