jr.c 13 KB

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  1. /*
  2. * CAAM/SEC 4.x transport/backend driver
  3. * JobR backend functionality
  4. *
  5. * Copyright 2008-2012 Freescale Semiconductor, Inc.
  6. */
  7. #include "compat.h"
  8. #include "regs.h"
  9. #include "jr.h"
  10. #include "desc.h"
  11. #include "intern.h"
  12. /* Main per-ring interrupt handler */
  13. static irqreturn_t caam_jr_interrupt(int irq, void *st_dev)
  14. {
  15. struct device *dev = st_dev;
  16. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  17. u32 irqstate;
  18. /*
  19. * Check the output ring for ready responses, kick
  20. * tasklet if jobs done.
  21. */
  22. irqstate = rd_reg32(&jrp->rregs->jrintstatus);
  23. if (!irqstate)
  24. return IRQ_NONE;
  25. /*
  26. * If JobR error, we got more development work to do
  27. * Flag a bug now, but we really need to shut down and
  28. * restart the queue (and fix code).
  29. */
  30. if (irqstate & JRINT_JR_ERROR) {
  31. dev_err(dev, "job ring error: irqstate: %08x\n", irqstate);
  32. BUG();
  33. }
  34. /* mask valid interrupts */
  35. setbits32(&jrp->rregs->rconfig_lo, JRCFG_IMSK);
  36. /* Have valid interrupt at this point, just ACK and trigger */
  37. wr_reg32(&jrp->rregs->jrintstatus, irqstate);
  38. preempt_disable();
  39. tasklet_schedule(&jrp->irqtask);
  40. preempt_enable();
  41. return IRQ_HANDLED;
  42. }
  43. /* Deferred service handler, run as interrupt-fired tasklet */
  44. static void caam_jr_dequeue(unsigned long devarg)
  45. {
  46. int hw_idx, sw_idx, i, head, tail;
  47. struct device *dev = (struct device *)devarg;
  48. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  49. void (*usercall)(struct device *dev, u32 *desc, u32 status, void *arg);
  50. u32 *userdesc, userstatus;
  51. void *userarg;
  52. while (rd_reg32(&jrp->rregs->outring_used)) {
  53. head = ACCESS_ONCE(jrp->head);
  54. spin_lock(&jrp->outlock);
  55. sw_idx = tail = jrp->tail;
  56. hw_idx = jrp->out_ring_read_index;
  57. for (i = 0; CIRC_CNT(head, tail + i, JOBR_DEPTH) >= 1; i++) {
  58. sw_idx = (tail + i) & (JOBR_DEPTH - 1);
  59. smp_read_barrier_depends();
  60. if (jrp->outring[hw_idx].desc ==
  61. jrp->entinfo[sw_idx].desc_addr_dma)
  62. break; /* found */
  63. }
  64. /* we should never fail to find a matching descriptor */
  65. BUG_ON(CIRC_CNT(head, tail + i, JOBR_DEPTH) <= 0);
  66. /* Unmap just-run descriptor so we can post-process */
  67. dma_unmap_single(dev, jrp->outring[hw_idx].desc,
  68. jrp->entinfo[sw_idx].desc_size,
  69. DMA_TO_DEVICE);
  70. /* mark completed, avoid matching on a recycled desc addr */
  71. jrp->entinfo[sw_idx].desc_addr_dma = 0;
  72. /* Stash callback params for use outside of lock */
  73. usercall = jrp->entinfo[sw_idx].callbk;
  74. userarg = jrp->entinfo[sw_idx].cbkarg;
  75. userdesc = jrp->entinfo[sw_idx].desc_addr_virt;
  76. userstatus = jrp->outring[hw_idx].jrstatus;
  77. /* set done */
  78. wr_reg32(&jrp->rregs->outring_rmvd, 1);
  79. jrp->out_ring_read_index = (jrp->out_ring_read_index + 1) &
  80. (JOBR_DEPTH - 1);
  81. /*
  82. * if this job completed out-of-order, do not increment
  83. * the tail. Otherwise, increment tail by 1 plus the
  84. * number of subsequent jobs already completed out-of-order
  85. */
  86. if (sw_idx == tail) {
  87. do {
  88. tail = (tail + 1) & (JOBR_DEPTH - 1);
  89. smp_read_barrier_depends();
  90. } while (CIRC_CNT(head, tail, JOBR_DEPTH) >= 1 &&
  91. jrp->entinfo[tail].desc_addr_dma == 0);
  92. jrp->tail = tail;
  93. }
  94. spin_unlock(&jrp->outlock);
  95. /* Finally, execute user's callback */
  96. usercall(dev, userdesc, userstatus, userarg);
  97. }
  98. /* reenable / unmask IRQs */
  99. clrbits32(&jrp->rregs->rconfig_lo, JRCFG_IMSK);
  100. }
  101. /**
  102. * caam_jr_register() - Alloc a ring for someone to use as needed. Returns
  103. * an ordinal of the rings allocated, else returns -ENODEV if no rings
  104. * are available.
  105. * @ctrldev: points to the controller level dev (parent) that
  106. * owns rings available for use.
  107. * @dev: points to where a pointer to the newly allocated queue's
  108. * dev can be written to if successful.
  109. **/
  110. int caam_jr_register(struct device *ctrldev, struct device **rdev)
  111. {
  112. struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctrldev);
  113. struct caam_drv_private_jr *jrpriv = NULL;
  114. int ring;
  115. /* Lock, if free ring - assign, unlock */
  116. spin_lock(&ctrlpriv->jr_alloc_lock);
  117. for (ring = 0; ring < ctrlpriv->total_jobrs; ring++) {
  118. jrpriv = dev_get_drvdata(ctrlpriv->jrdev[ring]);
  119. if (jrpriv->assign == JOBR_UNASSIGNED) {
  120. jrpriv->assign = JOBR_ASSIGNED;
  121. *rdev = ctrlpriv->jrdev[ring];
  122. spin_unlock(&ctrlpriv->jr_alloc_lock);
  123. return ring;
  124. }
  125. }
  126. /* If assigned, write dev where caller needs it */
  127. spin_unlock(&ctrlpriv->jr_alloc_lock);
  128. *rdev = NULL;
  129. return -ENODEV;
  130. }
  131. EXPORT_SYMBOL(caam_jr_register);
  132. /**
  133. * caam_jr_deregister() - Deregister an API and release the queue.
  134. * Returns 0 if OK, -EBUSY if queue still contains pending entries
  135. * or unprocessed results at the time of the call
  136. * @dev - points to the dev that identifies the queue to
  137. * be released.
  138. **/
  139. int caam_jr_deregister(struct device *rdev)
  140. {
  141. struct caam_drv_private_jr *jrpriv = dev_get_drvdata(rdev);
  142. struct caam_drv_private *ctrlpriv;
  143. /* Get the owning controller's private space */
  144. ctrlpriv = dev_get_drvdata(jrpriv->parentdev);
  145. /*
  146. * Make sure ring empty before release
  147. */
  148. if (rd_reg32(&jrpriv->rregs->outring_used) ||
  149. (rd_reg32(&jrpriv->rregs->inpring_avail) != JOBR_DEPTH))
  150. return -EBUSY;
  151. /* Release ring */
  152. spin_lock(&ctrlpriv->jr_alloc_lock);
  153. jrpriv->assign = JOBR_UNASSIGNED;
  154. spin_unlock(&ctrlpriv->jr_alloc_lock);
  155. return 0;
  156. }
  157. EXPORT_SYMBOL(caam_jr_deregister);
  158. /**
  159. * caam_jr_enqueue() - Enqueue a job descriptor head. Returns 0 if OK,
  160. * -EBUSY if the queue is full, -EIO if it cannot map the caller's
  161. * descriptor.
  162. * @dev: device of the job ring to be used. This device should have
  163. * been assigned prior by caam_jr_register().
  164. * @desc: points to a job descriptor that execute our request. All
  165. * descriptors (and all referenced data) must be in a DMAable
  166. * region, and all data references must be physical addresses
  167. * accessible to CAAM (i.e. within a PAMU window granted
  168. * to it).
  169. * @cbk: pointer to a callback function to be invoked upon completion
  170. * of this request. This has the form:
  171. * callback(struct device *dev, u32 *desc, u32 stat, void *arg)
  172. * where:
  173. * @dev: contains the job ring device that processed this
  174. * response.
  175. * @desc: descriptor that initiated the request, same as
  176. * "desc" being argued to caam_jr_enqueue().
  177. * @status: untranslated status received from CAAM. See the
  178. * reference manual for a detailed description of
  179. * error meaning, or see the JRSTA definitions in the
  180. * register header file
  181. * @areq: optional pointer to an argument passed with the
  182. * original request
  183. * @areq: optional pointer to a user argument for use at callback
  184. * time.
  185. **/
  186. int caam_jr_enqueue(struct device *dev, u32 *desc,
  187. void (*cbk)(struct device *dev, u32 *desc,
  188. u32 status, void *areq),
  189. void *areq)
  190. {
  191. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  192. struct caam_jrentry_info *head_entry;
  193. int head, tail, desc_size;
  194. dma_addr_t desc_dma;
  195. desc_size = (*desc & HDR_JD_LENGTH_MASK) * sizeof(u32);
  196. desc_dma = dma_map_single(dev, desc, desc_size, DMA_TO_DEVICE);
  197. if (dma_mapping_error(dev, desc_dma)) {
  198. dev_err(dev, "caam_jr_enqueue(): can't map jobdesc\n");
  199. return -EIO;
  200. }
  201. spin_lock_bh(&jrp->inplock);
  202. head = jrp->head;
  203. tail = ACCESS_ONCE(jrp->tail);
  204. if (!rd_reg32(&jrp->rregs->inpring_avail) ||
  205. CIRC_SPACE(head, tail, JOBR_DEPTH) <= 0) {
  206. spin_unlock_bh(&jrp->inplock);
  207. dma_unmap_single(dev, desc_dma, desc_size, DMA_TO_DEVICE);
  208. return -EBUSY;
  209. }
  210. head_entry = &jrp->entinfo[head];
  211. head_entry->desc_addr_virt = desc;
  212. head_entry->desc_size = desc_size;
  213. head_entry->callbk = (void *)cbk;
  214. head_entry->cbkarg = areq;
  215. head_entry->desc_addr_dma = desc_dma;
  216. jrp->inpring[jrp->inp_ring_write_index] = desc_dma;
  217. smp_wmb();
  218. jrp->inp_ring_write_index = (jrp->inp_ring_write_index + 1) &
  219. (JOBR_DEPTH - 1);
  220. jrp->head = (head + 1) & (JOBR_DEPTH - 1);
  221. wr_reg32(&jrp->rregs->inpring_jobadd, 1);
  222. spin_unlock_bh(&jrp->inplock);
  223. return 0;
  224. }
  225. EXPORT_SYMBOL(caam_jr_enqueue);
  226. static int caam_reset_hw_jr(struct device *dev)
  227. {
  228. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  229. unsigned int timeout = 100000;
  230. /*
  231. * mask interrupts since we are going to poll
  232. * for reset completion status
  233. */
  234. setbits32(&jrp->rregs->rconfig_lo, JRCFG_IMSK);
  235. /* initiate flush (required prior to reset) */
  236. wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET);
  237. while (((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) ==
  238. JRINT_ERR_HALT_INPROGRESS) && --timeout)
  239. cpu_relax();
  240. if ((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) !=
  241. JRINT_ERR_HALT_COMPLETE || timeout == 0) {
  242. dev_err(dev, "failed to flush job ring %d\n", jrp->ridx);
  243. return -EIO;
  244. }
  245. /* initiate reset */
  246. timeout = 100000;
  247. wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET);
  248. while ((rd_reg32(&jrp->rregs->jrcommand) & JRCR_RESET) && --timeout)
  249. cpu_relax();
  250. if (timeout == 0) {
  251. dev_err(dev, "failed to reset job ring %d\n", jrp->ridx);
  252. return -EIO;
  253. }
  254. /* unmask interrupts */
  255. clrbits32(&jrp->rregs->rconfig_lo, JRCFG_IMSK);
  256. return 0;
  257. }
  258. /*
  259. * Init JobR independent of platform property detection
  260. */
  261. static int caam_jr_init(struct device *dev)
  262. {
  263. struct caam_drv_private_jr *jrp;
  264. dma_addr_t inpbusaddr, outbusaddr;
  265. int i, error;
  266. jrp = dev_get_drvdata(dev);
  267. tasklet_init(&jrp->irqtask, caam_jr_dequeue, (unsigned long)dev);
  268. /* Connect job ring interrupt handler. */
  269. error = request_irq(jrp->irq, caam_jr_interrupt, IRQF_SHARED,
  270. "caam-jobr", dev);
  271. if (error) {
  272. dev_err(dev, "can't connect JobR %d interrupt (%d)\n",
  273. jrp->ridx, jrp->irq);
  274. irq_dispose_mapping(jrp->irq);
  275. jrp->irq = 0;
  276. return -EINVAL;
  277. }
  278. error = caam_reset_hw_jr(dev);
  279. if (error)
  280. return error;
  281. jrp->inpring = dma_alloc_coherent(dev, sizeof(dma_addr_t) * JOBR_DEPTH,
  282. &inpbusaddr, GFP_KERNEL);
  283. jrp->outring = dma_alloc_coherent(dev, sizeof(struct jr_outentry) *
  284. JOBR_DEPTH, &outbusaddr, GFP_KERNEL);
  285. jrp->entinfo = kzalloc(sizeof(struct caam_jrentry_info) * JOBR_DEPTH,
  286. GFP_KERNEL);
  287. if ((jrp->inpring == NULL) || (jrp->outring == NULL) ||
  288. (jrp->entinfo == NULL)) {
  289. dev_err(dev, "can't allocate job rings for %d\n",
  290. jrp->ridx);
  291. return -ENOMEM;
  292. }
  293. for (i = 0; i < JOBR_DEPTH; i++)
  294. jrp->entinfo[i].desc_addr_dma = !0;
  295. /* Setup rings */
  296. jrp->inp_ring_write_index = 0;
  297. jrp->out_ring_read_index = 0;
  298. jrp->head = 0;
  299. jrp->tail = 0;
  300. wr_reg64(&jrp->rregs->inpring_base, inpbusaddr);
  301. wr_reg64(&jrp->rregs->outring_base, outbusaddr);
  302. wr_reg32(&jrp->rregs->inpring_size, JOBR_DEPTH);
  303. wr_reg32(&jrp->rregs->outring_size, JOBR_DEPTH);
  304. jrp->ringsize = JOBR_DEPTH;
  305. spin_lock_init(&jrp->inplock);
  306. spin_lock_init(&jrp->outlock);
  307. /* Select interrupt coalescing parameters */
  308. setbits32(&jrp->rregs->rconfig_lo, JOBR_INTC |
  309. (JOBR_INTC_COUNT_THLD << JRCFG_ICDCT_SHIFT) |
  310. (JOBR_INTC_TIME_THLD << JRCFG_ICTT_SHIFT));
  311. jrp->assign = JOBR_UNASSIGNED;
  312. return 0;
  313. }
  314. /*
  315. * Shutdown JobR independent of platform property code
  316. */
  317. int caam_jr_shutdown(struct device *dev)
  318. {
  319. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  320. dma_addr_t inpbusaddr, outbusaddr;
  321. int ret;
  322. ret = caam_reset_hw_jr(dev);
  323. tasklet_kill(&jrp->irqtask);
  324. /* Release interrupt */
  325. free_irq(jrp->irq, dev);
  326. /* Free rings */
  327. inpbusaddr = rd_reg64(&jrp->rregs->inpring_base);
  328. outbusaddr = rd_reg64(&jrp->rregs->outring_base);
  329. dma_free_coherent(dev, sizeof(dma_addr_t) * JOBR_DEPTH,
  330. jrp->inpring, inpbusaddr);
  331. dma_free_coherent(dev, sizeof(struct jr_outentry) * JOBR_DEPTH,
  332. jrp->outring, outbusaddr);
  333. kfree(jrp->entinfo);
  334. return ret;
  335. }
  336. /*
  337. * Probe routine for each detected JobR subsystem. It assumes that
  338. * property detection was picked up externally.
  339. */
  340. int caam_jr_probe(struct platform_device *pdev, struct device_node *np,
  341. int ring)
  342. {
  343. struct device *ctrldev, *jrdev;
  344. struct platform_device *jr_pdev;
  345. struct caam_drv_private *ctrlpriv;
  346. struct caam_drv_private_jr *jrpriv;
  347. u32 *jroffset;
  348. int error;
  349. ctrldev = &pdev->dev;
  350. ctrlpriv = dev_get_drvdata(ctrldev);
  351. jrpriv = kmalloc(sizeof(struct caam_drv_private_jr),
  352. GFP_KERNEL);
  353. if (jrpriv == NULL) {
  354. dev_err(ctrldev, "can't alloc private mem for job ring %d\n",
  355. ring);
  356. return -ENOMEM;
  357. }
  358. jrpriv->parentdev = ctrldev; /* point back to parent */
  359. jrpriv->ridx = ring; /* save ring identity relative to detection */
  360. /*
  361. * Derive a pointer to the detected JobRs regs
  362. * Driver has already iomapped the entire space, we just
  363. * need to add in the offset to this JobR. Don't know if I
  364. * like this long-term, but it'll run
  365. */
  366. jroffset = (u32 *)of_get_property(np, "reg", NULL);
  367. jrpriv->rregs = (struct caam_job_ring __iomem *)((void *)ctrlpriv->ctrl
  368. + *jroffset);
  369. /* Build a local dev for each detected queue */
  370. jr_pdev = of_platform_device_create(np, NULL, ctrldev);
  371. if (jr_pdev == NULL) {
  372. kfree(jrpriv);
  373. return -EINVAL;
  374. }
  375. jrdev = &jr_pdev->dev;
  376. dev_set_drvdata(jrdev, jrpriv);
  377. ctrlpriv->jrdev[ring] = jrdev;
  378. if (sizeof(dma_addr_t) == sizeof(u64))
  379. if (of_device_is_compatible(np, "fsl,sec-v5.0-job-ring"))
  380. dma_set_mask(jrdev, DMA_BIT_MASK(40));
  381. else
  382. dma_set_mask(jrdev, DMA_BIT_MASK(36));
  383. else
  384. dma_set_mask(jrdev, DMA_BIT_MASK(32));
  385. /* Identify the interrupt */
  386. jrpriv->irq = of_irq_to_resource(np, 0, NULL);
  387. /* Now do the platform independent part */
  388. error = caam_jr_init(jrdev); /* now turn on hardware */
  389. if (error) {
  390. kfree(jrpriv);
  391. return error;
  392. }
  393. return error;
  394. }