powernow-k8.c 33 KB

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  1. /*
  2. * (c) 2003-2012 Advanced Micro Devices, Inc.
  3. * Your use of this code is subject to the terms and conditions of the
  4. * GNU general public license version 2. See "COPYING" or
  5. * http://www.gnu.org/licenses/gpl.html
  6. *
  7. * Maintainer:
  8. * Andreas Herrmann <herrmann.der.user@googlemail.com>
  9. *
  10. * Based on the powernow-k7.c module written by Dave Jones.
  11. * (C) 2003 Dave Jones on behalf of SuSE Labs
  12. * (C) 2004 Dominik Brodowski <linux@brodo.de>
  13. * (C) 2004 Pavel Machek <pavel@ucw.cz>
  14. * Licensed under the terms of the GNU GPL License version 2.
  15. * Based upon datasheets & sample CPUs kindly provided by AMD.
  16. *
  17. * Valuable input gratefully received from Dave Jones, Pavel Machek,
  18. * Dominik Brodowski, Jacob Shin, and others.
  19. * Originally developed by Paul Devriendt.
  20. *
  21. * Processor information obtained from Chapter 9 (Power and Thermal
  22. * Management) of the "BIOS and Kernel Developer's Guide (BKDG) for
  23. * the AMD Athlon 64 and AMD Opteron Processors" and section "2.x
  24. * Power Management" in BKDGs for newer AMD CPU families.
  25. *
  26. * Tables for specific CPUs can be inferred from AMD's processor
  27. * power and thermal data sheets, (e.g. 30417.pdf, 30430.pdf, 43375.pdf)
  28. */
  29. #include <linux/kernel.h>
  30. #include <linux/smp.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/cpufreq.h>
  34. #include <linux/slab.h>
  35. #include <linux/string.h>
  36. #include <linux/cpumask.h>
  37. #include <linux/io.h>
  38. #include <linux/delay.h>
  39. #include <asm/msr.h>
  40. #include <asm/cpu_device_id.h>
  41. #include <linux/acpi.h>
  42. #include <linux/mutex.h>
  43. #include <acpi/processor.h>
  44. #define PFX "powernow-k8: "
  45. #define VERSION "version 2.20.00"
  46. #include "powernow-k8.h"
  47. /* serialize freq changes */
  48. static DEFINE_MUTEX(fidvid_mutex);
  49. static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data);
  50. static struct cpufreq_driver cpufreq_amd64_driver;
  51. #ifndef CONFIG_SMP
  52. static inline const struct cpumask *cpu_core_mask(int cpu)
  53. {
  54. return cpumask_of(0);
  55. }
  56. #endif
  57. /* Return a frequency in MHz, given an input fid */
  58. static u32 find_freq_from_fid(u32 fid)
  59. {
  60. return 800 + (fid * 100);
  61. }
  62. /* Return a frequency in KHz, given an input fid */
  63. static u32 find_khz_freq_from_fid(u32 fid)
  64. {
  65. return 1000 * find_freq_from_fid(fid);
  66. }
  67. /* Return the vco fid for an input fid
  68. *
  69. * Each "low" fid has corresponding "high" fid, and you can get to "low" fids
  70. * only from corresponding high fids. This returns "high" fid corresponding to
  71. * "low" one.
  72. */
  73. static u32 convert_fid_to_vco_fid(u32 fid)
  74. {
  75. if (fid < HI_FID_TABLE_BOTTOM)
  76. return 8 + (2 * fid);
  77. else
  78. return fid;
  79. }
  80. /*
  81. * Return 1 if the pending bit is set. Unless we just instructed the processor
  82. * to transition to a new state, seeing this bit set is really bad news.
  83. */
  84. static int pending_bit_stuck(void)
  85. {
  86. u32 lo, hi;
  87. rdmsr(MSR_FIDVID_STATUS, lo, hi);
  88. return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
  89. }
  90. /*
  91. * Update the global current fid / vid values from the status msr.
  92. * Returns 1 on error.
  93. */
  94. static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
  95. {
  96. u32 lo, hi;
  97. u32 i = 0;
  98. do {
  99. if (i++ > 10000) {
  100. pr_debug("detected change pending stuck\n");
  101. return 1;
  102. }
  103. rdmsr(MSR_FIDVID_STATUS, lo, hi);
  104. } while (lo & MSR_S_LO_CHANGE_PENDING);
  105. data->currvid = hi & MSR_S_HI_CURRENT_VID;
  106. data->currfid = lo & MSR_S_LO_CURRENT_FID;
  107. return 0;
  108. }
  109. /* the isochronous relief time */
  110. static void count_off_irt(struct powernow_k8_data *data)
  111. {
  112. udelay((1 << data->irt) * 10);
  113. return;
  114. }
  115. /* the voltage stabilization time */
  116. static void count_off_vst(struct powernow_k8_data *data)
  117. {
  118. udelay(data->vstable * VST_UNITS_20US);
  119. return;
  120. }
  121. /* need to init the control msr to a safe value (for each cpu) */
  122. static void fidvid_msr_init(void)
  123. {
  124. u32 lo, hi;
  125. u8 fid, vid;
  126. rdmsr(MSR_FIDVID_STATUS, lo, hi);
  127. vid = hi & MSR_S_HI_CURRENT_VID;
  128. fid = lo & MSR_S_LO_CURRENT_FID;
  129. lo = fid | (vid << MSR_C_LO_VID_SHIFT);
  130. hi = MSR_C_HI_STP_GNT_BENIGN;
  131. pr_debug("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi);
  132. wrmsr(MSR_FIDVID_CTL, lo, hi);
  133. }
  134. /* write the new fid value along with the other control fields to the msr */
  135. static int write_new_fid(struct powernow_k8_data *data, u32 fid)
  136. {
  137. u32 lo;
  138. u32 savevid = data->currvid;
  139. u32 i = 0;
  140. if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) {
  141. printk(KERN_ERR PFX "internal error - overflow on fid write\n");
  142. return 1;
  143. }
  144. lo = fid;
  145. lo |= (data->currvid << MSR_C_LO_VID_SHIFT);
  146. lo |= MSR_C_LO_INIT_FID_VID;
  147. pr_debug("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
  148. fid, lo, data->plllock * PLL_LOCK_CONVERSION);
  149. do {
  150. wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
  151. if (i++ > 100) {
  152. printk(KERN_ERR PFX
  153. "Hardware error - pending bit very stuck - "
  154. "no further pstate changes possible\n");
  155. return 1;
  156. }
  157. } while (query_current_values_with_pending_wait(data));
  158. count_off_irt(data);
  159. if (savevid != data->currvid) {
  160. printk(KERN_ERR PFX
  161. "vid change on fid trans, old 0x%x, new 0x%x\n",
  162. savevid, data->currvid);
  163. return 1;
  164. }
  165. if (fid != data->currfid) {
  166. printk(KERN_ERR PFX
  167. "fid trans failed, fid 0x%x, curr 0x%x\n", fid,
  168. data->currfid);
  169. return 1;
  170. }
  171. return 0;
  172. }
  173. /* Write a new vid to the hardware */
  174. static int write_new_vid(struct powernow_k8_data *data, u32 vid)
  175. {
  176. u32 lo;
  177. u32 savefid = data->currfid;
  178. int i = 0;
  179. if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) {
  180. printk(KERN_ERR PFX "internal error - overflow on vid write\n");
  181. return 1;
  182. }
  183. lo = data->currfid;
  184. lo |= (vid << MSR_C_LO_VID_SHIFT);
  185. lo |= MSR_C_LO_INIT_FID_VID;
  186. pr_debug("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
  187. vid, lo, STOP_GRANT_5NS);
  188. do {
  189. wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
  190. if (i++ > 100) {
  191. printk(KERN_ERR PFX "internal error - pending bit "
  192. "very stuck - no further pstate "
  193. "changes possible\n");
  194. return 1;
  195. }
  196. } while (query_current_values_with_pending_wait(data));
  197. if (savefid != data->currfid) {
  198. printk(KERN_ERR PFX "fid changed on vid trans, old "
  199. "0x%x new 0x%x\n",
  200. savefid, data->currfid);
  201. return 1;
  202. }
  203. if (vid != data->currvid) {
  204. printk(KERN_ERR PFX "vid trans failed, vid 0x%x, "
  205. "curr 0x%x\n",
  206. vid, data->currvid);
  207. return 1;
  208. }
  209. return 0;
  210. }
  211. /*
  212. * Reduce the vid by the max of step or reqvid.
  213. * Decreasing vid codes represent increasing voltages:
  214. * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
  215. */
  216. static int decrease_vid_code_by_step(struct powernow_k8_data *data,
  217. u32 reqvid, u32 step)
  218. {
  219. if ((data->currvid - reqvid) > step)
  220. reqvid = data->currvid - step;
  221. if (write_new_vid(data, reqvid))
  222. return 1;
  223. count_off_vst(data);
  224. return 0;
  225. }
  226. /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */
  227. static int transition_fid_vid(struct powernow_k8_data *data,
  228. u32 reqfid, u32 reqvid)
  229. {
  230. if (core_voltage_pre_transition(data, reqvid, reqfid))
  231. return 1;
  232. if (core_frequency_transition(data, reqfid))
  233. return 1;
  234. if (core_voltage_post_transition(data, reqvid))
  235. return 1;
  236. if (query_current_values_with_pending_wait(data))
  237. return 1;
  238. if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
  239. printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, "
  240. "curr 0x%x 0x%x\n",
  241. smp_processor_id(),
  242. reqfid, reqvid, data->currfid, data->currvid);
  243. return 1;
  244. }
  245. pr_debug("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n",
  246. smp_processor_id(), data->currfid, data->currvid);
  247. return 0;
  248. }
  249. /* Phase 1 - core voltage transition ... setup voltage */
  250. static int core_voltage_pre_transition(struct powernow_k8_data *data,
  251. u32 reqvid, u32 reqfid)
  252. {
  253. u32 rvosteps = data->rvo;
  254. u32 savefid = data->currfid;
  255. u32 maxvid, lo, rvomult = 1;
  256. pr_debug("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, "
  257. "reqvid 0x%x, rvo 0x%x\n",
  258. smp_processor_id(),
  259. data->currfid, data->currvid, reqvid, data->rvo);
  260. if ((savefid < LO_FID_TABLE_TOP) && (reqfid < LO_FID_TABLE_TOP))
  261. rvomult = 2;
  262. rvosteps *= rvomult;
  263. rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
  264. maxvid = 0x1f & (maxvid >> 16);
  265. pr_debug("ph1 maxvid=0x%x\n", maxvid);
  266. if (reqvid < maxvid) /* lower numbers are higher voltages */
  267. reqvid = maxvid;
  268. while (data->currvid > reqvid) {
  269. pr_debug("ph1: curr 0x%x, req vid 0x%x\n",
  270. data->currvid, reqvid);
  271. if (decrease_vid_code_by_step(data, reqvid, data->vidmvs))
  272. return 1;
  273. }
  274. while ((rvosteps > 0) &&
  275. ((rvomult * data->rvo + data->currvid) > reqvid)) {
  276. if (data->currvid == maxvid) {
  277. rvosteps = 0;
  278. } else {
  279. pr_debug("ph1: changing vid for rvo, req 0x%x\n",
  280. data->currvid - 1);
  281. if (decrease_vid_code_by_step(data, data->currvid-1, 1))
  282. return 1;
  283. rvosteps--;
  284. }
  285. }
  286. if (query_current_values_with_pending_wait(data))
  287. return 1;
  288. if (savefid != data->currfid) {
  289. printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n",
  290. data->currfid);
  291. return 1;
  292. }
  293. pr_debug("ph1 complete, currfid 0x%x, currvid 0x%x\n",
  294. data->currfid, data->currvid);
  295. return 0;
  296. }
  297. /* Phase 2 - core frequency transition */
  298. static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
  299. {
  300. u32 vcoreqfid, vcocurrfid, vcofiddiff;
  301. u32 fid_interval, savevid = data->currvid;
  302. if (data->currfid == reqfid) {
  303. printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n",
  304. data->currfid);
  305. return 0;
  306. }
  307. pr_debug("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, "
  308. "reqfid 0x%x\n",
  309. smp_processor_id(),
  310. data->currfid, data->currvid, reqfid);
  311. vcoreqfid = convert_fid_to_vco_fid(reqfid);
  312. vcocurrfid = convert_fid_to_vco_fid(data->currfid);
  313. vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
  314. : vcoreqfid - vcocurrfid;
  315. if ((reqfid <= LO_FID_TABLE_TOP) && (data->currfid <= LO_FID_TABLE_TOP))
  316. vcofiddiff = 0;
  317. while (vcofiddiff > 2) {
  318. (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2);
  319. if (reqfid > data->currfid) {
  320. if (data->currfid > LO_FID_TABLE_TOP) {
  321. if (write_new_fid(data,
  322. data->currfid + fid_interval))
  323. return 1;
  324. } else {
  325. if (write_new_fid
  326. (data,
  327. 2 + convert_fid_to_vco_fid(data->currfid)))
  328. return 1;
  329. }
  330. } else {
  331. if (write_new_fid(data, data->currfid - fid_interval))
  332. return 1;
  333. }
  334. vcocurrfid = convert_fid_to_vco_fid(data->currfid);
  335. vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
  336. : vcoreqfid - vcocurrfid;
  337. }
  338. if (write_new_fid(data, reqfid))
  339. return 1;
  340. if (query_current_values_with_pending_wait(data))
  341. return 1;
  342. if (data->currfid != reqfid) {
  343. printk(KERN_ERR PFX
  344. "ph2: mismatch, failed fid transition, "
  345. "curr 0x%x, req 0x%x\n",
  346. data->currfid, reqfid);
  347. return 1;
  348. }
  349. if (savevid != data->currvid) {
  350. printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n",
  351. savevid, data->currvid);
  352. return 1;
  353. }
  354. pr_debug("ph2 complete, currfid 0x%x, currvid 0x%x\n",
  355. data->currfid, data->currvid);
  356. return 0;
  357. }
  358. /* Phase 3 - core voltage transition flow ... jump to the final vid. */
  359. static int core_voltage_post_transition(struct powernow_k8_data *data,
  360. u32 reqvid)
  361. {
  362. u32 savefid = data->currfid;
  363. u32 savereqvid = reqvid;
  364. pr_debug("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n",
  365. smp_processor_id(),
  366. data->currfid, data->currvid);
  367. if (reqvid != data->currvid) {
  368. if (write_new_vid(data, reqvid))
  369. return 1;
  370. if (savefid != data->currfid) {
  371. printk(KERN_ERR PFX
  372. "ph3: bad fid change, save 0x%x, curr 0x%x\n",
  373. savefid, data->currfid);
  374. return 1;
  375. }
  376. if (data->currvid != reqvid) {
  377. printk(KERN_ERR PFX
  378. "ph3: failed vid transition\n, "
  379. "req 0x%x, curr 0x%x",
  380. reqvid, data->currvid);
  381. return 1;
  382. }
  383. }
  384. if (query_current_values_with_pending_wait(data))
  385. return 1;
  386. if (savereqvid != data->currvid) {
  387. pr_debug("ph3 failed, currvid 0x%x\n", data->currvid);
  388. return 1;
  389. }
  390. if (savefid != data->currfid) {
  391. pr_debug("ph3 failed, currfid changed 0x%x\n",
  392. data->currfid);
  393. return 1;
  394. }
  395. pr_debug("ph3 complete, currfid 0x%x, currvid 0x%x\n",
  396. data->currfid, data->currvid);
  397. return 0;
  398. }
  399. static const struct x86_cpu_id powernow_k8_ids[] = {
  400. /* IO based frequency switching */
  401. { X86_VENDOR_AMD, 0xf },
  402. {}
  403. };
  404. MODULE_DEVICE_TABLE(x86cpu, powernow_k8_ids);
  405. static void check_supported_cpu(void *_rc)
  406. {
  407. u32 eax, ebx, ecx, edx;
  408. int *rc = _rc;
  409. *rc = -ENODEV;
  410. eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
  411. if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) {
  412. if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
  413. ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) {
  414. printk(KERN_INFO PFX
  415. "Processor cpuid %x not supported\n", eax);
  416. return;
  417. }
  418. eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
  419. if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
  420. printk(KERN_INFO PFX
  421. "No frequency change capabilities detected\n");
  422. return;
  423. }
  424. cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
  425. if ((edx & P_STATE_TRANSITION_CAPABLE)
  426. != P_STATE_TRANSITION_CAPABLE) {
  427. printk(KERN_INFO PFX
  428. "Power state transitions not supported\n");
  429. return;
  430. }
  431. *rc = 0;
  432. }
  433. }
  434. static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst,
  435. u8 maxvid)
  436. {
  437. unsigned int j;
  438. u8 lastfid = 0xff;
  439. for (j = 0; j < data->numps; j++) {
  440. if (pst[j].vid > LEAST_VID) {
  441. printk(KERN_ERR FW_BUG PFX "vid %d invalid : 0x%x\n",
  442. j, pst[j].vid);
  443. return -EINVAL;
  444. }
  445. if (pst[j].vid < data->rvo) {
  446. /* vid + rvo >= 0 */
  447. printk(KERN_ERR FW_BUG PFX "0 vid exceeded with pstate"
  448. " %d\n", j);
  449. return -ENODEV;
  450. }
  451. if (pst[j].vid < maxvid + data->rvo) {
  452. /* vid + rvo >= maxvid */
  453. printk(KERN_ERR FW_BUG PFX "maxvid exceeded with pstate"
  454. " %d\n", j);
  455. return -ENODEV;
  456. }
  457. if (pst[j].fid > MAX_FID) {
  458. printk(KERN_ERR FW_BUG PFX "maxfid exceeded with pstate"
  459. " %d\n", j);
  460. return -ENODEV;
  461. }
  462. if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) {
  463. /* Only first fid is allowed to be in "low" range */
  464. printk(KERN_ERR FW_BUG PFX "two low fids - %d : "
  465. "0x%x\n", j, pst[j].fid);
  466. return -EINVAL;
  467. }
  468. if (pst[j].fid < lastfid)
  469. lastfid = pst[j].fid;
  470. }
  471. if (lastfid & 1) {
  472. printk(KERN_ERR FW_BUG PFX "lastfid invalid\n");
  473. return -EINVAL;
  474. }
  475. if (lastfid > LO_FID_TABLE_TOP)
  476. printk(KERN_INFO FW_BUG PFX
  477. "first fid not from lo freq table\n");
  478. return 0;
  479. }
  480. static void invalidate_entry(struct cpufreq_frequency_table *powernow_table,
  481. unsigned int entry)
  482. {
  483. powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
  484. }
  485. static void print_basics(struct powernow_k8_data *data)
  486. {
  487. int j;
  488. for (j = 0; j < data->numps; j++) {
  489. if (data->powernow_table[j].frequency !=
  490. CPUFREQ_ENTRY_INVALID) {
  491. printk(KERN_INFO PFX
  492. "fid 0x%x (%d MHz), vid 0x%x\n",
  493. data->powernow_table[j].index & 0xff,
  494. data->powernow_table[j].frequency/1000,
  495. data->powernow_table[j].index >> 8);
  496. }
  497. }
  498. if (data->batps)
  499. printk(KERN_INFO PFX "Only %d pstates on battery\n",
  500. data->batps);
  501. }
  502. static int fill_powernow_table(struct powernow_k8_data *data,
  503. struct pst_s *pst, u8 maxvid)
  504. {
  505. struct cpufreq_frequency_table *powernow_table;
  506. unsigned int j;
  507. if (data->batps) {
  508. /* use ACPI support to get full speed on mains power */
  509. printk(KERN_WARNING PFX
  510. "Only %d pstates usable (use ACPI driver for full "
  511. "range\n", data->batps);
  512. data->numps = data->batps;
  513. }
  514. for (j = 1; j < data->numps; j++) {
  515. if (pst[j-1].fid >= pst[j].fid) {
  516. printk(KERN_ERR PFX "PST out of sequence\n");
  517. return -EINVAL;
  518. }
  519. }
  520. if (data->numps < 2) {
  521. printk(KERN_ERR PFX "no p states to transition\n");
  522. return -ENODEV;
  523. }
  524. if (check_pst_table(data, pst, maxvid))
  525. return -EINVAL;
  526. powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
  527. * (data->numps + 1)), GFP_KERNEL);
  528. if (!powernow_table) {
  529. printk(KERN_ERR PFX "powernow_table memory alloc failure\n");
  530. return -ENOMEM;
  531. }
  532. for (j = 0; j < data->numps; j++) {
  533. int freq;
  534. powernow_table[j].index = pst[j].fid; /* lower 8 bits */
  535. powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */
  536. freq = find_khz_freq_from_fid(pst[j].fid);
  537. powernow_table[j].frequency = freq;
  538. }
  539. powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
  540. powernow_table[data->numps].index = 0;
  541. if (query_current_values_with_pending_wait(data)) {
  542. kfree(powernow_table);
  543. return -EIO;
  544. }
  545. pr_debug("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid);
  546. data->powernow_table = powernow_table;
  547. if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu)
  548. print_basics(data);
  549. for (j = 0; j < data->numps; j++)
  550. if ((pst[j].fid == data->currfid) &&
  551. (pst[j].vid == data->currvid))
  552. return 0;
  553. pr_debug("currfid/vid do not match PST, ignoring\n");
  554. return 0;
  555. }
  556. /* Find and validate the PSB/PST table in BIOS. */
  557. static int find_psb_table(struct powernow_k8_data *data)
  558. {
  559. struct psb_s *psb;
  560. unsigned int i;
  561. u32 mvs;
  562. u8 maxvid;
  563. u32 cpst = 0;
  564. u32 thiscpuid;
  565. for (i = 0xc0000; i < 0xffff0; i += 0x10) {
  566. /* Scan BIOS looking for the signature. */
  567. /* It can not be at ffff0 - it is too big. */
  568. psb = phys_to_virt(i);
  569. if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0)
  570. continue;
  571. pr_debug("found PSB header at 0x%p\n", psb);
  572. pr_debug("table vers: 0x%x\n", psb->tableversion);
  573. if (psb->tableversion != PSB_VERSION_1_4) {
  574. printk(KERN_ERR FW_BUG PFX "PSB table is not v1.4\n");
  575. return -ENODEV;
  576. }
  577. pr_debug("flags: 0x%x\n", psb->flags1);
  578. if (psb->flags1) {
  579. printk(KERN_ERR FW_BUG PFX "unknown flags\n");
  580. return -ENODEV;
  581. }
  582. data->vstable = psb->vstable;
  583. pr_debug("voltage stabilization time: %d(*20us)\n",
  584. data->vstable);
  585. pr_debug("flags2: 0x%x\n", psb->flags2);
  586. data->rvo = psb->flags2 & 3;
  587. data->irt = ((psb->flags2) >> 2) & 3;
  588. mvs = ((psb->flags2) >> 4) & 3;
  589. data->vidmvs = 1 << mvs;
  590. data->batps = ((psb->flags2) >> 6) & 3;
  591. pr_debug("ramp voltage offset: %d\n", data->rvo);
  592. pr_debug("isochronous relief time: %d\n", data->irt);
  593. pr_debug("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs);
  594. pr_debug("numpst: 0x%x\n", psb->num_tables);
  595. cpst = psb->num_tables;
  596. if ((psb->cpuid == 0x00000fc0) ||
  597. (psb->cpuid == 0x00000fe0)) {
  598. thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
  599. if ((thiscpuid == 0x00000fc0) ||
  600. (thiscpuid == 0x00000fe0))
  601. cpst = 1;
  602. }
  603. if (cpst != 1) {
  604. printk(KERN_ERR FW_BUG PFX "numpst must be 1\n");
  605. return -ENODEV;
  606. }
  607. data->plllock = psb->plllocktime;
  608. pr_debug("plllocktime: 0x%x (units 1us)\n", psb->plllocktime);
  609. pr_debug("maxfid: 0x%x\n", psb->maxfid);
  610. pr_debug("maxvid: 0x%x\n", psb->maxvid);
  611. maxvid = psb->maxvid;
  612. data->numps = psb->numps;
  613. pr_debug("numpstates: 0x%x\n", data->numps);
  614. return fill_powernow_table(data,
  615. (struct pst_s *)(psb+1), maxvid);
  616. }
  617. /*
  618. * If you see this message, complain to BIOS manufacturer. If
  619. * he tells you "we do not support Linux" or some similar
  620. * nonsense, remember that Windows 2000 uses the same legacy
  621. * mechanism that the old Linux PSB driver uses. Tell them it
  622. * is broken with Windows 2000.
  623. *
  624. * The reference to the AMD documentation is chapter 9 in the
  625. * BIOS and Kernel Developer's Guide, which is available on
  626. * www.amd.com
  627. */
  628. printk(KERN_ERR FW_BUG PFX "No PSB or ACPI _PSS objects\n");
  629. printk(KERN_ERR PFX "Make sure that your BIOS is up to date"
  630. " and Cool'N'Quiet support is enabled in BIOS setup\n");
  631. return -ENODEV;
  632. }
  633. static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data,
  634. unsigned int index)
  635. {
  636. u64 control;
  637. if (!data->acpi_data.state_count)
  638. return;
  639. control = data->acpi_data.states[index].control;
  640. data->irt = (control >> IRT_SHIFT) & IRT_MASK;
  641. data->rvo = (control >> RVO_SHIFT) & RVO_MASK;
  642. data->exttype = (control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
  643. data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK;
  644. data->vidmvs = 1 << ((control >> MVS_SHIFT) & MVS_MASK);
  645. data->vstable = (control >> VST_SHIFT) & VST_MASK;
  646. }
  647. static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
  648. {
  649. struct cpufreq_frequency_table *powernow_table;
  650. int ret_val = -ENODEV;
  651. u64 control, status;
  652. if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
  653. pr_debug("register performance failed: bad ACPI data\n");
  654. return -EIO;
  655. }
  656. /* verify the data contained in the ACPI structures */
  657. if (data->acpi_data.state_count <= 1) {
  658. pr_debug("No ACPI P-States\n");
  659. goto err_out;
  660. }
  661. control = data->acpi_data.control_register.space_id;
  662. status = data->acpi_data.status_register.space_id;
  663. if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
  664. (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
  665. pr_debug("Invalid control/status registers (%llx - %llx)\n",
  666. control, status);
  667. goto err_out;
  668. }
  669. /* fill in data->powernow_table */
  670. powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
  671. * (data->acpi_data.state_count + 1)), GFP_KERNEL);
  672. if (!powernow_table) {
  673. pr_debug("powernow_table memory alloc failure\n");
  674. goto err_out;
  675. }
  676. /* fill in data */
  677. data->numps = data->acpi_data.state_count;
  678. powernow_k8_acpi_pst_values(data, 0);
  679. ret_val = fill_powernow_table_fidvid(data, powernow_table);
  680. if (ret_val)
  681. goto err_out_mem;
  682. powernow_table[data->acpi_data.state_count].frequency =
  683. CPUFREQ_TABLE_END;
  684. powernow_table[data->acpi_data.state_count].index = 0;
  685. data->powernow_table = powernow_table;
  686. if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu)
  687. print_basics(data);
  688. /* notify BIOS that we exist */
  689. acpi_processor_notify_smm(THIS_MODULE);
  690. if (!zalloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) {
  691. printk(KERN_ERR PFX
  692. "unable to alloc powernow_k8_data cpumask\n");
  693. ret_val = -ENOMEM;
  694. goto err_out_mem;
  695. }
  696. return 0;
  697. err_out_mem:
  698. kfree(powernow_table);
  699. err_out:
  700. acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
  701. /* data->acpi_data.state_count informs us at ->exit()
  702. * whether ACPI was used */
  703. data->acpi_data.state_count = 0;
  704. return ret_val;
  705. }
  706. static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
  707. struct cpufreq_frequency_table *powernow_table)
  708. {
  709. int i;
  710. for (i = 0; i < data->acpi_data.state_count; i++) {
  711. u32 fid;
  712. u32 vid;
  713. u32 freq, index;
  714. u64 status, control;
  715. if (data->exttype) {
  716. status = data->acpi_data.states[i].status;
  717. fid = status & EXT_FID_MASK;
  718. vid = (status >> VID_SHIFT) & EXT_VID_MASK;
  719. } else {
  720. control = data->acpi_data.states[i].control;
  721. fid = control & FID_MASK;
  722. vid = (control >> VID_SHIFT) & VID_MASK;
  723. }
  724. pr_debug(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
  725. index = fid | (vid<<8);
  726. powernow_table[i].index = index;
  727. freq = find_khz_freq_from_fid(fid);
  728. powernow_table[i].frequency = freq;
  729. /* verify frequency is OK */
  730. if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) {
  731. pr_debug("invalid freq %u kHz, ignoring\n", freq);
  732. invalidate_entry(powernow_table, i);
  733. continue;
  734. }
  735. /* verify voltage is OK -
  736. * BIOSs are using "off" to indicate invalid */
  737. if (vid == VID_OFF) {
  738. pr_debug("invalid vid %u, ignoring\n", vid);
  739. invalidate_entry(powernow_table, i);
  740. continue;
  741. }
  742. if (freq != (data->acpi_data.states[i].core_frequency * 1000)) {
  743. printk(KERN_INFO PFX "invalid freq entries "
  744. "%u kHz vs. %u kHz\n", freq,
  745. (unsigned int)
  746. (data->acpi_data.states[i].core_frequency
  747. * 1000));
  748. invalidate_entry(powernow_table, i);
  749. continue;
  750. }
  751. }
  752. return 0;
  753. }
  754. static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
  755. {
  756. if (data->acpi_data.state_count)
  757. acpi_processor_unregister_performance(&data->acpi_data,
  758. data->cpu);
  759. free_cpumask_var(data->acpi_data.shared_cpu_map);
  760. }
  761. static int get_transition_latency(struct powernow_k8_data *data)
  762. {
  763. int max_latency = 0;
  764. int i;
  765. for (i = 0; i < data->acpi_data.state_count; i++) {
  766. int cur_latency = data->acpi_data.states[i].transition_latency
  767. + data->acpi_data.states[i].bus_master_latency;
  768. if (cur_latency > max_latency)
  769. max_latency = cur_latency;
  770. }
  771. if (max_latency == 0) {
  772. pr_err(FW_WARN PFX "Invalid zero transition latency\n");
  773. max_latency = 1;
  774. }
  775. /* value in usecs, needs to be in nanoseconds */
  776. return 1000 * max_latency;
  777. }
  778. /* Take a frequency, and issue the fid/vid transition command */
  779. static int transition_frequency_fidvid(struct powernow_k8_data *data,
  780. unsigned int index)
  781. {
  782. u32 fid = 0;
  783. u32 vid = 0;
  784. int res, i;
  785. struct cpufreq_freqs freqs;
  786. pr_debug("cpu %d transition to index %u\n", smp_processor_id(), index);
  787. /* fid/vid correctness check for k8 */
  788. /* fid are the lower 8 bits of the index we stored into
  789. * the cpufreq frequency table in find_psb_table, vid
  790. * are the upper 8 bits.
  791. */
  792. fid = data->powernow_table[index].index & 0xFF;
  793. vid = (data->powernow_table[index].index & 0xFF00) >> 8;
  794. pr_debug("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
  795. if (query_current_values_with_pending_wait(data))
  796. return 1;
  797. if ((data->currvid == vid) && (data->currfid == fid)) {
  798. pr_debug("target matches current values (fid 0x%x, vid 0x%x)\n",
  799. fid, vid);
  800. return 0;
  801. }
  802. pr_debug("cpu %d, changing to fid 0x%x, vid 0x%x\n",
  803. smp_processor_id(), fid, vid);
  804. freqs.old = find_khz_freq_from_fid(data->currfid);
  805. freqs.new = find_khz_freq_from_fid(fid);
  806. for_each_cpu(i, data->available_cores) {
  807. freqs.cpu = i;
  808. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  809. }
  810. res = transition_fid_vid(data, fid, vid);
  811. if (res)
  812. return res;
  813. freqs.new = find_khz_freq_from_fid(data->currfid);
  814. for_each_cpu(i, data->available_cores) {
  815. freqs.cpu = i;
  816. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  817. }
  818. return res;
  819. }
  820. struct powernowk8_target_arg {
  821. struct cpufreq_policy *pol;
  822. unsigned targfreq;
  823. unsigned relation;
  824. };
  825. static long powernowk8_target_fn(void *arg)
  826. {
  827. struct powernowk8_target_arg *pta = arg;
  828. struct cpufreq_policy *pol = pta->pol;
  829. unsigned targfreq = pta->targfreq;
  830. unsigned relation = pta->relation;
  831. struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
  832. u32 checkfid;
  833. u32 checkvid;
  834. unsigned int newstate;
  835. int ret;
  836. if (!data)
  837. return -EINVAL;
  838. checkfid = data->currfid;
  839. checkvid = data->currvid;
  840. if (pending_bit_stuck()) {
  841. printk(KERN_ERR PFX "failing targ, change pending bit set\n");
  842. return -EIO;
  843. }
  844. pr_debug("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n",
  845. pol->cpu, targfreq, pol->min, pol->max, relation);
  846. if (query_current_values_with_pending_wait(data))
  847. return -EIO;
  848. pr_debug("targ: curr fid 0x%x, vid 0x%x\n",
  849. data->currfid, data->currvid);
  850. if ((checkvid != data->currvid) ||
  851. (checkfid != data->currfid)) {
  852. pr_info(PFX
  853. "error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
  854. checkfid, data->currfid,
  855. checkvid, data->currvid);
  856. }
  857. if (cpufreq_frequency_table_target(pol, data->powernow_table,
  858. targfreq, relation, &newstate))
  859. return -EIO;
  860. mutex_lock(&fidvid_mutex);
  861. powernow_k8_acpi_pst_values(data, newstate);
  862. ret = transition_frequency_fidvid(data, newstate);
  863. if (ret) {
  864. printk(KERN_ERR PFX "transition frequency failed\n");
  865. mutex_unlock(&fidvid_mutex);
  866. return 1;
  867. }
  868. mutex_unlock(&fidvid_mutex);
  869. pol->cur = find_khz_freq_from_fid(data->currfid);
  870. return 0;
  871. }
  872. /* Driver entry point to switch to the target frequency */
  873. static int powernowk8_target(struct cpufreq_policy *pol,
  874. unsigned targfreq, unsigned relation)
  875. {
  876. struct powernowk8_target_arg pta = { .pol = pol, .targfreq = targfreq,
  877. .relation = relation };
  878. return work_on_cpu(pol->cpu, powernowk8_target_fn, &pta);
  879. }
  880. /* Driver entry point to verify the policy and range of frequencies */
  881. static int powernowk8_verify(struct cpufreq_policy *pol)
  882. {
  883. struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
  884. if (!data)
  885. return -EINVAL;
  886. return cpufreq_frequency_table_verify(pol, data->powernow_table);
  887. }
  888. struct init_on_cpu {
  889. struct powernow_k8_data *data;
  890. int rc;
  891. };
  892. static void __cpuinit powernowk8_cpu_init_on_cpu(void *_init_on_cpu)
  893. {
  894. struct init_on_cpu *init_on_cpu = _init_on_cpu;
  895. if (pending_bit_stuck()) {
  896. printk(KERN_ERR PFX "failing init, change pending bit set\n");
  897. init_on_cpu->rc = -ENODEV;
  898. return;
  899. }
  900. if (query_current_values_with_pending_wait(init_on_cpu->data)) {
  901. init_on_cpu->rc = -ENODEV;
  902. return;
  903. }
  904. fidvid_msr_init();
  905. init_on_cpu->rc = 0;
  906. }
  907. static const char missing_pss_msg[] =
  908. KERN_ERR
  909. FW_BUG PFX "No compatible ACPI _PSS objects found.\n"
  910. FW_BUG PFX "First, make sure Cool'N'Quiet is enabled in the BIOS.\n"
  911. FW_BUG PFX "If that doesn't help, try upgrading your BIOS.\n";
  912. /* per CPU init entry point to the driver */
  913. static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
  914. {
  915. struct powernow_k8_data *data;
  916. struct init_on_cpu init_on_cpu;
  917. int rc;
  918. if (!cpu_online(pol->cpu))
  919. return -ENODEV;
  920. smp_call_function_single(pol->cpu, check_supported_cpu, &rc, 1);
  921. if (rc)
  922. return -ENODEV;
  923. data = kzalloc(sizeof(struct powernow_k8_data), GFP_KERNEL);
  924. if (!data) {
  925. printk(KERN_ERR PFX "unable to alloc powernow_k8_data");
  926. return -ENOMEM;
  927. }
  928. data->cpu = pol->cpu;
  929. if (powernow_k8_cpu_init_acpi(data)) {
  930. /*
  931. * Use the PSB BIOS structure. This is only available on
  932. * an UP version, and is deprecated by AMD.
  933. */
  934. if (num_online_cpus() != 1) {
  935. printk_once(missing_pss_msg);
  936. goto err_out;
  937. }
  938. if (pol->cpu != 0) {
  939. printk(KERN_ERR FW_BUG PFX "No ACPI _PSS objects for "
  940. "CPU other than CPU0. Complain to your BIOS "
  941. "vendor.\n");
  942. goto err_out;
  943. }
  944. rc = find_psb_table(data);
  945. if (rc)
  946. goto err_out;
  947. /* Take a crude guess here.
  948. * That guess was in microseconds, so multiply with 1000 */
  949. pol->cpuinfo.transition_latency = (
  950. ((data->rvo + 8) * data->vstable * VST_UNITS_20US) +
  951. ((1 << data->irt) * 30)) * 1000;
  952. } else /* ACPI _PSS objects available */
  953. pol->cpuinfo.transition_latency = get_transition_latency(data);
  954. /* only run on specific CPU from here on */
  955. init_on_cpu.data = data;
  956. smp_call_function_single(data->cpu, powernowk8_cpu_init_on_cpu,
  957. &init_on_cpu, 1);
  958. rc = init_on_cpu.rc;
  959. if (rc != 0)
  960. goto err_out_exit_acpi;
  961. cpumask_copy(pol->cpus, cpu_core_mask(pol->cpu));
  962. data->available_cores = pol->cpus;
  963. pol->cur = find_khz_freq_from_fid(data->currfid);
  964. pr_debug("policy current frequency %d kHz\n", pol->cur);
  965. /* min/max the cpu is capable of */
  966. if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) {
  967. printk(KERN_ERR FW_BUG PFX "invalid powernow_table\n");
  968. powernow_k8_cpu_exit_acpi(data);
  969. kfree(data->powernow_table);
  970. kfree(data);
  971. return -EINVAL;
  972. }
  973. cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
  974. pr_debug("cpu_init done, current fid 0x%x, vid 0x%x\n",
  975. data->currfid, data->currvid);
  976. per_cpu(powernow_data, pol->cpu) = data;
  977. return 0;
  978. err_out_exit_acpi:
  979. powernow_k8_cpu_exit_acpi(data);
  980. err_out:
  981. kfree(data);
  982. return -ENODEV;
  983. }
  984. static int powernowk8_cpu_exit(struct cpufreq_policy *pol)
  985. {
  986. struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
  987. if (!data)
  988. return -EINVAL;
  989. powernow_k8_cpu_exit_acpi(data);
  990. cpufreq_frequency_table_put_attr(pol->cpu);
  991. kfree(data->powernow_table);
  992. kfree(data);
  993. per_cpu(powernow_data, pol->cpu) = NULL;
  994. return 0;
  995. }
  996. static void query_values_on_cpu(void *_err)
  997. {
  998. int *err = _err;
  999. struct powernow_k8_data *data = __this_cpu_read(powernow_data);
  1000. *err = query_current_values_with_pending_wait(data);
  1001. }
  1002. static unsigned int powernowk8_get(unsigned int cpu)
  1003. {
  1004. struct powernow_k8_data *data = per_cpu(powernow_data, cpu);
  1005. unsigned int khz = 0;
  1006. int err;
  1007. if (!data)
  1008. return 0;
  1009. smp_call_function_single(cpu, query_values_on_cpu, &err, true);
  1010. if (err)
  1011. goto out;
  1012. khz = find_khz_freq_from_fid(data->currfid);
  1013. out:
  1014. return khz;
  1015. }
  1016. static struct freq_attr *powernow_k8_attr[] = {
  1017. &cpufreq_freq_attr_scaling_available_freqs,
  1018. NULL,
  1019. };
  1020. static struct cpufreq_driver cpufreq_amd64_driver = {
  1021. .verify = powernowk8_verify,
  1022. .target = powernowk8_target,
  1023. .bios_limit = acpi_processor_get_bios_limit,
  1024. .init = powernowk8_cpu_init,
  1025. .exit = powernowk8_cpu_exit,
  1026. .get = powernowk8_get,
  1027. .name = "powernow-k8",
  1028. .owner = THIS_MODULE,
  1029. .attr = powernow_k8_attr,
  1030. };
  1031. static void __request_acpi_cpufreq(void)
  1032. {
  1033. const char *cur_drv, *drv = "acpi-cpufreq";
  1034. cur_drv = cpufreq_get_current_driver();
  1035. if (!cur_drv)
  1036. goto request;
  1037. if (strncmp(cur_drv, drv, min_t(size_t, strlen(cur_drv), strlen(drv))))
  1038. pr_warn(PFX "WTF driver: %s\n", cur_drv);
  1039. return;
  1040. request:
  1041. pr_warn(PFX "This CPU is not supported anymore, using acpi-cpufreq instead.\n");
  1042. request_module(drv);
  1043. }
  1044. /* driver entry point for init */
  1045. static int __cpuinit powernowk8_init(void)
  1046. {
  1047. unsigned int i, supported_cpus = 0;
  1048. int ret;
  1049. if (static_cpu_has(X86_FEATURE_HW_PSTATE)) {
  1050. __request_acpi_cpufreq();
  1051. return -ENODEV;
  1052. }
  1053. if (!x86_match_cpu(powernow_k8_ids))
  1054. return -ENODEV;
  1055. get_online_cpus();
  1056. for_each_online_cpu(i) {
  1057. smp_call_function_single(i, check_supported_cpu, &ret, 1);
  1058. if (!ret)
  1059. supported_cpus++;
  1060. }
  1061. if (supported_cpus != num_online_cpus()) {
  1062. put_online_cpus();
  1063. return -ENODEV;
  1064. }
  1065. put_online_cpus();
  1066. ret = cpufreq_register_driver(&cpufreq_amd64_driver);
  1067. if (ret)
  1068. return ret;
  1069. pr_info(PFX "Found %d %s (%d cpu cores) (" VERSION ")\n",
  1070. num_online_nodes(), boot_cpu_data.x86_model_id, supported_cpus);
  1071. return ret;
  1072. }
  1073. /* driver entry point for term */
  1074. static void __exit powernowk8_exit(void)
  1075. {
  1076. pr_debug("exit\n");
  1077. cpufreq_unregister_driver(&cpufreq_amd64_driver);
  1078. }
  1079. MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and "
  1080. "Mark Langsdorf <mark.langsdorf@amd.com>");
  1081. MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
  1082. MODULE_LICENSE("GPL");
  1083. late_initcall(powernowk8_init);
  1084. module_exit(powernowk8_exit);