clk-nomadik.c 1.5 KB

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  1. #include <linux/clk.h>
  2. #include <linux/clkdev.h>
  3. #include <linux/err.h>
  4. #include <linux/io.h>
  5. #include <linux/clk-provider.h>
  6. /*
  7. * The Nomadik clock tree is described in the STN8815A12 DB V4.2
  8. * reference manual for the chip, page 94 ff.
  9. */
  10. void __init nomadik_clk_init(void)
  11. {
  12. struct clk *clk;
  13. clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
  14. clk_register_clkdev(clk, "apb_pclk", NULL);
  15. clk_register_clkdev(clk, NULL, "gpio.0");
  16. clk_register_clkdev(clk, NULL, "gpio.1");
  17. clk_register_clkdev(clk, NULL, "gpio.2");
  18. clk_register_clkdev(clk, NULL, "gpio.3");
  19. clk_register_clkdev(clk, NULL, "rng");
  20. clk_register_clkdev(clk, NULL, "fsmc-nand");
  21. /*
  22. * The 2.4 MHz TIMCLK reference clock is active at boot time, this is
  23. * actually the MXTALCLK @19.2 MHz divided by 8. This clock is used
  24. * by the timers and watchdog. See page 105 ff.
  25. */
  26. clk = clk_register_fixed_rate(NULL, "TIMCLK", NULL, CLK_IS_ROOT,
  27. 2400000);
  28. clk_register_clkdev(clk, NULL, "mtu0");
  29. clk_register_clkdev(clk, NULL, "mtu1");
  30. /*
  31. * At boot time, PLL2 is set to generate a set of fixed clocks,
  32. * one of them is CLK48, the 48 MHz clock, routed to the UART, MMC/SD
  33. * I2C, IrDA, USB and SSP blocks.
  34. */
  35. clk = clk_register_fixed_rate(NULL, "CLK48", NULL, CLK_IS_ROOT,
  36. 48000000);
  37. clk_register_clkdev(clk, NULL, "uart0");
  38. clk_register_clkdev(clk, NULL, "uart1");
  39. clk_register_clkdev(clk, NULL, "mmci");
  40. clk_register_clkdev(clk, NULL, "ssp");
  41. clk_register_clkdev(clk, NULL, "nmk-i2c.0");
  42. clk_register_clkdev(clk, NULL, "nmk-i2c.1");
  43. }