tlb_uv.c 55 KB

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  1. /*
  2. * SGI UltraViolet TLB flush routines.
  3. *
  4. * (c) 2008-2012 Cliff Wickman <cpw@sgi.com>, SGI.
  5. *
  6. * This code is released under the GNU General Public License version 2 or
  7. * later.
  8. */
  9. #include <linux/seq_file.h>
  10. #include <linux/proc_fs.h>
  11. #include <linux/debugfs.h>
  12. #include <linux/kernel.h>
  13. #include <linux/slab.h>
  14. #include <linux/delay.h>
  15. #include <asm/mmu_context.h>
  16. #include <asm/uv/uv.h>
  17. #include <asm/uv/uv_mmrs.h>
  18. #include <asm/uv/uv_hub.h>
  19. #include <asm/uv/uv_bau.h>
  20. #include <asm/apic.h>
  21. #include <asm/idle.h>
  22. #include <asm/tsc.h>
  23. #include <asm/irq_vectors.h>
  24. #include <asm/timer.h>
  25. /* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
  26. static int timeout_base_ns[] = {
  27. 20,
  28. 160,
  29. 1280,
  30. 10240,
  31. 81920,
  32. 655360,
  33. 5242880,
  34. 167772160
  35. };
  36. static int timeout_us;
  37. static int nobau;
  38. static int nobau_perm;
  39. static cycles_t congested_cycles;
  40. /* tunables: */
  41. static int max_concurr = MAX_BAU_CONCURRENT;
  42. static int max_concurr_const = MAX_BAU_CONCURRENT;
  43. static int plugged_delay = PLUGGED_DELAY;
  44. static int plugsb4reset = PLUGSB4RESET;
  45. static int giveup_limit = GIVEUP_LIMIT;
  46. static int timeoutsb4reset = TIMEOUTSB4RESET;
  47. static int ipi_reset_limit = IPI_RESET_LIMIT;
  48. static int complete_threshold = COMPLETE_THRESHOLD;
  49. static int congested_respns_us = CONGESTED_RESPONSE_US;
  50. static int congested_reps = CONGESTED_REPS;
  51. static int disabled_period = DISABLED_PERIOD;
  52. static struct tunables tunables[] = {
  53. {&max_concurr, MAX_BAU_CONCURRENT}, /* must be [0] */
  54. {&plugged_delay, PLUGGED_DELAY},
  55. {&plugsb4reset, PLUGSB4RESET},
  56. {&timeoutsb4reset, TIMEOUTSB4RESET},
  57. {&ipi_reset_limit, IPI_RESET_LIMIT},
  58. {&complete_threshold, COMPLETE_THRESHOLD},
  59. {&congested_respns_us, CONGESTED_RESPONSE_US},
  60. {&congested_reps, CONGESTED_REPS},
  61. {&disabled_period, DISABLED_PERIOD},
  62. {&giveup_limit, GIVEUP_LIMIT}
  63. };
  64. static struct dentry *tunables_dir;
  65. static struct dentry *tunables_file;
  66. /* these correspond to the statistics printed by ptc_seq_show() */
  67. static char *stat_description[] = {
  68. "sent: number of shootdown messages sent",
  69. "stime: time spent sending messages",
  70. "numuvhubs: number of hubs targeted with shootdown",
  71. "numuvhubs16: number times 16 or more hubs targeted",
  72. "numuvhubs8: number times 8 or more hubs targeted",
  73. "numuvhubs4: number times 4 or more hubs targeted",
  74. "numuvhubs2: number times 2 or more hubs targeted",
  75. "numuvhubs1: number times 1 hub targeted",
  76. "numcpus: number of cpus targeted with shootdown",
  77. "dto: number of destination timeouts",
  78. "retries: destination timeout retries sent",
  79. "rok: : destination timeouts successfully retried",
  80. "resetp: ipi-style resource resets for plugs",
  81. "resett: ipi-style resource resets for timeouts",
  82. "giveup: fall-backs to ipi-style shootdowns",
  83. "sto: number of source timeouts",
  84. "bz: number of stay-busy's",
  85. "throt: number times spun in throttle",
  86. "swack: image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE",
  87. "recv: shootdown messages received",
  88. "rtime: time spent processing messages",
  89. "all: shootdown all-tlb messages",
  90. "one: shootdown one-tlb messages",
  91. "mult: interrupts that found multiple messages",
  92. "none: interrupts that found no messages",
  93. "retry: number of retry messages processed",
  94. "canc: number messages canceled by retries",
  95. "nocan: number retries that found nothing to cancel",
  96. "reset: number of ipi-style reset requests processed",
  97. "rcan: number messages canceled by reset requests",
  98. "disable: number times use of the BAU was disabled",
  99. "enable: number times use of the BAU was re-enabled"
  100. };
  101. static int __init
  102. setup_nobau(char *arg)
  103. {
  104. nobau = 1;
  105. return 0;
  106. }
  107. early_param("nobau", setup_nobau);
  108. /* base pnode in this partition */
  109. static int uv_base_pnode __read_mostly;
  110. static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
  111. static DEFINE_PER_CPU(struct bau_control, bau_control);
  112. static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
  113. static void
  114. set_bau_on(void)
  115. {
  116. int cpu;
  117. struct bau_control *bcp;
  118. if (nobau_perm) {
  119. pr_info("BAU not initialized; cannot be turned on\n");
  120. return;
  121. }
  122. nobau = 0;
  123. for_each_present_cpu(cpu) {
  124. bcp = &per_cpu(bau_control, cpu);
  125. bcp->nobau = 0;
  126. }
  127. pr_info("BAU turned on\n");
  128. return;
  129. }
  130. static void
  131. set_bau_off(void)
  132. {
  133. int cpu;
  134. struct bau_control *bcp;
  135. nobau = 1;
  136. for_each_present_cpu(cpu) {
  137. bcp = &per_cpu(bau_control, cpu);
  138. bcp->nobau = 1;
  139. }
  140. pr_info("BAU turned off\n");
  141. return;
  142. }
  143. /*
  144. * Determine the first node on a uvhub. 'Nodes' are used for kernel
  145. * memory allocation.
  146. */
  147. static int __init uvhub_to_first_node(int uvhub)
  148. {
  149. int node, b;
  150. for_each_online_node(node) {
  151. b = uv_node_to_blade_id(node);
  152. if (uvhub == b)
  153. return node;
  154. }
  155. return -1;
  156. }
  157. /*
  158. * Determine the apicid of the first cpu on a uvhub.
  159. */
  160. static int __init uvhub_to_first_apicid(int uvhub)
  161. {
  162. int cpu;
  163. for_each_present_cpu(cpu)
  164. if (uvhub == uv_cpu_to_blade_id(cpu))
  165. return per_cpu(x86_cpu_to_apicid, cpu);
  166. return -1;
  167. }
  168. /*
  169. * Free a software acknowledge hardware resource by clearing its Pending
  170. * bit. This will return a reply to the sender.
  171. * If the message has timed out, a reply has already been sent by the
  172. * hardware but the resource has not been released. In that case our
  173. * clear of the Timeout bit (as well) will free the resource. No reply will
  174. * be sent (the hardware will only do one reply per message).
  175. */
  176. static void reply_to_message(struct msg_desc *mdp, struct bau_control *bcp,
  177. int do_acknowledge)
  178. {
  179. unsigned long dw;
  180. struct bau_pq_entry *msg;
  181. msg = mdp->msg;
  182. if (!msg->canceled && do_acknowledge) {
  183. dw = (msg->swack_vec << UV_SW_ACK_NPENDING) | msg->swack_vec;
  184. write_mmr_sw_ack(dw);
  185. }
  186. msg->replied_to = 1;
  187. msg->swack_vec = 0;
  188. }
  189. /*
  190. * Process the receipt of a RETRY message
  191. */
  192. static void bau_process_retry_msg(struct msg_desc *mdp,
  193. struct bau_control *bcp)
  194. {
  195. int i;
  196. int cancel_count = 0;
  197. unsigned long msg_res;
  198. unsigned long mmr = 0;
  199. struct bau_pq_entry *msg = mdp->msg;
  200. struct bau_pq_entry *msg2;
  201. struct ptc_stats *stat = bcp->statp;
  202. stat->d_retries++;
  203. /*
  204. * cancel any message from msg+1 to the retry itself
  205. */
  206. for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
  207. if (msg2 > mdp->queue_last)
  208. msg2 = mdp->queue_first;
  209. if (msg2 == msg)
  210. break;
  211. /* same conditions for cancellation as do_reset */
  212. if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
  213. (msg2->swack_vec) && ((msg2->swack_vec &
  214. msg->swack_vec) == 0) &&
  215. (msg2->sending_cpu == msg->sending_cpu) &&
  216. (msg2->msg_type != MSG_NOOP)) {
  217. mmr = read_mmr_sw_ack();
  218. msg_res = msg2->swack_vec;
  219. /*
  220. * This is a message retry; clear the resources held
  221. * by the previous message only if they timed out.
  222. * If it has not timed out we have an unexpected
  223. * situation to report.
  224. */
  225. if (mmr & (msg_res << UV_SW_ACK_NPENDING)) {
  226. unsigned long mr;
  227. /*
  228. * Is the resource timed out?
  229. * Make everyone ignore the cancelled message.
  230. */
  231. msg2->canceled = 1;
  232. stat->d_canceled++;
  233. cancel_count++;
  234. mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
  235. write_mmr_sw_ack(mr);
  236. }
  237. }
  238. }
  239. if (!cancel_count)
  240. stat->d_nocanceled++;
  241. }
  242. /*
  243. * Do all the things a cpu should do for a TLB shootdown message.
  244. * Other cpu's may come here at the same time for this message.
  245. */
  246. static void bau_process_message(struct msg_desc *mdp, struct bau_control *bcp,
  247. int do_acknowledge)
  248. {
  249. short socket_ack_count = 0;
  250. short *sp;
  251. struct atomic_short *asp;
  252. struct ptc_stats *stat = bcp->statp;
  253. struct bau_pq_entry *msg = mdp->msg;
  254. struct bau_control *smaster = bcp->socket_master;
  255. /*
  256. * This must be a normal message, or retry of a normal message
  257. */
  258. if (msg->address == TLB_FLUSH_ALL) {
  259. local_flush_tlb();
  260. stat->d_alltlb++;
  261. } else {
  262. __flush_tlb_one(msg->address);
  263. stat->d_onetlb++;
  264. }
  265. stat->d_requestee++;
  266. /*
  267. * One cpu on each uvhub has the additional job on a RETRY
  268. * of releasing the resource held by the message that is
  269. * being retried. That message is identified by sending
  270. * cpu number.
  271. */
  272. if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
  273. bau_process_retry_msg(mdp, bcp);
  274. /*
  275. * This is a swack message, so we have to reply to it.
  276. * Count each responding cpu on the socket. This avoids
  277. * pinging the count's cache line back and forth between
  278. * the sockets.
  279. */
  280. sp = &smaster->socket_acknowledge_count[mdp->msg_slot];
  281. asp = (struct atomic_short *)sp;
  282. socket_ack_count = atom_asr(1, asp);
  283. if (socket_ack_count == bcp->cpus_in_socket) {
  284. int msg_ack_count;
  285. /*
  286. * Both sockets dump their completed count total into
  287. * the message's count.
  288. */
  289. *sp = 0;
  290. asp = (struct atomic_short *)&msg->acknowledge_count;
  291. msg_ack_count = atom_asr(socket_ack_count, asp);
  292. if (msg_ack_count == bcp->cpus_in_uvhub) {
  293. /*
  294. * All cpus in uvhub saw it; reply
  295. * (unless we are in the UV2 workaround)
  296. */
  297. reply_to_message(mdp, bcp, do_acknowledge);
  298. }
  299. }
  300. return;
  301. }
  302. /*
  303. * Determine the first cpu on a pnode.
  304. */
  305. static int pnode_to_first_cpu(int pnode, struct bau_control *smaster)
  306. {
  307. int cpu;
  308. struct hub_and_pnode *hpp;
  309. for_each_present_cpu(cpu) {
  310. hpp = &smaster->thp[cpu];
  311. if (pnode == hpp->pnode)
  312. return cpu;
  313. }
  314. return -1;
  315. }
  316. /*
  317. * Last resort when we get a large number of destination timeouts is
  318. * to clear resources held by a given cpu.
  319. * Do this with IPI so that all messages in the BAU message queue
  320. * can be identified by their nonzero swack_vec field.
  321. *
  322. * This is entered for a single cpu on the uvhub.
  323. * The sender want's this uvhub to free a specific message's
  324. * swack resources.
  325. */
  326. static void do_reset(void *ptr)
  327. {
  328. int i;
  329. struct bau_control *bcp = &per_cpu(bau_control, smp_processor_id());
  330. struct reset_args *rap = (struct reset_args *)ptr;
  331. struct bau_pq_entry *msg;
  332. struct ptc_stats *stat = bcp->statp;
  333. stat->d_resets++;
  334. /*
  335. * We're looking for the given sender, and
  336. * will free its swack resource.
  337. * If all cpu's finally responded after the timeout, its
  338. * message 'replied_to' was set.
  339. */
  340. for (msg = bcp->queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
  341. unsigned long msg_res;
  342. /* do_reset: same conditions for cancellation as
  343. bau_process_retry_msg() */
  344. if ((msg->replied_to == 0) &&
  345. (msg->canceled == 0) &&
  346. (msg->sending_cpu == rap->sender) &&
  347. (msg->swack_vec) &&
  348. (msg->msg_type != MSG_NOOP)) {
  349. unsigned long mmr;
  350. unsigned long mr;
  351. /*
  352. * make everyone else ignore this message
  353. */
  354. msg->canceled = 1;
  355. /*
  356. * only reset the resource if it is still pending
  357. */
  358. mmr = read_mmr_sw_ack();
  359. msg_res = msg->swack_vec;
  360. mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
  361. if (mmr & msg_res) {
  362. stat->d_rcanceled++;
  363. write_mmr_sw_ack(mr);
  364. }
  365. }
  366. }
  367. return;
  368. }
  369. /*
  370. * Use IPI to get all target uvhubs to release resources held by
  371. * a given sending cpu number.
  372. */
  373. static void reset_with_ipi(struct pnmask *distribution, struct bau_control *bcp)
  374. {
  375. int pnode;
  376. int apnode;
  377. int maskbits;
  378. int sender = bcp->cpu;
  379. cpumask_t *mask = bcp->uvhub_master->cpumask;
  380. struct bau_control *smaster = bcp->socket_master;
  381. struct reset_args reset_args;
  382. reset_args.sender = sender;
  383. cpus_clear(*mask);
  384. /* find a single cpu for each uvhub in this distribution mask */
  385. maskbits = sizeof(struct pnmask) * BITSPERBYTE;
  386. /* each bit is a pnode relative to the partition base pnode */
  387. for (pnode = 0; pnode < maskbits; pnode++) {
  388. int cpu;
  389. if (!bau_uvhub_isset(pnode, distribution))
  390. continue;
  391. apnode = pnode + bcp->partition_base_pnode;
  392. cpu = pnode_to_first_cpu(apnode, smaster);
  393. cpu_set(cpu, *mask);
  394. }
  395. /* IPI all cpus; preemption is already disabled */
  396. smp_call_function_many(mask, do_reset, (void *)&reset_args, 1);
  397. return;
  398. }
  399. static inline unsigned long cycles_2_us(unsigned long long cyc)
  400. {
  401. unsigned long long ns;
  402. unsigned long us;
  403. int cpu = smp_processor_id();
  404. ns = (cyc * per_cpu(cyc2ns, cpu)) >> CYC2NS_SCALE_FACTOR;
  405. us = ns / 1000;
  406. return us;
  407. }
  408. /*
  409. * wait for all cpus on this hub to finish their sends and go quiet
  410. * leaves uvhub_quiesce set so that no new broadcasts are started by
  411. * bau_flush_send_and_wait()
  412. */
  413. static inline void quiesce_local_uvhub(struct bau_control *hmaster)
  414. {
  415. atom_asr(1, (struct atomic_short *)&hmaster->uvhub_quiesce);
  416. }
  417. /*
  418. * mark this quiet-requestor as done
  419. */
  420. static inline void end_uvhub_quiesce(struct bau_control *hmaster)
  421. {
  422. atom_asr(-1, (struct atomic_short *)&hmaster->uvhub_quiesce);
  423. }
  424. static unsigned long uv1_read_status(unsigned long mmr_offset, int right_shift)
  425. {
  426. unsigned long descriptor_status;
  427. descriptor_status = uv_read_local_mmr(mmr_offset);
  428. descriptor_status >>= right_shift;
  429. descriptor_status &= UV_ACT_STATUS_MASK;
  430. return descriptor_status;
  431. }
  432. /*
  433. * Wait for completion of a broadcast software ack message
  434. * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
  435. */
  436. static int uv1_wait_completion(struct bau_desc *bau_desc,
  437. unsigned long mmr_offset, int right_shift,
  438. struct bau_control *bcp, long try)
  439. {
  440. unsigned long descriptor_status;
  441. cycles_t ttm;
  442. struct ptc_stats *stat = bcp->statp;
  443. descriptor_status = uv1_read_status(mmr_offset, right_shift);
  444. /* spin on the status MMR, waiting for it to go idle */
  445. while ((descriptor_status != DS_IDLE)) {
  446. /*
  447. * Our software ack messages may be blocked because
  448. * there are no swack resources available. As long
  449. * as none of them has timed out hardware will NACK
  450. * our message and its state will stay IDLE.
  451. */
  452. if (descriptor_status == DS_SOURCE_TIMEOUT) {
  453. stat->s_stimeout++;
  454. return FLUSH_GIVEUP;
  455. } else if (descriptor_status == DS_DESTINATION_TIMEOUT) {
  456. stat->s_dtimeout++;
  457. ttm = get_cycles();
  458. /*
  459. * Our retries may be blocked by all destination
  460. * swack resources being consumed, and a timeout
  461. * pending. In that case hardware returns the
  462. * ERROR that looks like a destination timeout.
  463. */
  464. if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
  465. bcp->conseccompletes = 0;
  466. return FLUSH_RETRY_PLUGGED;
  467. }
  468. bcp->conseccompletes = 0;
  469. return FLUSH_RETRY_TIMEOUT;
  470. } else {
  471. /*
  472. * descriptor_status is still BUSY
  473. */
  474. cpu_relax();
  475. }
  476. descriptor_status = uv1_read_status(mmr_offset, right_shift);
  477. }
  478. bcp->conseccompletes++;
  479. return FLUSH_COMPLETE;
  480. }
  481. /*
  482. * UV2 could have an extra bit of status in the ACTIVATION_STATUS_2 register.
  483. * But not currently used.
  484. */
  485. static unsigned long uv2_read_status(unsigned long offset, int rshft, int desc)
  486. {
  487. unsigned long descriptor_status;
  488. descriptor_status =
  489. ((read_lmmr(offset) >> rshft) & UV_ACT_STATUS_MASK) << 1;
  490. return descriptor_status;
  491. }
  492. /*
  493. * Return whether the status of the descriptor that is normally used for this
  494. * cpu (the one indexed by its hub-relative cpu number) is busy.
  495. * The status of the original 32 descriptors is always reflected in the 64
  496. * bits of UVH_LB_BAU_SB_ACTIVATION_STATUS_0.
  497. * The bit provided by the activation_status_2 register is irrelevant to
  498. * the status if it is only being tested for busy or not busy.
  499. */
  500. int normal_busy(struct bau_control *bcp)
  501. {
  502. int cpu = bcp->uvhub_cpu;
  503. int mmr_offset;
  504. int right_shift;
  505. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
  506. right_shift = cpu * UV_ACT_STATUS_SIZE;
  507. return (((((read_lmmr(mmr_offset) >> right_shift) &
  508. UV_ACT_STATUS_MASK)) << 1) == UV2H_DESC_BUSY);
  509. }
  510. /*
  511. * Entered when a bau descriptor has gone into a permanent busy wait because
  512. * of a hardware bug.
  513. * Workaround the bug.
  514. */
  515. int handle_uv2_busy(struct bau_control *bcp)
  516. {
  517. struct ptc_stats *stat = bcp->statp;
  518. stat->s_uv2_wars++;
  519. bcp->busy = 1;
  520. return FLUSH_GIVEUP;
  521. }
  522. static int uv2_wait_completion(struct bau_desc *bau_desc,
  523. unsigned long mmr_offset, int right_shift,
  524. struct bau_control *bcp, long try)
  525. {
  526. unsigned long descriptor_stat;
  527. cycles_t ttm;
  528. int desc = bcp->uvhub_cpu;
  529. long busy_reps = 0;
  530. struct ptc_stats *stat = bcp->statp;
  531. descriptor_stat = uv2_read_status(mmr_offset, right_shift, desc);
  532. /* spin on the status MMR, waiting for it to go idle */
  533. while (descriptor_stat != UV2H_DESC_IDLE) {
  534. if ((descriptor_stat == UV2H_DESC_SOURCE_TIMEOUT)) {
  535. /*
  536. * A h/w bug on the destination side may
  537. * have prevented the message being marked
  538. * pending, thus it doesn't get replied to
  539. * and gets continually nacked until it times
  540. * out with a SOURCE_TIMEOUT.
  541. */
  542. stat->s_stimeout++;
  543. return FLUSH_GIVEUP;
  544. } else if (descriptor_stat == UV2H_DESC_DEST_TIMEOUT) {
  545. ttm = get_cycles();
  546. /*
  547. * Our retries may be blocked by all destination
  548. * swack resources being consumed, and a timeout
  549. * pending. In that case hardware returns the
  550. * ERROR that looks like a destination timeout.
  551. * Without using the extended status we have to
  552. * deduce from the short time that this was a
  553. * strong nack.
  554. */
  555. if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
  556. bcp->conseccompletes = 0;
  557. stat->s_plugged++;
  558. /* FLUSH_RETRY_PLUGGED causes hang on boot */
  559. return FLUSH_GIVEUP;
  560. }
  561. stat->s_dtimeout++;
  562. bcp->conseccompletes = 0;
  563. /* FLUSH_RETRY_TIMEOUT causes hang on boot */
  564. return FLUSH_GIVEUP;
  565. } else {
  566. busy_reps++;
  567. if (busy_reps > 1000000) {
  568. /* not to hammer on the clock */
  569. busy_reps = 0;
  570. ttm = get_cycles();
  571. if ((ttm - bcp->send_message) >
  572. bcp->timeout_interval)
  573. return handle_uv2_busy(bcp);
  574. }
  575. /*
  576. * descriptor_stat is still BUSY
  577. */
  578. cpu_relax();
  579. }
  580. descriptor_stat = uv2_read_status(mmr_offset, right_shift,
  581. desc);
  582. }
  583. bcp->conseccompletes++;
  584. return FLUSH_COMPLETE;
  585. }
  586. /*
  587. * There are 2 status registers; each and array[32] of 2 bits. Set up for
  588. * which register to read and position in that register based on cpu in
  589. * current hub.
  590. */
  591. static int wait_completion(struct bau_desc *bau_desc,
  592. struct bau_control *bcp, long try)
  593. {
  594. int right_shift;
  595. unsigned long mmr_offset;
  596. int desc = bcp->uvhub_cpu;
  597. if (desc < UV_CPUS_PER_AS) {
  598. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
  599. right_shift = desc * UV_ACT_STATUS_SIZE;
  600. } else {
  601. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
  602. right_shift = ((desc - UV_CPUS_PER_AS) * UV_ACT_STATUS_SIZE);
  603. }
  604. if (bcp->uvhub_version == 1)
  605. return uv1_wait_completion(bau_desc, mmr_offset, right_shift,
  606. bcp, try);
  607. else
  608. return uv2_wait_completion(bau_desc, mmr_offset, right_shift,
  609. bcp, try);
  610. }
  611. static inline cycles_t sec_2_cycles(unsigned long sec)
  612. {
  613. unsigned long ns;
  614. cycles_t cyc;
  615. ns = sec * 1000000000;
  616. cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
  617. return cyc;
  618. }
  619. /*
  620. * Our retries are blocked by all destination sw ack resources being
  621. * in use, and a timeout is pending. In that case hardware immediately
  622. * returns the ERROR that looks like a destination timeout.
  623. */
  624. static void destination_plugged(struct bau_desc *bau_desc,
  625. struct bau_control *bcp,
  626. struct bau_control *hmaster, struct ptc_stats *stat)
  627. {
  628. udelay(bcp->plugged_delay);
  629. bcp->plugged_tries++;
  630. if (bcp->plugged_tries >= bcp->plugsb4reset) {
  631. bcp->plugged_tries = 0;
  632. quiesce_local_uvhub(hmaster);
  633. spin_lock(&hmaster->queue_lock);
  634. reset_with_ipi(&bau_desc->distribution, bcp);
  635. spin_unlock(&hmaster->queue_lock);
  636. end_uvhub_quiesce(hmaster);
  637. bcp->ipi_attempts++;
  638. stat->s_resets_plug++;
  639. }
  640. }
  641. static void destination_timeout(struct bau_desc *bau_desc,
  642. struct bau_control *bcp, struct bau_control *hmaster,
  643. struct ptc_stats *stat)
  644. {
  645. hmaster->max_concurr = 1;
  646. bcp->timeout_tries++;
  647. if (bcp->timeout_tries >= bcp->timeoutsb4reset) {
  648. bcp->timeout_tries = 0;
  649. quiesce_local_uvhub(hmaster);
  650. spin_lock(&hmaster->queue_lock);
  651. reset_with_ipi(&bau_desc->distribution, bcp);
  652. spin_unlock(&hmaster->queue_lock);
  653. end_uvhub_quiesce(hmaster);
  654. bcp->ipi_attempts++;
  655. stat->s_resets_timeout++;
  656. }
  657. }
  658. /*
  659. * Stop all cpus on a uvhub from using the BAU for a period of time.
  660. * This is reversed by check_enable.
  661. */
  662. static void disable_for_period(struct bau_control *bcp, struct ptc_stats *stat)
  663. {
  664. int tcpu;
  665. struct bau_control *tbcp;
  666. struct bau_control *hmaster;
  667. cycles_t tm1;
  668. hmaster = bcp->uvhub_master;
  669. spin_lock(&hmaster->disable_lock);
  670. if (!bcp->baudisabled) {
  671. stat->s_bau_disabled++;
  672. tm1 = get_cycles();
  673. for_each_present_cpu(tcpu) {
  674. tbcp = &per_cpu(bau_control, tcpu);
  675. if (tbcp->uvhub_master == hmaster) {
  676. tbcp->baudisabled = 1;
  677. tbcp->set_bau_on_time =
  678. tm1 + bcp->disabled_period;
  679. }
  680. }
  681. }
  682. spin_unlock(&hmaster->disable_lock);
  683. }
  684. static void count_max_concurr(int stat, struct bau_control *bcp,
  685. struct bau_control *hmaster)
  686. {
  687. bcp->plugged_tries = 0;
  688. bcp->timeout_tries = 0;
  689. if (stat != FLUSH_COMPLETE)
  690. return;
  691. if (bcp->conseccompletes <= bcp->complete_threshold)
  692. return;
  693. if (hmaster->max_concurr >= hmaster->max_concurr_const)
  694. return;
  695. hmaster->max_concurr++;
  696. }
  697. static void record_send_stats(cycles_t time1, cycles_t time2,
  698. struct bau_control *bcp, struct ptc_stats *stat,
  699. int completion_status, int try)
  700. {
  701. cycles_t elapsed;
  702. if (time2 > time1) {
  703. elapsed = time2 - time1;
  704. stat->s_time += elapsed;
  705. if ((completion_status == FLUSH_COMPLETE) && (try == 1)) {
  706. bcp->period_requests++;
  707. bcp->period_time += elapsed;
  708. if ((elapsed > congested_cycles) &&
  709. (bcp->period_requests > bcp->cong_reps) &&
  710. ((bcp->period_time / bcp->period_requests) >
  711. congested_cycles)) {
  712. stat->s_congested++;
  713. disable_for_period(bcp, stat);
  714. }
  715. }
  716. } else
  717. stat->s_requestor--;
  718. if (completion_status == FLUSH_COMPLETE && try > 1)
  719. stat->s_retriesok++;
  720. else if (completion_status == FLUSH_GIVEUP) {
  721. stat->s_giveup++;
  722. if (get_cycles() > bcp->period_end)
  723. bcp->period_giveups = 0;
  724. bcp->period_giveups++;
  725. if (bcp->period_giveups == 1)
  726. bcp->period_end = get_cycles() + bcp->disabled_period;
  727. if (bcp->period_giveups > bcp->giveup_limit) {
  728. disable_for_period(bcp, stat);
  729. stat->s_giveuplimit++;
  730. }
  731. }
  732. }
  733. /*
  734. * Because of a uv1 hardware bug only a limited number of concurrent
  735. * requests can be made.
  736. */
  737. static void uv1_throttle(struct bau_control *hmaster, struct ptc_stats *stat)
  738. {
  739. spinlock_t *lock = &hmaster->uvhub_lock;
  740. atomic_t *v;
  741. v = &hmaster->active_descriptor_count;
  742. if (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr)) {
  743. stat->s_throttles++;
  744. do {
  745. cpu_relax();
  746. } while (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr));
  747. }
  748. }
  749. /*
  750. * Handle the completion status of a message send.
  751. */
  752. static void handle_cmplt(int completion_status, struct bau_desc *bau_desc,
  753. struct bau_control *bcp, struct bau_control *hmaster,
  754. struct ptc_stats *stat)
  755. {
  756. if (completion_status == FLUSH_RETRY_PLUGGED)
  757. destination_plugged(bau_desc, bcp, hmaster, stat);
  758. else if (completion_status == FLUSH_RETRY_TIMEOUT)
  759. destination_timeout(bau_desc, bcp, hmaster, stat);
  760. }
  761. /*
  762. * Send a broadcast and wait for it to complete.
  763. *
  764. * The flush_mask contains the cpus the broadcast is to be sent to including
  765. * cpus that are on the local uvhub.
  766. *
  767. * Returns 0 if all flushing represented in the mask was done.
  768. * Returns 1 if it gives up entirely and the original cpu mask is to be
  769. * returned to the kernel.
  770. */
  771. int uv_flush_send_and_wait(struct cpumask *flush_mask, struct bau_control *bcp,
  772. struct bau_desc *bau_desc)
  773. {
  774. int seq_number = 0;
  775. int completion_stat = 0;
  776. int uv1 = 0;
  777. long try = 0;
  778. unsigned long index;
  779. cycles_t time1;
  780. cycles_t time2;
  781. struct ptc_stats *stat = bcp->statp;
  782. struct bau_control *hmaster = bcp->uvhub_master;
  783. struct uv1_bau_msg_header *uv1_hdr = NULL;
  784. struct uv2_bau_msg_header *uv2_hdr = NULL;
  785. if (bcp->uvhub_version == 1) {
  786. uv1 = 1;
  787. uv1_throttle(hmaster, stat);
  788. }
  789. while (hmaster->uvhub_quiesce)
  790. cpu_relax();
  791. time1 = get_cycles();
  792. if (uv1)
  793. uv1_hdr = &bau_desc->header.uv1_hdr;
  794. else
  795. uv2_hdr = &bau_desc->header.uv2_hdr;
  796. do {
  797. if (try == 0) {
  798. if (uv1)
  799. uv1_hdr->msg_type = MSG_REGULAR;
  800. else
  801. uv2_hdr->msg_type = MSG_REGULAR;
  802. seq_number = bcp->message_number++;
  803. } else {
  804. if (uv1)
  805. uv1_hdr->msg_type = MSG_RETRY;
  806. else
  807. uv2_hdr->msg_type = MSG_RETRY;
  808. stat->s_retry_messages++;
  809. }
  810. if (uv1)
  811. uv1_hdr->sequence = seq_number;
  812. else
  813. uv2_hdr->sequence = seq_number;
  814. index = (1UL << AS_PUSH_SHIFT) | bcp->uvhub_cpu;
  815. bcp->send_message = get_cycles();
  816. write_mmr_activation(index);
  817. try++;
  818. completion_stat = wait_completion(bau_desc, bcp, try);
  819. handle_cmplt(completion_stat, bau_desc, bcp, hmaster, stat);
  820. if (bcp->ipi_attempts >= bcp->ipi_reset_limit) {
  821. bcp->ipi_attempts = 0;
  822. stat->s_overipilimit++;
  823. completion_stat = FLUSH_GIVEUP;
  824. break;
  825. }
  826. cpu_relax();
  827. } while ((completion_stat == FLUSH_RETRY_PLUGGED) ||
  828. (completion_stat == FLUSH_RETRY_TIMEOUT));
  829. time2 = get_cycles();
  830. count_max_concurr(completion_stat, bcp, hmaster);
  831. while (hmaster->uvhub_quiesce)
  832. cpu_relax();
  833. atomic_dec(&hmaster->active_descriptor_count);
  834. record_send_stats(time1, time2, bcp, stat, completion_stat, try);
  835. if (completion_stat == FLUSH_GIVEUP)
  836. /* FLUSH_GIVEUP will fall back to using IPI's for tlb flush */
  837. return 1;
  838. return 0;
  839. }
  840. /*
  841. * The BAU is disabled for this uvhub. When the disabled time period has
  842. * expired re-enable it.
  843. * Return 0 if it is re-enabled for all cpus on this uvhub.
  844. */
  845. static int check_enable(struct bau_control *bcp, struct ptc_stats *stat)
  846. {
  847. int tcpu;
  848. struct bau_control *tbcp;
  849. struct bau_control *hmaster;
  850. hmaster = bcp->uvhub_master;
  851. spin_lock(&hmaster->disable_lock);
  852. if (bcp->baudisabled && (get_cycles() >= bcp->set_bau_on_time)) {
  853. stat->s_bau_reenabled++;
  854. for_each_present_cpu(tcpu) {
  855. tbcp = &per_cpu(bau_control, tcpu);
  856. if (tbcp->uvhub_master == hmaster) {
  857. tbcp->baudisabled = 0;
  858. tbcp->period_requests = 0;
  859. tbcp->period_time = 0;
  860. tbcp->period_giveups = 0;
  861. }
  862. }
  863. spin_unlock(&hmaster->disable_lock);
  864. return 0;
  865. }
  866. spin_unlock(&hmaster->disable_lock);
  867. return -1;
  868. }
  869. static void record_send_statistics(struct ptc_stats *stat, int locals, int hubs,
  870. int remotes, struct bau_desc *bau_desc)
  871. {
  872. stat->s_requestor++;
  873. stat->s_ntargcpu += remotes + locals;
  874. stat->s_ntargremotes += remotes;
  875. stat->s_ntarglocals += locals;
  876. /* uvhub statistics */
  877. hubs = bau_uvhub_weight(&bau_desc->distribution);
  878. if (locals) {
  879. stat->s_ntarglocaluvhub++;
  880. stat->s_ntargremoteuvhub += (hubs - 1);
  881. } else
  882. stat->s_ntargremoteuvhub += hubs;
  883. stat->s_ntarguvhub += hubs;
  884. if (hubs >= 16)
  885. stat->s_ntarguvhub16++;
  886. else if (hubs >= 8)
  887. stat->s_ntarguvhub8++;
  888. else if (hubs >= 4)
  889. stat->s_ntarguvhub4++;
  890. else if (hubs >= 2)
  891. stat->s_ntarguvhub2++;
  892. else
  893. stat->s_ntarguvhub1++;
  894. }
  895. /*
  896. * Translate a cpu mask to the uvhub distribution mask in the BAU
  897. * activation descriptor.
  898. */
  899. static int set_distrib_bits(struct cpumask *flush_mask, struct bau_control *bcp,
  900. struct bau_desc *bau_desc, int *localsp, int *remotesp)
  901. {
  902. int cpu;
  903. int pnode;
  904. int cnt = 0;
  905. struct hub_and_pnode *hpp;
  906. for_each_cpu(cpu, flush_mask) {
  907. /*
  908. * The distribution vector is a bit map of pnodes, relative
  909. * to the partition base pnode (and the partition base nasid
  910. * in the header).
  911. * Translate cpu to pnode and hub using a local memory array.
  912. */
  913. hpp = &bcp->socket_master->thp[cpu];
  914. pnode = hpp->pnode - bcp->partition_base_pnode;
  915. bau_uvhub_set(pnode, &bau_desc->distribution);
  916. cnt++;
  917. if (hpp->uvhub == bcp->uvhub)
  918. (*localsp)++;
  919. else
  920. (*remotesp)++;
  921. }
  922. if (!cnt)
  923. return 1;
  924. return 0;
  925. }
  926. /*
  927. * globally purge translation cache of a virtual address or all TLB's
  928. * @cpumask: mask of all cpu's in which the address is to be removed
  929. * @mm: mm_struct containing virtual address range
  930. * @start: start virtual address to be removed from TLB
  931. * @end: end virtual address to be remove from TLB
  932. * @cpu: the current cpu
  933. *
  934. * This is the entry point for initiating any UV global TLB shootdown.
  935. *
  936. * Purges the translation caches of all specified processors of the given
  937. * virtual address, or purges all TLB's on specified processors.
  938. *
  939. * The caller has derived the cpumask from the mm_struct. This function
  940. * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
  941. *
  942. * The cpumask is converted into a uvhubmask of the uvhubs containing
  943. * those cpus.
  944. *
  945. * Note that this function should be called with preemption disabled.
  946. *
  947. * Returns NULL if all remote flushing was done.
  948. * Returns pointer to cpumask if some remote flushing remains to be
  949. * done. The returned pointer is valid till preemption is re-enabled.
  950. */
  951. const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
  952. struct mm_struct *mm, unsigned long start,
  953. unsigned long end, unsigned int cpu)
  954. {
  955. int locals = 0;
  956. int remotes = 0;
  957. int hubs = 0;
  958. struct bau_desc *bau_desc;
  959. struct cpumask *flush_mask;
  960. struct ptc_stats *stat;
  961. struct bau_control *bcp;
  962. unsigned long descriptor_status;
  963. unsigned long status;
  964. bcp = &per_cpu(bau_control, cpu);
  965. stat = bcp->statp;
  966. stat->s_enters++;
  967. if (bcp->nobau)
  968. return cpumask;
  969. if (bcp->busy) {
  970. descriptor_status =
  971. read_lmmr(UVH_LB_BAU_SB_ACTIVATION_STATUS_0);
  972. status = ((descriptor_status >> (bcp->uvhub_cpu *
  973. UV_ACT_STATUS_SIZE)) & UV_ACT_STATUS_MASK) << 1;
  974. if (status == UV2H_DESC_BUSY)
  975. return cpumask;
  976. bcp->busy = 0;
  977. }
  978. /* bau was disabled due to slow response */
  979. if (bcp->baudisabled) {
  980. if (check_enable(bcp, stat)) {
  981. stat->s_ipifordisabled++;
  982. return cpumask;
  983. }
  984. }
  985. /*
  986. * Each sending cpu has a per-cpu mask which it fills from the caller's
  987. * cpu mask. All cpus are converted to uvhubs and copied to the
  988. * activation descriptor.
  989. */
  990. flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
  991. /* don't actually do a shootdown of the local cpu */
  992. cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
  993. if (cpu_isset(cpu, *cpumask))
  994. stat->s_ntargself++;
  995. bau_desc = bcp->descriptor_base;
  996. bau_desc += (ITEMS_PER_DESC * bcp->uvhub_cpu);
  997. bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
  998. if (set_distrib_bits(flush_mask, bcp, bau_desc, &locals, &remotes))
  999. return NULL;
  1000. record_send_statistics(stat, locals, hubs, remotes, bau_desc);
  1001. if (!end || (end - start) <= PAGE_SIZE)
  1002. bau_desc->payload.address = start;
  1003. else
  1004. bau_desc->payload.address = TLB_FLUSH_ALL;
  1005. bau_desc->payload.sending_cpu = cpu;
  1006. /*
  1007. * uv_flush_send_and_wait returns 0 if all cpu's were messaged,
  1008. * or 1 if it gave up and the original cpumask should be returned.
  1009. */
  1010. if (!uv_flush_send_and_wait(flush_mask, bcp, bau_desc))
  1011. return NULL;
  1012. else
  1013. return cpumask;
  1014. }
  1015. /*
  1016. * Search the message queue for any 'other' unprocessed message with the
  1017. * same software acknowledge resource bit vector as the 'msg' message.
  1018. */
  1019. struct bau_pq_entry *find_another_by_swack(struct bau_pq_entry *msg,
  1020. struct bau_control *bcp)
  1021. {
  1022. struct bau_pq_entry *msg_next = msg + 1;
  1023. unsigned char swack_vec = msg->swack_vec;
  1024. if (msg_next > bcp->queue_last)
  1025. msg_next = bcp->queue_first;
  1026. while (msg_next != msg) {
  1027. if ((msg_next->canceled == 0) && (msg_next->replied_to == 0) &&
  1028. (msg_next->swack_vec == swack_vec))
  1029. return msg_next;
  1030. msg_next++;
  1031. if (msg_next > bcp->queue_last)
  1032. msg_next = bcp->queue_first;
  1033. }
  1034. return NULL;
  1035. }
  1036. /*
  1037. * UV2 needs to work around a bug in which an arriving message has not
  1038. * set a bit in the UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE register.
  1039. * Such a message must be ignored.
  1040. */
  1041. void process_uv2_message(struct msg_desc *mdp, struct bau_control *bcp)
  1042. {
  1043. unsigned long mmr_image;
  1044. unsigned char swack_vec;
  1045. struct bau_pq_entry *msg = mdp->msg;
  1046. struct bau_pq_entry *other_msg;
  1047. mmr_image = read_mmr_sw_ack();
  1048. swack_vec = msg->swack_vec;
  1049. if ((swack_vec & mmr_image) == 0) {
  1050. /*
  1051. * This message was assigned a swack resource, but no
  1052. * reserved acknowlegment is pending.
  1053. * The bug has prevented this message from setting the MMR.
  1054. */
  1055. /*
  1056. * Some message has set the MMR 'pending' bit; it might have
  1057. * been another message. Look for that message.
  1058. */
  1059. other_msg = find_another_by_swack(msg, bcp);
  1060. if (other_msg) {
  1061. /*
  1062. * There is another. Process this one but do not
  1063. * ack it.
  1064. */
  1065. bau_process_message(mdp, bcp, 0);
  1066. /*
  1067. * Let the natural processing of that other message
  1068. * acknowledge it. Don't get the processing of sw_ack's
  1069. * out of order.
  1070. */
  1071. return;
  1072. }
  1073. }
  1074. /*
  1075. * Either the MMR shows this one pending a reply or there is no
  1076. * other message using this sw_ack, so it is safe to acknowledge it.
  1077. */
  1078. bau_process_message(mdp, bcp, 1);
  1079. return;
  1080. }
  1081. /*
  1082. * The BAU message interrupt comes here. (registered by set_intr_gate)
  1083. * See entry_64.S
  1084. *
  1085. * We received a broadcast assist message.
  1086. *
  1087. * Interrupts are disabled; this interrupt could represent
  1088. * the receipt of several messages.
  1089. *
  1090. * All cores/threads on this hub get this interrupt.
  1091. * The last one to see it does the software ack.
  1092. * (the resource will not be freed until noninterruptable cpus see this
  1093. * interrupt; hardware may timeout the s/w ack and reply ERROR)
  1094. */
  1095. void uv_bau_message_interrupt(struct pt_regs *regs)
  1096. {
  1097. int count = 0;
  1098. cycles_t time_start;
  1099. struct bau_pq_entry *msg;
  1100. struct bau_control *bcp;
  1101. struct ptc_stats *stat;
  1102. struct msg_desc msgdesc;
  1103. ack_APIC_irq();
  1104. time_start = get_cycles();
  1105. bcp = &per_cpu(bau_control, smp_processor_id());
  1106. stat = bcp->statp;
  1107. msgdesc.queue_first = bcp->queue_first;
  1108. msgdesc.queue_last = bcp->queue_last;
  1109. msg = bcp->bau_msg_head;
  1110. while (msg->swack_vec) {
  1111. count++;
  1112. msgdesc.msg_slot = msg - msgdesc.queue_first;
  1113. msgdesc.msg = msg;
  1114. if (bcp->uvhub_version == 2)
  1115. process_uv2_message(&msgdesc, bcp);
  1116. else
  1117. bau_process_message(&msgdesc, bcp, 1);
  1118. msg++;
  1119. if (msg > msgdesc.queue_last)
  1120. msg = msgdesc.queue_first;
  1121. bcp->bau_msg_head = msg;
  1122. }
  1123. stat->d_time += (get_cycles() - time_start);
  1124. if (!count)
  1125. stat->d_nomsg++;
  1126. else if (count > 1)
  1127. stat->d_multmsg++;
  1128. }
  1129. /*
  1130. * Each target uvhub (i.e. a uvhub that has cpu's) needs to have
  1131. * shootdown message timeouts enabled. The timeout does not cause
  1132. * an interrupt, but causes an error message to be returned to
  1133. * the sender.
  1134. */
  1135. static void __init enable_timeouts(void)
  1136. {
  1137. int uvhub;
  1138. int nuvhubs;
  1139. int pnode;
  1140. unsigned long mmr_image;
  1141. nuvhubs = uv_num_possible_blades();
  1142. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  1143. if (!uv_blade_nr_possible_cpus(uvhub))
  1144. continue;
  1145. pnode = uv_blade_to_pnode(uvhub);
  1146. mmr_image = read_mmr_misc_control(pnode);
  1147. /*
  1148. * Set the timeout period and then lock it in, in three
  1149. * steps; captures and locks in the period.
  1150. *
  1151. * To program the period, the SOFT_ACK_MODE must be off.
  1152. */
  1153. mmr_image &= ~(1L << SOFTACK_MSHIFT);
  1154. write_mmr_misc_control(pnode, mmr_image);
  1155. /*
  1156. * Set the 4-bit period.
  1157. */
  1158. mmr_image &= ~((unsigned long)0xf << SOFTACK_PSHIFT);
  1159. mmr_image |= (SOFTACK_TIMEOUT_PERIOD << SOFTACK_PSHIFT);
  1160. write_mmr_misc_control(pnode, mmr_image);
  1161. /*
  1162. * UV1:
  1163. * Subsequent reversals of the timebase bit (3) cause an
  1164. * immediate timeout of one or all INTD resources as
  1165. * indicated in bits 2:0 (7 causes all of them to timeout).
  1166. */
  1167. mmr_image |= (1L << SOFTACK_MSHIFT);
  1168. if (is_uv2_hub()) {
  1169. /* hw bug workaround; do not use extended status */
  1170. mmr_image &= ~(1L << UV2_EXT_SHFT);
  1171. }
  1172. write_mmr_misc_control(pnode, mmr_image);
  1173. }
  1174. }
  1175. static void *ptc_seq_start(struct seq_file *file, loff_t *offset)
  1176. {
  1177. if (*offset < num_possible_cpus())
  1178. return offset;
  1179. return NULL;
  1180. }
  1181. static void *ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
  1182. {
  1183. (*offset)++;
  1184. if (*offset < num_possible_cpus())
  1185. return offset;
  1186. return NULL;
  1187. }
  1188. static void ptc_seq_stop(struct seq_file *file, void *data)
  1189. {
  1190. }
  1191. static inline unsigned long long usec_2_cycles(unsigned long microsec)
  1192. {
  1193. unsigned long ns;
  1194. unsigned long long cyc;
  1195. ns = microsec * 1000;
  1196. cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
  1197. return cyc;
  1198. }
  1199. /*
  1200. * Display the statistics thru /proc/sgi_uv/ptc_statistics
  1201. * 'data' points to the cpu number
  1202. * Note: see the descriptions in stat_description[].
  1203. */
  1204. static int ptc_seq_show(struct seq_file *file, void *data)
  1205. {
  1206. struct ptc_stats *stat;
  1207. struct bau_control *bcp;
  1208. int cpu;
  1209. cpu = *(loff_t *)data;
  1210. if (!cpu) {
  1211. seq_printf(file,
  1212. "# cpu bauoff sent stime self locals remotes ncpus localhub ");
  1213. seq_printf(file,
  1214. "remotehub numuvhubs numuvhubs16 numuvhubs8 ");
  1215. seq_printf(file,
  1216. "numuvhubs4 numuvhubs2 numuvhubs1 dto snacks retries ");
  1217. seq_printf(file,
  1218. "rok resetp resett giveup sto bz throt disable ");
  1219. seq_printf(file,
  1220. "enable wars warshw warwaits enters ipidis plugged ");
  1221. seq_printf(file,
  1222. "ipiover glim cong swack recv rtime all one mult ");
  1223. seq_printf(file,
  1224. "none retry canc nocan reset rcan\n");
  1225. }
  1226. if (cpu < num_possible_cpus() && cpu_online(cpu)) {
  1227. bcp = &per_cpu(bau_control, cpu);
  1228. stat = bcp->statp;
  1229. /* source side statistics */
  1230. seq_printf(file,
  1231. "cpu %d %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
  1232. cpu, bcp->nobau, stat->s_requestor,
  1233. cycles_2_us(stat->s_time),
  1234. stat->s_ntargself, stat->s_ntarglocals,
  1235. stat->s_ntargremotes, stat->s_ntargcpu,
  1236. stat->s_ntarglocaluvhub, stat->s_ntargremoteuvhub,
  1237. stat->s_ntarguvhub, stat->s_ntarguvhub16);
  1238. seq_printf(file, "%ld %ld %ld %ld %ld %ld ",
  1239. stat->s_ntarguvhub8, stat->s_ntarguvhub4,
  1240. stat->s_ntarguvhub2, stat->s_ntarguvhub1,
  1241. stat->s_dtimeout, stat->s_strongnacks);
  1242. seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
  1243. stat->s_retry_messages, stat->s_retriesok,
  1244. stat->s_resets_plug, stat->s_resets_timeout,
  1245. stat->s_giveup, stat->s_stimeout,
  1246. stat->s_busy, stat->s_throttles);
  1247. seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
  1248. stat->s_bau_disabled, stat->s_bau_reenabled,
  1249. stat->s_uv2_wars, stat->s_uv2_wars_hw,
  1250. stat->s_uv2_war_waits, stat->s_enters,
  1251. stat->s_ipifordisabled, stat->s_plugged,
  1252. stat->s_overipilimit, stat->s_giveuplimit,
  1253. stat->s_congested);
  1254. /* destination side statistics */
  1255. seq_printf(file,
  1256. "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld\n",
  1257. read_gmmr_sw_ack(uv_cpu_to_pnode(cpu)),
  1258. stat->d_requestee, cycles_2_us(stat->d_time),
  1259. stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
  1260. stat->d_nomsg, stat->d_retries, stat->d_canceled,
  1261. stat->d_nocanceled, stat->d_resets,
  1262. stat->d_rcanceled);
  1263. }
  1264. return 0;
  1265. }
  1266. /*
  1267. * Display the tunables thru debugfs
  1268. */
  1269. static ssize_t tunables_read(struct file *file, char __user *userbuf,
  1270. size_t count, loff_t *ppos)
  1271. {
  1272. char *buf;
  1273. int ret;
  1274. buf = kasprintf(GFP_KERNEL, "%s %s %s\n%d %d %d %d %d %d %d %d %d %d\n",
  1275. "max_concur plugged_delay plugsb4reset timeoutsb4reset",
  1276. "ipi_reset_limit complete_threshold congested_response_us",
  1277. "congested_reps disabled_period giveup_limit",
  1278. max_concurr, plugged_delay, plugsb4reset,
  1279. timeoutsb4reset, ipi_reset_limit, complete_threshold,
  1280. congested_respns_us, congested_reps, disabled_period,
  1281. giveup_limit);
  1282. if (!buf)
  1283. return -ENOMEM;
  1284. ret = simple_read_from_buffer(userbuf, count, ppos, buf, strlen(buf));
  1285. kfree(buf);
  1286. return ret;
  1287. }
  1288. /*
  1289. * handle a write to /proc/sgi_uv/ptc_statistics
  1290. * -1: reset the statistics
  1291. * 0: display meaning of the statistics
  1292. */
  1293. static ssize_t ptc_proc_write(struct file *file, const char __user *user,
  1294. size_t count, loff_t *data)
  1295. {
  1296. int cpu;
  1297. int i;
  1298. int elements;
  1299. long input_arg;
  1300. char optstr[64];
  1301. struct ptc_stats *stat;
  1302. if (count == 0 || count > sizeof(optstr))
  1303. return -EINVAL;
  1304. if (copy_from_user(optstr, user, count))
  1305. return -EFAULT;
  1306. optstr[count - 1] = '\0';
  1307. if (!strcmp(optstr, "on")) {
  1308. set_bau_on();
  1309. return count;
  1310. } else if (!strcmp(optstr, "off")) {
  1311. set_bau_off();
  1312. return count;
  1313. }
  1314. if (strict_strtol(optstr, 10, &input_arg) < 0) {
  1315. printk(KERN_DEBUG "%s is invalid\n", optstr);
  1316. return -EINVAL;
  1317. }
  1318. if (input_arg == 0) {
  1319. elements = ARRAY_SIZE(stat_description);
  1320. printk(KERN_DEBUG "# cpu: cpu number\n");
  1321. printk(KERN_DEBUG "Sender statistics:\n");
  1322. for (i = 0; i < elements; i++)
  1323. printk(KERN_DEBUG "%s\n", stat_description[i]);
  1324. } else if (input_arg == -1) {
  1325. for_each_present_cpu(cpu) {
  1326. stat = &per_cpu(ptcstats, cpu);
  1327. memset(stat, 0, sizeof(struct ptc_stats));
  1328. }
  1329. }
  1330. return count;
  1331. }
  1332. static int local_atoi(const char *name)
  1333. {
  1334. int val = 0;
  1335. for (;; name++) {
  1336. switch (*name) {
  1337. case '0' ... '9':
  1338. val = 10*val+(*name-'0');
  1339. break;
  1340. default:
  1341. return val;
  1342. }
  1343. }
  1344. }
  1345. /*
  1346. * Parse the values written to /sys/kernel/debug/sgi_uv/bau_tunables.
  1347. * Zero values reset them to defaults.
  1348. */
  1349. static int parse_tunables_write(struct bau_control *bcp, char *instr,
  1350. int count)
  1351. {
  1352. char *p;
  1353. char *q;
  1354. int cnt = 0;
  1355. int val;
  1356. int e = ARRAY_SIZE(tunables);
  1357. p = instr + strspn(instr, WHITESPACE);
  1358. q = p;
  1359. for (; *p; p = q + strspn(q, WHITESPACE)) {
  1360. q = p + strcspn(p, WHITESPACE);
  1361. cnt++;
  1362. if (q == p)
  1363. break;
  1364. }
  1365. if (cnt != e) {
  1366. printk(KERN_INFO "bau tunable error: should be %d values\n", e);
  1367. return -EINVAL;
  1368. }
  1369. p = instr + strspn(instr, WHITESPACE);
  1370. q = p;
  1371. for (cnt = 0; *p; p = q + strspn(q, WHITESPACE), cnt++) {
  1372. q = p + strcspn(p, WHITESPACE);
  1373. val = local_atoi(p);
  1374. switch (cnt) {
  1375. case 0:
  1376. if (val == 0) {
  1377. max_concurr = MAX_BAU_CONCURRENT;
  1378. max_concurr_const = MAX_BAU_CONCURRENT;
  1379. continue;
  1380. }
  1381. if (val < 1 || val > bcp->cpus_in_uvhub) {
  1382. printk(KERN_DEBUG
  1383. "Error: BAU max concurrent %d is invalid\n",
  1384. val);
  1385. return -EINVAL;
  1386. }
  1387. max_concurr = val;
  1388. max_concurr_const = val;
  1389. continue;
  1390. default:
  1391. if (val == 0)
  1392. *tunables[cnt].tunp = tunables[cnt].deflt;
  1393. else
  1394. *tunables[cnt].tunp = val;
  1395. continue;
  1396. }
  1397. if (q == p)
  1398. break;
  1399. }
  1400. return 0;
  1401. }
  1402. /*
  1403. * Handle a write to debugfs. (/sys/kernel/debug/sgi_uv/bau_tunables)
  1404. */
  1405. static ssize_t tunables_write(struct file *file, const char __user *user,
  1406. size_t count, loff_t *data)
  1407. {
  1408. int cpu;
  1409. int ret;
  1410. char instr[100];
  1411. struct bau_control *bcp;
  1412. if (count == 0 || count > sizeof(instr)-1)
  1413. return -EINVAL;
  1414. if (copy_from_user(instr, user, count))
  1415. return -EFAULT;
  1416. instr[count] = '\0';
  1417. cpu = get_cpu();
  1418. bcp = &per_cpu(bau_control, cpu);
  1419. ret = parse_tunables_write(bcp, instr, count);
  1420. put_cpu();
  1421. if (ret)
  1422. return ret;
  1423. for_each_present_cpu(cpu) {
  1424. bcp = &per_cpu(bau_control, cpu);
  1425. bcp->max_concurr = max_concurr;
  1426. bcp->max_concurr_const = max_concurr;
  1427. bcp->plugged_delay = plugged_delay;
  1428. bcp->plugsb4reset = plugsb4reset;
  1429. bcp->timeoutsb4reset = timeoutsb4reset;
  1430. bcp->ipi_reset_limit = ipi_reset_limit;
  1431. bcp->complete_threshold = complete_threshold;
  1432. bcp->cong_response_us = congested_respns_us;
  1433. bcp->cong_reps = congested_reps;
  1434. bcp->disabled_period = sec_2_cycles(disabled_period);
  1435. bcp->giveup_limit = giveup_limit;
  1436. }
  1437. return count;
  1438. }
  1439. static const struct seq_operations uv_ptc_seq_ops = {
  1440. .start = ptc_seq_start,
  1441. .next = ptc_seq_next,
  1442. .stop = ptc_seq_stop,
  1443. .show = ptc_seq_show
  1444. };
  1445. static int ptc_proc_open(struct inode *inode, struct file *file)
  1446. {
  1447. return seq_open(file, &uv_ptc_seq_ops);
  1448. }
  1449. static int tunables_open(struct inode *inode, struct file *file)
  1450. {
  1451. return 0;
  1452. }
  1453. static const struct file_operations proc_uv_ptc_operations = {
  1454. .open = ptc_proc_open,
  1455. .read = seq_read,
  1456. .write = ptc_proc_write,
  1457. .llseek = seq_lseek,
  1458. .release = seq_release,
  1459. };
  1460. static const struct file_operations tunables_fops = {
  1461. .open = tunables_open,
  1462. .read = tunables_read,
  1463. .write = tunables_write,
  1464. .llseek = default_llseek,
  1465. };
  1466. static int __init uv_ptc_init(void)
  1467. {
  1468. struct proc_dir_entry *proc_uv_ptc;
  1469. if (!is_uv_system())
  1470. return 0;
  1471. proc_uv_ptc = proc_create(UV_PTC_BASENAME, 0444, NULL,
  1472. &proc_uv_ptc_operations);
  1473. if (!proc_uv_ptc) {
  1474. printk(KERN_ERR "unable to create %s proc entry\n",
  1475. UV_PTC_BASENAME);
  1476. return -EINVAL;
  1477. }
  1478. tunables_dir = debugfs_create_dir(UV_BAU_TUNABLES_DIR, NULL);
  1479. if (!tunables_dir) {
  1480. printk(KERN_ERR "unable to create debugfs directory %s\n",
  1481. UV_BAU_TUNABLES_DIR);
  1482. return -EINVAL;
  1483. }
  1484. tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600,
  1485. tunables_dir, NULL, &tunables_fops);
  1486. if (!tunables_file) {
  1487. printk(KERN_ERR "unable to create debugfs file %s\n",
  1488. UV_BAU_TUNABLES_FILE);
  1489. return -EINVAL;
  1490. }
  1491. return 0;
  1492. }
  1493. /*
  1494. * Initialize the sending side's sending buffers.
  1495. */
  1496. static void activation_descriptor_init(int node, int pnode, int base_pnode)
  1497. {
  1498. int i;
  1499. int cpu;
  1500. int uv1 = 0;
  1501. unsigned long gpa;
  1502. unsigned long m;
  1503. unsigned long n;
  1504. size_t dsize;
  1505. struct bau_desc *bau_desc;
  1506. struct bau_desc *bd2;
  1507. struct uv1_bau_msg_header *uv1_hdr;
  1508. struct uv2_bau_msg_header *uv2_hdr;
  1509. struct bau_control *bcp;
  1510. /*
  1511. * each bau_desc is 64 bytes; there are 8 (ITEMS_PER_DESC)
  1512. * per cpu; and one per cpu on the uvhub (ADP_SZ)
  1513. */
  1514. dsize = sizeof(struct bau_desc) * ADP_SZ * ITEMS_PER_DESC;
  1515. bau_desc = kmalloc_node(dsize, GFP_KERNEL, node);
  1516. BUG_ON(!bau_desc);
  1517. gpa = uv_gpa(bau_desc);
  1518. n = uv_gpa_to_gnode(gpa);
  1519. m = uv_gpa_to_offset(gpa);
  1520. if (is_uv1_hub())
  1521. uv1 = 1;
  1522. /* the 14-bit pnode */
  1523. write_mmr_descriptor_base(pnode, (n << UV_DESC_PSHIFT | m));
  1524. /*
  1525. * Initializing all 8 (ITEMS_PER_DESC) descriptors for each
  1526. * cpu even though we only use the first one; one descriptor can
  1527. * describe a broadcast to 256 uv hubs.
  1528. */
  1529. for (i = 0, bd2 = bau_desc; i < (ADP_SZ * ITEMS_PER_DESC); i++, bd2++) {
  1530. memset(bd2, 0, sizeof(struct bau_desc));
  1531. if (uv1) {
  1532. uv1_hdr = &bd2->header.uv1_hdr;
  1533. uv1_hdr->swack_flag = 1;
  1534. /*
  1535. * The base_dest_nasid set in the message header
  1536. * is the nasid of the first uvhub in the partition.
  1537. * The bit map will indicate destination pnode numbers
  1538. * relative to that base. They may not be consecutive
  1539. * if nasid striding is being used.
  1540. */
  1541. uv1_hdr->base_dest_nasid =
  1542. UV_PNODE_TO_NASID(base_pnode);
  1543. uv1_hdr->dest_subnodeid = UV_LB_SUBNODEID;
  1544. uv1_hdr->command = UV_NET_ENDPOINT_INTD;
  1545. uv1_hdr->int_both = 1;
  1546. /*
  1547. * all others need to be set to zero:
  1548. * fairness chaining multilevel count replied_to
  1549. */
  1550. } else {
  1551. /*
  1552. * BIOS uses legacy mode, but UV2 hardware always
  1553. * uses native mode for selective broadcasts.
  1554. */
  1555. uv2_hdr = &bd2->header.uv2_hdr;
  1556. uv2_hdr->swack_flag = 1;
  1557. uv2_hdr->base_dest_nasid =
  1558. UV_PNODE_TO_NASID(base_pnode);
  1559. uv2_hdr->dest_subnodeid = UV_LB_SUBNODEID;
  1560. uv2_hdr->command = UV_NET_ENDPOINT_INTD;
  1561. }
  1562. }
  1563. for_each_present_cpu(cpu) {
  1564. if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
  1565. continue;
  1566. bcp = &per_cpu(bau_control, cpu);
  1567. bcp->descriptor_base = bau_desc;
  1568. }
  1569. }
  1570. /*
  1571. * initialize the destination side's receiving buffers
  1572. * entered for each uvhub in the partition
  1573. * - node is first node (kernel memory notion) on the uvhub
  1574. * - pnode is the uvhub's physical identifier
  1575. */
  1576. static void pq_init(int node, int pnode)
  1577. {
  1578. int cpu;
  1579. size_t plsize;
  1580. char *cp;
  1581. void *vp;
  1582. unsigned long pn;
  1583. unsigned long first;
  1584. unsigned long pn_first;
  1585. unsigned long last;
  1586. struct bau_pq_entry *pqp;
  1587. struct bau_control *bcp;
  1588. plsize = (DEST_Q_SIZE + 1) * sizeof(struct bau_pq_entry);
  1589. vp = kmalloc_node(plsize, GFP_KERNEL, node);
  1590. pqp = (struct bau_pq_entry *)vp;
  1591. BUG_ON(!pqp);
  1592. cp = (char *)pqp + 31;
  1593. pqp = (struct bau_pq_entry *)(((unsigned long)cp >> 5) << 5);
  1594. for_each_present_cpu(cpu) {
  1595. if (pnode != uv_cpu_to_pnode(cpu))
  1596. continue;
  1597. /* for every cpu on this pnode: */
  1598. bcp = &per_cpu(bau_control, cpu);
  1599. bcp->queue_first = pqp;
  1600. bcp->bau_msg_head = pqp;
  1601. bcp->queue_last = pqp + (DEST_Q_SIZE - 1);
  1602. }
  1603. /*
  1604. * need the gnode of where the memory was really allocated
  1605. */
  1606. pn = uv_gpa_to_gnode(uv_gpa(pqp));
  1607. first = uv_physnodeaddr(pqp);
  1608. pn_first = ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) | first;
  1609. last = uv_physnodeaddr(pqp + (DEST_Q_SIZE - 1));
  1610. write_mmr_payload_first(pnode, pn_first);
  1611. write_mmr_payload_tail(pnode, first);
  1612. write_mmr_payload_last(pnode, last);
  1613. write_gmmr_sw_ack(pnode, 0xffffUL);
  1614. /* in effect, all msg_type's are set to MSG_NOOP */
  1615. memset(pqp, 0, sizeof(struct bau_pq_entry) * DEST_Q_SIZE);
  1616. }
  1617. /*
  1618. * Initialization of each UV hub's structures
  1619. */
  1620. static void __init init_uvhub(int uvhub, int vector, int base_pnode)
  1621. {
  1622. int node;
  1623. int pnode;
  1624. unsigned long apicid;
  1625. node = uvhub_to_first_node(uvhub);
  1626. pnode = uv_blade_to_pnode(uvhub);
  1627. activation_descriptor_init(node, pnode, base_pnode);
  1628. pq_init(node, pnode);
  1629. /*
  1630. * The below initialization can't be in firmware because the
  1631. * messaging IRQ will be determined by the OS.
  1632. */
  1633. apicid = uvhub_to_first_apicid(uvhub) | uv_apicid_hibits;
  1634. write_mmr_data_config(pnode, ((apicid << 32) | vector));
  1635. }
  1636. /*
  1637. * We will set BAU_MISC_CONTROL with a timeout period.
  1638. * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
  1639. * So the destination timeout period has to be calculated from them.
  1640. */
  1641. static int calculate_destination_timeout(void)
  1642. {
  1643. unsigned long mmr_image;
  1644. int mult1;
  1645. int mult2;
  1646. int index;
  1647. int base;
  1648. int ret;
  1649. unsigned long ts_ns;
  1650. if (is_uv1_hub()) {
  1651. mult1 = SOFTACK_TIMEOUT_PERIOD & BAU_MISC_CONTROL_MULT_MASK;
  1652. mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
  1653. index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
  1654. mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
  1655. mult2 = (mmr_image >> BAU_TRANS_SHIFT) & BAU_TRANS_MASK;
  1656. ts_ns = timeout_base_ns[index];
  1657. ts_ns *= (mult1 * mult2);
  1658. ret = ts_ns / 1000;
  1659. } else {
  1660. /* 4 bits 0/1 for 10/80us base, 3 bits of multiplier */
  1661. mmr_image = uv_read_local_mmr(UVH_LB_BAU_MISC_CONTROL);
  1662. mmr_image = (mmr_image & UV_SA_MASK) >> UV_SA_SHFT;
  1663. if (mmr_image & (1L << UV2_ACK_UNITS_SHFT))
  1664. base = 80;
  1665. else
  1666. base = 10;
  1667. mult1 = mmr_image & UV2_ACK_MASK;
  1668. ret = mult1 * base;
  1669. }
  1670. return ret;
  1671. }
  1672. static void __init init_per_cpu_tunables(void)
  1673. {
  1674. int cpu;
  1675. struct bau_control *bcp;
  1676. for_each_present_cpu(cpu) {
  1677. bcp = &per_cpu(bau_control, cpu);
  1678. bcp->baudisabled = 0;
  1679. if (nobau)
  1680. bcp->nobau = 1;
  1681. bcp->statp = &per_cpu(ptcstats, cpu);
  1682. /* time interval to catch a hardware stay-busy bug */
  1683. bcp->timeout_interval = usec_2_cycles(2*timeout_us);
  1684. bcp->max_concurr = max_concurr;
  1685. bcp->max_concurr_const = max_concurr;
  1686. bcp->plugged_delay = plugged_delay;
  1687. bcp->plugsb4reset = plugsb4reset;
  1688. bcp->timeoutsb4reset = timeoutsb4reset;
  1689. bcp->ipi_reset_limit = ipi_reset_limit;
  1690. bcp->complete_threshold = complete_threshold;
  1691. bcp->cong_response_us = congested_respns_us;
  1692. bcp->cong_reps = congested_reps;
  1693. bcp->disabled_period = sec_2_cycles(disabled_period);
  1694. bcp->giveup_limit = giveup_limit;
  1695. spin_lock_init(&bcp->queue_lock);
  1696. spin_lock_init(&bcp->uvhub_lock);
  1697. spin_lock_init(&bcp->disable_lock);
  1698. }
  1699. }
  1700. /*
  1701. * Scan all cpus to collect blade and socket summaries.
  1702. */
  1703. static int __init get_cpu_topology(int base_pnode,
  1704. struct uvhub_desc *uvhub_descs,
  1705. unsigned char *uvhub_mask)
  1706. {
  1707. int cpu;
  1708. int pnode;
  1709. int uvhub;
  1710. int socket;
  1711. struct bau_control *bcp;
  1712. struct uvhub_desc *bdp;
  1713. struct socket_desc *sdp;
  1714. for_each_present_cpu(cpu) {
  1715. bcp = &per_cpu(bau_control, cpu);
  1716. memset(bcp, 0, sizeof(struct bau_control));
  1717. pnode = uv_cpu_hub_info(cpu)->pnode;
  1718. if ((pnode - base_pnode) >= UV_DISTRIBUTION_SIZE) {
  1719. printk(KERN_EMERG
  1720. "cpu %d pnode %d-%d beyond %d; BAU disabled\n",
  1721. cpu, pnode, base_pnode, UV_DISTRIBUTION_SIZE);
  1722. return 1;
  1723. }
  1724. bcp->osnode = cpu_to_node(cpu);
  1725. bcp->partition_base_pnode = base_pnode;
  1726. uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
  1727. *(uvhub_mask + (uvhub/8)) |= (1 << (uvhub%8));
  1728. bdp = &uvhub_descs[uvhub];
  1729. bdp->num_cpus++;
  1730. bdp->uvhub = uvhub;
  1731. bdp->pnode = pnode;
  1732. /* kludge: 'assuming' one node per socket, and assuming that
  1733. disabling a socket just leaves a gap in node numbers */
  1734. socket = bcp->osnode & 1;
  1735. bdp->socket_mask |= (1 << socket);
  1736. sdp = &bdp->socket[socket];
  1737. sdp->cpu_number[sdp->num_cpus] = cpu;
  1738. sdp->num_cpus++;
  1739. if (sdp->num_cpus > MAX_CPUS_PER_SOCKET) {
  1740. printk(KERN_EMERG "%d cpus per socket invalid\n",
  1741. sdp->num_cpus);
  1742. return 1;
  1743. }
  1744. }
  1745. return 0;
  1746. }
  1747. /*
  1748. * Each socket is to get a local array of pnodes/hubs.
  1749. */
  1750. static void make_per_cpu_thp(struct bau_control *smaster)
  1751. {
  1752. int cpu;
  1753. size_t hpsz = sizeof(struct hub_and_pnode) * num_possible_cpus();
  1754. smaster->thp = kmalloc_node(hpsz, GFP_KERNEL, smaster->osnode);
  1755. memset(smaster->thp, 0, hpsz);
  1756. for_each_present_cpu(cpu) {
  1757. smaster->thp[cpu].pnode = uv_cpu_hub_info(cpu)->pnode;
  1758. smaster->thp[cpu].uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
  1759. }
  1760. }
  1761. /*
  1762. * Each uvhub is to get a local cpumask.
  1763. */
  1764. static void make_per_hub_cpumask(struct bau_control *hmaster)
  1765. {
  1766. int sz = sizeof(cpumask_t);
  1767. hmaster->cpumask = kzalloc_node(sz, GFP_KERNEL, hmaster->osnode);
  1768. }
  1769. /*
  1770. * Initialize all the per_cpu information for the cpu's on a given socket,
  1771. * given what has been gathered into the socket_desc struct.
  1772. * And reports the chosen hub and socket masters back to the caller.
  1773. */
  1774. static int scan_sock(struct socket_desc *sdp, struct uvhub_desc *bdp,
  1775. struct bau_control **smasterp,
  1776. struct bau_control **hmasterp)
  1777. {
  1778. int i;
  1779. int cpu;
  1780. struct bau_control *bcp;
  1781. for (i = 0; i < sdp->num_cpus; i++) {
  1782. cpu = sdp->cpu_number[i];
  1783. bcp = &per_cpu(bau_control, cpu);
  1784. bcp->cpu = cpu;
  1785. if (i == 0) {
  1786. *smasterp = bcp;
  1787. if (!(*hmasterp))
  1788. *hmasterp = bcp;
  1789. }
  1790. bcp->cpus_in_uvhub = bdp->num_cpus;
  1791. bcp->cpus_in_socket = sdp->num_cpus;
  1792. bcp->socket_master = *smasterp;
  1793. bcp->uvhub = bdp->uvhub;
  1794. if (is_uv1_hub())
  1795. bcp->uvhub_version = 1;
  1796. else if (is_uv2_hub())
  1797. bcp->uvhub_version = 2;
  1798. else {
  1799. printk(KERN_EMERG "uvhub version not 1 or 2\n");
  1800. return 1;
  1801. }
  1802. bcp->uvhub_master = *hmasterp;
  1803. bcp->uvhub_cpu = uv_cpu_hub_info(cpu)->blade_processor_id;
  1804. if (bcp->uvhub_cpu >= MAX_CPUS_PER_UVHUB) {
  1805. printk(KERN_EMERG "%d cpus per uvhub invalid\n",
  1806. bcp->uvhub_cpu);
  1807. return 1;
  1808. }
  1809. }
  1810. return 0;
  1811. }
  1812. /*
  1813. * Summarize the blade and socket topology into the per_cpu structures.
  1814. */
  1815. static int __init summarize_uvhub_sockets(int nuvhubs,
  1816. struct uvhub_desc *uvhub_descs,
  1817. unsigned char *uvhub_mask)
  1818. {
  1819. int socket;
  1820. int uvhub;
  1821. unsigned short socket_mask;
  1822. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  1823. struct uvhub_desc *bdp;
  1824. struct bau_control *smaster = NULL;
  1825. struct bau_control *hmaster = NULL;
  1826. if (!(*(uvhub_mask + (uvhub/8)) & (1 << (uvhub%8))))
  1827. continue;
  1828. bdp = &uvhub_descs[uvhub];
  1829. socket_mask = bdp->socket_mask;
  1830. socket = 0;
  1831. while (socket_mask) {
  1832. struct socket_desc *sdp;
  1833. if ((socket_mask & 1)) {
  1834. sdp = &bdp->socket[socket];
  1835. if (scan_sock(sdp, bdp, &smaster, &hmaster))
  1836. return 1;
  1837. make_per_cpu_thp(smaster);
  1838. }
  1839. socket++;
  1840. socket_mask = (socket_mask >> 1);
  1841. }
  1842. make_per_hub_cpumask(hmaster);
  1843. }
  1844. return 0;
  1845. }
  1846. /*
  1847. * initialize the bau_control structure for each cpu
  1848. */
  1849. static int __init init_per_cpu(int nuvhubs, int base_part_pnode)
  1850. {
  1851. unsigned char *uvhub_mask;
  1852. void *vp;
  1853. struct uvhub_desc *uvhub_descs;
  1854. timeout_us = calculate_destination_timeout();
  1855. vp = kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
  1856. uvhub_descs = (struct uvhub_desc *)vp;
  1857. memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
  1858. uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL);
  1859. if (get_cpu_topology(base_part_pnode, uvhub_descs, uvhub_mask))
  1860. goto fail;
  1861. if (summarize_uvhub_sockets(nuvhubs, uvhub_descs, uvhub_mask))
  1862. goto fail;
  1863. kfree(uvhub_descs);
  1864. kfree(uvhub_mask);
  1865. init_per_cpu_tunables();
  1866. return 0;
  1867. fail:
  1868. kfree(uvhub_descs);
  1869. kfree(uvhub_mask);
  1870. return 1;
  1871. }
  1872. /*
  1873. * Initialization of BAU-related structures
  1874. */
  1875. static int __init uv_bau_init(void)
  1876. {
  1877. int uvhub;
  1878. int pnode;
  1879. int nuvhubs;
  1880. int cur_cpu;
  1881. int cpus;
  1882. int vector;
  1883. cpumask_var_t *mask;
  1884. if (!is_uv_system())
  1885. return 0;
  1886. for_each_possible_cpu(cur_cpu) {
  1887. mask = &per_cpu(uv_flush_tlb_mask, cur_cpu);
  1888. zalloc_cpumask_var_node(mask, GFP_KERNEL, cpu_to_node(cur_cpu));
  1889. }
  1890. nuvhubs = uv_num_possible_blades();
  1891. congested_cycles = usec_2_cycles(congested_respns_us);
  1892. uv_base_pnode = 0x7fffffff;
  1893. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  1894. cpus = uv_blade_nr_possible_cpus(uvhub);
  1895. if (cpus && (uv_blade_to_pnode(uvhub) < uv_base_pnode))
  1896. uv_base_pnode = uv_blade_to_pnode(uvhub);
  1897. }
  1898. enable_timeouts();
  1899. if (init_per_cpu(nuvhubs, uv_base_pnode)) {
  1900. set_bau_off();
  1901. nobau_perm = 1;
  1902. return 0;
  1903. }
  1904. vector = UV_BAU_MESSAGE;
  1905. for_each_possible_blade(uvhub)
  1906. if (uv_blade_nr_possible_cpus(uvhub))
  1907. init_uvhub(uvhub, vector, uv_base_pnode);
  1908. alloc_intr_gate(vector, uv_bau_message_intr1);
  1909. for_each_possible_blade(uvhub) {
  1910. if (uv_blade_nr_possible_cpus(uvhub)) {
  1911. unsigned long val;
  1912. unsigned long mmr;
  1913. pnode = uv_blade_to_pnode(uvhub);
  1914. /* INIT the bau */
  1915. val = 1L << 63;
  1916. write_gmmr_activation(pnode, val);
  1917. mmr = 1; /* should be 1 to broadcast to both sockets */
  1918. if (!is_uv1_hub())
  1919. write_mmr_data_broadcast(pnode, mmr);
  1920. }
  1921. }
  1922. return 0;
  1923. }
  1924. core_initcall(uv_bau_init);
  1925. fs_initcall(uv_ptc_init);