common.c 17 KB

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  1. /*
  2. * Low-Level PCI Support for PC
  3. *
  4. * (c) 1999--2000 Martin Mares <mj@ucw.cz>
  5. */
  6. #include <linux/sched.h>
  7. #include <linux/pci.h>
  8. #include <linux/ioport.h>
  9. #include <linux/init.h>
  10. #include <linux/dmi.h>
  11. #include <linux/slab.h>
  12. #include <asm-generic/pci-bridge.h>
  13. #include <asm/acpi.h>
  14. #include <asm/segment.h>
  15. #include <asm/io.h>
  16. #include <asm/smp.h>
  17. #include <asm/pci_x86.h>
  18. #include <asm/setup.h>
  19. unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
  20. PCI_PROBE_MMCONF;
  21. unsigned int pci_early_dump_regs;
  22. static int pci_bf_sort;
  23. static int smbios_type_b1_flag;
  24. int pci_routeirq;
  25. int noioapicquirk;
  26. #ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS
  27. int noioapicreroute = 0;
  28. #else
  29. int noioapicreroute = 1;
  30. #endif
  31. int pcibios_last_bus = -1;
  32. unsigned long pirq_table_addr;
  33. const struct pci_raw_ops *__read_mostly raw_pci_ops;
  34. const struct pci_raw_ops *__read_mostly raw_pci_ext_ops;
  35. int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
  36. int reg, int len, u32 *val)
  37. {
  38. if (domain == 0 && reg < 256 && raw_pci_ops)
  39. return raw_pci_ops->read(domain, bus, devfn, reg, len, val);
  40. if (raw_pci_ext_ops)
  41. return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
  42. return -EINVAL;
  43. }
  44. int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
  45. int reg, int len, u32 val)
  46. {
  47. if (domain == 0 && reg < 256 && raw_pci_ops)
  48. return raw_pci_ops->write(domain, bus, devfn, reg, len, val);
  49. if (raw_pci_ext_ops)
  50. return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);
  51. return -EINVAL;
  52. }
  53. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
  54. {
  55. return raw_pci_read(pci_domain_nr(bus), bus->number,
  56. devfn, where, size, value);
  57. }
  58. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
  59. {
  60. return raw_pci_write(pci_domain_nr(bus), bus->number,
  61. devfn, where, size, value);
  62. }
  63. struct pci_ops pci_root_ops = {
  64. .read = pci_read,
  65. .write = pci_write,
  66. };
  67. /*
  68. * This interrupt-safe spinlock protects all accesses to PCI
  69. * configuration space.
  70. */
  71. DEFINE_RAW_SPINLOCK(pci_config_lock);
  72. static int can_skip_ioresource_align(const struct dmi_system_id *d)
  73. {
  74. pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
  75. printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
  76. return 0;
  77. }
  78. static const struct dmi_system_id can_skip_pciprobe_dmi_table[] = {
  79. /*
  80. * Systems where PCI IO resource ISA alignment can be skipped
  81. * when the ISA enable bit in the bridge control is not set
  82. */
  83. {
  84. .callback = can_skip_ioresource_align,
  85. .ident = "IBM System x3800",
  86. .matches = {
  87. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  88. DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
  89. },
  90. },
  91. {
  92. .callback = can_skip_ioresource_align,
  93. .ident = "IBM System x3850",
  94. .matches = {
  95. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  96. DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
  97. },
  98. },
  99. {
  100. .callback = can_skip_ioresource_align,
  101. .ident = "IBM System x3950",
  102. .matches = {
  103. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  104. DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
  105. },
  106. },
  107. {}
  108. };
  109. void __init dmi_check_skip_isa_align(void)
  110. {
  111. dmi_check_system(can_skip_pciprobe_dmi_table);
  112. }
  113. static void pcibios_fixup_device_resources(struct pci_dev *dev)
  114. {
  115. struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE];
  116. struct resource *bar_r;
  117. int bar;
  118. if (pci_probe & PCI_NOASSIGN_BARS) {
  119. /*
  120. * If the BIOS did not assign the BAR, zero out the
  121. * resource so the kernel doesn't attmept to assign
  122. * it later on in pci_assign_unassigned_resources
  123. */
  124. for (bar = 0; bar <= PCI_STD_RESOURCE_END; bar++) {
  125. bar_r = &dev->resource[bar];
  126. if (bar_r->start == 0 && bar_r->end != 0) {
  127. bar_r->flags = 0;
  128. bar_r->end = 0;
  129. }
  130. }
  131. }
  132. if (pci_probe & PCI_NOASSIGN_ROMS) {
  133. if (rom_r->parent)
  134. return;
  135. if (rom_r->start) {
  136. /* we deal with BIOS assigned ROM later */
  137. return;
  138. }
  139. rom_r->start = rom_r->end = rom_r->flags = 0;
  140. }
  141. }
  142. /*
  143. * Called after each bus is probed, but before its children
  144. * are examined.
  145. */
  146. void pcibios_fixup_bus(struct pci_bus *b)
  147. {
  148. struct pci_dev *dev;
  149. pci_read_bridge_bases(b);
  150. list_for_each_entry(dev, &b->devices, bus_list)
  151. pcibios_fixup_device_resources(dev);
  152. }
  153. /*
  154. * Only use DMI information to set this if nothing was passed
  155. * on the kernel command line (which was parsed earlier).
  156. */
  157. static int set_bf_sort(const struct dmi_system_id *d)
  158. {
  159. if (pci_bf_sort == pci_bf_sort_default) {
  160. pci_bf_sort = pci_dmi_bf;
  161. printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
  162. }
  163. return 0;
  164. }
  165. static void read_dmi_type_b1(const struct dmi_header *dm,
  166. void *private_data)
  167. {
  168. u8 *d = (u8 *)dm + 4;
  169. if (dm->type != 0xB1)
  170. return;
  171. switch (((*(u32 *)d) >> 9) & 0x03) {
  172. case 0x00:
  173. printk(KERN_INFO "dmi type 0xB1 record - unknown flag\n");
  174. break;
  175. case 0x01: /* set pci=bfsort */
  176. smbios_type_b1_flag = 1;
  177. break;
  178. case 0x02: /* do not set pci=bfsort */
  179. smbios_type_b1_flag = 2;
  180. break;
  181. default:
  182. break;
  183. }
  184. }
  185. static int find_sort_method(const struct dmi_system_id *d)
  186. {
  187. dmi_walk(read_dmi_type_b1, NULL);
  188. if (smbios_type_b1_flag == 1) {
  189. set_bf_sort(d);
  190. return 0;
  191. }
  192. return -1;
  193. }
  194. /*
  195. * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
  196. */
  197. #ifdef __i386__
  198. static int assign_all_busses(const struct dmi_system_id *d)
  199. {
  200. pci_probe |= PCI_ASSIGN_ALL_BUSSES;
  201. printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
  202. " (pci=assign-busses)\n", d->ident);
  203. return 0;
  204. }
  205. #endif
  206. static int set_scan_all(const struct dmi_system_id *d)
  207. {
  208. printk(KERN_INFO "PCI: %s detected, enabling pci=pcie_scan_all\n",
  209. d->ident);
  210. pci_add_flags(PCI_SCAN_ALL_PCIE_DEVS);
  211. return 0;
  212. }
  213. static const struct dmi_system_id pciprobe_dmi_table[] = {
  214. #ifdef __i386__
  215. /*
  216. * Laptops which need pci=assign-busses to see Cardbus cards
  217. */
  218. {
  219. .callback = assign_all_busses,
  220. .ident = "Samsung X20 Laptop",
  221. .matches = {
  222. DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
  223. DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
  224. },
  225. },
  226. #endif /* __i386__ */
  227. {
  228. .callback = set_bf_sort,
  229. .ident = "Dell PowerEdge 1950",
  230. .matches = {
  231. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  232. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
  233. },
  234. },
  235. {
  236. .callback = set_bf_sort,
  237. .ident = "Dell PowerEdge 1955",
  238. .matches = {
  239. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  240. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
  241. },
  242. },
  243. {
  244. .callback = set_bf_sort,
  245. .ident = "Dell PowerEdge 2900",
  246. .matches = {
  247. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  248. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
  249. },
  250. },
  251. {
  252. .callback = set_bf_sort,
  253. .ident = "Dell PowerEdge 2950",
  254. .matches = {
  255. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  256. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
  257. },
  258. },
  259. {
  260. .callback = set_bf_sort,
  261. .ident = "Dell PowerEdge R900",
  262. .matches = {
  263. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  264. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
  265. },
  266. },
  267. {
  268. .callback = find_sort_method,
  269. .ident = "Dell System",
  270. .matches = {
  271. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"),
  272. },
  273. },
  274. {
  275. .callback = set_bf_sort,
  276. .ident = "HP ProLiant BL20p G3",
  277. .matches = {
  278. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  279. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
  280. },
  281. },
  282. {
  283. .callback = set_bf_sort,
  284. .ident = "HP ProLiant BL20p G4",
  285. .matches = {
  286. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  287. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
  288. },
  289. },
  290. {
  291. .callback = set_bf_sort,
  292. .ident = "HP ProLiant BL30p G1",
  293. .matches = {
  294. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  295. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
  296. },
  297. },
  298. {
  299. .callback = set_bf_sort,
  300. .ident = "HP ProLiant BL25p G1",
  301. .matches = {
  302. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  303. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
  304. },
  305. },
  306. {
  307. .callback = set_bf_sort,
  308. .ident = "HP ProLiant BL35p G1",
  309. .matches = {
  310. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  311. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
  312. },
  313. },
  314. {
  315. .callback = set_bf_sort,
  316. .ident = "HP ProLiant BL45p G1",
  317. .matches = {
  318. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  319. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
  320. },
  321. },
  322. {
  323. .callback = set_bf_sort,
  324. .ident = "HP ProLiant BL45p G2",
  325. .matches = {
  326. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  327. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
  328. },
  329. },
  330. {
  331. .callback = set_bf_sort,
  332. .ident = "HP ProLiant BL460c G1",
  333. .matches = {
  334. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  335. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
  336. },
  337. },
  338. {
  339. .callback = set_bf_sort,
  340. .ident = "HP ProLiant BL465c G1",
  341. .matches = {
  342. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  343. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
  344. },
  345. },
  346. {
  347. .callback = set_bf_sort,
  348. .ident = "HP ProLiant BL480c G1",
  349. .matches = {
  350. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  351. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
  352. },
  353. },
  354. {
  355. .callback = set_bf_sort,
  356. .ident = "HP ProLiant BL685c G1",
  357. .matches = {
  358. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  359. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
  360. },
  361. },
  362. {
  363. .callback = set_bf_sort,
  364. .ident = "HP ProLiant DL360",
  365. .matches = {
  366. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  367. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL360"),
  368. },
  369. },
  370. {
  371. .callback = set_bf_sort,
  372. .ident = "HP ProLiant DL380",
  373. .matches = {
  374. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  375. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL380"),
  376. },
  377. },
  378. #ifdef __i386__
  379. {
  380. .callback = assign_all_busses,
  381. .ident = "Compaq EVO N800c",
  382. .matches = {
  383. DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
  384. DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"),
  385. },
  386. },
  387. #endif
  388. {
  389. .callback = set_bf_sort,
  390. .ident = "HP ProLiant DL385 G2",
  391. .matches = {
  392. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  393. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
  394. },
  395. },
  396. {
  397. .callback = set_bf_sort,
  398. .ident = "HP ProLiant DL585 G2",
  399. .matches = {
  400. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  401. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
  402. },
  403. },
  404. {
  405. .callback = set_scan_all,
  406. .ident = "Stratus/NEC ftServer",
  407. .matches = {
  408. DMI_MATCH(DMI_SYS_VENDOR, "Stratus"),
  409. DMI_MATCH(DMI_PRODUCT_NAME, "ftServer"),
  410. },
  411. },
  412. {}
  413. };
  414. void __init dmi_check_pciprobe(void)
  415. {
  416. dmi_check_system(pciprobe_dmi_table);
  417. }
  418. struct pci_bus *pcibios_scan_root(int busnum)
  419. {
  420. struct pci_bus *bus = NULL;
  421. while ((bus = pci_find_next_bus(bus)) != NULL) {
  422. if (bus->number == busnum) {
  423. /* Already scanned */
  424. return bus;
  425. }
  426. }
  427. return pci_scan_bus_on_node(busnum, &pci_root_ops,
  428. get_mp_bus_to_node(busnum));
  429. }
  430. void __init pcibios_set_cache_line_size(void)
  431. {
  432. struct cpuinfo_x86 *c = &boot_cpu_data;
  433. /*
  434. * Set PCI cacheline size to that of the CPU if the CPU has reported it.
  435. * (For older CPUs that don't support cpuid, we se it to 32 bytes
  436. * It's also good for 386/486s (which actually have 16)
  437. * as quite a few PCI devices do not support smaller values.
  438. */
  439. if (c->x86_clflush_size > 0) {
  440. pci_dfl_cache_line_size = c->x86_clflush_size >> 2;
  441. printk(KERN_DEBUG "PCI: pci_cache_line_size set to %d bytes\n",
  442. pci_dfl_cache_line_size << 2);
  443. } else {
  444. pci_dfl_cache_line_size = 32 >> 2;
  445. printk(KERN_DEBUG "PCI: Unknown cacheline size. Setting to 32 bytes\n");
  446. }
  447. }
  448. int __init pcibios_init(void)
  449. {
  450. if (!raw_pci_ops) {
  451. printk(KERN_WARNING "PCI: System does not support PCI\n");
  452. return 0;
  453. }
  454. pcibios_set_cache_line_size();
  455. pcibios_resource_survey();
  456. if (pci_bf_sort >= pci_force_bf)
  457. pci_sort_breadthfirst();
  458. return 0;
  459. }
  460. char * __init pcibios_setup(char *str)
  461. {
  462. if (!strcmp(str, "off")) {
  463. pci_probe = 0;
  464. return NULL;
  465. } else if (!strcmp(str, "bfsort")) {
  466. pci_bf_sort = pci_force_bf;
  467. return NULL;
  468. } else if (!strcmp(str, "nobfsort")) {
  469. pci_bf_sort = pci_force_nobf;
  470. return NULL;
  471. }
  472. #ifdef CONFIG_PCI_BIOS
  473. else if (!strcmp(str, "bios")) {
  474. pci_probe = PCI_PROBE_BIOS;
  475. return NULL;
  476. } else if (!strcmp(str, "nobios")) {
  477. pci_probe &= ~PCI_PROBE_BIOS;
  478. return NULL;
  479. } else if (!strcmp(str, "biosirq")) {
  480. pci_probe |= PCI_BIOS_IRQ_SCAN;
  481. return NULL;
  482. } else if (!strncmp(str, "pirqaddr=", 9)) {
  483. pirq_table_addr = simple_strtoul(str+9, NULL, 0);
  484. return NULL;
  485. }
  486. #endif
  487. #ifdef CONFIG_PCI_DIRECT
  488. else if (!strcmp(str, "conf1")) {
  489. pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
  490. return NULL;
  491. }
  492. else if (!strcmp(str, "conf2")) {
  493. pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
  494. return NULL;
  495. }
  496. #endif
  497. #ifdef CONFIG_PCI_MMCONFIG
  498. else if (!strcmp(str, "nommconf")) {
  499. pci_probe &= ~PCI_PROBE_MMCONF;
  500. return NULL;
  501. }
  502. else if (!strcmp(str, "check_enable_amd_mmconf")) {
  503. pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
  504. return NULL;
  505. }
  506. #endif
  507. else if (!strcmp(str, "noacpi")) {
  508. acpi_noirq_set();
  509. return NULL;
  510. }
  511. else if (!strcmp(str, "noearly")) {
  512. pci_probe |= PCI_PROBE_NOEARLY;
  513. return NULL;
  514. }
  515. #ifndef CONFIG_X86_VISWS
  516. else if (!strcmp(str, "usepirqmask")) {
  517. pci_probe |= PCI_USE_PIRQ_MASK;
  518. return NULL;
  519. } else if (!strncmp(str, "irqmask=", 8)) {
  520. pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
  521. return NULL;
  522. } else if (!strncmp(str, "lastbus=", 8)) {
  523. pcibios_last_bus = simple_strtol(str+8, NULL, 0);
  524. return NULL;
  525. }
  526. #endif
  527. else if (!strcmp(str, "rom")) {
  528. pci_probe |= PCI_ASSIGN_ROMS;
  529. return NULL;
  530. } else if (!strcmp(str, "norom")) {
  531. pci_probe |= PCI_NOASSIGN_ROMS;
  532. return NULL;
  533. } else if (!strcmp(str, "nobar")) {
  534. pci_probe |= PCI_NOASSIGN_BARS;
  535. return NULL;
  536. } else if (!strcmp(str, "assign-busses")) {
  537. pci_probe |= PCI_ASSIGN_ALL_BUSSES;
  538. return NULL;
  539. } else if (!strcmp(str, "use_crs")) {
  540. pci_probe |= PCI_USE__CRS;
  541. return NULL;
  542. } else if (!strcmp(str, "nocrs")) {
  543. pci_probe |= PCI_ROOT_NO_CRS;
  544. return NULL;
  545. } else if (!strcmp(str, "earlydump")) {
  546. pci_early_dump_regs = 1;
  547. return NULL;
  548. } else if (!strcmp(str, "routeirq")) {
  549. pci_routeirq = 1;
  550. return NULL;
  551. } else if (!strcmp(str, "skip_isa_align")) {
  552. pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
  553. return NULL;
  554. } else if (!strcmp(str, "noioapicquirk")) {
  555. noioapicquirk = 1;
  556. return NULL;
  557. } else if (!strcmp(str, "ioapicreroute")) {
  558. if (noioapicreroute != -1)
  559. noioapicreroute = 0;
  560. return NULL;
  561. } else if (!strcmp(str, "noioapicreroute")) {
  562. if (noioapicreroute != -1)
  563. noioapicreroute = 1;
  564. return NULL;
  565. }
  566. return str;
  567. }
  568. unsigned int pcibios_assign_all_busses(void)
  569. {
  570. return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
  571. }
  572. int pcibios_add_device(struct pci_dev *dev)
  573. {
  574. struct setup_data *data;
  575. struct pci_setup_rom *rom;
  576. u64 pa_data;
  577. pa_data = boot_params.hdr.setup_data;
  578. while (pa_data) {
  579. data = phys_to_virt(pa_data);
  580. if (data->type == SETUP_PCI) {
  581. rom = (struct pci_setup_rom *)data;
  582. if ((pci_domain_nr(dev->bus) == rom->segment) &&
  583. (dev->bus->number == rom->bus) &&
  584. (PCI_SLOT(dev->devfn) == rom->device) &&
  585. (PCI_FUNC(dev->devfn) == rom->function) &&
  586. (dev->vendor == rom->vendor) &&
  587. (dev->device == rom->devid)) {
  588. dev->rom = pa_data +
  589. offsetof(struct pci_setup_rom, romdata);
  590. dev->romlen = rom->pcilen;
  591. }
  592. }
  593. pa_data = data->next;
  594. }
  595. return 0;
  596. }
  597. int pcibios_enable_device(struct pci_dev *dev, int mask)
  598. {
  599. int err;
  600. if ((err = pci_enable_resources(dev, mask)) < 0)
  601. return err;
  602. if (!pci_dev_msi_enabled(dev))
  603. return pcibios_enable_irq(dev);
  604. return 0;
  605. }
  606. void pcibios_disable_device (struct pci_dev *dev)
  607. {
  608. if (!pci_dev_msi_enabled(dev) && pcibios_disable_irq)
  609. pcibios_disable_irq(dev);
  610. }
  611. int pci_ext_cfg_avail(void)
  612. {
  613. if (raw_pci_ext_ops)
  614. return 1;
  615. else
  616. return 0;
  617. }
  618. struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
  619. {
  620. LIST_HEAD(resources);
  621. struct pci_bus *bus = NULL;
  622. struct pci_sysdata *sd;
  623. /*
  624. * Allocate per-root-bus (not per bus) arch-specific data.
  625. * TODO: leak; this memory is never freed.
  626. * It's arguable whether it's worth the trouble to care.
  627. */
  628. sd = kzalloc(sizeof(*sd), GFP_KERNEL);
  629. if (!sd) {
  630. printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busno);
  631. return NULL;
  632. }
  633. sd->node = node;
  634. x86_pci_root_bus_resources(busno, &resources);
  635. printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busno);
  636. bus = pci_scan_root_bus(NULL, busno, ops, sd, &resources);
  637. if (!bus) {
  638. pci_free_resource_list(&resources);
  639. kfree(sd);
  640. }
  641. return bus;
  642. }
  643. struct pci_bus *pci_scan_bus_with_sysdata(int busno)
  644. {
  645. return pci_scan_bus_on_node(busno, &pci_root_ops, -1);
  646. }
  647. /*
  648. * NUMA info for PCI busses
  649. *
  650. * Early arch code is responsible for filling in reasonable values here.
  651. * A node id of "-1" means "use current node". In other words, if a bus
  652. * has a -1 node id, it's not tightly coupled to any particular chunk
  653. * of memory (as is the case on some Nehalem systems).
  654. */
  655. #ifdef CONFIG_NUMA
  656. #define BUS_NR 256
  657. #ifdef CONFIG_X86_64
  658. static int mp_bus_to_node[BUS_NR] = {
  659. [0 ... BUS_NR - 1] = -1
  660. };
  661. void set_mp_bus_to_node(int busnum, int node)
  662. {
  663. if (busnum >= 0 && busnum < BUS_NR)
  664. mp_bus_to_node[busnum] = node;
  665. }
  666. int get_mp_bus_to_node(int busnum)
  667. {
  668. int node = -1;
  669. if (busnum < 0 || busnum > (BUS_NR - 1))
  670. return node;
  671. node = mp_bus_to_node[busnum];
  672. /*
  673. * let numa_node_id to decide it later in dma_alloc_pages
  674. * if there is no ram on that node
  675. */
  676. if (node != -1 && !node_online(node))
  677. node = -1;
  678. return node;
  679. }
  680. #else /* CONFIG_X86_32 */
  681. static int mp_bus_to_node[BUS_NR] = {
  682. [0 ... BUS_NR - 1] = -1
  683. };
  684. void set_mp_bus_to_node(int busnum, int node)
  685. {
  686. if (busnum >= 0 && busnum < BUS_NR)
  687. mp_bus_to_node[busnum] = (unsigned char) node;
  688. }
  689. int get_mp_bus_to_node(int busnum)
  690. {
  691. int node;
  692. if (busnum < 0 || busnum > (BUS_NR - 1))
  693. return 0;
  694. node = mp_bus_to_node[busnum];
  695. return node;
  696. }
  697. #endif /* CONFIG_X86_32 */
  698. #endif /* CONFIG_NUMA */