i8254.c 19 KB

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  1. /*
  2. * 8253/8254 interval timer emulation
  3. *
  4. * Copyright (c) 2003-2004 Fabrice Bellard
  5. * Copyright (c) 2006 Intel Corporation
  6. * Copyright (c) 2007 Keir Fraser, XenSource Inc
  7. * Copyright (c) 2008 Intel Corporation
  8. * Copyright 2009 Red Hat, Inc. and/or its affiliates.
  9. *
  10. * Permission is hereby granted, free of charge, to any person obtaining a copy
  11. * of this software and associated documentation files (the "Software"), to deal
  12. * in the Software without restriction, including without limitation the rights
  13. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  14. * copies of the Software, and to permit persons to whom the Software is
  15. * furnished to do so, subject to the following conditions:
  16. *
  17. * The above copyright notice and this permission notice shall be included in
  18. * all copies or substantial portions of the Software.
  19. *
  20. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  21. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  22. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  23. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  24. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  25. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  26. * THE SOFTWARE.
  27. *
  28. * Authors:
  29. * Sheng Yang <sheng.yang@intel.com>
  30. * Based on QEMU and Xen.
  31. */
  32. #define pr_fmt(fmt) "pit: " fmt
  33. #include <linux/kvm_host.h>
  34. #include <linux/slab.h>
  35. #include "irq.h"
  36. #include "i8254.h"
  37. #ifndef CONFIG_X86_64
  38. #define mod_64(x, y) ((x) - (y) * div64_u64(x, y))
  39. #else
  40. #define mod_64(x, y) ((x) % (y))
  41. #endif
  42. #define RW_STATE_LSB 1
  43. #define RW_STATE_MSB 2
  44. #define RW_STATE_WORD0 3
  45. #define RW_STATE_WORD1 4
  46. /* Compute with 96 bit intermediate result: (a*b)/c */
  47. static u64 muldiv64(u64 a, u32 b, u32 c)
  48. {
  49. union {
  50. u64 ll;
  51. struct {
  52. u32 low, high;
  53. } l;
  54. } u, res;
  55. u64 rl, rh;
  56. u.ll = a;
  57. rl = (u64)u.l.low * (u64)b;
  58. rh = (u64)u.l.high * (u64)b;
  59. rh += (rl >> 32);
  60. res.l.high = div64_u64(rh, c);
  61. res.l.low = div64_u64(((mod_64(rh, c) << 32) + (rl & 0xffffffff)), c);
  62. return res.ll;
  63. }
  64. static void pit_set_gate(struct kvm *kvm, int channel, u32 val)
  65. {
  66. struct kvm_kpit_channel_state *c =
  67. &kvm->arch.vpit->pit_state.channels[channel];
  68. WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
  69. switch (c->mode) {
  70. default:
  71. case 0:
  72. case 4:
  73. /* XXX: just disable/enable counting */
  74. break;
  75. case 1:
  76. case 2:
  77. case 3:
  78. case 5:
  79. /* Restart counting on rising edge. */
  80. if (c->gate < val)
  81. c->count_load_time = ktime_get();
  82. break;
  83. }
  84. c->gate = val;
  85. }
  86. static int pit_get_gate(struct kvm *kvm, int channel)
  87. {
  88. WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
  89. return kvm->arch.vpit->pit_state.channels[channel].gate;
  90. }
  91. static s64 __kpit_elapsed(struct kvm *kvm)
  92. {
  93. s64 elapsed;
  94. ktime_t remaining;
  95. struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
  96. if (!ps->period)
  97. return 0;
  98. /*
  99. * The Counter does not stop when it reaches zero. In
  100. * Modes 0, 1, 4, and 5 the Counter ``wraps around'' to
  101. * the highest count, either FFFF hex for binary counting
  102. * or 9999 for BCD counting, and continues counting.
  103. * Modes 2 and 3 are periodic; the Counter reloads
  104. * itself with the initial count and continues counting
  105. * from there.
  106. */
  107. remaining = hrtimer_get_remaining(&ps->timer);
  108. elapsed = ps->period - ktime_to_ns(remaining);
  109. return elapsed;
  110. }
  111. static s64 kpit_elapsed(struct kvm *kvm, struct kvm_kpit_channel_state *c,
  112. int channel)
  113. {
  114. if (channel == 0)
  115. return __kpit_elapsed(kvm);
  116. return ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
  117. }
  118. static int pit_get_count(struct kvm *kvm, int channel)
  119. {
  120. struct kvm_kpit_channel_state *c =
  121. &kvm->arch.vpit->pit_state.channels[channel];
  122. s64 d, t;
  123. int counter;
  124. WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
  125. t = kpit_elapsed(kvm, c, channel);
  126. d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
  127. switch (c->mode) {
  128. case 0:
  129. case 1:
  130. case 4:
  131. case 5:
  132. counter = (c->count - d) & 0xffff;
  133. break;
  134. case 3:
  135. /* XXX: may be incorrect for odd counts */
  136. counter = c->count - (mod_64((2 * d), c->count));
  137. break;
  138. default:
  139. counter = c->count - mod_64(d, c->count);
  140. break;
  141. }
  142. return counter;
  143. }
  144. static int pit_get_out(struct kvm *kvm, int channel)
  145. {
  146. struct kvm_kpit_channel_state *c =
  147. &kvm->arch.vpit->pit_state.channels[channel];
  148. s64 d, t;
  149. int out;
  150. WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
  151. t = kpit_elapsed(kvm, c, channel);
  152. d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
  153. switch (c->mode) {
  154. default:
  155. case 0:
  156. out = (d >= c->count);
  157. break;
  158. case 1:
  159. out = (d < c->count);
  160. break;
  161. case 2:
  162. out = ((mod_64(d, c->count) == 0) && (d != 0));
  163. break;
  164. case 3:
  165. out = (mod_64(d, c->count) < ((c->count + 1) >> 1));
  166. break;
  167. case 4:
  168. case 5:
  169. out = (d == c->count);
  170. break;
  171. }
  172. return out;
  173. }
  174. static void pit_latch_count(struct kvm *kvm, int channel)
  175. {
  176. struct kvm_kpit_channel_state *c =
  177. &kvm->arch.vpit->pit_state.channels[channel];
  178. WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
  179. if (!c->count_latched) {
  180. c->latched_count = pit_get_count(kvm, channel);
  181. c->count_latched = c->rw_mode;
  182. }
  183. }
  184. static void pit_latch_status(struct kvm *kvm, int channel)
  185. {
  186. struct kvm_kpit_channel_state *c =
  187. &kvm->arch.vpit->pit_state.channels[channel];
  188. WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
  189. if (!c->status_latched) {
  190. /* TODO: Return NULL COUNT (bit 6). */
  191. c->status = ((pit_get_out(kvm, channel) << 7) |
  192. (c->rw_mode << 4) |
  193. (c->mode << 1) |
  194. c->bcd);
  195. c->status_latched = 1;
  196. }
  197. }
  198. static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian)
  199. {
  200. struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state,
  201. irq_ack_notifier);
  202. int value;
  203. spin_lock(&ps->inject_lock);
  204. value = atomic_dec_return(&ps->pending);
  205. if (value < 0)
  206. /* spurious acks can be generated if, for example, the
  207. * PIC is being reset. Handle it gracefully here
  208. */
  209. atomic_inc(&ps->pending);
  210. else if (value > 0)
  211. /* in this case, we had multiple outstanding pit interrupts
  212. * that we needed to inject. Reinject
  213. */
  214. queue_kthread_work(&ps->pit->worker, &ps->pit->expired);
  215. ps->irq_ack = 1;
  216. spin_unlock(&ps->inject_lock);
  217. }
  218. void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu)
  219. {
  220. struct kvm_pit *pit = vcpu->kvm->arch.vpit;
  221. struct hrtimer *timer;
  222. if (!kvm_vcpu_is_bsp(vcpu) || !pit)
  223. return;
  224. timer = &pit->pit_state.timer;
  225. if (hrtimer_cancel(timer))
  226. hrtimer_start_expires(timer, HRTIMER_MODE_ABS);
  227. }
  228. static void destroy_pit_timer(struct kvm_pit *pit)
  229. {
  230. hrtimer_cancel(&pit->pit_state.timer);
  231. flush_kthread_work(&pit->expired);
  232. }
  233. static void pit_do_work(struct kthread_work *work)
  234. {
  235. struct kvm_pit *pit = container_of(work, struct kvm_pit, expired);
  236. struct kvm *kvm = pit->kvm;
  237. struct kvm_vcpu *vcpu;
  238. int i;
  239. struct kvm_kpit_state *ps = &pit->pit_state;
  240. int inject = 0;
  241. /* Try to inject pending interrupts when
  242. * last one has been acked.
  243. */
  244. spin_lock(&ps->inject_lock);
  245. if (ps->irq_ack) {
  246. ps->irq_ack = 0;
  247. inject = 1;
  248. }
  249. spin_unlock(&ps->inject_lock);
  250. if (inject) {
  251. kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 1);
  252. kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 0);
  253. /*
  254. * Provides NMI watchdog support via Virtual Wire mode.
  255. * The route is: PIT -> PIC -> LVT0 in NMI mode.
  256. *
  257. * Note: Our Virtual Wire implementation is simplified, only
  258. * propagating PIT interrupts to all VCPUs when they have set
  259. * LVT0 to NMI delivery. Other PIC interrupts are just sent to
  260. * VCPU0, and only if its LVT0 is in EXTINT mode.
  261. */
  262. if (kvm->arch.vapics_in_nmi_mode > 0)
  263. kvm_for_each_vcpu(i, vcpu, kvm)
  264. kvm_apic_nmi_wd_deliver(vcpu);
  265. }
  266. }
  267. static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
  268. {
  269. struct kvm_kpit_state *ps = container_of(data, struct kvm_kpit_state, timer);
  270. struct kvm_pit *pt = ps->kvm->arch.vpit;
  271. if (ps->reinject || !atomic_read(&ps->pending)) {
  272. atomic_inc(&ps->pending);
  273. queue_kthread_work(&pt->worker, &pt->expired);
  274. }
  275. if (ps->is_periodic) {
  276. hrtimer_add_expires_ns(&ps->timer, ps->period);
  277. return HRTIMER_RESTART;
  278. } else
  279. return HRTIMER_NORESTART;
  280. }
  281. static void create_pit_timer(struct kvm *kvm, u32 val, int is_period)
  282. {
  283. struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
  284. s64 interval;
  285. if (!irqchip_in_kernel(kvm) || ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)
  286. return;
  287. interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
  288. pr_debug("create pit timer, interval is %llu nsec\n", interval);
  289. /* TODO The new value only affected after the retriggered */
  290. hrtimer_cancel(&ps->timer);
  291. flush_kthread_work(&ps->pit->expired);
  292. ps->period = interval;
  293. ps->is_periodic = is_period;
  294. ps->timer.function = pit_timer_fn;
  295. ps->kvm = ps->pit->kvm;
  296. atomic_set(&ps->pending, 0);
  297. ps->irq_ack = 1;
  298. hrtimer_start(&ps->timer, ktime_add_ns(ktime_get(), interval),
  299. HRTIMER_MODE_ABS);
  300. }
  301. static void pit_load_count(struct kvm *kvm, int channel, u32 val)
  302. {
  303. struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
  304. WARN_ON(!mutex_is_locked(&ps->lock));
  305. pr_debug("load_count val is %d, channel is %d\n", val, channel);
  306. /*
  307. * The largest possible initial count is 0; this is equivalent
  308. * to 216 for binary counting and 104 for BCD counting.
  309. */
  310. if (val == 0)
  311. val = 0x10000;
  312. ps->channels[channel].count = val;
  313. if (channel != 0) {
  314. ps->channels[channel].count_load_time = ktime_get();
  315. return;
  316. }
  317. /* Two types of timer
  318. * mode 1 is one shot, mode 2 is period, otherwise del timer */
  319. switch (ps->channels[0].mode) {
  320. case 0:
  321. case 1:
  322. /* FIXME: enhance mode 4 precision */
  323. case 4:
  324. create_pit_timer(kvm, val, 0);
  325. break;
  326. case 2:
  327. case 3:
  328. create_pit_timer(kvm, val, 1);
  329. break;
  330. default:
  331. destroy_pit_timer(kvm->arch.vpit);
  332. }
  333. }
  334. void kvm_pit_load_count(struct kvm *kvm, int channel, u32 val, int hpet_legacy_start)
  335. {
  336. u8 saved_mode;
  337. if (hpet_legacy_start) {
  338. /* save existing mode for later reenablement */
  339. saved_mode = kvm->arch.vpit->pit_state.channels[0].mode;
  340. kvm->arch.vpit->pit_state.channels[0].mode = 0xff; /* disable timer */
  341. pit_load_count(kvm, channel, val);
  342. kvm->arch.vpit->pit_state.channels[0].mode = saved_mode;
  343. } else {
  344. pit_load_count(kvm, channel, val);
  345. }
  346. }
  347. static inline struct kvm_pit *dev_to_pit(struct kvm_io_device *dev)
  348. {
  349. return container_of(dev, struct kvm_pit, dev);
  350. }
  351. static inline struct kvm_pit *speaker_to_pit(struct kvm_io_device *dev)
  352. {
  353. return container_of(dev, struct kvm_pit, speaker_dev);
  354. }
  355. static inline int pit_in_range(gpa_t addr)
  356. {
  357. return ((addr >= KVM_PIT_BASE_ADDRESS) &&
  358. (addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH));
  359. }
  360. static int pit_ioport_write(struct kvm_io_device *this,
  361. gpa_t addr, int len, const void *data)
  362. {
  363. struct kvm_pit *pit = dev_to_pit(this);
  364. struct kvm_kpit_state *pit_state = &pit->pit_state;
  365. struct kvm *kvm = pit->kvm;
  366. int channel, access;
  367. struct kvm_kpit_channel_state *s;
  368. u32 val = *(u32 *) data;
  369. if (!pit_in_range(addr))
  370. return -EOPNOTSUPP;
  371. val &= 0xff;
  372. addr &= KVM_PIT_CHANNEL_MASK;
  373. mutex_lock(&pit_state->lock);
  374. if (val != 0)
  375. pr_debug("write addr is 0x%x, len is %d, val is 0x%x\n",
  376. (unsigned int)addr, len, val);
  377. if (addr == 3) {
  378. channel = val >> 6;
  379. if (channel == 3) {
  380. /* Read-Back Command. */
  381. for (channel = 0; channel < 3; channel++) {
  382. s = &pit_state->channels[channel];
  383. if (val & (2 << channel)) {
  384. if (!(val & 0x20))
  385. pit_latch_count(kvm, channel);
  386. if (!(val & 0x10))
  387. pit_latch_status(kvm, channel);
  388. }
  389. }
  390. } else {
  391. /* Select Counter <channel>. */
  392. s = &pit_state->channels[channel];
  393. access = (val >> 4) & KVM_PIT_CHANNEL_MASK;
  394. if (access == 0) {
  395. pit_latch_count(kvm, channel);
  396. } else {
  397. s->rw_mode = access;
  398. s->read_state = access;
  399. s->write_state = access;
  400. s->mode = (val >> 1) & 7;
  401. if (s->mode > 5)
  402. s->mode -= 4;
  403. s->bcd = val & 1;
  404. }
  405. }
  406. } else {
  407. /* Write Count. */
  408. s = &pit_state->channels[addr];
  409. switch (s->write_state) {
  410. default:
  411. case RW_STATE_LSB:
  412. pit_load_count(kvm, addr, val);
  413. break;
  414. case RW_STATE_MSB:
  415. pit_load_count(kvm, addr, val << 8);
  416. break;
  417. case RW_STATE_WORD0:
  418. s->write_latch = val;
  419. s->write_state = RW_STATE_WORD1;
  420. break;
  421. case RW_STATE_WORD1:
  422. pit_load_count(kvm, addr, s->write_latch | (val << 8));
  423. s->write_state = RW_STATE_WORD0;
  424. break;
  425. }
  426. }
  427. mutex_unlock(&pit_state->lock);
  428. return 0;
  429. }
  430. static int pit_ioport_read(struct kvm_io_device *this,
  431. gpa_t addr, int len, void *data)
  432. {
  433. struct kvm_pit *pit = dev_to_pit(this);
  434. struct kvm_kpit_state *pit_state = &pit->pit_state;
  435. struct kvm *kvm = pit->kvm;
  436. int ret, count;
  437. struct kvm_kpit_channel_state *s;
  438. if (!pit_in_range(addr))
  439. return -EOPNOTSUPP;
  440. addr &= KVM_PIT_CHANNEL_MASK;
  441. if (addr == 3)
  442. return 0;
  443. s = &pit_state->channels[addr];
  444. mutex_lock(&pit_state->lock);
  445. if (s->status_latched) {
  446. s->status_latched = 0;
  447. ret = s->status;
  448. } else if (s->count_latched) {
  449. switch (s->count_latched) {
  450. default:
  451. case RW_STATE_LSB:
  452. ret = s->latched_count & 0xff;
  453. s->count_latched = 0;
  454. break;
  455. case RW_STATE_MSB:
  456. ret = s->latched_count >> 8;
  457. s->count_latched = 0;
  458. break;
  459. case RW_STATE_WORD0:
  460. ret = s->latched_count & 0xff;
  461. s->count_latched = RW_STATE_MSB;
  462. break;
  463. }
  464. } else {
  465. switch (s->read_state) {
  466. default:
  467. case RW_STATE_LSB:
  468. count = pit_get_count(kvm, addr);
  469. ret = count & 0xff;
  470. break;
  471. case RW_STATE_MSB:
  472. count = pit_get_count(kvm, addr);
  473. ret = (count >> 8) & 0xff;
  474. break;
  475. case RW_STATE_WORD0:
  476. count = pit_get_count(kvm, addr);
  477. ret = count & 0xff;
  478. s->read_state = RW_STATE_WORD1;
  479. break;
  480. case RW_STATE_WORD1:
  481. count = pit_get_count(kvm, addr);
  482. ret = (count >> 8) & 0xff;
  483. s->read_state = RW_STATE_WORD0;
  484. break;
  485. }
  486. }
  487. if (len > sizeof(ret))
  488. len = sizeof(ret);
  489. memcpy(data, (char *)&ret, len);
  490. mutex_unlock(&pit_state->lock);
  491. return 0;
  492. }
  493. static int speaker_ioport_write(struct kvm_io_device *this,
  494. gpa_t addr, int len, const void *data)
  495. {
  496. struct kvm_pit *pit = speaker_to_pit(this);
  497. struct kvm_kpit_state *pit_state = &pit->pit_state;
  498. struct kvm *kvm = pit->kvm;
  499. u32 val = *(u32 *) data;
  500. if (addr != KVM_SPEAKER_BASE_ADDRESS)
  501. return -EOPNOTSUPP;
  502. mutex_lock(&pit_state->lock);
  503. pit_state->speaker_data_on = (val >> 1) & 1;
  504. pit_set_gate(kvm, 2, val & 1);
  505. mutex_unlock(&pit_state->lock);
  506. return 0;
  507. }
  508. static int speaker_ioport_read(struct kvm_io_device *this,
  509. gpa_t addr, int len, void *data)
  510. {
  511. struct kvm_pit *pit = speaker_to_pit(this);
  512. struct kvm_kpit_state *pit_state = &pit->pit_state;
  513. struct kvm *kvm = pit->kvm;
  514. unsigned int refresh_clock;
  515. int ret;
  516. if (addr != KVM_SPEAKER_BASE_ADDRESS)
  517. return -EOPNOTSUPP;
  518. /* Refresh clock toggles at about 15us. We approximate as 2^14ns. */
  519. refresh_clock = ((unsigned int)ktime_to_ns(ktime_get()) >> 14) & 1;
  520. mutex_lock(&pit_state->lock);
  521. ret = ((pit_state->speaker_data_on << 1) | pit_get_gate(kvm, 2) |
  522. (pit_get_out(kvm, 2) << 5) | (refresh_clock << 4));
  523. if (len > sizeof(ret))
  524. len = sizeof(ret);
  525. memcpy(data, (char *)&ret, len);
  526. mutex_unlock(&pit_state->lock);
  527. return 0;
  528. }
  529. void kvm_pit_reset(struct kvm_pit *pit)
  530. {
  531. int i;
  532. struct kvm_kpit_channel_state *c;
  533. mutex_lock(&pit->pit_state.lock);
  534. pit->pit_state.flags = 0;
  535. for (i = 0; i < 3; i++) {
  536. c = &pit->pit_state.channels[i];
  537. c->mode = 0xff;
  538. c->gate = (i != 2);
  539. pit_load_count(pit->kvm, i, 0);
  540. }
  541. mutex_unlock(&pit->pit_state.lock);
  542. atomic_set(&pit->pit_state.pending, 0);
  543. pit->pit_state.irq_ack = 1;
  544. }
  545. static void pit_mask_notifer(struct kvm_irq_mask_notifier *kimn, bool mask)
  546. {
  547. struct kvm_pit *pit = container_of(kimn, struct kvm_pit, mask_notifier);
  548. if (!mask) {
  549. atomic_set(&pit->pit_state.pending, 0);
  550. pit->pit_state.irq_ack = 1;
  551. }
  552. }
  553. static const struct kvm_io_device_ops pit_dev_ops = {
  554. .read = pit_ioport_read,
  555. .write = pit_ioport_write,
  556. };
  557. static const struct kvm_io_device_ops speaker_dev_ops = {
  558. .read = speaker_ioport_read,
  559. .write = speaker_ioport_write,
  560. };
  561. /* Caller must hold slots_lock */
  562. struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags)
  563. {
  564. struct kvm_pit *pit;
  565. struct kvm_kpit_state *pit_state;
  566. struct pid *pid;
  567. pid_t pid_nr;
  568. int ret;
  569. pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL);
  570. if (!pit)
  571. return NULL;
  572. pit->irq_source_id = kvm_request_irq_source_id(kvm);
  573. if (pit->irq_source_id < 0) {
  574. kfree(pit);
  575. return NULL;
  576. }
  577. mutex_init(&pit->pit_state.lock);
  578. mutex_lock(&pit->pit_state.lock);
  579. spin_lock_init(&pit->pit_state.inject_lock);
  580. pid = get_pid(task_tgid(current));
  581. pid_nr = pid_vnr(pid);
  582. put_pid(pid);
  583. init_kthread_worker(&pit->worker);
  584. pit->worker_task = kthread_run(kthread_worker_fn, &pit->worker,
  585. "kvm-pit/%d", pid_nr);
  586. if (IS_ERR(pit->worker_task)) {
  587. mutex_unlock(&pit->pit_state.lock);
  588. kvm_free_irq_source_id(kvm, pit->irq_source_id);
  589. kfree(pit);
  590. return NULL;
  591. }
  592. init_kthread_work(&pit->expired, pit_do_work);
  593. kvm->arch.vpit = pit;
  594. pit->kvm = kvm;
  595. pit_state = &pit->pit_state;
  596. pit_state->pit = pit;
  597. hrtimer_init(&pit_state->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
  598. pit_state->irq_ack_notifier.gsi = 0;
  599. pit_state->irq_ack_notifier.irq_acked = kvm_pit_ack_irq;
  600. kvm_register_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier);
  601. pit_state->reinject = true;
  602. mutex_unlock(&pit->pit_state.lock);
  603. kvm_pit_reset(pit);
  604. pit->mask_notifier.func = pit_mask_notifer;
  605. kvm_register_irq_mask_notifier(kvm, 0, &pit->mask_notifier);
  606. kvm_iodevice_init(&pit->dev, &pit_dev_ops);
  607. ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, KVM_PIT_BASE_ADDRESS,
  608. KVM_PIT_MEM_LENGTH, &pit->dev);
  609. if (ret < 0)
  610. goto fail;
  611. if (flags & KVM_PIT_SPEAKER_DUMMY) {
  612. kvm_iodevice_init(&pit->speaker_dev, &speaker_dev_ops);
  613. ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS,
  614. KVM_SPEAKER_BASE_ADDRESS, 4,
  615. &pit->speaker_dev);
  616. if (ret < 0)
  617. goto fail_unregister;
  618. }
  619. return pit;
  620. fail_unregister:
  621. kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &pit->dev);
  622. fail:
  623. kvm_unregister_irq_mask_notifier(kvm, 0, &pit->mask_notifier);
  624. kvm_unregister_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier);
  625. kvm_free_irq_source_id(kvm, pit->irq_source_id);
  626. kthread_stop(pit->worker_task);
  627. kfree(pit);
  628. return NULL;
  629. }
  630. void kvm_free_pit(struct kvm *kvm)
  631. {
  632. struct hrtimer *timer;
  633. if (kvm->arch.vpit) {
  634. kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &kvm->arch.vpit->dev);
  635. kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
  636. &kvm->arch.vpit->speaker_dev);
  637. kvm_unregister_irq_mask_notifier(kvm, 0,
  638. &kvm->arch.vpit->mask_notifier);
  639. kvm_unregister_irq_ack_notifier(kvm,
  640. &kvm->arch.vpit->pit_state.irq_ack_notifier);
  641. mutex_lock(&kvm->arch.vpit->pit_state.lock);
  642. timer = &kvm->arch.vpit->pit_state.timer;
  643. hrtimer_cancel(timer);
  644. flush_kthread_work(&kvm->arch.vpit->expired);
  645. kthread_stop(kvm->arch.vpit->worker_task);
  646. kvm_free_irq_source_id(kvm, kvm->arch.vpit->irq_source_id);
  647. mutex_unlock(&kvm->arch.vpit->pit_state.lock);
  648. kfree(kvm->arch.vpit);
  649. }
  650. }