aesni-intel_glue.c 36 KB

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  1. /*
  2. * Support for Intel AES-NI instructions. This file contains glue
  3. * code, the real AES implementation is in intel-aes_asm.S.
  4. *
  5. * Copyright (C) 2008, Intel Corp.
  6. * Author: Huang Ying <ying.huang@intel.com>
  7. *
  8. * Added RFC4106 AES-GCM support for 128-bit keys under the AEAD
  9. * interface for 64-bit kernels.
  10. * Authors: Adrian Hoban <adrian.hoban@intel.com>
  11. * Gabriele Paoloni <gabriele.paoloni@intel.com>
  12. * Tadeusz Struk (tadeusz.struk@intel.com)
  13. * Aidan O'Mahony (aidan.o.mahony@intel.com)
  14. * Copyright (c) 2010, Intel Corporation.
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. */
  21. #include <linux/hardirq.h>
  22. #include <linux/types.h>
  23. #include <linux/crypto.h>
  24. #include <linux/module.h>
  25. #include <linux/err.h>
  26. #include <crypto/algapi.h>
  27. #include <crypto/aes.h>
  28. #include <crypto/cryptd.h>
  29. #include <crypto/ctr.h>
  30. #include <crypto/b128ops.h>
  31. #include <crypto/lrw.h>
  32. #include <crypto/xts.h>
  33. #include <asm/cpu_device_id.h>
  34. #include <asm/i387.h>
  35. #include <asm/crypto/aes.h>
  36. #include <asm/crypto/ablk_helper.h>
  37. #include <crypto/scatterwalk.h>
  38. #include <crypto/internal/aead.h>
  39. #include <linux/workqueue.h>
  40. #include <linux/spinlock.h>
  41. #if defined(CONFIG_CRYPTO_PCBC) || defined(CONFIG_CRYPTO_PCBC_MODULE)
  42. #define HAS_PCBC
  43. #endif
  44. /* This data is stored at the end of the crypto_tfm struct.
  45. * It's a type of per "session" data storage location.
  46. * This needs to be 16 byte aligned.
  47. */
  48. struct aesni_rfc4106_gcm_ctx {
  49. u8 hash_subkey[16];
  50. struct crypto_aes_ctx aes_key_expanded;
  51. u8 nonce[4];
  52. struct cryptd_aead *cryptd_tfm;
  53. };
  54. struct aesni_gcm_set_hash_subkey_result {
  55. int err;
  56. struct completion completion;
  57. };
  58. struct aesni_hash_subkey_req_data {
  59. u8 iv[16];
  60. struct aesni_gcm_set_hash_subkey_result result;
  61. struct scatterlist sg;
  62. };
  63. #define AESNI_ALIGN (16)
  64. #define AES_BLOCK_MASK (~(AES_BLOCK_SIZE-1))
  65. #define RFC4106_HASH_SUBKEY_SIZE 16
  66. struct aesni_lrw_ctx {
  67. struct lrw_table_ctx lrw_table;
  68. u8 raw_aes_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
  69. };
  70. struct aesni_xts_ctx {
  71. u8 raw_tweak_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
  72. u8 raw_crypt_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
  73. };
  74. asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
  75. unsigned int key_len);
  76. asmlinkage void aesni_enc(struct crypto_aes_ctx *ctx, u8 *out,
  77. const u8 *in);
  78. asmlinkage void aesni_dec(struct crypto_aes_ctx *ctx, u8 *out,
  79. const u8 *in);
  80. asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,
  81. const u8 *in, unsigned int len);
  82. asmlinkage void aesni_ecb_dec(struct crypto_aes_ctx *ctx, u8 *out,
  83. const u8 *in, unsigned int len);
  84. asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
  85. const u8 *in, unsigned int len, u8 *iv);
  86. asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
  87. const u8 *in, unsigned int len, u8 *iv);
  88. int crypto_fpu_init(void);
  89. void crypto_fpu_exit(void);
  90. #ifdef CONFIG_X86_64
  91. asmlinkage void aesni_ctr_enc(struct crypto_aes_ctx *ctx, u8 *out,
  92. const u8 *in, unsigned int len, u8 *iv);
  93. /* asmlinkage void aesni_gcm_enc()
  94. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  95. * u8 *out, Ciphertext output. Encrypt in-place is allowed.
  96. * const u8 *in, Plaintext input
  97. * unsigned long plaintext_len, Length of data in bytes for encryption.
  98. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  99. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  100. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  101. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  102. * const u8 *aad, Additional Authentication Data (AAD)
  103. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this
  104. * is going to be 8 or 12 bytes
  105. * u8 *auth_tag, Authenticated Tag output.
  106. * unsigned long auth_tag_len), Authenticated Tag Length in bytes.
  107. * Valid values are 16 (most likely), 12 or 8.
  108. */
  109. asmlinkage void aesni_gcm_enc(void *ctx, u8 *out,
  110. const u8 *in, unsigned long plaintext_len, u8 *iv,
  111. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  112. u8 *auth_tag, unsigned long auth_tag_len);
  113. /* asmlinkage void aesni_gcm_dec()
  114. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  115. * u8 *out, Plaintext output. Decrypt in-place is allowed.
  116. * const u8 *in, Ciphertext input
  117. * unsigned long ciphertext_len, Length of data in bytes for decryption.
  118. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  119. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  120. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  121. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  122. * const u8 *aad, Additional Authentication Data (AAD)
  123. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this is going
  124. * to be 8 or 12 bytes
  125. * u8 *auth_tag, Authenticated Tag output.
  126. * unsigned long auth_tag_len) Authenticated Tag Length in bytes.
  127. * Valid values are 16 (most likely), 12 or 8.
  128. */
  129. asmlinkage void aesni_gcm_dec(void *ctx, u8 *out,
  130. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  131. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  132. u8 *auth_tag, unsigned long auth_tag_len);
  133. static inline struct
  134. aesni_rfc4106_gcm_ctx *aesni_rfc4106_gcm_ctx_get(struct crypto_aead *tfm)
  135. {
  136. return
  137. (struct aesni_rfc4106_gcm_ctx *)
  138. PTR_ALIGN((u8 *)
  139. crypto_tfm_ctx(crypto_aead_tfm(tfm)), AESNI_ALIGN);
  140. }
  141. #endif
  142. static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
  143. {
  144. unsigned long addr = (unsigned long)raw_ctx;
  145. unsigned long align = AESNI_ALIGN;
  146. if (align <= crypto_tfm_ctx_alignment())
  147. align = 1;
  148. return (struct crypto_aes_ctx *)ALIGN(addr, align);
  149. }
  150. static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,
  151. const u8 *in_key, unsigned int key_len)
  152. {
  153. struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);
  154. u32 *flags = &tfm->crt_flags;
  155. int err;
  156. if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 &&
  157. key_len != AES_KEYSIZE_256) {
  158. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  159. return -EINVAL;
  160. }
  161. if (!irq_fpu_usable())
  162. err = crypto_aes_expand_key(ctx, in_key, key_len);
  163. else {
  164. kernel_fpu_begin();
  165. err = aesni_set_key(ctx, in_key, key_len);
  166. kernel_fpu_end();
  167. }
  168. return err;
  169. }
  170. static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
  171. unsigned int key_len)
  172. {
  173. return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);
  174. }
  175. static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  176. {
  177. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  178. if (!irq_fpu_usable())
  179. crypto_aes_encrypt_x86(ctx, dst, src);
  180. else {
  181. kernel_fpu_begin();
  182. aesni_enc(ctx, dst, src);
  183. kernel_fpu_end();
  184. }
  185. }
  186. static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  187. {
  188. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  189. if (!irq_fpu_usable())
  190. crypto_aes_decrypt_x86(ctx, dst, src);
  191. else {
  192. kernel_fpu_begin();
  193. aesni_dec(ctx, dst, src);
  194. kernel_fpu_end();
  195. }
  196. }
  197. static void __aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  198. {
  199. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  200. aesni_enc(ctx, dst, src);
  201. }
  202. static void __aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  203. {
  204. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  205. aesni_dec(ctx, dst, src);
  206. }
  207. static int ecb_encrypt(struct blkcipher_desc *desc,
  208. struct scatterlist *dst, struct scatterlist *src,
  209. unsigned int nbytes)
  210. {
  211. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  212. struct blkcipher_walk walk;
  213. int err;
  214. blkcipher_walk_init(&walk, dst, src, nbytes);
  215. err = blkcipher_walk_virt(desc, &walk);
  216. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  217. kernel_fpu_begin();
  218. while ((nbytes = walk.nbytes)) {
  219. aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  220. nbytes & AES_BLOCK_MASK);
  221. nbytes &= AES_BLOCK_SIZE - 1;
  222. err = blkcipher_walk_done(desc, &walk, nbytes);
  223. }
  224. kernel_fpu_end();
  225. return err;
  226. }
  227. static int ecb_decrypt(struct blkcipher_desc *desc,
  228. struct scatterlist *dst, struct scatterlist *src,
  229. unsigned int nbytes)
  230. {
  231. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  232. struct blkcipher_walk walk;
  233. int err;
  234. blkcipher_walk_init(&walk, dst, src, nbytes);
  235. err = blkcipher_walk_virt(desc, &walk);
  236. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  237. kernel_fpu_begin();
  238. while ((nbytes = walk.nbytes)) {
  239. aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  240. nbytes & AES_BLOCK_MASK);
  241. nbytes &= AES_BLOCK_SIZE - 1;
  242. err = blkcipher_walk_done(desc, &walk, nbytes);
  243. }
  244. kernel_fpu_end();
  245. return err;
  246. }
  247. static int cbc_encrypt(struct blkcipher_desc *desc,
  248. struct scatterlist *dst, struct scatterlist *src,
  249. unsigned int nbytes)
  250. {
  251. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  252. struct blkcipher_walk walk;
  253. int err;
  254. blkcipher_walk_init(&walk, dst, src, nbytes);
  255. err = blkcipher_walk_virt(desc, &walk);
  256. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  257. kernel_fpu_begin();
  258. while ((nbytes = walk.nbytes)) {
  259. aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  260. nbytes & AES_BLOCK_MASK, walk.iv);
  261. nbytes &= AES_BLOCK_SIZE - 1;
  262. err = blkcipher_walk_done(desc, &walk, nbytes);
  263. }
  264. kernel_fpu_end();
  265. return err;
  266. }
  267. static int cbc_decrypt(struct blkcipher_desc *desc,
  268. struct scatterlist *dst, struct scatterlist *src,
  269. unsigned int nbytes)
  270. {
  271. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  272. struct blkcipher_walk walk;
  273. int err;
  274. blkcipher_walk_init(&walk, dst, src, nbytes);
  275. err = blkcipher_walk_virt(desc, &walk);
  276. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  277. kernel_fpu_begin();
  278. while ((nbytes = walk.nbytes)) {
  279. aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  280. nbytes & AES_BLOCK_MASK, walk.iv);
  281. nbytes &= AES_BLOCK_SIZE - 1;
  282. err = blkcipher_walk_done(desc, &walk, nbytes);
  283. }
  284. kernel_fpu_end();
  285. return err;
  286. }
  287. #ifdef CONFIG_X86_64
  288. static void ctr_crypt_final(struct crypto_aes_ctx *ctx,
  289. struct blkcipher_walk *walk)
  290. {
  291. u8 *ctrblk = walk->iv;
  292. u8 keystream[AES_BLOCK_SIZE];
  293. u8 *src = walk->src.virt.addr;
  294. u8 *dst = walk->dst.virt.addr;
  295. unsigned int nbytes = walk->nbytes;
  296. aesni_enc(ctx, keystream, ctrblk);
  297. crypto_xor(keystream, src, nbytes);
  298. memcpy(dst, keystream, nbytes);
  299. crypto_inc(ctrblk, AES_BLOCK_SIZE);
  300. }
  301. static int ctr_crypt(struct blkcipher_desc *desc,
  302. struct scatterlist *dst, struct scatterlist *src,
  303. unsigned int nbytes)
  304. {
  305. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  306. struct blkcipher_walk walk;
  307. int err;
  308. blkcipher_walk_init(&walk, dst, src, nbytes);
  309. err = blkcipher_walk_virt_block(desc, &walk, AES_BLOCK_SIZE);
  310. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  311. kernel_fpu_begin();
  312. while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) {
  313. aesni_ctr_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  314. nbytes & AES_BLOCK_MASK, walk.iv);
  315. nbytes &= AES_BLOCK_SIZE - 1;
  316. err = blkcipher_walk_done(desc, &walk, nbytes);
  317. }
  318. if (walk.nbytes) {
  319. ctr_crypt_final(ctx, &walk);
  320. err = blkcipher_walk_done(desc, &walk, 0);
  321. }
  322. kernel_fpu_end();
  323. return err;
  324. }
  325. #endif
  326. static int ablk_ecb_init(struct crypto_tfm *tfm)
  327. {
  328. return ablk_init_common(tfm, "__driver-ecb-aes-aesni");
  329. }
  330. static int ablk_cbc_init(struct crypto_tfm *tfm)
  331. {
  332. return ablk_init_common(tfm, "__driver-cbc-aes-aesni");
  333. }
  334. #ifdef CONFIG_X86_64
  335. static int ablk_ctr_init(struct crypto_tfm *tfm)
  336. {
  337. return ablk_init_common(tfm, "__driver-ctr-aes-aesni");
  338. }
  339. #endif
  340. #ifdef HAS_PCBC
  341. static int ablk_pcbc_init(struct crypto_tfm *tfm)
  342. {
  343. return ablk_init_common(tfm, "fpu(pcbc(__driver-aes-aesni))");
  344. }
  345. #endif
  346. static void lrw_xts_encrypt_callback(void *ctx, u8 *blks, unsigned int nbytes)
  347. {
  348. aesni_ecb_enc(ctx, blks, blks, nbytes);
  349. }
  350. static void lrw_xts_decrypt_callback(void *ctx, u8 *blks, unsigned int nbytes)
  351. {
  352. aesni_ecb_dec(ctx, blks, blks, nbytes);
  353. }
  354. static int lrw_aesni_setkey(struct crypto_tfm *tfm, const u8 *key,
  355. unsigned int keylen)
  356. {
  357. struct aesni_lrw_ctx *ctx = crypto_tfm_ctx(tfm);
  358. int err;
  359. err = aes_set_key_common(tfm, ctx->raw_aes_ctx, key,
  360. keylen - AES_BLOCK_SIZE);
  361. if (err)
  362. return err;
  363. return lrw_init_table(&ctx->lrw_table, key + keylen - AES_BLOCK_SIZE);
  364. }
  365. static void lrw_aesni_exit_tfm(struct crypto_tfm *tfm)
  366. {
  367. struct aesni_lrw_ctx *ctx = crypto_tfm_ctx(tfm);
  368. lrw_free_table(&ctx->lrw_table);
  369. }
  370. static int lrw_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  371. struct scatterlist *src, unsigned int nbytes)
  372. {
  373. struct aesni_lrw_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  374. be128 buf[8];
  375. struct lrw_crypt_req req = {
  376. .tbuf = buf,
  377. .tbuflen = sizeof(buf),
  378. .table_ctx = &ctx->lrw_table,
  379. .crypt_ctx = aes_ctx(ctx->raw_aes_ctx),
  380. .crypt_fn = lrw_xts_encrypt_callback,
  381. };
  382. int ret;
  383. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  384. kernel_fpu_begin();
  385. ret = lrw_crypt(desc, dst, src, nbytes, &req);
  386. kernel_fpu_end();
  387. return ret;
  388. }
  389. static int lrw_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  390. struct scatterlist *src, unsigned int nbytes)
  391. {
  392. struct aesni_lrw_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  393. be128 buf[8];
  394. struct lrw_crypt_req req = {
  395. .tbuf = buf,
  396. .tbuflen = sizeof(buf),
  397. .table_ctx = &ctx->lrw_table,
  398. .crypt_ctx = aes_ctx(ctx->raw_aes_ctx),
  399. .crypt_fn = lrw_xts_decrypt_callback,
  400. };
  401. int ret;
  402. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  403. kernel_fpu_begin();
  404. ret = lrw_crypt(desc, dst, src, nbytes, &req);
  405. kernel_fpu_end();
  406. return ret;
  407. }
  408. static int xts_aesni_setkey(struct crypto_tfm *tfm, const u8 *key,
  409. unsigned int keylen)
  410. {
  411. struct aesni_xts_ctx *ctx = crypto_tfm_ctx(tfm);
  412. u32 *flags = &tfm->crt_flags;
  413. int err;
  414. /* key consists of keys of equal size concatenated, therefore
  415. * the length must be even
  416. */
  417. if (keylen % 2) {
  418. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  419. return -EINVAL;
  420. }
  421. /* first half of xts-key is for crypt */
  422. err = aes_set_key_common(tfm, ctx->raw_crypt_ctx, key, keylen / 2);
  423. if (err)
  424. return err;
  425. /* second half of xts-key is for tweak */
  426. return aes_set_key_common(tfm, ctx->raw_tweak_ctx, key + keylen / 2,
  427. keylen / 2);
  428. }
  429. static void aesni_xts_tweak(void *ctx, u8 *out, const u8 *in)
  430. {
  431. aesni_enc(ctx, out, in);
  432. }
  433. static int xts_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  434. struct scatterlist *src, unsigned int nbytes)
  435. {
  436. struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  437. be128 buf[8];
  438. struct xts_crypt_req req = {
  439. .tbuf = buf,
  440. .tbuflen = sizeof(buf),
  441. .tweak_ctx = aes_ctx(ctx->raw_tweak_ctx),
  442. .tweak_fn = aesni_xts_tweak,
  443. .crypt_ctx = aes_ctx(ctx->raw_crypt_ctx),
  444. .crypt_fn = lrw_xts_encrypt_callback,
  445. };
  446. int ret;
  447. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  448. kernel_fpu_begin();
  449. ret = xts_crypt(desc, dst, src, nbytes, &req);
  450. kernel_fpu_end();
  451. return ret;
  452. }
  453. static int xts_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  454. struct scatterlist *src, unsigned int nbytes)
  455. {
  456. struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  457. be128 buf[8];
  458. struct xts_crypt_req req = {
  459. .tbuf = buf,
  460. .tbuflen = sizeof(buf),
  461. .tweak_ctx = aes_ctx(ctx->raw_tweak_ctx),
  462. .tweak_fn = aesni_xts_tweak,
  463. .crypt_ctx = aes_ctx(ctx->raw_crypt_ctx),
  464. .crypt_fn = lrw_xts_decrypt_callback,
  465. };
  466. int ret;
  467. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  468. kernel_fpu_begin();
  469. ret = xts_crypt(desc, dst, src, nbytes, &req);
  470. kernel_fpu_end();
  471. return ret;
  472. }
  473. #ifdef CONFIG_X86_64
  474. static int rfc4106_init(struct crypto_tfm *tfm)
  475. {
  476. struct cryptd_aead *cryptd_tfm;
  477. struct aesni_rfc4106_gcm_ctx *ctx = (struct aesni_rfc4106_gcm_ctx *)
  478. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  479. struct crypto_aead *cryptd_child;
  480. struct aesni_rfc4106_gcm_ctx *child_ctx;
  481. cryptd_tfm = cryptd_alloc_aead("__driver-gcm-aes-aesni", 0, 0);
  482. if (IS_ERR(cryptd_tfm))
  483. return PTR_ERR(cryptd_tfm);
  484. cryptd_child = cryptd_aead_child(cryptd_tfm);
  485. child_ctx = aesni_rfc4106_gcm_ctx_get(cryptd_child);
  486. memcpy(child_ctx, ctx, sizeof(*ctx));
  487. ctx->cryptd_tfm = cryptd_tfm;
  488. tfm->crt_aead.reqsize = sizeof(struct aead_request)
  489. + crypto_aead_reqsize(&cryptd_tfm->base);
  490. return 0;
  491. }
  492. static void rfc4106_exit(struct crypto_tfm *tfm)
  493. {
  494. struct aesni_rfc4106_gcm_ctx *ctx =
  495. (struct aesni_rfc4106_gcm_ctx *)
  496. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  497. if (!IS_ERR(ctx->cryptd_tfm))
  498. cryptd_free_aead(ctx->cryptd_tfm);
  499. return;
  500. }
  501. static void
  502. rfc4106_set_hash_subkey_done(struct crypto_async_request *req, int err)
  503. {
  504. struct aesni_gcm_set_hash_subkey_result *result = req->data;
  505. if (err == -EINPROGRESS)
  506. return;
  507. result->err = err;
  508. complete(&result->completion);
  509. }
  510. static int
  511. rfc4106_set_hash_subkey(u8 *hash_subkey, const u8 *key, unsigned int key_len)
  512. {
  513. struct crypto_ablkcipher *ctr_tfm;
  514. struct ablkcipher_request *req;
  515. int ret = -EINVAL;
  516. struct aesni_hash_subkey_req_data *req_data;
  517. ctr_tfm = crypto_alloc_ablkcipher("ctr(aes)", 0, 0);
  518. if (IS_ERR(ctr_tfm))
  519. return PTR_ERR(ctr_tfm);
  520. crypto_ablkcipher_clear_flags(ctr_tfm, ~0);
  521. ret = crypto_ablkcipher_setkey(ctr_tfm, key, key_len);
  522. if (ret)
  523. goto out_free_ablkcipher;
  524. ret = -ENOMEM;
  525. req = ablkcipher_request_alloc(ctr_tfm, GFP_KERNEL);
  526. if (!req)
  527. goto out_free_ablkcipher;
  528. req_data = kmalloc(sizeof(*req_data), GFP_KERNEL);
  529. if (!req_data)
  530. goto out_free_request;
  531. memset(req_data->iv, 0, sizeof(req_data->iv));
  532. /* Clear the data in the hash sub key container to zero.*/
  533. /* We want to cipher all zeros to create the hash sub key. */
  534. memset(hash_subkey, 0, RFC4106_HASH_SUBKEY_SIZE);
  535. init_completion(&req_data->result.completion);
  536. sg_init_one(&req_data->sg, hash_subkey, RFC4106_HASH_SUBKEY_SIZE);
  537. ablkcipher_request_set_tfm(req, ctr_tfm);
  538. ablkcipher_request_set_callback(req, CRYPTO_TFM_REQ_MAY_SLEEP |
  539. CRYPTO_TFM_REQ_MAY_BACKLOG,
  540. rfc4106_set_hash_subkey_done,
  541. &req_data->result);
  542. ablkcipher_request_set_crypt(req, &req_data->sg,
  543. &req_data->sg, RFC4106_HASH_SUBKEY_SIZE, req_data->iv);
  544. ret = crypto_ablkcipher_encrypt(req);
  545. if (ret == -EINPROGRESS || ret == -EBUSY) {
  546. ret = wait_for_completion_interruptible
  547. (&req_data->result.completion);
  548. if (!ret)
  549. ret = req_data->result.err;
  550. }
  551. kfree(req_data);
  552. out_free_request:
  553. ablkcipher_request_free(req);
  554. out_free_ablkcipher:
  555. crypto_free_ablkcipher(ctr_tfm);
  556. return ret;
  557. }
  558. static int rfc4106_set_key(struct crypto_aead *parent, const u8 *key,
  559. unsigned int key_len)
  560. {
  561. int ret = 0;
  562. struct crypto_tfm *tfm = crypto_aead_tfm(parent);
  563. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  564. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  565. struct aesni_rfc4106_gcm_ctx *child_ctx =
  566. aesni_rfc4106_gcm_ctx_get(cryptd_child);
  567. u8 *new_key_align, *new_key_mem = NULL;
  568. if (key_len < 4) {
  569. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  570. return -EINVAL;
  571. }
  572. /*Account for 4 byte nonce at the end.*/
  573. key_len -= 4;
  574. if (key_len != AES_KEYSIZE_128) {
  575. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  576. return -EINVAL;
  577. }
  578. memcpy(ctx->nonce, key + key_len, sizeof(ctx->nonce));
  579. /*This must be on a 16 byte boundary!*/
  580. if ((unsigned long)(&(ctx->aes_key_expanded.key_enc[0])) % AESNI_ALIGN)
  581. return -EINVAL;
  582. if ((unsigned long)key % AESNI_ALIGN) {
  583. /*key is not aligned: use an auxuliar aligned pointer*/
  584. new_key_mem = kmalloc(key_len+AESNI_ALIGN, GFP_KERNEL);
  585. if (!new_key_mem)
  586. return -ENOMEM;
  587. new_key_align = PTR_ALIGN(new_key_mem, AESNI_ALIGN);
  588. memcpy(new_key_align, key, key_len);
  589. key = new_key_align;
  590. }
  591. if (!irq_fpu_usable())
  592. ret = crypto_aes_expand_key(&(ctx->aes_key_expanded),
  593. key, key_len);
  594. else {
  595. kernel_fpu_begin();
  596. ret = aesni_set_key(&(ctx->aes_key_expanded), key, key_len);
  597. kernel_fpu_end();
  598. }
  599. /*This must be on a 16 byte boundary!*/
  600. if ((unsigned long)(&(ctx->hash_subkey[0])) % AESNI_ALIGN) {
  601. ret = -EINVAL;
  602. goto exit;
  603. }
  604. ret = rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len);
  605. memcpy(child_ctx, ctx, sizeof(*ctx));
  606. exit:
  607. kfree(new_key_mem);
  608. return ret;
  609. }
  610. /* This is the Integrity Check Value (aka the authentication tag length and can
  611. * be 8, 12 or 16 bytes long. */
  612. static int rfc4106_set_authsize(struct crypto_aead *parent,
  613. unsigned int authsize)
  614. {
  615. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  616. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  617. switch (authsize) {
  618. case 8:
  619. case 12:
  620. case 16:
  621. break;
  622. default:
  623. return -EINVAL;
  624. }
  625. crypto_aead_crt(parent)->authsize = authsize;
  626. crypto_aead_crt(cryptd_child)->authsize = authsize;
  627. return 0;
  628. }
  629. static int rfc4106_encrypt(struct aead_request *req)
  630. {
  631. int ret;
  632. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  633. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  634. if (!irq_fpu_usable()) {
  635. struct aead_request *cryptd_req =
  636. (struct aead_request *) aead_request_ctx(req);
  637. memcpy(cryptd_req, req, sizeof(*req));
  638. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  639. return crypto_aead_encrypt(cryptd_req);
  640. } else {
  641. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  642. kernel_fpu_begin();
  643. ret = cryptd_child->base.crt_aead.encrypt(req);
  644. kernel_fpu_end();
  645. return ret;
  646. }
  647. }
  648. static int rfc4106_decrypt(struct aead_request *req)
  649. {
  650. int ret;
  651. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  652. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  653. if (!irq_fpu_usable()) {
  654. struct aead_request *cryptd_req =
  655. (struct aead_request *) aead_request_ctx(req);
  656. memcpy(cryptd_req, req, sizeof(*req));
  657. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  658. return crypto_aead_decrypt(cryptd_req);
  659. } else {
  660. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  661. kernel_fpu_begin();
  662. ret = cryptd_child->base.crt_aead.decrypt(req);
  663. kernel_fpu_end();
  664. return ret;
  665. }
  666. }
  667. static int __driver_rfc4106_encrypt(struct aead_request *req)
  668. {
  669. u8 one_entry_in_sg = 0;
  670. u8 *src, *dst, *assoc;
  671. __be32 counter = cpu_to_be32(1);
  672. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  673. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  674. void *aes_ctx = &(ctx->aes_key_expanded);
  675. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  676. u8 iv_tab[16+AESNI_ALIGN];
  677. u8* iv = (u8 *) PTR_ALIGN((u8 *)iv_tab, AESNI_ALIGN);
  678. struct scatter_walk src_sg_walk;
  679. struct scatter_walk assoc_sg_walk;
  680. struct scatter_walk dst_sg_walk;
  681. unsigned int i;
  682. /* Assuming we are supporting rfc4106 64-bit extended */
  683. /* sequence numbers We need to have the AAD length equal */
  684. /* to 8 or 12 bytes */
  685. if (unlikely(req->assoclen != 8 && req->assoclen != 12))
  686. return -EINVAL;
  687. /* IV below built */
  688. for (i = 0; i < 4; i++)
  689. *(iv+i) = ctx->nonce[i];
  690. for (i = 0; i < 8; i++)
  691. *(iv+4+i) = req->iv[i];
  692. *((__be32 *)(iv+12)) = counter;
  693. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  694. one_entry_in_sg = 1;
  695. scatterwalk_start(&src_sg_walk, req->src);
  696. scatterwalk_start(&assoc_sg_walk, req->assoc);
  697. src = scatterwalk_map(&src_sg_walk);
  698. assoc = scatterwalk_map(&assoc_sg_walk);
  699. dst = src;
  700. if (unlikely(req->src != req->dst)) {
  701. scatterwalk_start(&dst_sg_walk, req->dst);
  702. dst = scatterwalk_map(&dst_sg_walk);
  703. }
  704. } else {
  705. /* Allocate memory for src, dst, assoc */
  706. src = kmalloc(req->cryptlen + auth_tag_len + req->assoclen,
  707. GFP_ATOMIC);
  708. if (unlikely(!src))
  709. return -ENOMEM;
  710. assoc = (src + req->cryptlen + auth_tag_len);
  711. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  712. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  713. req->assoclen, 0);
  714. dst = src;
  715. }
  716. aesni_gcm_enc(aes_ctx, dst, src, (unsigned long)req->cryptlen, iv,
  717. ctx->hash_subkey, assoc, (unsigned long)req->assoclen, dst
  718. + ((unsigned long)req->cryptlen), auth_tag_len);
  719. /* The authTag (aka the Integrity Check Value) needs to be written
  720. * back to the packet. */
  721. if (one_entry_in_sg) {
  722. if (unlikely(req->src != req->dst)) {
  723. scatterwalk_unmap(dst);
  724. scatterwalk_done(&dst_sg_walk, 0, 0);
  725. }
  726. scatterwalk_unmap(src);
  727. scatterwalk_unmap(assoc);
  728. scatterwalk_done(&src_sg_walk, 0, 0);
  729. scatterwalk_done(&assoc_sg_walk, 0, 0);
  730. } else {
  731. scatterwalk_map_and_copy(dst, req->dst, 0,
  732. req->cryptlen + auth_tag_len, 1);
  733. kfree(src);
  734. }
  735. return 0;
  736. }
  737. static int __driver_rfc4106_decrypt(struct aead_request *req)
  738. {
  739. u8 one_entry_in_sg = 0;
  740. u8 *src, *dst, *assoc;
  741. unsigned long tempCipherLen = 0;
  742. __be32 counter = cpu_to_be32(1);
  743. int retval = 0;
  744. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  745. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  746. void *aes_ctx = &(ctx->aes_key_expanded);
  747. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  748. u8 iv_and_authTag[32+AESNI_ALIGN];
  749. u8 *iv = (u8 *) PTR_ALIGN((u8 *)iv_and_authTag, AESNI_ALIGN);
  750. u8 *authTag = iv + 16;
  751. struct scatter_walk src_sg_walk;
  752. struct scatter_walk assoc_sg_walk;
  753. struct scatter_walk dst_sg_walk;
  754. unsigned int i;
  755. if (unlikely((req->cryptlen < auth_tag_len) ||
  756. (req->assoclen != 8 && req->assoclen != 12)))
  757. return -EINVAL;
  758. /* Assuming we are supporting rfc4106 64-bit extended */
  759. /* sequence numbers We need to have the AAD length */
  760. /* equal to 8 or 12 bytes */
  761. tempCipherLen = (unsigned long)(req->cryptlen - auth_tag_len);
  762. /* IV below built */
  763. for (i = 0; i < 4; i++)
  764. *(iv+i) = ctx->nonce[i];
  765. for (i = 0; i < 8; i++)
  766. *(iv+4+i) = req->iv[i];
  767. *((__be32 *)(iv+12)) = counter;
  768. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  769. one_entry_in_sg = 1;
  770. scatterwalk_start(&src_sg_walk, req->src);
  771. scatterwalk_start(&assoc_sg_walk, req->assoc);
  772. src = scatterwalk_map(&src_sg_walk);
  773. assoc = scatterwalk_map(&assoc_sg_walk);
  774. dst = src;
  775. if (unlikely(req->src != req->dst)) {
  776. scatterwalk_start(&dst_sg_walk, req->dst);
  777. dst = scatterwalk_map(&dst_sg_walk);
  778. }
  779. } else {
  780. /* Allocate memory for src, dst, assoc */
  781. src = kmalloc(req->cryptlen + req->assoclen, GFP_ATOMIC);
  782. if (!src)
  783. return -ENOMEM;
  784. assoc = (src + req->cryptlen + auth_tag_len);
  785. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  786. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  787. req->assoclen, 0);
  788. dst = src;
  789. }
  790. aesni_gcm_dec(aes_ctx, dst, src, tempCipherLen, iv,
  791. ctx->hash_subkey, assoc, (unsigned long)req->assoclen,
  792. authTag, auth_tag_len);
  793. /* Compare generated tag with passed in tag. */
  794. retval = memcmp(src + tempCipherLen, authTag, auth_tag_len) ?
  795. -EBADMSG : 0;
  796. if (one_entry_in_sg) {
  797. if (unlikely(req->src != req->dst)) {
  798. scatterwalk_unmap(dst);
  799. scatterwalk_done(&dst_sg_walk, 0, 0);
  800. }
  801. scatterwalk_unmap(src);
  802. scatterwalk_unmap(assoc);
  803. scatterwalk_done(&src_sg_walk, 0, 0);
  804. scatterwalk_done(&assoc_sg_walk, 0, 0);
  805. } else {
  806. scatterwalk_map_and_copy(dst, req->dst, 0, req->cryptlen, 1);
  807. kfree(src);
  808. }
  809. return retval;
  810. }
  811. #endif
  812. static struct crypto_alg aesni_algs[] = { {
  813. .cra_name = "aes",
  814. .cra_driver_name = "aes-aesni",
  815. .cra_priority = 300,
  816. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  817. .cra_blocksize = AES_BLOCK_SIZE,
  818. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  819. AESNI_ALIGN - 1,
  820. .cra_alignmask = 0,
  821. .cra_module = THIS_MODULE,
  822. .cra_u = {
  823. .cipher = {
  824. .cia_min_keysize = AES_MIN_KEY_SIZE,
  825. .cia_max_keysize = AES_MAX_KEY_SIZE,
  826. .cia_setkey = aes_set_key,
  827. .cia_encrypt = aes_encrypt,
  828. .cia_decrypt = aes_decrypt
  829. }
  830. }
  831. }, {
  832. .cra_name = "__aes-aesni",
  833. .cra_driver_name = "__driver-aes-aesni",
  834. .cra_priority = 0,
  835. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  836. .cra_blocksize = AES_BLOCK_SIZE,
  837. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  838. AESNI_ALIGN - 1,
  839. .cra_alignmask = 0,
  840. .cra_module = THIS_MODULE,
  841. .cra_u = {
  842. .cipher = {
  843. .cia_min_keysize = AES_MIN_KEY_SIZE,
  844. .cia_max_keysize = AES_MAX_KEY_SIZE,
  845. .cia_setkey = aes_set_key,
  846. .cia_encrypt = __aes_encrypt,
  847. .cia_decrypt = __aes_decrypt
  848. }
  849. }
  850. }, {
  851. .cra_name = "__ecb-aes-aesni",
  852. .cra_driver_name = "__driver-ecb-aes-aesni",
  853. .cra_priority = 0,
  854. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  855. .cra_blocksize = AES_BLOCK_SIZE,
  856. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  857. AESNI_ALIGN - 1,
  858. .cra_alignmask = 0,
  859. .cra_type = &crypto_blkcipher_type,
  860. .cra_module = THIS_MODULE,
  861. .cra_u = {
  862. .blkcipher = {
  863. .min_keysize = AES_MIN_KEY_SIZE,
  864. .max_keysize = AES_MAX_KEY_SIZE,
  865. .setkey = aes_set_key,
  866. .encrypt = ecb_encrypt,
  867. .decrypt = ecb_decrypt,
  868. },
  869. },
  870. }, {
  871. .cra_name = "__cbc-aes-aesni",
  872. .cra_driver_name = "__driver-cbc-aes-aesni",
  873. .cra_priority = 0,
  874. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  875. .cra_blocksize = AES_BLOCK_SIZE,
  876. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  877. AESNI_ALIGN - 1,
  878. .cra_alignmask = 0,
  879. .cra_type = &crypto_blkcipher_type,
  880. .cra_module = THIS_MODULE,
  881. .cra_u = {
  882. .blkcipher = {
  883. .min_keysize = AES_MIN_KEY_SIZE,
  884. .max_keysize = AES_MAX_KEY_SIZE,
  885. .setkey = aes_set_key,
  886. .encrypt = cbc_encrypt,
  887. .decrypt = cbc_decrypt,
  888. },
  889. },
  890. }, {
  891. .cra_name = "ecb(aes)",
  892. .cra_driver_name = "ecb-aes-aesni",
  893. .cra_priority = 400,
  894. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  895. .cra_blocksize = AES_BLOCK_SIZE,
  896. .cra_ctxsize = sizeof(struct async_helper_ctx),
  897. .cra_alignmask = 0,
  898. .cra_type = &crypto_ablkcipher_type,
  899. .cra_module = THIS_MODULE,
  900. .cra_init = ablk_ecb_init,
  901. .cra_exit = ablk_exit,
  902. .cra_u = {
  903. .ablkcipher = {
  904. .min_keysize = AES_MIN_KEY_SIZE,
  905. .max_keysize = AES_MAX_KEY_SIZE,
  906. .setkey = ablk_set_key,
  907. .encrypt = ablk_encrypt,
  908. .decrypt = ablk_decrypt,
  909. },
  910. },
  911. }, {
  912. .cra_name = "cbc(aes)",
  913. .cra_driver_name = "cbc-aes-aesni",
  914. .cra_priority = 400,
  915. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  916. .cra_blocksize = AES_BLOCK_SIZE,
  917. .cra_ctxsize = sizeof(struct async_helper_ctx),
  918. .cra_alignmask = 0,
  919. .cra_type = &crypto_ablkcipher_type,
  920. .cra_module = THIS_MODULE,
  921. .cra_init = ablk_cbc_init,
  922. .cra_exit = ablk_exit,
  923. .cra_u = {
  924. .ablkcipher = {
  925. .min_keysize = AES_MIN_KEY_SIZE,
  926. .max_keysize = AES_MAX_KEY_SIZE,
  927. .ivsize = AES_BLOCK_SIZE,
  928. .setkey = ablk_set_key,
  929. .encrypt = ablk_encrypt,
  930. .decrypt = ablk_decrypt,
  931. },
  932. },
  933. #ifdef CONFIG_X86_64
  934. }, {
  935. .cra_name = "__ctr-aes-aesni",
  936. .cra_driver_name = "__driver-ctr-aes-aesni",
  937. .cra_priority = 0,
  938. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  939. .cra_blocksize = 1,
  940. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  941. AESNI_ALIGN - 1,
  942. .cra_alignmask = 0,
  943. .cra_type = &crypto_blkcipher_type,
  944. .cra_module = THIS_MODULE,
  945. .cra_u = {
  946. .blkcipher = {
  947. .min_keysize = AES_MIN_KEY_SIZE,
  948. .max_keysize = AES_MAX_KEY_SIZE,
  949. .ivsize = AES_BLOCK_SIZE,
  950. .setkey = aes_set_key,
  951. .encrypt = ctr_crypt,
  952. .decrypt = ctr_crypt,
  953. },
  954. },
  955. }, {
  956. .cra_name = "ctr(aes)",
  957. .cra_driver_name = "ctr-aes-aesni",
  958. .cra_priority = 400,
  959. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  960. .cra_blocksize = 1,
  961. .cra_ctxsize = sizeof(struct async_helper_ctx),
  962. .cra_alignmask = 0,
  963. .cra_type = &crypto_ablkcipher_type,
  964. .cra_module = THIS_MODULE,
  965. .cra_init = ablk_ctr_init,
  966. .cra_exit = ablk_exit,
  967. .cra_u = {
  968. .ablkcipher = {
  969. .min_keysize = AES_MIN_KEY_SIZE,
  970. .max_keysize = AES_MAX_KEY_SIZE,
  971. .ivsize = AES_BLOCK_SIZE,
  972. .setkey = ablk_set_key,
  973. .encrypt = ablk_encrypt,
  974. .decrypt = ablk_encrypt,
  975. .geniv = "chainiv",
  976. },
  977. },
  978. }, {
  979. .cra_name = "__gcm-aes-aesni",
  980. .cra_driver_name = "__driver-gcm-aes-aesni",
  981. .cra_priority = 0,
  982. .cra_flags = CRYPTO_ALG_TYPE_AEAD,
  983. .cra_blocksize = 1,
  984. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) +
  985. AESNI_ALIGN,
  986. .cra_alignmask = 0,
  987. .cra_type = &crypto_aead_type,
  988. .cra_module = THIS_MODULE,
  989. .cra_u = {
  990. .aead = {
  991. .encrypt = __driver_rfc4106_encrypt,
  992. .decrypt = __driver_rfc4106_decrypt,
  993. },
  994. },
  995. }, {
  996. .cra_name = "rfc4106(gcm(aes))",
  997. .cra_driver_name = "rfc4106-gcm-aesni",
  998. .cra_priority = 400,
  999. .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
  1000. .cra_blocksize = 1,
  1001. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) +
  1002. AESNI_ALIGN,
  1003. .cra_alignmask = 0,
  1004. .cra_type = &crypto_nivaead_type,
  1005. .cra_module = THIS_MODULE,
  1006. .cra_init = rfc4106_init,
  1007. .cra_exit = rfc4106_exit,
  1008. .cra_u = {
  1009. .aead = {
  1010. .setkey = rfc4106_set_key,
  1011. .setauthsize = rfc4106_set_authsize,
  1012. .encrypt = rfc4106_encrypt,
  1013. .decrypt = rfc4106_decrypt,
  1014. .geniv = "seqiv",
  1015. .ivsize = 8,
  1016. .maxauthsize = 16,
  1017. },
  1018. },
  1019. #endif
  1020. #ifdef HAS_PCBC
  1021. }, {
  1022. .cra_name = "pcbc(aes)",
  1023. .cra_driver_name = "pcbc-aes-aesni",
  1024. .cra_priority = 400,
  1025. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1026. .cra_blocksize = AES_BLOCK_SIZE,
  1027. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1028. .cra_alignmask = 0,
  1029. .cra_type = &crypto_ablkcipher_type,
  1030. .cra_module = THIS_MODULE,
  1031. .cra_init = ablk_pcbc_init,
  1032. .cra_exit = ablk_exit,
  1033. .cra_u = {
  1034. .ablkcipher = {
  1035. .min_keysize = AES_MIN_KEY_SIZE,
  1036. .max_keysize = AES_MAX_KEY_SIZE,
  1037. .ivsize = AES_BLOCK_SIZE,
  1038. .setkey = ablk_set_key,
  1039. .encrypt = ablk_encrypt,
  1040. .decrypt = ablk_decrypt,
  1041. },
  1042. },
  1043. #endif
  1044. }, {
  1045. .cra_name = "__lrw-aes-aesni",
  1046. .cra_driver_name = "__driver-lrw-aes-aesni",
  1047. .cra_priority = 0,
  1048. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1049. .cra_blocksize = AES_BLOCK_SIZE,
  1050. .cra_ctxsize = sizeof(struct aesni_lrw_ctx),
  1051. .cra_alignmask = 0,
  1052. .cra_type = &crypto_blkcipher_type,
  1053. .cra_module = THIS_MODULE,
  1054. .cra_exit = lrw_aesni_exit_tfm,
  1055. .cra_u = {
  1056. .blkcipher = {
  1057. .min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
  1058. .max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
  1059. .ivsize = AES_BLOCK_SIZE,
  1060. .setkey = lrw_aesni_setkey,
  1061. .encrypt = lrw_encrypt,
  1062. .decrypt = lrw_decrypt,
  1063. },
  1064. },
  1065. }, {
  1066. .cra_name = "__xts-aes-aesni",
  1067. .cra_driver_name = "__driver-xts-aes-aesni",
  1068. .cra_priority = 0,
  1069. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1070. .cra_blocksize = AES_BLOCK_SIZE,
  1071. .cra_ctxsize = sizeof(struct aesni_xts_ctx),
  1072. .cra_alignmask = 0,
  1073. .cra_type = &crypto_blkcipher_type,
  1074. .cra_module = THIS_MODULE,
  1075. .cra_u = {
  1076. .blkcipher = {
  1077. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  1078. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  1079. .ivsize = AES_BLOCK_SIZE,
  1080. .setkey = xts_aesni_setkey,
  1081. .encrypt = xts_encrypt,
  1082. .decrypt = xts_decrypt,
  1083. },
  1084. },
  1085. }, {
  1086. .cra_name = "lrw(aes)",
  1087. .cra_driver_name = "lrw-aes-aesni",
  1088. .cra_priority = 400,
  1089. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1090. .cra_blocksize = AES_BLOCK_SIZE,
  1091. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1092. .cra_alignmask = 0,
  1093. .cra_type = &crypto_ablkcipher_type,
  1094. .cra_module = THIS_MODULE,
  1095. .cra_init = ablk_init,
  1096. .cra_exit = ablk_exit,
  1097. .cra_u = {
  1098. .ablkcipher = {
  1099. .min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
  1100. .max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
  1101. .ivsize = AES_BLOCK_SIZE,
  1102. .setkey = ablk_set_key,
  1103. .encrypt = ablk_encrypt,
  1104. .decrypt = ablk_decrypt,
  1105. },
  1106. },
  1107. }, {
  1108. .cra_name = "xts(aes)",
  1109. .cra_driver_name = "xts-aes-aesni",
  1110. .cra_priority = 400,
  1111. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1112. .cra_blocksize = AES_BLOCK_SIZE,
  1113. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1114. .cra_alignmask = 0,
  1115. .cra_type = &crypto_ablkcipher_type,
  1116. .cra_module = THIS_MODULE,
  1117. .cra_init = ablk_init,
  1118. .cra_exit = ablk_exit,
  1119. .cra_u = {
  1120. .ablkcipher = {
  1121. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  1122. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  1123. .ivsize = AES_BLOCK_SIZE,
  1124. .setkey = ablk_set_key,
  1125. .encrypt = ablk_encrypt,
  1126. .decrypt = ablk_decrypt,
  1127. },
  1128. },
  1129. } };
  1130. static const struct x86_cpu_id aesni_cpu_id[] = {
  1131. X86_FEATURE_MATCH(X86_FEATURE_AES),
  1132. {}
  1133. };
  1134. MODULE_DEVICE_TABLE(x86cpu, aesni_cpu_id);
  1135. static int __init aesni_init(void)
  1136. {
  1137. int err;
  1138. if (!x86_match_cpu(aesni_cpu_id))
  1139. return -ENODEV;
  1140. err = crypto_fpu_init();
  1141. if (err)
  1142. return err;
  1143. return crypto_register_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1144. }
  1145. static void __exit aesni_exit(void)
  1146. {
  1147. crypto_unregister_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1148. crypto_fpu_exit();
  1149. }
  1150. module_init(aesni_init);
  1151. module_exit(aesni_exit);
  1152. MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");
  1153. MODULE_LICENSE("GPL");
  1154. MODULE_ALIAS("aes");