pci.c 25 KB

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  1. /*
  2. * Copyright IBM Corp. 2012
  3. *
  4. * Author(s):
  5. * Jan Glauber <jang@linux.vnet.ibm.com>
  6. *
  7. * The System z PCI code is a rewrite from a prototype by
  8. * the following people (Kudoz!):
  9. * Alexander Schmidt
  10. * Christoph Raisch
  11. * Hannes Hering
  12. * Hoang-Nam Nguyen
  13. * Jan-Bernd Themann
  14. * Stefan Roscher
  15. * Thomas Klein
  16. */
  17. #define COMPONENT "zPCI"
  18. #define pr_fmt(fmt) COMPONENT ": " fmt
  19. #include <linux/kernel.h>
  20. #include <linux/slab.h>
  21. #include <linux/err.h>
  22. #include <linux/export.h>
  23. #include <linux/delay.h>
  24. #include <linux/irq.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/seq_file.h>
  27. #include <linux/pci.h>
  28. #include <linux/msi.h>
  29. #include <asm/isc.h>
  30. #include <asm/airq.h>
  31. #include <asm/facility.h>
  32. #include <asm/pci_insn.h>
  33. #include <asm/pci_clp.h>
  34. #include <asm/pci_dma.h>
  35. #define DEBUG /* enable pr_debug */
  36. #define SIC_IRQ_MODE_ALL 0
  37. #define SIC_IRQ_MODE_SINGLE 1
  38. #define ZPCI_NR_DMA_SPACES 1
  39. #define ZPCI_MSI_VEC_BITS 6
  40. #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS
  41. /* list of all detected zpci devices */
  42. LIST_HEAD(zpci_list);
  43. EXPORT_SYMBOL_GPL(zpci_list);
  44. DEFINE_MUTEX(zpci_list_lock);
  45. EXPORT_SYMBOL_GPL(zpci_list_lock);
  46. static struct pci_hp_callback_ops *hotplug_ops;
  47. static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES);
  48. static DEFINE_SPINLOCK(zpci_domain_lock);
  49. struct callback {
  50. irq_handler_t handler;
  51. void *data;
  52. };
  53. struct zdev_irq_map {
  54. unsigned long aibv; /* AI bit vector */
  55. int msi_vecs; /* consecutive MSI-vectors used */
  56. int __unused;
  57. struct callback cb[ZPCI_NR_MSI_VECS]; /* callback handler array */
  58. spinlock_t lock; /* protect callbacks against de-reg */
  59. };
  60. struct intr_bucket {
  61. /* amap of adapters, one bit per dev, corresponds to one irq nr */
  62. unsigned long *alloc;
  63. /* AI summary bit, global page for all devices */
  64. unsigned long *aisb;
  65. /* pointer to aibv and callback data in zdev */
  66. struct zdev_irq_map *imap[ZPCI_NR_DEVICES];
  67. /* protects the whole bucket struct */
  68. spinlock_t lock;
  69. };
  70. static struct intr_bucket *bucket;
  71. /* Adapter local summary indicator */
  72. static u8 *zpci_irq_si;
  73. static atomic_t irq_retries = ATOMIC_INIT(0);
  74. /* I/O Map */
  75. static DEFINE_SPINLOCK(zpci_iomap_lock);
  76. static DECLARE_BITMAP(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  77. struct zpci_iomap_entry *zpci_iomap_start;
  78. EXPORT_SYMBOL_GPL(zpci_iomap_start);
  79. /* highest irq summary bit */
  80. static int __read_mostly aisb_max;
  81. static struct kmem_cache *zdev_irq_cache;
  82. static struct kmem_cache *zdev_fmb_cache;
  83. debug_info_t *pci_debug_msg_id;
  84. debug_info_t *pci_debug_err_id;
  85. static inline int irq_to_msi_nr(unsigned int irq)
  86. {
  87. return irq & ZPCI_MSI_MASK;
  88. }
  89. static inline int irq_to_dev_nr(unsigned int irq)
  90. {
  91. return irq >> ZPCI_MSI_VEC_BITS;
  92. }
  93. static inline struct zdev_irq_map *get_imap(unsigned int irq)
  94. {
  95. return bucket->imap[irq_to_dev_nr(irq)];
  96. }
  97. struct zpci_dev *get_zdev(struct pci_dev *pdev)
  98. {
  99. return (struct zpci_dev *) pdev->sysdata;
  100. }
  101. struct zpci_dev *get_zdev_by_fid(u32 fid)
  102. {
  103. struct zpci_dev *tmp, *zdev = NULL;
  104. mutex_lock(&zpci_list_lock);
  105. list_for_each_entry(tmp, &zpci_list, entry) {
  106. if (tmp->fid == fid) {
  107. zdev = tmp;
  108. break;
  109. }
  110. }
  111. mutex_unlock(&zpci_list_lock);
  112. return zdev;
  113. }
  114. bool zpci_fid_present(u32 fid)
  115. {
  116. return (get_zdev_by_fid(fid) != NULL) ? true : false;
  117. }
  118. static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus)
  119. {
  120. return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL;
  121. }
  122. int pci_domain_nr(struct pci_bus *bus)
  123. {
  124. return ((struct zpci_dev *) bus->sysdata)->domain;
  125. }
  126. EXPORT_SYMBOL_GPL(pci_domain_nr);
  127. int pci_proc_domain(struct pci_bus *bus)
  128. {
  129. return pci_domain_nr(bus);
  130. }
  131. EXPORT_SYMBOL_GPL(pci_proc_domain);
  132. /* Modify PCI: Register adapter interruptions */
  133. static int zpci_register_airq(struct zpci_dev *zdev, unsigned int aisb,
  134. u64 aibv)
  135. {
  136. u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT);
  137. struct zpci_fib *fib;
  138. int rc;
  139. fib = (void *) get_zeroed_page(GFP_KERNEL);
  140. if (!fib)
  141. return -ENOMEM;
  142. fib->isc = PCI_ISC;
  143. fib->noi = zdev->irq_map->msi_vecs;
  144. fib->sum = 1; /* enable summary notifications */
  145. fib->aibv = aibv;
  146. fib->aibvo = 0; /* every function has its own page */
  147. fib->aisb = (u64) bucket->aisb + aisb / 8;
  148. fib->aisbo = aisb & ZPCI_MSI_MASK;
  149. rc = mpcifc_instr(req, fib);
  150. pr_debug("%s mpcifc returned noi: %d\n", __func__, fib->noi);
  151. free_page((unsigned long) fib);
  152. return rc;
  153. }
  154. struct mod_pci_args {
  155. u64 base;
  156. u64 limit;
  157. u64 iota;
  158. u64 fmb_addr;
  159. };
  160. static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args)
  161. {
  162. u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn);
  163. struct zpci_fib *fib;
  164. int rc;
  165. /* The FIB must be available even if it's not used */
  166. fib = (void *) get_zeroed_page(GFP_KERNEL);
  167. if (!fib)
  168. return -ENOMEM;
  169. fib->pba = args->base;
  170. fib->pal = args->limit;
  171. fib->iota = args->iota;
  172. fib->fmb_addr = args->fmb_addr;
  173. rc = mpcifc_instr(req, fib);
  174. free_page((unsigned long) fib);
  175. return rc;
  176. }
  177. /* Modify PCI: Register I/O address translation parameters */
  178. int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
  179. u64 base, u64 limit, u64 iota)
  180. {
  181. struct mod_pci_args args = { base, limit, iota, 0 };
  182. WARN_ON_ONCE(iota & 0x3fff);
  183. args.iota |= ZPCI_IOTA_RTTO_FLAG;
  184. return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args);
  185. }
  186. /* Modify PCI: Unregister I/O address translation parameters */
  187. int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
  188. {
  189. struct mod_pci_args args = { 0, 0, 0, 0 };
  190. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args);
  191. }
  192. /* Modify PCI: Unregister adapter interruptions */
  193. static int zpci_unregister_airq(struct zpci_dev *zdev)
  194. {
  195. struct mod_pci_args args = { 0, 0, 0, 0 };
  196. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args);
  197. }
  198. /* Modify PCI: Set PCI function measurement parameters */
  199. int zpci_fmb_enable_device(struct zpci_dev *zdev)
  200. {
  201. struct mod_pci_args args = { 0, 0, 0, 0 };
  202. if (zdev->fmb)
  203. return -EINVAL;
  204. zdev->fmb = kmem_cache_alloc(zdev_fmb_cache, GFP_KERNEL);
  205. if (!zdev->fmb)
  206. return -ENOMEM;
  207. memset(zdev->fmb, 0, sizeof(*zdev->fmb));
  208. WARN_ON((u64) zdev->fmb & 0xf);
  209. args.fmb_addr = virt_to_phys(zdev->fmb);
  210. return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  211. }
  212. /* Modify PCI: Disable PCI function measurement */
  213. int zpci_fmb_disable_device(struct zpci_dev *zdev)
  214. {
  215. struct mod_pci_args args = { 0, 0, 0, 0 };
  216. int rc;
  217. if (!zdev->fmb)
  218. return -EINVAL;
  219. /* Function measurement is disabled if fmb address is zero */
  220. rc = mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  221. kmem_cache_free(zdev_fmb_cache, zdev->fmb);
  222. zdev->fmb = NULL;
  223. return rc;
  224. }
  225. #define ZPCI_PCIAS_CFGSPC 15
  226. static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
  227. {
  228. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  229. u64 data;
  230. int rc;
  231. rc = pcilg_instr(&data, req, offset);
  232. data = data << ((8 - len) * 8);
  233. data = le64_to_cpu(data);
  234. if (!rc)
  235. *val = (u32) data;
  236. else
  237. *val = 0xffffffff;
  238. return rc;
  239. }
  240. static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
  241. {
  242. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  243. u64 data = val;
  244. int rc;
  245. data = cpu_to_le64(data);
  246. data = data >> ((8 - len) * 8);
  247. rc = pcistg_instr(data, req, offset);
  248. return rc;
  249. }
  250. void synchronize_irq(unsigned int irq)
  251. {
  252. /*
  253. * Not needed, the handler is protected by a lock and IRQs that occur
  254. * after the handler is deleted are just NOPs.
  255. */
  256. }
  257. EXPORT_SYMBOL_GPL(synchronize_irq);
  258. void enable_irq(unsigned int irq)
  259. {
  260. struct msi_desc *msi = irq_get_msi_desc(irq);
  261. zpci_msi_set_mask_bits(msi, 1, 0);
  262. }
  263. EXPORT_SYMBOL_GPL(enable_irq);
  264. void disable_irq(unsigned int irq)
  265. {
  266. struct msi_desc *msi = irq_get_msi_desc(irq);
  267. zpci_msi_set_mask_bits(msi, 1, 1);
  268. }
  269. EXPORT_SYMBOL_GPL(disable_irq);
  270. void disable_irq_nosync(unsigned int irq)
  271. {
  272. disable_irq(irq);
  273. }
  274. EXPORT_SYMBOL_GPL(disable_irq_nosync);
  275. unsigned long probe_irq_on(void)
  276. {
  277. return 0;
  278. }
  279. EXPORT_SYMBOL_GPL(probe_irq_on);
  280. int probe_irq_off(unsigned long val)
  281. {
  282. return 0;
  283. }
  284. EXPORT_SYMBOL_GPL(probe_irq_off);
  285. unsigned int probe_irq_mask(unsigned long val)
  286. {
  287. return val;
  288. }
  289. EXPORT_SYMBOL_GPL(probe_irq_mask);
  290. void pcibios_fixup_bus(struct pci_bus *bus)
  291. {
  292. }
  293. resource_size_t pcibios_align_resource(void *data, const struct resource *res,
  294. resource_size_t size,
  295. resource_size_t align)
  296. {
  297. return 0;
  298. }
  299. /* combine single writes by using store-block insn */
  300. void __iowrite64_copy(void __iomem *to, const void *from, size_t count)
  301. {
  302. zpci_memcpy_toio(to, from, count);
  303. }
  304. /* Create a virtual mapping cookie for a PCI BAR */
  305. void __iomem *pci_iomap(struct pci_dev *pdev, int bar, unsigned long max)
  306. {
  307. struct zpci_dev *zdev = get_zdev(pdev);
  308. u64 addr;
  309. int idx;
  310. if ((bar & 7) != bar)
  311. return NULL;
  312. idx = zdev->bars[bar].map_idx;
  313. spin_lock(&zpci_iomap_lock);
  314. zpci_iomap_start[idx].fh = zdev->fh;
  315. zpci_iomap_start[idx].bar = bar;
  316. spin_unlock(&zpci_iomap_lock);
  317. addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48);
  318. return (void __iomem *) addr;
  319. }
  320. EXPORT_SYMBOL_GPL(pci_iomap);
  321. void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
  322. {
  323. unsigned int idx;
  324. idx = (((__force u64) addr) & ~ZPCI_IOMAP_ADDR_BASE) >> 48;
  325. spin_lock(&zpci_iomap_lock);
  326. zpci_iomap_start[idx].fh = 0;
  327. zpci_iomap_start[idx].bar = 0;
  328. spin_unlock(&zpci_iomap_lock);
  329. }
  330. EXPORT_SYMBOL_GPL(pci_iounmap);
  331. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
  332. int size, u32 *val)
  333. {
  334. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  335. if (!zdev || devfn != ZPCI_DEVFN)
  336. return 0;
  337. return zpci_cfg_load(zdev, where, val, size);
  338. }
  339. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
  340. int size, u32 val)
  341. {
  342. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  343. if (!zdev || devfn != ZPCI_DEVFN)
  344. return 0;
  345. return zpci_cfg_store(zdev, where, val, size);
  346. }
  347. static struct pci_ops pci_root_ops = {
  348. .read = pci_read,
  349. .write = pci_write,
  350. };
  351. /* store the last handled bit to implement fair scheduling of devices */
  352. static DEFINE_PER_CPU(unsigned long, next_sbit);
  353. static void zpci_irq_handler(void *dont, void *need)
  354. {
  355. unsigned long sbit, mbit, last = 0, start = __get_cpu_var(next_sbit);
  356. int rescan = 0, max = aisb_max;
  357. struct zdev_irq_map *imap;
  358. inc_irq_stat(IRQIO_PCI);
  359. sbit = start;
  360. scan:
  361. /* find summary_bit */
  362. for_each_set_bit_left_cont(sbit, bucket->aisb, max) {
  363. clear_bit(63 - (sbit & 63), bucket->aisb + (sbit >> 6));
  364. last = sbit;
  365. /* find vector bit */
  366. imap = bucket->imap[sbit];
  367. for_each_set_bit_left(mbit, &imap->aibv, imap->msi_vecs) {
  368. inc_irq_stat(IRQIO_MSI);
  369. clear_bit(63 - mbit, &imap->aibv);
  370. spin_lock(&imap->lock);
  371. if (imap->cb[mbit].handler)
  372. imap->cb[mbit].handler(mbit,
  373. imap->cb[mbit].data);
  374. spin_unlock(&imap->lock);
  375. }
  376. }
  377. if (rescan)
  378. goto out;
  379. /* scan the skipped bits */
  380. if (start > 0) {
  381. sbit = 0;
  382. max = start;
  383. start = 0;
  384. goto scan;
  385. }
  386. /* enable interrupts again */
  387. sic_instr(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  388. /* check again to not lose initiative */
  389. rmb();
  390. max = aisb_max;
  391. sbit = find_first_bit_left(bucket->aisb, max);
  392. if (sbit != max) {
  393. atomic_inc(&irq_retries);
  394. rescan++;
  395. goto scan;
  396. }
  397. out:
  398. /* store next device bit to scan */
  399. __get_cpu_var(next_sbit) = (++last >= aisb_max) ? 0 : last;
  400. }
  401. /* msi_vecs - number of requested interrupts, 0 place function to error state */
  402. static int zpci_setup_msi(struct pci_dev *pdev, int msi_vecs)
  403. {
  404. struct zpci_dev *zdev = get_zdev(pdev);
  405. unsigned int aisb, msi_nr;
  406. struct msi_desc *msi;
  407. int rc;
  408. /* store the number of used MSI vectors */
  409. zdev->irq_map->msi_vecs = min(msi_vecs, ZPCI_NR_MSI_VECS);
  410. spin_lock(&bucket->lock);
  411. aisb = find_first_zero_bit(bucket->alloc, PAGE_SIZE);
  412. /* alloc map exhausted? */
  413. if (aisb == PAGE_SIZE) {
  414. spin_unlock(&bucket->lock);
  415. return -EIO;
  416. }
  417. set_bit(aisb, bucket->alloc);
  418. spin_unlock(&bucket->lock);
  419. zdev->aisb = aisb;
  420. if (aisb + 1 > aisb_max)
  421. aisb_max = aisb + 1;
  422. /* wire up IRQ shortcut pointer */
  423. bucket->imap[zdev->aisb] = zdev->irq_map;
  424. pr_debug("%s: imap[%u] linked to %p\n", __func__, zdev->aisb, zdev->irq_map);
  425. /* TODO: irq number 0 wont be found if we return less than requested MSIs.
  426. * ignore it for now and fix in common code.
  427. */
  428. msi_nr = aisb << ZPCI_MSI_VEC_BITS;
  429. list_for_each_entry(msi, &pdev->msi_list, list) {
  430. rc = zpci_setup_msi_irq(zdev, msi, msi_nr,
  431. aisb << ZPCI_MSI_VEC_BITS);
  432. if (rc)
  433. return rc;
  434. msi_nr++;
  435. }
  436. rc = zpci_register_airq(zdev, aisb, (u64) &zdev->irq_map->aibv);
  437. if (rc) {
  438. clear_bit(aisb, bucket->alloc);
  439. dev_err(&pdev->dev, "register MSI failed with: %d\n", rc);
  440. return rc;
  441. }
  442. return (zdev->irq_map->msi_vecs == msi_vecs) ?
  443. 0 : zdev->irq_map->msi_vecs;
  444. }
  445. static void zpci_teardown_msi(struct pci_dev *pdev)
  446. {
  447. struct zpci_dev *zdev = get_zdev(pdev);
  448. struct msi_desc *msi;
  449. int aisb, rc;
  450. rc = zpci_unregister_airq(zdev);
  451. if (rc) {
  452. dev_err(&pdev->dev, "deregister MSI failed with: %d\n", rc);
  453. return;
  454. }
  455. msi = list_first_entry(&pdev->msi_list, struct msi_desc, list);
  456. aisb = irq_to_dev_nr(msi->irq);
  457. list_for_each_entry(msi, &pdev->msi_list, list)
  458. zpci_teardown_msi_irq(zdev, msi);
  459. clear_bit(aisb, bucket->alloc);
  460. if (aisb + 1 == aisb_max)
  461. aisb_max--;
  462. }
  463. int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
  464. {
  465. pr_debug("%s: requesting %d MSI-X interrupts...", __func__, nvec);
  466. if (type != PCI_CAP_ID_MSIX && type != PCI_CAP_ID_MSI)
  467. return -EINVAL;
  468. return zpci_setup_msi(pdev, nvec);
  469. }
  470. void arch_teardown_msi_irqs(struct pci_dev *pdev)
  471. {
  472. pr_info("%s: on pdev: %p\n", __func__, pdev);
  473. zpci_teardown_msi(pdev);
  474. }
  475. static void zpci_map_resources(struct zpci_dev *zdev)
  476. {
  477. struct pci_dev *pdev = zdev->pdev;
  478. resource_size_t len;
  479. int i;
  480. for (i = 0; i < PCI_BAR_COUNT; i++) {
  481. len = pci_resource_len(pdev, i);
  482. if (!len)
  483. continue;
  484. pdev->resource[i].start = (resource_size_t) pci_iomap(pdev, i, 0);
  485. pdev->resource[i].end = pdev->resource[i].start + len - 1;
  486. pr_debug("BAR%i: -> start: %Lx end: %Lx\n",
  487. i, pdev->resource[i].start, pdev->resource[i].end);
  488. }
  489. };
  490. static void zpci_unmap_resources(struct pci_dev *pdev)
  491. {
  492. resource_size_t len;
  493. int i;
  494. for (i = 0; i < PCI_BAR_COUNT; i++) {
  495. len = pci_resource_len(pdev, i);
  496. if (!len)
  497. continue;
  498. pci_iounmap(pdev, (void *) pdev->resource[i].start);
  499. }
  500. };
  501. struct zpci_dev *zpci_alloc_device(void)
  502. {
  503. struct zpci_dev *zdev;
  504. /* Alloc memory for our private pci device data */
  505. zdev = kzalloc(sizeof(*zdev), GFP_KERNEL);
  506. if (!zdev)
  507. return ERR_PTR(-ENOMEM);
  508. /* Alloc aibv & callback space */
  509. zdev->irq_map = kmem_cache_zalloc(zdev_irq_cache, GFP_KERNEL);
  510. if (!zdev->irq_map)
  511. goto error;
  512. WARN_ON((u64) zdev->irq_map & 0xff);
  513. return zdev;
  514. error:
  515. kfree(zdev);
  516. return ERR_PTR(-ENOMEM);
  517. }
  518. void zpci_free_device(struct zpci_dev *zdev)
  519. {
  520. kmem_cache_free(zdev_irq_cache, zdev->irq_map);
  521. kfree(zdev);
  522. }
  523. /* Called on removal of pci_dev, leaves zpci and bus device */
  524. static void zpci_remove_device(struct pci_dev *pdev)
  525. {
  526. struct zpci_dev *zdev = get_zdev(pdev);
  527. dev_info(&pdev->dev, "Removing device %u\n", zdev->domain);
  528. zdev->state = ZPCI_FN_STATE_CONFIGURED;
  529. zpci_dma_exit_device(zdev);
  530. zpci_fmb_disable_device(zdev);
  531. zpci_sysfs_remove_device(&pdev->dev);
  532. zpci_unmap_resources(pdev);
  533. list_del(&zdev->entry); /* can be called from init */
  534. zdev->pdev = NULL;
  535. }
  536. static void zpci_scan_devices(void)
  537. {
  538. struct zpci_dev *zdev;
  539. mutex_lock(&zpci_list_lock);
  540. list_for_each_entry(zdev, &zpci_list, entry)
  541. if (zdev->state == ZPCI_FN_STATE_CONFIGURED)
  542. zpci_scan_device(zdev);
  543. mutex_unlock(&zpci_list_lock);
  544. }
  545. /*
  546. * Too late for any s390 specific setup, since interrupts must be set up
  547. * already which requires DMA setup too and the pci scan will access the
  548. * config space, which only works if the function handle is enabled.
  549. */
  550. int pcibios_enable_device(struct pci_dev *pdev, int mask)
  551. {
  552. struct resource *res;
  553. u16 cmd;
  554. int i;
  555. pci_read_config_word(pdev, PCI_COMMAND, &cmd);
  556. for (i = 0; i < PCI_BAR_COUNT; i++) {
  557. res = &pdev->resource[i];
  558. if (res->flags & IORESOURCE_IO)
  559. return -EINVAL;
  560. if (res->flags & IORESOURCE_MEM)
  561. cmd |= PCI_COMMAND_MEMORY;
  562. }
  563. pci_write_config_word(pdev, PCI_COMMAND, cmd);
  564. return 0;
  565. }
  566. void pcibios_disable_device(struct pci_dev *pdev)
  567. {
  568. zpci_remove_device(pdev);
  569. pdev->sysdata = NULL;
  570. }
  571. int pcibios_add_platform_entries(struct pci_dev *pdev)
  572. {
  573. return zpci_sysfs_add_device(&pdev->dev);
  574. }
  575. int zpci_request_irq(unsigned int irq, irq_handler_t handler, void *data)
  576. {
  577. int msi_nr = irq_to_msi_nr(irq);
  578. struct zdev_irq_map *imap;
  579. struct msi_desc *msi;
  580. msi = irq_get_msi_desc(irq);
  581. if (!msi)
  582. return -EIO;
  583. imap = get_imap(irq);
  584. spin_lock_init(&imap->lock);
  585. pr_debug("%s: register handler for IRQ:MSI %d:%d\n", __func__, irq >> 6, msi_nr);
  586. imap->cb[msi_nr].handler = handler;
  587. imap->cb[msi_nr].data = data;
  588. /*
  589. * The generic MSI code returns with the interrupt disabled on the
  590. * card, using the MSI mask bits. Firmware doesn't appear to unmask
  591. * at that level, so we do it here by hand.
  592. */
  593. zpci_msi_set_mask_bits(msi, 1, 0);
  594. return 0;
  595. }
  596. void zpci_free_irq(unsigned int irq)
  597. {
  598. struct zdev_irq_map *imap = get_imap(irq);
  599. int msi_nr = irq_to_msi_nr(irq);
  600. unsigned long flags;
  601. pr_debug("%s: for irq: %d\n", __func__, irq);
  602. spin_lock_irqsave(&imap->lock, flags);
  603. imap->cb[msi_nr].handler = NULL;
  604. imap->cb[msi_nr].data = NULL;
  605. spin_unlock_irqrestore(&imap->lock, flags);
  606. }
  607. int request_irq(unsigned int irq, irq_handler_t handler,
  608. unsigned long irqflags, const char *devname, void *dev_id)
  609. {
  610. pr_debug("%s: irq: %d handler: %p flags: %lx dev: %s\n",
  611. __func__, irq, handler, irqflags, devname);
  612. return zpci_request_irq(irq, handler, dev_id);
  613. }
  614. EXPORT_SYMBOL_GPL(request_irq);
  615. void free_irq(unsigned int irq, void *dev_id)
  616. {
  617. zpci_free_irq(irq);
  618. }
  619. EXPORT_SYMBOL_GPL(free_irq);
  620. static int __init zpci_irq_init(void)
  621. {
  622. int cpu, rc;
  623. bucket = kzalloc(sizeof(*bucket), GFP_KERNEL);
  624. if (!bucket)
  625. return -ENOMEM;
  626. bucket->aisb = (unsigned long *) get_zeroed_page(GFP_KERNEL);
  627. if (!bucket->aisb) {
  628. rc = -ENOMEM;
  629. goto out_aisb;
  630. }
  631. bucket->alloc = (unsigned long *) get_zeroed_page(GFP_KERNEL);
  632. if (!bucket->alloc) {
  633. rc = -ENOMEM;
  634. goto out_alloc;
  635. }
  636. isc_register(PCI_ISC);
  637. zpci_irq_si = s390_register_adapter_interrupt(&zpci_irq_handler, NULL, PCI_ISC);
  638. if (IS_ERR(zpci_irq_si)) {
  639. rc = PTR_ERR(zpci_irq_si);
  640. zpci_irq_si = NULL;
  641. goto out_ai;
  642. }
  643. for_each_online_cpu(cpu)
  644. per_cpu(next_sbit, cpu) = 0;
  645. spin_lock_init(&bucket->lock);
  646. /* set summary to 1 to be called every time for the ISC */
  647. *zpci_irq_si = 1;
  648. sic_instr(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  649. return 0;
  650. out_ai:
  651. isc_unregister(PCI_ISC);
  652. free_page((unsigned long) bucket->alloc);
  653. out_alloc:
  654. free_page((unsigned long) bucket->aisb);
  655. out_aisb:
  656. kfree(bucket);
  657. return rc;
  658. }
  659. static void zpci_irq_exit(void)
  660. {
  661. free_page((unsigned long) bucket->alloc);
  662. free_page((unsigned long) bucket->aisb);
  663. s390_unregister_adapter_interrupt(zpci_irq_si, PCI_ISC);
  664. isc_unregister(PCI_ISC);
  665. kfree(bucket);
  666. }
  667. void zpci_debug_info(struct zpci_dev *zdev, struct seq_file *m)
  668. {
  669. if (!zdev)
  670. return;
  671. seq_printf(m, "global irq retries: %u\n", atomic_read(&irq_retries));
  672. seq_printf(m, "aibv[0]:%016lx aibv[1]:%016lx aisb:%016lx\n",
  673. get_imap(0)->aibv, get_imap(1)->aibv, *bucket->aisb);
  674. }
  675. static struct resource *zpci_alloc_bus_resource(unsigned long start, unsigned long size,
  676. unsigned long flags, int domain)
  677. {
  678. struct resource *r;
  679. char *name;
  680. int rc;
  681. r = kzalloc(sizeof(*r), GFP_KERNEL);
  682. if (!r)
  683. return ERR_PTR(-ENOMEM);
  684. r->start = start;
  685. r->end = r->start + size - 1;
  686. r->flags = flags;
  687. r->parent = &iomem_resource;
  688. name = kmalloc(18, GFP_KERNEL);
  689. if (!name) {
  690. kfree(r);
  691. return ERR_PTR(-ENOMEM);
  692. }
  693. sprintf(name, "PCI Bus: %04x:%02x", domain, ZPCI_BUS_NR);
  694. r->name = name;
  695. rc = request_resource(&iomem_resource, r);
  696. if (rc)
  697. pr_debug("request resource %pR failed\n", r);
  698. return r;
  699. }
  700. static int zpci_alloc_iomap(struct zpci_dev *zdev)
  701. {
  702. int entry;
  703. spin_lock(&zpci_iomap_lock);
  704. entry = find_first_zero_bit(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  705. if (entry == ZPCI_IOMAP_MAX_ENTRIES) {
  706. spin_unlock(&zpci_iomap_lock);
  707. return -ENOSPC;
  708. }
  709. set_bit(entry, zpci_iomap);
  710. spin_unlock(&zpci_iomap_lock);
  711. return entry;
  712. }
  713. static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
  714. {
  715. spin_lock(&zpci_iomap_lock);
  716. memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
  717. clear_bit(entry, zpci_iomap);
  718. spin_unlock(&zpci_iomap_lock);
  719. }
  720. static int zpci_create_device_bus(struct zpci_dev *zdev)
  721. {
  722. struct resource *res;
  723. LIST_HEAD(resources);
  724. int i;
  725. /* allocate mapping entry for each used bar */
  726. for (i = 0; i < PCI_BAR_COUNT; i++) {
  727. unsigned long addr, size, flags;
  728. int entry;
  729. if (!zdev->bars[i].size)
  730. continue;
  731. entry = zpci_alloc_iomap(zdev);
  732. if (entry < 0)
  733. return entry;
  734. zdev->bars[i].map_idx = entry;
  735. /* only MMIO is supported */
  736. flags = IORESOURCE_MEM;
  737. if (zdev->bars[i].val & 8)
  738. flags |= IORESOURCE_PREFETCH;
  739. if (zdev->bars[i].val & 4)
  740. flags |= IORESOURCE_MEM_64;
  741. addr = ZPCI_IOMAP_ADDR_BASE + ((u64) entry << 48);
  742. size = 1UL << zdev->bars[i].size;
  743. res = zpci_alloc_bus_resource(addr, size, flags, zdev->domain);
  744. if (IS_ERR(res)) {
  745. zpci_free_iomap(zdev, entry);
  746. return PTR_ERR(res);
  747. }
  748. pci_add_resource(&resources, res);
  749. }
  750. zdev->bus = pci_create_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops,
  751. zdev, &resources);
  752. if (!zdev->bus)
  753. return -EIO;
  754. zdev->bus->max_bus_speed = zdev->max_bus_speed;
  755. return 0;
  756. }
  757. static int zpci_alloc_domain(struct zpci_dev *zdev)
  758. {
  759. spin_lock(&zpci_domain_lock);
  760. zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
  761. if (zdev->domain == ZPCI_NR_DEVICES) {
  762. spin_unlock(&zpci_domain_lock);
  763. return -ENOSPC;
  764. }
  765. set_bit(zdev->domain, zpci_domain);
  766. spin_unlock(&zpci_domain_lock);
  767. return 0;
  768. }
  769. static void zpci_free_domain(struct zpci_dev *zdev)
  770. {
  771. spin_lock(&zpci_domain_lock);
  772. clear_bit(zdev->domain, zpci_domain);
  773. spin_unlock(&zpci_domain_lock);
  774. }
  775. int zpci_enable_device(struct zpci_dev *zdev)
  776. {
  777. int rc;
  778. rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
  779. if (rc)
  780. goto out;
  781. pr_info("Enabled fh: 0x%x fid: 0x%x\n", zdev->fh, zdev->fid);
  782. rc = zpci_dma_init_device(zdev);
  783. if (rc)
  784. goto out_dma;
  785. return 0;
  786. out_dma:
  787. clp_disable_fh(zdev);
  788. out:
  789. return rc;
  790. }
  791. EXPORT_SYMBOL_GPL(zpci_enable_device);
  792. int zpci_create_device(struct zpci_dev *zdev)
  793. {
  794. int rc;
  795. rc = zpci_alloc_domain(zdev);
  796. if (rc)
  797. goto out;
  798. rc = zpci_create_device_bus(zdev);
  799. if (rc)
  800. goto out_bus;
  801. mutex_lock(&zpci_list_lock);
  802. list_add_tail(&zdev->entry, &zpci_list);
  803. if (hotplug_ops)
  804. hotplug_ops->create_slot(zdev);
  805. mutex_unlock(&zpci_list_lock);
  806. if (zdev->state == ZPCI_FN_STATE_STANDBY)
  807. return 0;
  808. rc = zpci_enable_device(zdev);
  809. if (rc)
  810. goto out_start;
  811. return 0;
  812. out_start:
  813. mutex_lock(&zpci_list_lock);
  814. list_del(&zdev->entry);
  815. if (hotplug_ops)
  816. hotplug_ops->remove_slot(zdev);
  817. mutex_unlock(&zpci_list_lock);
  818. out_bus:
  819. zpci_free_domain(zdev);
  820. out:
  821. return rc;
  822. }
  823. void zpci_stop_device(struct zpci_dev *zdev)
  824. {
  825. zpci_dma_exit_device(zdev);
  826. /*
  827. * Note: SCLP disables fh via set-pci-fn so don't
  828. * do that here.
  829. */
  830. }
  831. EXPORT_SYMBOL_GPL(zpci_stop_device);
  832. int zpci_scan_device(struct zpci_dev *zdev)
  833. {
  834. zdev->pdev = pci_scan_single_device(zdev->bus, ZPCI_DEVFN);
  835. if (!zdev->pdev) {
  836. pr_err("pci_scan_single_device failed for fid: 0x%x\n",
  837. zdev->fid);
  838. goto out;
  839. }
  840. zpci_debug_init_device(zdev);
  841. zpci_fmb_enable_device(zdev);
  842. zpci_map_resources(zdev);
  843. pci_bus_add_devices(zdev->bus);
  844. /* now that pdev was added to the bus mark it as used */
  845. zdev->state = ZPCI_FN_STATE_ONLINE;
  846. return 0;
  847. out:
  848. zpci_dma_exit_device(zdev);
  849. clp_disable_fh(zdev);
  850. return -EIO;
  851. }
  852. EXPORT_SYMBOL_GPL(zpci_scan_device);
  853. static inline int barsize(u8 size)
  854. {
  855. return (size) ? (1 << size) >> 10 : 0;
  856. }
  857. static int zpci_mem_init(void)
  858. {
  859. zdev_irq_cache = kmem_cache_create("PCI_IRQ_cache", sizeof(struct zdev_irq_map),
  860. L1_CACHE_BYTES, SLAB_HWCACHE_ALIGN, NULL);
  861. if (!zdev_irq_cache)
  862. goto error_zdev;
  863. zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb),
  864. 16, 0, NULL);
  865. if (!zdev_fmb_cache)
  866. goto error_fmb;
  867. /* TODO: use realloc */
  868. zpci_iomap_start = kzalloc(ZPCI_IOMAP_MAX_ENTRIES * sizeof(*zpci_iomap_start),
  869. GFP_KERNEL);
  870. if (!zpci_iomap_start)
  871. goto error_iomap;
  872. return 0;
  873. error_iomap:
  874. kmem_cache_destroy(zdev_fmb_cache);
  875. error_fmb:
  876. kmem_cache_destroy(zdev_irq_cache);
  877. error_zdev:
  878. return -ENOMEM;
  879. }
  880. static void zpci_mem_exit(void)
  881. {
  882. kfree(zpci_iomap_start);
  883. kmem_cache_destroy(zdev_irq_cache);
  884. kmem_cache_destroy(zdev_fmb_cache);
  885. }
  886. void zpci_register_hp_ops(struct pci_hp_callback_ops *ops)
  887. {
  888. mutex_lock(&zpci_list_lock);
  889. hotplug_ops = ops;
  890. mutex_unlock(&zpci_list_lock);
  891. }
  892. EXPORT_SYMBOL_GPL(zpci_register_hp_ops);
  893. void zpci_deregister_hp_ops(void)
  894. {
  895. mutex_lock(&zpci_list_lock);
  896. hotplug_ops = NULL;
  897. mutex_unlock(&zpci_list_lock);
  898. }
  899. EXPORT_SYMBOL_GPL(zpci_deregister_hp_ops);
  900. unsigned int s390_pci_probe = 1;
  901. EXPORT_SYMBOL_GPL(s390_pci_probe);
  902. char * __init pcibios_setup(char *str)
  903. {
  904. if (!strcmp(str, "off")) {
  905. s390_pci_probe = 0;
  906. return NULL;
  907. }
  908. return str;
  909. }
  910. static int __init pci_base_init(void)
  911. {
  912. int rc;
  913. if (!s390_pci_probe)
  914. return 0;
  915. if (!test_facility(2) || !test_facility(69)
  916. || !test_facility(71) || !test_facility(72))
  917. return 0;
  918. pr_info("Probing PCI hardware: PCI:%d SID:%d AEN:%d\n",
  919. test_facility(69), test_facility(70),
  920. test_facility(71));
  921. rc = zpci_debug_init();
  922. if (rc)
  923. return rc;
  924. rc = zpci_mem_init();
  925. if (rc)
  926. goto out_mem;
  927. rc = zpci_msihash_init();
  928. if (rc)
  929. goto out_hash;
  930. rc = zpci_irq_init();
  931. if (rc)
  932. goto out_irq;
  933. rc = zpci_dma_init();
  934. if (rc)
  935. goto out_dma;
  936. rc = clp_find_pci_devices();
  937. if (rc)
  938. goto out_find;
  939. zpci_scan_devices();
  940. return 0;
  941. out_find:
  942. zpci_dma_exit();
  943. out_dma:
  944. zpci_irq_exit();
  945. out_irq:
  946. zpci_msihash_exit();
  947. out_hash:
  948. zpci_mem_exit();
  949. out_mem:
  950. zpci_debug_exit();
  951. return rc;
  952. }
  953. subsys_initcall(pci_base_init);