time.c 46 KB

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  1. /*
  2. * Time of day based timer functions.
  3. *
  4. * S390 version
  5. * Copyright IBM Corp. 1999, 2008
  6. * Author(s): Hartmut Penner (hp@de.ibm.com),
  7. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  8. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  9. *
  10. * Derived from "arch/i386/kernel/time.c"
  11. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  12. */
  13. #define KMSG_COMPONENT "time"
  14. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  15. #include <linux/kernel_stat.h>
  16. #include <linux/errno.h>
  17. #include <linux/module.h>
  18. #include <linux/sched.h>
  19. #include <linux/kernel.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/mm.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/cpu.h>
  25. #include <linux/stop_machine.h>
  26. #include <linux/time.h>
  27. #include <linux/device.h>
  28. #include <linux/delay.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/types.h>
  32. #include <linux/profile.h>
  33. #include <linux/timex.h>
  34. #include <linux/notifier.h>
  35. #include <linux/timekeeper_internal.h>
  36. #include <linux/clockchips.h>
  37. #include <linux/gfp.h>
  38. #include <linux/kprobes.h>
  39. #include <asm/uaccess.h>
  40. #include <asm/delay.h>
  41. #include <asm/div64.h>
  42. #include <asm/vdso.h>
  43. #include <asm/irq.h>
  44. #include <asm/irq_regs.h>
  45. #include <asm/vtimer.h>
  46. #include <asm/etr.h>
  47. #include <asm/cio.h>
  48. #include "entry.h"
  49. /* change this if you have some constant time drift */
  50. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  51. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  52. u64 sched_clock_base_cc = -1; /* Force to data section. */
  53. EXPORT_SYMBOL_GPL(sched_clock_base_cc);
  54. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  55. /*
  56. * Scheduler clock - returns current time in nanosec units.
  57. */
  58. unsigned long long notrace __kprobes sched_clock(void)
  59. {
  60. return tod_to_ns(get_tod_clock_monotonic());
  61. }
  62. /*
  63. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  64. */
  65. unsigned long long monotonic_clock(void)
  66. {
  67. return sched_clock();
  68. }
  69. EXPORT_SYMBOL(monotonic_clock);
  70. void tod_to_timeval(__u64 todval, struct timespec *xt)
  71. {
  72. unsigned long long sec;
  73. sec = todval >> 12;
  74. do_div(sec, 1000000);
  75. xt->tv_sec = sec;
  76. todval -= (sec * 1000000) << 12;
  77. xt->tv_nsec = ((todval * 1000) >> 12);
  78. }
  79. EXPORT_SYMBOL(tod_to_timeval);
  80. void clock_comparator_work(void)
  81. {
  82. struct clock_event_device *cd;
  83. S390_lowcore.clock_comparator = -1ULL;
  84. set_clock_comparator(S390_lowcore.clock_comparator);
  85. cd = &__get_cpu_var(comparators);
  86. cd->event_handler(cd);
  87. }
  88. /*
  89. * Fixup the clock comparator.
  90. */
  91. static void fixup_clock_comparator(unsigned long long delta)
  92. {
  93. /* If nobody is waiting there's nothing to fix. */
  94. if (S390_lowcore.clock_comparator == -1ULL)
  95. return;
  96. S390_lowcore.clock_comparator += delta;
  97. set_clock_comparator(S390_lowcore.clock_comparator);
  98. }
  99. static int s390_next_ktime(ktime_t expires,
  100. struct clock_event_device *evt)
  101. {
  102. struct timespec ts;
  103. u64 nsecs;
  104. ts.tv_sec = ts.tv_nsec = 0;
  105. monotonic_to_bootbased(&ts);
  106. nsecs = ktime_to_ns(ktime_add(timespec_to_ktime(ts), expires));
  107. do_div(nsecs, 125);
  108. S390_lowcore.clock_comparator = sched_clock_base_cc + (nsecs << 9);
  109. /* Program the maximum value if we have an overflow (== year 2042) */
  110. if (unlikely(S390_lowcore.clock_comparator < sched_clock_base_cc))
  111. S390_lowcore.clock_comparator = -1ULL;
  112. set_clock_comparator(S390_lowcore.clock_comparator);
  113. return 0;
  114. }
  115. static void s390_set_mode(enum clock_event_mode mode,
  116. struct clock_event_device *evt)
  117. {
  118. }
  119. /*
  120. * Set up lowcore and control register of the current cpu to
  121. * enable TOD clock and clock comparator interrupts.
  122. */
  123. void init_cpu_timer(void)
  124. {
  125. struct clock_event_device *cd;
  126. int cpu;
  127. S390_lowcore.clock_comparator = -1ULL;
  128. set_clock_comparator(S390_lowcore.clock_comparator);
  129. cpu = smp_processor_id();
  130. cd = &per_cpu(comparators, cpu);
  131. cd->name = "comparator";
  132. cd->features = CLOCK_EVT_FEAT_ONESHOT |
  133. CLOCK_EVT_FEAT_KTIME;
  134. cd->mult = 16777;
  135. cd->shift = 12;
  136. cd->min_delta_ns = 1;
  137. cd->max_delta_ns = LONG_MAX;
  138. cd->rating = 400;
  139. cd->cpumask = cpumask_of(cpu);
  140. cd->set_next_ktime = s390_next_ktime;
  141. cd->set_mode = s390_set_mode;
  142. clockevents_register_device(cd);
  143. /* Enable clock comparator timer interrupt. */
  144. __ctl_set_bit(0,11);
  145. /* Always allow the timing alert external interrupt. */
  146. __ctl_set_bit(0, 4);
  147. }
  148. static void clock_comparator_interrupt(struct ext_code ext_code,
  149. unsigned int param32,
  150. unsigned long param64)
  151. {
  152. inc_irq_stat(IRQEXT_CLK);
  153. if (S390_lowcore.clock_comparator == -1ULL)
  154. set_clock_comparator(S390_lowcore.clock_comparator);
  155. }
  156. static void etr_timing_alert(struct etr_irq_parm *);
  157. static void stp_timing_alert(struct stp_irq_parm *);
  158. static void timing_alert_interrupt(struct ext_code ext_code,
  159. unsigned int param32, unsigned long param64)
  160. {
  161. inc_irq_stat(IRQEXT_TLA);
  162. if (param32 & 0x00c40000)
  163. etr_timing_alert((struct etr_irq_parm *) &param32);
  164. if (param32 & 0x00038000)
  165. stp_timing_alert((struct stp_irq_parm *) &param32);
  166. }
  167. static void etr_reset(void);
  168. static void stp_reset(void);
  169. void read_persistent_clock(struct timespec *ts)
  170. {
  171. tod_to_timeval(get_tod_clock() - TOD_UNIX_EPOCH, ts);
  172. }
  173. void read_boot_clock(struct timespec *ts)
  174. {
  175. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
  176. }
  177. static cycle_t read_tod_clock(struct clocksource *cs)
  178. {
  179. return get_tod_clock();
  180. }
  181. static struct clocksource clocksource_tod = {
  182. .name = "tod",
  183. .rating = 400,
  184. .read = read_tod_clock,
  185. .mask = -1ULL,
  186. .mult = 1000,
  187. .shift = 12,
  188. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  189. };
  190. struct clocksource * __init clocksource_default_clock(void)
  191. {
  192. return &clocksource_tod;
  193. }
  194. void update_vsyscall_old(struct timespec *wall_time, struct timespec *wtm,
  195. struct clocksource *clock, u32 mult)
  196. {
  197. if (clock != &clocksource_tod)
  198. return;
  199. /* Make userspace gettimeofday spin until we're done. */
  200. ++vdso_data->tb_update_count;
  201. smp_wmb();
  202. vdso_data->xtime_tod_stamp = clock->cycle_last;
  203. vdso_data->xtime_clock_sec = wall_time->tv_sec;
  204. vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
  205. vdso_data->wtom_clock_sec = wtm->tv_sec;
  206. vdso_data->wtom_clock_nsec = wtm->tv_nsec;
  207. vdso_data->ntp_mult = mult;
  208. smp_wmb();
  209. ++vdso_data->tb_update_count;
  210. }
  211. extern struct timezone sys_tz;
  212. void update_vsyscall_tz(void)
  213. {
  214. /* Make userspace gettimeofday spin until we're done. */
  215. ++vdso_data->tb_update_count;
  216. smp_wmb();
  217. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  218. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  219. smp_wmb();
  220. ++vdso_data->tb_update_count;
  221. }
  222. /*
  223. * Initialize the TOD clock and the CPU timer of
  224. * the boot cpu.
  225. */
  226. void __init time_init(void)
  227. {
  228. /* Reset time synchronization interfaces. */
  229. etr_reset();
  230. stp_reset();
  231. /* request the clock comparator external interrupt */
  232. if (register_external_interrupt(0x1004, clock_comparator_interrupt))
  233. panic("Couldn't request external interrupt 0x1004");
  234. /* request the timing alert external interrupt */
  235. if (register_external_interrupt(0x1406, timing_alert_interrupt))
  236. panic("Couldn't request external interrupt 0x1406");
  237. if (clocksource_register(&clocksource_tod) != 0)
  238. panic("Could not register TOD clock source");
  239. /* Enable TOD clock interrupts on the boot cpu. */
  240. init_cpu_timer();
  241. /* Enable cpu timer interrupts on the boot cpu. */
  242. vtime_init();
  243. }
  244. /*
  245. * The time is "clock". old is what we think the time is.
  246. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  247. * "delay" is an approximation how long the synchronization took. If
  248. * the time correction is positive, then "delay" is subtracted from
  249. * the time difference and only the remaining part is passed to ntp.
  250. */
  251. static unsigned long long adjust_time(unsigned long long old,
  252. unsigned long long clock,
  253. unsigned long long delay)
  254. {
  255. unsigned long long delta, ticks;
  256. struct timex adjust;
  257. if (clock > old) {
  258. /* It is later than we thought. */
  259. delta = ticks = clock - old;
  260. delta = ticks = (delta < delay) ? 0 : delta - delay;
  261. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  262. adjust.offset = ticks * (1000000 / HZ);
  263. } else {
  264. /* It is earlier than we thought. */
  265. delta = ticks = old - clock;
  266. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  267. delta = -delta;
  268. adjust.offset = -ticks * (1000000 / HZ);
  269. }
  270. sched_clock_base_cc += delta;
  271. if (adjust.offset != 0) {
  272. pr_notice("The ETR interface has adjusted the clock "
  273. "by %li microseconds\n", adjust.offset);
  274. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  275. do_adjtimex(&adjust);
  276. }
  277. return delta;
  278. }
  279. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  280. static DEFINE_MUTEX(clock_sync_mutex);
  281. static unsigned long clock_sync_flags;
  282. #define CLOCK_SYNC_HAS_ETR 0
  283. #define CLOCK_SYNC_HAS_STP 1
  284. #define CLOCK_SYNC_ETR 2
  285. #define CLOCK_SYNC_STP 3
  286. /*
  287. * The synchronous get_clock function. It will write the current clock
  288. * value to the clock pointer and return 0 if the clock is in sync with
  289. * the external time source. If the clock mode is local it will return
  290. * -EOPNOTSUPP and -EAGAIN if the clock is not in sync with the external
  291. * reference.
  292. */
  293. int get_sync_clock(unsigned long long *clock)
  294. {
  295. atomic_t *sw_ptr;
  296. unsigned int sw0, sw1;
  297. sw_ptr = &get_cpu_var(clock_sync_word);
  298. sw0 = atomic_read(sw_ptr);
  299. *clock = get_tod_clock();
  300. sw1 = atomic_read(sw_ptr);
  301. put_cpu_var(clock_sync_word);
  302. if (sw0 == sw1 && (sw0 & 0x80000000U))
  303. /* Success: time is in sync. */
  304. return 0;
  305. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  306. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  307. return -EOPNOTSUPP;
  308. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  309. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  310. return -EACCES;
  311. return -EAGAIN;
  312. }
  313. EXPORT_SYMBOL(get_sync_clock);
  314. /*
  315. * Make get_sync_clock return -EAGAIN.
  316. */
  317. static void disable_sync_clock(void *dummy)
  318. {
  319. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  320. /*
  321. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  322. * fail until the sync bit is turned back on. In addition
  323. * increase the "sequence" counter to avoid the race of an
  324. * etr event and the complete recovery against get_sync_clock.
  325. */
  326. atomic_clear_mask(0x80000000, sw_ptr);
  327. atomic_inc(sw_ptr);
  328. }
  329. /*
  330. * Make get_sync_clock return 0 again.
  331. * Needs to be called from a context disabled for preemption.
  332. */
  333. static void enable_sync_clock(void)
  334. {
  335. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  336. atomic_set_mask(0x80000000, sw_ptr);
  337. }
  338. /*
  339. * Function to check if the clock is in sync.
  340. */
  341. static inline int check_sync_clock(void)
  342. {
  343. atomic_t *sw_ptr;
  344. int rc;
  345. sw_ptr = &get_cpu_var(clock_sync_word);
  346. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  347. put_cpu_var(clock_sync_word);
  348. return rc;
  349. }
  350. /* Single threaded workqueue used for etr and stp sync events */
  351. static struct workqueue_struct *time_sync_wq;
  352. static void __init time_init_wq(void)
  353. {
  354. if (time_sync_wq)
  355. return;
  356. time_sync_wq = create_singlethread_workqueue("timesync");
  357. }
  358. /*
  359. * External Time Reference (ETR) code.
  360. */
  361. static int etr_port0_online;
  362. static int etr_port1_online;
  363. static int etr_steai_available;
  364. static int __init early_parse_etr(char *p)
  365. {
  366. if (strncmp(p, "off", 3) == 0)
  367. etr_port0_online = etr_port1_online = 0;
  368. else if (strncmp(p, "port0", 5) == 0)
  369. etr_port0_online = 1;
  370. else if (strncmp(p, "port1", 5) == 0)
  371. etr_port1_online = 1;
  372. else if (strncmp(p, "on", 2) == 0)
  373. etr_port0_online = etr_port1_online = 1;
  374. return 0;
  375. }
  376. early_param("etr", early_parse_etr);
  377. enum etr_event {
  378. ETR_EVENT_PORT0_CHANGE,
  379. ETR_EVENT_PORT1_CHANGE,
  380. ETR_EVENT_PORT_ALERT,
  381. ETR_EVENT_SYNC_CHECK,
  382. ETR_EVENT_SWITCH_LOCAL,
  383. ETR_EVENT_UPDATE,
  384. };
  385. /*
  386. * Valid bit combinations of the eacr register are (x = don't care):
  387. * e0 e1 dp p0 p1 ea es sl
  388. * 0 0 x 0 0 0 0 0 initial, disabled state
  389. * 0 0 x 0 1 1 0 0 port 1 online
  390. * 0 0 x 1 0 1 0 0 port 0 online
  391. * 0 0 x 1 1 1 0 0 both ports online
  392. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  393. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  394. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  395. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  396. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  397. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  398. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  399. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  400. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  401. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  402. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  403. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  404. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  405. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  406. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  407. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  408. */
  409. static struct etr_eacr etr_eacr;
  410. static u64 etr_tolec; /* time of last eacr update */
  411. static struct etr_aib etr_port0;
  412. static int etr_port0_uptodate;
  413. static struct etr_aib etr_port1;
  414. static int etr_port1_uptodate;
  415. static unsigned long etr_events;
  416. static struct timer_list etr_timer;
  417. static void etr_timeout(unsigned long dummy);
  418. static void etr_work_fn(struct work_struct *work);
  419. static DEFINE_MUTEX(etr_work_mutex);
  420. static DECLARE_WORK(etr_work, etr_work_fn);
  421. /*
  422. * Reset ETR attachment.
  423. */
  424. static void etr_reset(void)
  425. {
  426. etr_eacr = (struct etr_eacr) {
  427. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  428. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  429. .es = 0, .sl = 0 };
  430. if (etr_setr(&etr_eacr) == 0) {
  431. etr_tolec = get_tod_clock();
  432. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  433. if (etr_port0_online && etr_port1_online)
  434. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  435. } else if (etr_port0_online || etr_port1_online) {
  436. pr_warning("The real or virtual hardware system does "
  437. "not provide an ETR interface\n");
  438. etr_port0_online = etr_port1_online = 0;
  439. }
  440. }
  441. static int __init etr_init(void)
  442. {
  443. struct etr_aib aib;
  444. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  445. return 0;
  446. time_init_wq();
  447. /* Check if this machine has the steai instruction. */
  448. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  449. etr_steai_available = 1;
  450. setup_timer(&etr_timer, etr_timeout, 0UL);
  451. if (etr_port0_online) {
  452. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  453. queue_work(time_sync_wq, &etr_work);
  454. }
  455. if (etr_port1_online) {
  456. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  457. queue_work(time_sync_wq, &etr_work);
  458. }
  459. return 0;
  460. }
  461. arch_initcall(etr_init);
  462. /*
  463. * Two sorts of ETR machine checks. The architecture reads:
  464. * "When a machine-check niterruption occurs and if a switch-to-local or
  465. * ETR-sync-check interrupt request is pending but disabled, this pending
  466. * disabled interruption request is indicated and is cleared".
  467. * Which means that we can get etr_switch_to_local events from the machine
  468. * check handler although the interruption condition is disabled. Lovely..
  469. */
  470. /*
  471. * Switch to local machine check. This is called when the last usable
  472. * ETR port goes inactive. After switch to local the clock is not in sync.
  473. */
  474. void etr_switch_to_local(void)
  475. {
  476. if (!etr_eacr.sl)
  477. return;
  478. disable_sync_clock(NULL);
  479. if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) {
  480. etr_eacr.es = etr_eacr.sl = 0;
  481. etr_setr(&etr_eacr);
  482. queue_work(time_sync_wq, &etr_work);
  483. }
  484. }
  485. /*
  486. * ETR sync check machine check. This is called when the ETR OTE and the
  487. * local clock OTE are farther apart than the ETR sync check tolerance.
  488. * After a ETR sync check the clock is not in sync. The machine check
  489. * is broadcasted to all cpus at the same time.
  490. */
  491. void etr_sync_check(void)
  492. {
  493. if (!etr_eacr.es)
  494. return;
  495. disable_sync_clock(NULL);
  496. if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) {
  497. etr_eacr.es = 0;
  498. etr_setr(&etr_eacr);
  499. queue_work(time_sync_wq, &etr_work);
  500. }
  501. }
  502. /*
  503. * ETR timing alert. There are two causes:
  504. * 1) port state change, check the usability of the port
  505. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  506. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  507. * or ETR-data word 4 (edf4) has changed.
  508. */
  509. static void etr_timing_alert(struct etr_irq_parm *intparm)
  510. {
  511. if (intparm->pc0)
  512. /* ETR port 0 state change. */
  513. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  514. if (intparm->pc1)
  515. /* ETR port 1 state change. */
  516. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  517. if (intparm->eai)
  518. /*
  519. * ETR port alert on either port 0, 1 or both.
  520. * Both ports are not up-to-date now.
  521. */
  522. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  523. queue_work(time_sync_wq, &etr_work);
  524. }
  525. static void etr_timeout(unsigned long dummy)
  526. {
  527. set_bit(ETR_EVENT_UPDATE, &etr_events);
  528. queue_work(time_sync_wq, &etr_work);
  529. }
  530. /*
  531. * Check if the etr mode is pss.
  532. */
  533. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  534. {
  535. return eacr.es && !eacr.sl;
  536. }
  537. /*
  538. * Check if the etr mode is etr.
  539. */
  540. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  541. {
  542. return eacr.es && eacr.sl;
  543. }
  544. /*
  545. * Check if the port can be used for TOD synchronization.
  546. * For PPS mode the port has to receive OTEs. For ETR mode
  547. * the port has to receive OTEs, the ETR stepping bit has to
  548. * be zero and the validity bits for data frame 1, 2, and 3
  549. * have to be 1.
  550. */
  551. static int etr_port_valid(struct etr_aib *aib, int port)
  552. {
  553. unsigned int psc;
  554. /* Check that this port is receiving OTEs. */
  555. if (aib->tsp == 0)
  556. return 0;
  557. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  558. if (psc == etr_lpsc_pps_mode)
  559. return 1;
  560. if (psc == etr_lpsc_operational_step)
  561. return !aib->esw.y && aib->slsw.v1 &&
  562. aib->slsw.v2 && aib->slsw.v3;
  563. return 0;
  564. }
  565. /*
  566. * Check if two ports are on the same network.
  567. */
  568. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  569. {
  570. // FIXME: any other fields we have to compare?
  571. return aib1->edf1.net_id == aib2->edf1.net_id;
  572. }
  573. /*
  574. * Wrapper for etr_stei that converts physical port states
  575. * to logical port states to be consistent with the output
  576. * of stetr (see etr_psc vs. etr_lpsc).
  577. */
  578. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  579. {
  580. BUG_ON(etr_steai(aib, func) != 0);
  581. /* Convert port state to logical port state. */
  582. if (aib->esw.psc0 == 1)
  583. aib->esw.psc0 = 2;
  584. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  585. aib->esw.psc0 = 1;
  586. if (aib->esw.psc1 == 1)
  587. aib->esw.psc1 = 2;
  588. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  589. aib->esw.psc1 = 1;
  590. }
  591. /*
  592. * Check if the aib a2 is still connected to the same attachment as
  593. * aib a1, the etv values differ by one and a2 is valid.
  594. */
  595. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  596. {
  597. int state_a1, state_a2;
  598. /* Paranoia check: e0/e1 should better be the same. */
  599. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  600. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  601. return 0;
  602. /* Still connected to the same etr ? */
  603. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  604. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  605. if (state_a1 == etr_lpsc_operational_step) {
  606. if (state_a2 != etr_lpsc_operational_step ||
  607. a1->edf1.net_id != a2->edf1.net_id ||
  608. a1->edf1.etr_id != a2->edf1.etr_id ||
  609. a1->edf1.etr_pn != a2->edf1.etr_pn)
  610. return 0;
  611. } else if (state_a2 != etr_lpsc_pps_mode)
  612. return 0;
  613. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  614. if (a1->edf2.etv + 1 != a2->edf2.etv)
  615. return 0;
  616. if (!etr_port_valid(a2, p))
  617. return 0;
  618. return 1;
  619. }
  620. struct clock_sync_data {
  621. atomic_t cpus;
  622. int in_sync;
  623. unsigned long long fixup_cc;
  624. int etr_port;
  625. struct etr_aib *etr_aib;
  626. };
  627. static void clock_sync_cpu(struct clock_sync_data *sync)
  628. {
  629. atomic_dec(&sync->cpus);
  630. enable_sync_clock();
  631. /*
  632. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  633. * is called on all other cpus while the TOD clocks is stopped.
  634. * __udelay will stop the cpu on an enabled wait psw until the
  635. * TOD is running again.
  636. */
  637. while (sync->in_sync == 0) {
  638. __udelay(1);
  639. /*
  640. * A different cpu changes *in_sync. Therefore use
  641. * barrier() to force memory access.
  642. */
  643. barrier();
  644. }
  645. if (sync->in_sync != 1)
  646. /* Didn't work. Clear per-cpu in sync bit again. */
  647. disable_sync_clock(NULL);
  648. /*
  649. * This round of TOD syncing is done. Set the clock comparator
  650. * to the next tick and let the processor continue.
  651. */
  652. fixup_clock_comparator(sync->fixup_cc);
  653. }
  654. /*
  655. * Sync the TOD clock using the port referred to by aibp. This port
  656. * has to be enabled and the other port has to be disabled. The
  657. * last eacr update has to be more than 1.6 seconds in the past.
  658. */
  659. static int etr_sync_clock(void *data)
  660. {
  661. static int first;
  662. unsigned long long clock, old_clock, delay, delta;
  663. struct clock_sync_data *etr_sync;
  664. struct etr_aib *sync_port, *aib;
  665. int port;
  666. int rc;
  667. etr_sync = data;
  668. if (xchg(&first, 1) == 1) {
  669. /* Slave */
  670. clock_sync_cpu(etr_sync);
  671. return 0;
  672. }
  673. /* Wait until all other cpus entered the sync function. */
  674. while (atomic_read(&etr_sync->cpus) != 0)
  675. cpu_relax();
  676. port = etr_sync->etr_port;
  677. aib = etr_sync->etr_aib;
  678. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  679. enable_sync_clock();
  680. /* Set clock to next OTE. */
  681. __ctl_set_bit(14, 21);
  682. __ctl_set_bit(0, 29);
  683. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  684. old_clock = get_tod_clock();
  685. if (set_tod_clock(clock) == 0) {
  686. __udelay(1); /* Wait for the clock to start. */
  687. __ctl_clear_bit(0, 29);
  688. __ctl_clear_bit(14, 21);
  689. etr_stetr(aib);
  690. /* Adjust Linux timing variables. */
  691. delay = (unsigned long long)
  692. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  693. delta = adjust_time(old_clock, clock, delay);
  694. etr_sync->fixup_cc = delta;
  695. fixup_clock_comparator(delta);
  696. /* Verify that the clock is properly set. */
  697. if (!etr_aib_follows(sync_port, aib, port)) {
  698. /* Didn't work. */
  699. disable_sync_clock(NULL);
  700. etr_sync->in_sync = -EAGAIN;
  701. rc = -EAGAIN;
  702. } else {
  703. etr_sync->in_sync = 1;
  704. rc = 0;
  705. }
  706. } else {
  707. /* Could not set the clock ?!? */
  708. __ctl_clear_bit(0, 29);
  709. __ctl_clear_bit(14, 21);
  710. disable_sync_clock(NULL);
  711. etr_sync->in_sync = -EAGAIN;
  712. rc = -EAGAIN;
  713. }
  714. xchg(&first, 0);
  715. return rc;
  716. }
  717. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  718. {
  719. struct clock_sync_data etr_sync;
  720. struct etr_aib *sync_port;
  721. int follows;
  722. int rc;
  723. /* Check if the current aib is adjacent to the sync port aib. */
  724. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  725. follows = etr_aib_follows(sync_port, aib, port);
  726. memcpy(sync_port, aib, sizeof(*aib));
  727. if (!follows)
  728. return -EAGAIN;
  729. memset(&etr_sync, 0, sizeof(etr_sync));
  730. etr_sync.etr_aib = aib;
  731. etr_sync.etr_port = port;
  732. get_online_cpus();
  733. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  734. rc = stop_machine(etr_sync_clock, &etr_sync, cpu_online_mask);
  735. put_online_cpus();
  736. return rc;
  737. }
  738. /*
  739. * Handle the immediate effects of the different events.
  740. * The port change event is used for online/offline changes.
  741. */
  742. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  743. {
  744. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  745. eacr.es = 0;
  746. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  747. eacr.es = eacr.sl = 0;
  748. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  749. etr_port0_uptodate = etr_port1_uptodate = 0;
  750. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  751. if (eacr.e0)
  752. /*
  753. * Port change of an enabled port. We have to
  754. * assume that this can have caused an stepping
  755. * port switch.
  756. */
  757. etr_tolec = get_tod_clock();
  758. eacr.p0 = etr_port0_online;
  759. if (!eacr.p0)
  760. eacr.e0 = 0;
  761. etr_port0_uptodate = 0;
  762. }
  763. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  764. if (eacr.e1)
  765. /*
  766. * Port change of an enabled port. We have to
  767. * assume that this can have caused an stepping
  768. * port switch.
  769. */
  770. etr_tolec = get_tod_clock();
  771. eacr.p1 = etr_port1_online;
  772. if (!eacr.p1)
  773. eacr.e1 = 0;
  774. etr_port1_uptodate = 0;
  775. }
  776. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  777. return eacr;
  778. }
  779. /*
  780. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  781. * one of the ports needs an update.
  782. */
  783. static void etr_set_tolec_timeout(unsigned long long now)
  784. {
  785. unsigned long micros;
  786. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  787. (!etr_eacr.p1 || etr_port1_uptodate))
  788. return;
  789. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  790. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  791. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  792. }
  793. /*
  794. * Set up a time that expires after 1/2 second.
  795. */
  796. static void etr_set_sync_timeout(void)
  797. {
  798. mod_timer(&etr_timer, jiffies + HZ/2);
  799. }
  800. /*
  801. * Update the aib information for one or both ports.
  802. */
  803. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  804. struct etr_eacr eacr)
  805. {
  806. /* With both ports disabled the aib information is useless. */
  807. if (!eacr.e0 && !eacr.e1)
  808. return eacr;
  809. /* Update port0 or port1 with aib stored in etr_work_fn. */
  810. if (aib->esw.q == 0) {
  811. /* Information for port 0 stored. */
  812. if (eacr.p0 && !etr_port0_uptodate) {
  813. etr_port0 = *aib;
  814. if (etr_port0_online)
  815. etr_port0_uptodate = 1;
  816. }
  817. } else {
  818. /* Information for port 1 stored. */
  819. if (eacr.p1 && !etr_port1_uptodate) {
  820. etr_port1 = *aib;
  821. if (etr_port0_online)
  822. etr_port1_uptodate = 1;
  823. }
  824. }
  825. /*
  826. * Do not try to get the alternate port aib if the clock
  827. * is not in sync yet.
  828. */
  829. if (!eacr.es || !check_sync_clock())
  830. return eacr;
  831. /*
  832. * If steai is available we can get the information about
  833. * the other port immediately. If only stetr is available the
  834. * data-port bit toggle has to be used.
  835. */
  836. if (etr_steai_available) {
  837. if (eacr.p0 && !etr_port0_uptodate) {
  838. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  839. etr_port0_uptodate = 1;
  840. }
  841. if (eacr.p1 && !etr_port1_uptodate) {
  842. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  843. etr_port1_uptodate = 1;
  844. }
  845. } else {
  846. /*
  847. * One port was updated above, if the other
  848. * port is not uptodate toggle dp bit.
  849. */
  850. if ((eacr.p0 && !etr_port0_uptodate) ||
  851. (eacr.p1 && !etr_port1_uptodate))
  852. eacr.dp ^= 1;
  853. else
  854. eacr.dp = 0;
  855. }
  856. return eacr;
  857. }
  858. /*
  859. * Write new etr control register if it differs from the current one.
  860. * Return 1 if etr_tolec has been updated as well.
  861. */
  862. static void etr_update_eacr(struct etr_eacr eacr)
  863. {
  864. int dp_changed;
  865. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  866. /* No change, return. */
  867. return;
  868. /*
  869. * The disable of an active port of the change of the data port
  870. * bit can/will cause a change in the data port.
  871. */
  872. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  873. (etr_eacr.dp ^ eacr.dp) != 0;
  874. etr_eacr = eacr;
  875. etr_setr(&etr_eacr);
  876. if (dp_changed)
  877. etr_tolec = get_tod_clock();
  878. }
  879. /*
  880. * ETR work. In this function you'll find the main logic. In
  881. * particular this is the only function that calls etr_update_eacr(),
  882. * it "controls" the etr control register.
  883. */
  884. static void etr_work_fn(struct work_struct *work)
  885. {
  886. unsigned long long now;
  887. struct etr_eacr eacr;
  888. struct etr_aib aib;
  889. int sync_port;
  890. /* prevent multiple execution. */
  891. mutex_lock(&etr_work_mutex);
  892. /* Create working copy of etr_eacr. */
  893. eacr = etr_eacr;
  894. /* Check for the different events and their immediate effects. */
  895. eacr = etr_handle_events(eacr);
  896. /* Check if ETR is supposed to be active. */
  897. eacr.ea = eacr.p0 || eacr.p1;
  898. if (!eacr.ea) {
  899. /* Both ports offline. Reset everything. */
  900. eacr.dp = eacr.es = eacr.sl = 0;
  901. on_each_cpu(disable_sync_clock, NULL, 1);
  902. del_timer_sync(&etr_timer);
  903. etr_update_eacr(eacr);
  904. goto out_unlock;
  905. }
  906. /* Store aib to get the current ETR status word. */
  907. BUG_ON(etr_stetr(&aib) != 0);
  908. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  909. now = get_tod_clock();
  910. /*
  911. * Update the port information if the last stepping port change
  912. * or data port change is older than 1.6 seconds.
  913. */
  914. if (now >= etr_tolec + (1600000 << 12))
  915. eacr = etr_handle_update(&aib, eacr);
  916. /*
  917. * Select ports to enable. The preferred synchronization mode is PPS.
  918. * If a port can be enabled depends on a number of things:
  919. * 1) The port needs to be online and uptodate. A port is not
  920. * disabled just because it is not uptodate, but it is only
  921. * enabled if it is uptodate.
  922. * 2) The port needs to have the same mode (pps / etr).
  923. * 3) The port needs to be usable -> etr_port_valid() == 1
  924. * 4) To enable the second port the clock needs to be in sync.
  925. * 5) If both ports are useable and are ETR ports, the network id
  926. * has to be the same.
  927. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  928. */
  929. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  930. eacr.sl = 0;
  931. eacr.e0 = 1;
  932. if (!etr_mode_is_pps(etr_eacr))
  933. eacr.es = 0;
  934. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  935. eacr.e1 = 0;
  936. // FIXME: uptodate checks ?
  937. else if (etr_port0_uptodate && etr_port1_uptodate)
  938. eacr.e1 = 1;
  939. sync_port = (etr_port0_uptodate &&
  940. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  941. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  942. eacr.sl = 0;
  943. eacr.e0 = 0;
  944. eacr.e1 = 1;
  945. if (!etr_mode_is_pps(etr_eacr))
  946. eacr.es = 0;
  947. sync_port = (etr_port1_uptodate &&
  948. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  949. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  950. eacr.sl = 1;
  951. eacr.e0 = 1;
  952. if (!etr_mode_is_etr(etr_eacr))
  953. eacr.es = 0;
  954. if (!eacr.es || !eacr.p1 ||
  955. aib.esw.psc1 != etr_lpsc_operational_alt)
  956. eacr.e1 = 0;
  957. else if (etr_port0_uptodate && etr_port1_uptodate &&
  958. etr_compare_network(&etr_port0, &etr_port1))
  959. eacr.e1 = 1;
  960. sync_port = (etr_port0_uptodate &&
  961. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  962. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  963. eacr.sl = 1;
  964. eacr.e0 = 0;
  965. eacr.e1 = 1;
  966. if (!etr_mode_is_etr(etr_eacr))
  967. eacr.es = 0;
  968. sync_port = (etr_port1_uptodate &&
  969. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  970. } else {
  971. /* Both ports not usable. */
  972. eacr.es = eacr.sl = 0;
  973. sync_port = -1;
  974. }
  975. /*
  976. * If the clock is in sync just update the eacr and return.
  977. * If there is no valid sync port wait for a port update.
  978. */
  979. if ((eacr.es && check_sync_clock()) || sync_port < 0) {
  980. etr_update_eacr(eacr);
  981. etr_set_tolec_timeout(now);
  982. goto out_unlock;
  983. }
  984. /*
  985. * Prepare control register for clock syncing
  986. * (reset data port bit, set sync check control.
  987. */
  988. eacr.dp = 0;
  989. eacr.es = 1;
  990. /*
  991. * Update eacr and try to synchronize the clock. If the update
  992. * of eacr caused a stepping port switch (or if we have to
  993. * assume that a stepping port switch has occurred) or the
  994. * clock syncing failed, reset the sync check control bit
  995. * and set up a timer to try again after 0.5 seconds
  996. */
  997. etr_update_eacr(eacr);
  998. if (now < etr_tolec + (1600000 << 12) ||
  999. etr_sync_clock_stop(&aib, sync_port) != 0) {
  1000. /* Sync failed. Try again in 1/2 second. */
  1001. eacr.es = 0;
  1002. etr_update_eacr(eacr);
  1003. etr_set_sync_timeout();
  1004. } else
  1005. etr_set_tolec_timeout(now);
  1006. out_unlock:
  1007. mutex_unlock(&etr_work_mutex);
  1008. }
  1009. /*
  1010. * Sysfs interface functions
  1011. */
  1012. static struct bus_type etr_subsys = {
  1013. .name = "etr",
  1014. .dev_name = "etr",
  1015. };
  1016. static struct device etr_port0_dev = {
  1017. .id = 0,
  1018. .bus = &etr_subsys,
  1019. };
  1020. static struct device etr_port1_dev = {
  1021. .id = 1,
  1022. .bus = &etr_subsys,
  1023. };
  1024. /*
  1025. * ETR subsys attributes
  1026. */
  1027. static ssize_t etr_stepping_port_show(struct device *dev,
  1028. struct device_attribute *attr,
  1029. char *buf)
  1030. {
  1031. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1032. }
  1033. static DEVICE_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1034. static ssize_t etr_stepping_mode_show(struct device *dev,
  1035. struct device_attribute *attr,
  1036. char *buf)
  1037. {
  1038. char *mode_str;
  1039. if (etr_mode_is_pps(etr_eacr))
  1040. mode_str = "pps";
  1041. else if (etr_mode_is_etr(etr_eacr))
  1042. mode_str = "etr";
  1043. else
  1044. mode_str = "local";
  1045. return sprintf(buf, "%s\n", mode_str);
  1046. }
  1047. static DEVICE_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1048. /*
  1049. * ETR port attributes
  1050. */
  1051. static inline struct etr_aib *etr_aib_from_dev(struct device *dev)
  1052. {
  1053. if (dev == &etr_port0_dev)
  1054. return etr_port0_online ? &etr_port0 : NULL;
  1055. else
  1056. return etr_port1_online ? &etr_port1 : NULL;
  1057. }
  1058. static ssize_t etr_online_show(struct device *dev,
  1059. struct device_attribute *attr,
  1060. char *buf)
  1061. {
  1062. unsigned int online;
  1063. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1064. return sprintf(buf, "%i\n", online);
  1065. }
  1066. static ssize_t etr_online_store(struct device *dev,
  1067. struct device_attribute *attr,
  1068. const char *buf, size_t count)
  1069. {
  1070. unsigned int value;
  1071. value = simple_strtoul(buf, NULL, 0);
  1072. if (value != 0 && value != 1)
  1073. return -EINVAL;
  1074. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1075. return -EOPNOTSUPP;
  1076. mutex_lock(&clock_sync_mutex);
  1077. if (dev == &etr_port0_dev) {
  1078. if (etr_port0_online == value)
  1079. goto out; /* Nothing to do. */
  1080. etr_port0_online = value;
  1081. if (etr_port0_online && etr_port1_online)
  1082. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1083. else
  1084. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1085. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1086. queue_work(time_sync_wq, &etr_work);
  1087. } else {
  1088. if (etr_port1_online == value)
  1089. goto out; /* Nothing to do. */
  1090. etr_port1_online = value;
  1091. if (etr_port0_online && etr_port1_online)
  1092. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1093. else
  1094. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1095. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1096. queue_work(time_sync_wq, &etr_work);
  1097. }
  1098. out:
  1099. mutex_unlock(&clock_sync_mutex);
  1100. return count;
  1101. }
  1102. static DEVICE_ATTR(online, 0600, etr_online_show, etr_online_store);
  1103. static ssize_t etr_stepping_control_show(struct device *dev,
  1104. struct device_attribute *attr,
  1105. char *buf)
  1106. {
  1107. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1108. etr_eacr.e0 : etr_eacr.e1);
  1109. }
  1110. static DEVICE_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1111. static ssize_t etr_mode_code_show(struct device *dev,
  1112. struct device_attribute *attr, char *buf)
  1113. {
  1114. if (!etr_port0_online && !etr_port1_online)
  1115. /* Status word is not uptodate if both ports are offline. */
  1116. return -ENODATA;
  1117. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1118. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1119. }
  1120. static DEVICE_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1121. static ssize_t etr_untuned_show(struct device *dev,
  1122. struct device_attribute *attr, char *buf)
  1123. {
  1124. struct etr_aib *aib = etr_aib_from_dev(dev);
  1125. if (!aib || !aib->slsw.v1)
  1126. return -ENODATA;
  1127. return sprintf(buf, "%i\n", aib->edf1.u);
  1128. }
  1129. static DEVICE_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1130. static ssize_t etr_network_id_show(struct device *dev,
  1131. struct device_attribute *attr, char *buf)
  1132. {
  1133. struct etr_aib *aib = etr_aib_from_dev(dev);
  1134. if (!aib || !aib->slsw.v1)
  1135. return -ENODATA;
  1136. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1137. }
  1138. static DEVICE_ATTR(network, 0400, etr_network_id_show, NULL);
  1139. static ssize_t etr_id_show(struct device *dev,
  1140. struct device_attribute *attr, char *buf)
  1141. {
  1142. struct etr_aib *aib = etr_aib_from_dev(dev);
  1143. if (!aib || !aib->slsw.v1)
  1144. return -ENODATA;
  1145. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1146. }
  1147. static DEVICE_ATTR(id, 0400, etr_id_show, NULL);
  1148. static ssize_t etr_port_number_show(struct device *dev,
  1149. struct device_attribute *attr, char *buf)
  1150. {
  1151. struct etr_aib *aib = etr_aib_from_dev(dev);
  1152. if (!aib || !aib->slsw.v1)
  1153. return -ENODATA;
  1154. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1155. }
  1156. static DEVICE_ATTR(port, 0400, etr_port_number_show, NULL);
  1157. static ssize_t etr_coupled_show(struct device *dev,
  1158. struct device_attribute *attr, char *buf)
  1159. {
  1160. struct etr_aib *aib = etr_aib_from_dev(dev);
  1161. if (!aib || !aib->slsw.v3)
  1162. return -ENODATA;
  1163. return sprintf(buf, "%i\n", aib->edf3.c);
  1164. }
  1165. static DEVICE_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1166. static ssize_t etr_local_time_show(struct device *dev,
  1167. struct device_attribute *attr, char *buf)
  1168. {
  1169. struct etr_aib *aib = etr_aib_from_dev(dev);
  1170. if (!aib || !aib->slsw.v3)
  1171. return -ENODATA;
  1172. return sprintf(buf, "%i\n", aib->edf3.blto);
  1173. }
  1174. static DEVICE_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1175. static ssize_t etr_utc_offset_show(struct device *dev,
  1176. struct device_attribute *attr, char *buf)
  1177. {
  1178. struct etr_aib *aib = etr_aib_from_dev(dev);
  1179. if (!aib || !aib->slsw.v3)
  1180. return -ENODATA;
  1181. return sprintf(buf, "%i\n", aib->edf3.buo);
  1182. }
  1183. static DEVICE_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1184. static struct device_attribute *etr_port_attributes[] = {
  1185. &dev_attr_online,
  1186. &dev_attr_stepping_control,
  1187. &dev_attr_state_code,
  1188. &dev_attr_untuned,
  1189. &dev_attr_network,
  1190. &dev_attr_id,
  1191. &dev_attr_port,
  1192. &dev_attr_coupled,
  1193. &dev_attr_local_time,
  1194. &dev_attr_utc_offset,
  1195. NULL
  1196. };
  1197. static int __init etr_register_port(struct device *dev)
  1198. {
  1199. struct device_attribute **attr;
  1200. int rc;
  1201. rc = device_register(dev);
  1202. if (rc)
  1203. goto out;
  1204. for (attr = etr_port_attributes; *attr; attr++) {
  1205. rc = device_create_file(dev, *attr);
  1206. if (rc)
  1207. goto out_unreg;
  1208. }
  1209. return 0;
  1210. out_unreg:
  1211. for (; attr >= etr_port_attributes; attr--)
  1212. device_remove_file(dev, *attr);
  1213. device_unregister(dev);
  1214. out:
  1215. return rc;
  1216. }
  1217. static void __init etr_unregister_port(struct device *dev)
  1218. {
  1219. struct device_attribute **attr;
  1220. for (attr = etr_port_attributes; *attr; attr++)
  1221. device_remove_file(dev, *attr);
  1222. device_unregister(dev);
  1223. }
  1224. static int __init etr_init_sysfs(void)
  1225. {
  1226. int rc;
  1227. rc = subsys_system_register(&etr_subsys, NULL);
  1228. if (rc)
  1229. goto out;
  1230. rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_port);
  1231. if (rc)
  1232. goto out_unreg_subsys;
  1233. rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
  1234. if (rc)
  1235. goto out_remove_stepping_port;
  1236. rc = etr_register_port(&etr_port0_dev);
  1237. if (rc)
  1238. goto out_remove_stepping_mode;
  1239. rc = etr_register_port(&etr_port1_dev);
  1240. if (rc)
  1241. goto out_remove_port0;
  1242. return 0;
  1243. out_remove_port0:
  1244. etr_unregister_port(&etr_port0_dev);
  1245. out_remove_stepping_mode:
  1246. device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
  1247. out_remove_stepping_port:
  1248. device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_port);
  1249. out_unreg_subsys:
  1250. bus_unregister(&etr_subsys);
  1251. out:
  1252. return rc;
  1253. }
  1254. device_initcall(etr_init_sysfs);
  1255. /*
  1256. * Server Time Protocol (STP) code.
  1257. */
  1258. static int stp_online;
  1259. static struct stp_sstpi stp_info;
  1260. static void *stp_page;
  1261. static void stp_work_fn(struct work_struct *work);
  1262. static DEFINE_MUTEX(stp_work_mutex);
  1263. static DECLARE_WORK(stp_work, stp_work_fn);
  1264. static struct timer_list stp_timer;
  1265. static int __init early_parse_stp(char *p)
  1266. {
  1267. if (strncmp(p, "off", 3) == 0)
  1268. stp_online = 0;
  1269. else if (strncmp(p, "on", 2) == 0)
  1270. stp_online = 1;
  1271. return 0;
  1272. }
  1273. early_param("stp", early_parse_stp);
  1274. /*
  1275. * Reset STP attachment.
  1276. */
  1277. static void __init stp_reset(void)
  1278. {
  1279. int rc;
  1280. stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
  1281. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1282. if (rc == 0)
  1283. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1284. else if (stp_online) {
  1285. pr_warning("The real or virtual hardware system does "
  1286. "not provide an STP interface\n");
  1287. free_page((unsigned long) stp_page);
  1288. stp_page = NULL;
  1289. stp_online = 0;
  1290. }
  1291. }
  1292. static void stp_timeout(unsigned long dummy)
  1293. {
  1294. queue_work(time_sync_wq, &stp_work);
  1295. }
  1296. static int __init stp_init(void)
  1297. {
  1298. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1299. return 0;
  1300. setup_timer(&stp_timer, stp_timeout, 0UL);
  1301. time_init_wq();
  1302. if (!stp_online)
  1303. return 0;
  1304. queue_work(time_sync_wq, &stp_work);
  1305. return 0;
  1306. }
  1307. arch_initcall(stp_init);
  1308. /*
  1309. * STP timing alert. There are three causes:
  1310. * 1) timing status change
  1311. * 2) link availability change
  1312. * 3) time control parameter change
  1313. * In all three cases we are only interested in the clock source state.
  1314. * If a STP clock source is now available use it.
  1315. */
  1316. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1317. {
  1318. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1319. queue_work(time_sync_wq, &stp_work);
  1320. }
  1321. /*
  1322. * STP sync check machine check. This is called when the timing state
  1323. * changes from the synchronized state to the unsynchronized state.
  1324. * After a STP sync check the clock is not in sync. The machine check
  1325. * is broadcasted to all cpus at the same time.
  1326. */
  1327. void stp_sync_check(void)
  1328. {
  1329. disable_sync_clock(NULL);
  1330. queue_work(time_sync_wq, &stp_work);
  1331. }
  1332. /*
  1333. * STP island condition machine check. This is called when an attached
  1334. * server attempts to communicate over an STP link and the servers
  1335. * have matching CTN ids and have a valid stratum-1 configuration
  1336. * but the configurations do not match.
  1337. */
  1338. void stp_island_check(void)
  1339. {
  1340. disable_sync_clock(NULL);
  1341. queue_work(time_sync_wq, &stp_work);
  1342. }
  1343. static int stp_sync_clock(void *data)
  1344. {
  1345. static int first;
  1346. unsigned long long old_clock, delta;
  1347. struct clock_sync_data *stp_sync;
  1348. int rc;
  1349. stp_sync = data;
  1350. if (xchg(&first, 1) == 1) {
  1351. /* Slave */
  1352. clock_sync_cpu(stp_sync);
  1353. return 0;
  1354. }
  1355. /* Wait until all other cpus entered the sync function. */
  1356. while (atomic_read(&stp_sync->cpus) != 0)
  1357. cpu_relax();
  1358. enable_sync_clock();
  1359. rc = 0;
  1360. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1361. stp_info.todoff[2] || stp_info.todoff[3] ||
  1362. stp_info.tmd != 2) {
  1363. old_clock = get_tod_clock();
  1364. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1365. if (rc == 0) {
  1366. delta = adjust_time(old_clock, get_tod_clock(), 0);
  1367. fixup_clock_comparator(delta);
  1368. rc = chsc_sstpi(stp_page, &stp_info,
  1369. sizeof(struct stp_sstpi));
  1370. if (rc == 0 && stp_info.tmd != 2)
  1371. rc = -EAGAIN;
  1372. }
  1373. }
  1374. if (rc) {
  1375. disable_sync_clock(NULL);
  1376. stp_sync->in_sync = -EAGAIN;
  1377. } else
  1378. stp_sync->in_sync = 1;
  1379. xchg(&first, 0);
  1380. return 0;
  1381. }
  1382. /*
  1383. * STP work. Check for the STP state and take over the clock
  1384. * synchronization if the STP clock source is usable.
  1385. */
  1386. static void stp_work_fn(struct work_struct *work)
  1387. {
  1388. struct clock_sync_data stp_sync;
  1389. int rc;
  1390. /* prevent multiple execution. */
  1391. mutex_lock(&stp_work_mutex);
  1392. if (!stp_online) {
  1393. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1394. del_timer_sync(&stp_timer);
  1395. goto out_unlock;
  1396. }
  1397. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1398. if (rc)
  1399. goto out_unlock;
  1400. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1401. if (rc || stp_info.c == 0)
  1402. goto out_unlock;
  1403. /* Skip synchronization if the clock is already in sync. */
  1404. if (check_sync_clock())
  1405. goto out_unlock;
  1406. memset(&stp_sync, 0, sizeof(stp_sync));
  1407. get_online_cpus();
  1408. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1409. stop_machine(stp_sync_clock, &stp_sync, cpu_online_mask);
  1410. put_online_cpus();
  1411. if (!check_sync_clock())
  1412. /*
  1413. * There is a usable clock but the synchonization failed.
  1414. * Retry after a second.
  1415. */
  1416. mod_timer(&stp_timer, jiffies + HZ);
  1417. out_unlock:
  1418. mutex_unlock(&stp_work_mutex);
  1419. }
  1420. /*
  1421. * STP subsys sysfs interface functions
  1422. */
  1423. static struct bus_type stp_subsys = {
  1424. .name = "stp",
  1425. .dev_name = "stp",
  1426. };
  1427. static ssize_t stp_ctn_id_show(struct device *dev,
  1428. struct device_attribute *attr,
  1429. char *buf)
  1430. {
  1431. if (!stp_online)
  1432. return -ENODATA;
  1433. return sprintf(buf, "%016llx\n",
  1434. *(unsigned long long *) stp_info.ctnid);
  1435. }
  1436. static DEVICE_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1437. static ssize_t stp_ctn_type_show(struct device *dev,
  1438. struct device_attribute *attr,
  1439. char *buf)
  1440. {
  1441. if (!stp_online)
  1442. return -ENODATA;
  1443. return sprintf(buf, "%i\n", stp_info.ctn);
  1444. }
  1445. static DEVICE_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1446. static ssize_t stp_dst_offset_show(struct device *dev,
  1447. struct device_attribute *attr,
  1448. char *buf)
  1449. {
  1450. if (!stp_online || !(stp_info.vbits & 0x2000))
  1451. return -ENODATA;
  1452. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1453. }
  1454. static DEVICE_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1455. static ssize_t stp_leap_seconds_show(struct device *dev,
  1456. struct device_attribute *attr,
  1457. char *buf)
  1458. {
  1459. if (!stp_online || !(stp_info.vbits & 0x8000))
  1460. return -ENODATA;
  1461. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1462. }
  1463. static DEVICE_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1464. static ssize_t stp_stratum_show(struct device *dev,
  1465. struct device_attribute *attr,
  1466. char *buf)
  1467. {
  1468. if (!stp_online)
  1469. return -ENODATA;
  1470. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1471. }
  1472. static DEVICE_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1473. static ssize_t stp_time_offset_show(struct device *dev,
  1474. struct device_attribute *attr,
  1475. char *buf)
  1476. {
  1477. if (!stp_online || !(stp_info.vbits & 0x0800))
  1478. return -ENODATA;
  1479. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1480. }
  1481. static DEVICE_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1482. static ssize_t stp_time_zone_offset_show(struct device *dev,
  1483. struct device_attribute *attr,
  1484. char *buf)
  1485. {
  1486. if (!stp_online || !(stp_info.vbits & 0x4000))
  1487. return -ENODATA;
  1488. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1489. }
  1490. static DEVICE_ATTR(time_zone_offset, 0400,
  1491. stp_time_zone_offset_show, NULL);
  1492. static ssize_t stp_timing_mode_show(struct device *dev,
  1493. struct device_attribute *attr,
  1494. char *buf)
  1495. {
  1496. if (!stp_online)
  1497. return -ENODATA;
  1498. return sprintf(buf, "%i\n", stp_info.tmd);
  1499. }
  1500. static DEVICE_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1501. static ssize_t stp_timing_state_show(struct device *dev,
  1502. struct device_attribute *attr,
  1503. char *buf)
  1504. {
  1505. if (!stp_online)
  1506. return -ENODATA;
  1507. return sprintf(buf, "%i\n", stp_info.tst);
  1508. }
  1509. static DEVICE_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1510. static ssize_t stp_online_show(struct device *dev,
  1511. struct device_attribute *attr,
  1512. char *buf)
  1513. {
  1514. return sprintf(buf, "%i\n", stp_online);
  1515. }
  1516. static ssize_t stp_online_store(struct device *dev,
  1517. struct device_attribute *attr,
  1518. const char *buf, size_t count)
  1519. {
  1520. unsigned int value;
  1521. value = simple_strtoul(buf, NULL, 0);
  1522. if (value != 0 && value != 1)
  1523. return -EINVAL;
  1524. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1525. return -EOPNOTSUPP;
  1526. mutex_lock(&clock_sync_mutex);
  1527. stp_online = value;
  1528. if (stp_online)
  1529. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1530. else
  1531. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1532. queue_work(time_sync_wq, &stp_work);
  1533. mutex_unlock(&clock_sync_mutex);
  1534. return count;
  1535. }
  1536. /*
  1537. * Can't use DEVICE_ATTR because the attribute should be named
  1538. * stp/online but dev_attr_online already exists in this file ..
  1539. */
  1540. static struct device_attribute dev_attr_stp_online = {
  1541. .attr = { .name = "online", .mode = 0600 },
  1542. .show = stp_online_show,
  1543. .store = stp_online_store,
  1544. };
  1545. static struct device_attribute *stp_attributes[] = {
  1546. &dev_attr_ctn_id,
  1547. &dev_attr_ctn_type,
  1548. &dev_attr_dst_offset,
  1549. &dev_attr_leap_seconds,
  1550. &dev_attr_stp_online,
  1551. &dev_attr_stratum,
  1552. &dev_attr_time_offset,
  1553. &dev_attr_time_zone_offset,
  1554. &dev_attr_timing_mode,
  1555. &dev_attr_timing_state,
  1556. NULL
  1557. };
  1558. static int __init stp_init_sysfs(void)
  1559. {
  1560. struct device_attribute **attr;
  1561. int rc;
  1562. rc = subsys_system_register(&stp_subsys, NULL);
  1563. if (rc)
  1564. goto out;
  1565. for (attr = stp_attributes; *attr; attr++) {
  1566. rc = device_create_file(stp_subsys.dev_root, *attr);
  1567. if (rc)
  1568. goto out_unreg;
  1569. }
  1570. return 0;
  1571. out_unreg:
  1572. for (; attr >= stp_attributes; attr--)
  1573. device_remove_file(stp_subsys.dev_root, *attr);
  1574. bus_unregister(&stp_subsys);
  1575. out:
  1576. return rc;
  1577. }
  1578. device_initcall(stp_init_sysfs);