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  1. /*
  2. * Copyright IBM Corp. 1999, 2010
  3. *
  4. * Author(s): Hartmut Penner <hp@de.ibm.com>
  5. * Martin Schwidefsky <schwidefsky@de.ibm.com>
  6. * Rob van der Heij <rvdhei@iae.nl>
  7. * Heiko Carstens <heiko.carstens@de.ibm.com>
  8. *
  9. * There are 5 different IPL methods
  10. * 1) load the image directly into ram at address 0 and do an PSW restart
  11. * 2) linload will load the image from address 0x10000 to memory 0x10000
  12. * and start the code thru LPSW 0x0008000080010000 (VM only, deprecated)
  13. * 3) generate the tape ipl header, store the generated image on a tape
  14. * and ipl from it
  15. * In case of SL tape you need to IPL 5 times to get past VOL1 etc
  16. * 4) generate the vm reader ipl header, move the generated image to the
  17. * VM reader (use option NOH!) and do a ipl from reader (VM only)
  18. * 5) direct call of start by the SALIPL loader
  19. * We use the cpuid to distinguish between VM and native ipl
  20. * params for kernel are pushed to 0x10400 (see setup.h)
  21. *
  22. */
  23. #include <linux/init.h>
  24. #include <linux/linkage.h>
  25. #include <asm/asm-offsets.h>
  26. #include <asm/thread_info.h>
  27. #include <asm/page.h>
  28. #ifdef CONFIG_64BIT
  29. #define ARCH_OFFSET 4
  30. #else
  31. #define ARCH_OFFSET 0
  32. #endif
  33. __HEAD
  34. #define IPL_BS 0x730
  35. .org 0
  36. .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded
  37. .long 0x02000018,0x60000050 # by ipl to addresses 0-23.
  38. .long 0x02000068,0x60000050 # (a PSW and two CCWs).
  39. .fill 80-24,1,0x40 # bytes 24-79 are discarded !!
  40. .long 0x020000f0,0x60000050 # The next 160 byte are loaded
  41. .long 0x02000140,0x60000050 # to addresses 0x18-0xb7
  42. .long 0x02000190,0x60000050 # They form the continuation
  43. .long 0x020001e0,0x60000050 # of the CCW program started
  44. .long 0x02000230,0x60000050 # by ipl and load the range
  45. .long 0x02000280,0x60000050 # 0x0f0-0x730 from the image
  46. .long 0x020002d0,0x60000050 # to the range 0x0f0-0x730
  47. .long 0x02000320,0x60000050 # in memory. At the end of
  48. .long 0x02000370,0x60000050 # the channel program the PSW
  49. .long 0x020003c0,0x60000050 # at location 0 is loaded.
  50. .long 0x02000410,0x60000050 # Initial processing starts
  51. .long 0x02000460,0x60000050 # at 0x200 = iplstart.
  52. .long 0x020004b0,0x60000050
  53. .long 0x02000500,0x60000050
  54. .long 0x02000550,0x60000050
  55. .long 0x020005a0,0x60000050
  56. .long 0x020005f0,0x60000050
  57. .long 0x02000640,0x60000050
  58. .long 0x02000690,0x60000050
  59. .long 0x020006e0,0x20000050
  60. .org 0x200
  61. #
  62. # subroutine to set architecture mode
  63. #
  64. .Lsetmode:
  65. #ifdef CONFIG_64BIT
  66. mvi __LC_AR_MODE_ID,1 # set esame flag
  67. slr %r0,%r0 # set cpuid to zero
  68. lhi %r1,2 # mode 2 = esame (dump)
  69. sigp %r1,%r0,0x12 # switch to esame mode
  70. bras %r13,0f
  71. .fill 16,4,0x0
  72. 0: lmh %r0,%r15,0(%r13) # clear high-order half of gprs
  73. sam31 # switch to 31 bit addressing mode
  74. #else
  75. mvi __LC_AR_MODE_ID,0 # set ESA flag (mode 0)
  76. #endif
  77. br %r14
  78. #
  79. # subroutine to wait for end I/O
  80. #
  81. .Lirqwait:
  82. #ifdef CONFIG_64BIT
  83. mvc 0x1f0(16),.Lnewpsw # set up IO interrupt psw
  84. lpsw .Lwaitpsw
  85. .Lioint:
  86. br %r14
  87. .align 8
  88. .Lnewpsw:
  89. .quad 0x0000000080000000,.Lioint
  90. #else
  91. mvc 0x78(8),.Lnewpsw # set up IO interrupt psw
  92. lpsw .Lwaitpsw
  93. .Lioint:
  94. br %r14
  95. .align 8
  96. .Lnewpsw:
  97. .long 0x00080000,0x80000000+.Lioint
  98. #endif
  99. .Lwaitpsw:
  100. .long 0x020a0000,0x80000000+.Lioint
  101. #
  102. # subroutine for loading cards from the reader
  103. #
  104. .Lloader:
  105. la %r4,0(%r14)
  106. la %r3,.Lorb # r2 = address of orb into r2
  107. la %r5,.Lirb # r4 = address of irb
  108. la %r6,.Lccws
  109. la %r7,20
  110. .Linit:
  111. st %r2,4(%r6) # initialize CCW data addresses
  112. la %r2,0x50(%r2)
  113. la %r6,8(%r6)
  114. bct 7,.Linit
  115. lctl %c6,%c6,.Lcr6 # set IO subclass mask
  116. slr %r2,%r2
  117. .Lldlp:
  118. ssch 0(%r3) # load chunk of 1600 bytes
  119. bnz .Llderr
  120. .Lwait4irq:
  121. bas %r14,.Lirqwait
  122. c %r1,0xb8 # compare subchannel number
  123. bne .Lwait4irq
  124. tsch 0(%r5)
  125. slr %r0,%r0
  126. ic %r0,8(%r5) # get device status
  127. chi %r0,8 # channel end ?
  128. be .Lcont
  129. chi %r0,12 # channel end + device end ?
  130. be .Lcont
  131. l %r0,4(%r5)
  132. s %r0,8(%r3) # r0/8 = number of ccws executed
  133. mhi %r0,10 # *10 = number of bytes in ccws
  134. lh %r3,10(%r5) # get residual count
  135. sr %r0,%r3 # #ccws*80-residual=#bytes read
  136. ar %r2,%r0
  137. br %r4 # r2 contains the total size
  138. .Lcont:
  139. ahi %r2,0x640 # add 0x640 to total size
  140. la %r6,.Lccws
  141. la %r7,20
  142. .Lincr:
  143. l %r0,4(%r6) # update CCW data addresses
  144. ahi %r0,0x640
  145. st %r0,4(%r6)
  146. ahi %r6,8
  147. bct 7,.Lincr
  148. b .Lldlp
  149. .Llderr:
  150. lpsw .Lcrash
  151. .align 8
  152. .Lorb: .long 0x00000000,0x0080ff00,.Lccws
  153. .Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
  154. .Lcr6: .long 0xff000000
  155. .Lloadp:.long 0,0
  156. .align 8
  157. .Lcrash:.long 0x000a0000,0x00000000
  158. .align 8
  159. .Lccws: .rept 19
  160. .long 0x02600050,0x00000000
  161. .endr
  162. .long 0x02200050,0x00000000
  163. iplstart:
  164. bas %r14,.Lsetmode # Immediately switch to 64 bit mode
  165. lh %r1,0xb8 # test if subchannel number
  166. bct %r1,.Lnoload # is valid
  167. l %r1,0xb8 # load ipl subchannel number
  168. la %r2,IPL_BS # load start address
  169. bas %r14,.Lloader # load rest of ipl image
  170. l %r12,.Lparm # pointer to parameter area
  171. st %r1,IPL_DEVICE+ARCH_OFFSET-PARMAREA(%r12) # save ipl device number
  172. #
  173. # load parameter file from ipl device
  174. #
  175. .Lagain1:
  176. l %r2,.Linitrd # ramdisk loc. is temp
  177. bas %r14,.Lloader # load parameter file
  178. ltr %r2,%r2 # got anything ?
  179. bz .Lnopf
  180. chi %r2,895
  181. bnh .Lnotrunc
  182. la %r2,895
  183. .Lnotrunc:
  184. l %r4,.Linitrd
  185. clc 0(3,%r4),.L_hdr # if it is HDRx
  186. bz .Lagain1 # skip dataset header
  187. clc 0(3,%r4),.L_eof # if it is EOFx
  188. bz .Lagain1 # skip dateset trailer
  189. la %r5,0(%r4,%r2)
  190. lr %r3,%r2
  191. la %r3,COMMAND_LINE-PARMAREA(%r12) # load adr. of command line
  192. mvc 0(256,%r3),0(%r4)
  193. mvc 256(256,%r3),256(%r4)
  194. mvc 512(256,%r3),512(%r4)
  195. mvc 768(122,%r3),768(%r4)
  196. slr %r0,%r0
  197. b .Lcntlp
  198. .Ldelspc:
  199. ic %r0,0(%r2,%r3)
  200. chi %r0,0x20 # is it a space ?
  201. be .Lcntlp
  202. ahi %r2,1
  203. b .Leolp
  204. .Lcntlp:
  205. brct %r2,.Ldelspc
  206. .Leolp:
  207. slr %r0,%r0
  208. stc %r0,0(%r2,%r3) # terminate buffer
  209. .Lnopf:
  210. #
  211. # load ramdisk from ipl device
  212. #
  213. .Lagain2:
  214. l %r2,.Linitrd # addr of ramdisk
  215. st %r2,INITRD_START+ARCH_OFFSET-PARMAREA(%r12)
  216. bas %r14,.Lloader # load ramdisk
  217. st %r2,INITRD_SIZE+ARCH_OFFSET-PARMAREA(%r12) # store size of rd
  218. ltr %r2,%r2
  219. bnz .Lrdcont
  220. st %r2,INITRD_START+ARCH_OFFSET-PARMAREA(%r12) # no ramdisk found
  221. .Lrdcont:
  222. l %r2,.Linitrd
  223. clc 0(3,%r2),.L_hdr # skip HDRx and EOFx
  224. bz .Lagain2
  225. clc 0(3,%r2),.L_eof
  226. bz .Lagain2
  227. #
  228. # reset files in VM reader
  229. #
  230. stidp .Lcpuid # store cpuid
  231. tm .Lcpuid,0xff # running VM ?
  232. bno .Lnoreset
  233. la %r2,.Lreset
  234. lhi %r3,26
  235. diag %r2,%r3,8
  236. la %r5,.Lirb
  237. stsch 0(%r5) # check if irq is pending
  238. tm 30(%r5),0x0f # by verifying if any of the
  239. bnz .Lwaitforirq # activity or status control
  240. tm 31(%r5),0xff # bits is set in the schib
  241. bz .Lnoreset
  242. .Lwaitforirq:
  243. bas %r14,.Lirqwait # wait for IO interrupt
  244. c %r1,0xb8 # compare subchannel number
  245. bne .Lwaitforirq
  246. la %r5,.Lirb
  247. tsch 0(%r5)
  248. .Lnoreset:
  249. b .Lnoload
  250. #
  251. # everything loaded, go for it
  252. #
  253. .Lnoload:
  254. l %r1,.Lstartup
  255. br %r1
  256. .Linitrd:.long _end # default address of initrd
  257. .Lparm: .long PARMAREA
  258. .Lstartup: .long startup
  259. .Lreset:.byte 0xc3,0xc8,0xc1,0xd5,0xc7,0xc5,0x40,0xd9,0xc4,0xd9,0x40
  260. .byte 0xc1,0xd3,0xd3,0x40,0xd2,0xc5,0xc5,0xd7,0x40,0xd5,0xd6
  261. .byte 0xc8,0xd6,0xd3,0xc4 # "change rdr all keep nohold"
  262. .L_eof: .long 0xc5d6c600 /* C'EOF' */
  263. .L_hdr: .long 0xc8c4d900 /* C'HDR' */
  264. .align 8
  265. .Lcpuid:.fill 8,1,0
  266. #
  267. # SALIPL loader support. Based on a patch by Rob van der Heij.
  268. # This entry point is called directly from the SALIPL loader and
  269. # doesn't need a builtin ipl record.
  270. #
  271. .org 0x800
  272. ENTRY(start)
  273. stm %r0,%r15,0x07b0 # store registers
  274. bas %r14,.Lsetmode # Immediately switch to 64 bit mode
  275. basr %r12,%r0
  276. .base:
  277. l %r11,.parm
  278. l %r8,.cmd # pointer to command buffer
  279. ltr %r9,%r9 # do we have SALIPL parameters?
  280. bp .sk8x8
  281. mvc 0(64,%r8),0x00b0 # copy saved registers
  282. xc 64(240-64,%r8),0(%r8) # remainder of buffer
  283. tr 0(64,%r8),.lowcase
  284. b .gotr
  285. .sk8x8:
  286. mvc 0(240,%r8),0(%r9) # copy iplparms into buffer
  287. .gotr:
  288. slr %r0,%r0
  289. st %r0,INITRD_SIZE+ARCH_OFFSET-PARMAREA(%r11)
  290. st %r0,INITRD_START+ARCH_OFFSET-PARMAREA(%r11)
  291. j startup # continue with startup
  292. .cmd: .long COMMAND_LINE # address of command line buffer
  293. .parm: .long PARMAREA
  294. .lowcase:
  295. .byte 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07
  296. .byte 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f
  297. .byte 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17
  298. .byte 0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f
  299. .byte 0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27
  300. .byte 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f
  301. .byte 0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37
  302. .byte 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f
  303. .byte 0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47
  304. .byte 0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f
  305. .byte 0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57
  306. .byte 0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x5f
  307. .byte 0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67
  308. .byte 0x68,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,0x6f
  309. .byte 0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77
  310. .byte 0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f
  311. .byte 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87
  312. .byte 0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x8f
  313. .byte 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97
  314. .byte 0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f
  315. .byte 0xa0,0xa1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7
  316. .byte 0xa8,0xa9,0xaa,0xab,0xac,0xad,0xae,0xaf
  317. .byte 0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xb7
  318. .byte 0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xbe,0xbf
  319. .byte 0xc0,0x81,0x82,0x83,0x84,0x85,0x86,0x87 # .abcdefg
  320. .byte 0x88,0x89,0xca,0xcb,0xcc,0xcd,0xce,0xcf # hi
  321. .byte 0xd0,0x91,0x92,0x93,0x94,0x95,0x96,0x97 # .jklmnop
  322. .byte 0x98,0x99,0xda,0xdb,0xdc,0xdd,0xde,0xdf # qr
  323. .byte 0xe0,0xe1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7 # ..stuvwx
  324. .byte 0xa8,0xa9,0xea,0xeb,0xec,0xed,0xee,0xef # yz
  325. .byte 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7
  326. .byte 0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff
  327. #
  328. # startup-code at 0x10000, running in absolute addressing mode
  329. # this is called either by the ipl loader or directly by PSW restart
  330. # or linload or SALIPL
  331. #
  332. .org 0x10000
  333. ENTRY(startup)
  334. j .Lep_startup_normal
  335. .org 0x10008
  336. #
  337. # This is a list of s390 kernel entry points. At address 0x1000f the number of
  338. # valid entry points is stored.
  339. #
  340. # IMPORTANT: Do not change this table, it is s390 kernel ABI!
  341. #
  342. .ascii "S390EP"
  343. .byte 0x00,0x01
  344. #
  345. # kdump startup-code at 0x10010, running in 64 bit absolute addressing mode
  346. #
  347. .org 0x10010
  348. ENTRY(startup_kdump)
  349. j .Lep_startup_kdump
  350. .Lep_startup_normal:
  351. #ifdef CONFIG_64BIT
  352. mvi __LC_AR_MODE_ID,1 # set esame flag
  353. slr %r0,%r0 # set cpuid to zero
  354. lhi %r1,2 # mode 2 = esame (dump)
  355. sigp %r1,%r0,0x12 # switch to esame mode
  356. bras %r13,0f
  357. .fill 16,4,0x0
  358. 0: lmh %r0,%r15,0(%r13) # clear high-order half of gprs
  359. sam31 # switch to 31 bit addressing mode
  360. #else
  361. mvi __LC_AR_MODE_ID,0 # set ESA flag (mode 0)
  362. #endif
  363. basr %r13,0 # get base
  364. .LPG0:
  365. xc 0x200(256),0x200 # partially clear lowcore
  366. xc 0x300(256),0x300
  367. xc 0xe00(256),0xe00
  368. stck __LC_LAST_UPDATE_CLOCK
  369. spt 6f-.LPG0(%r13)
  370. mvc __LC_LAST_UPDATE_TIMER(8),6f-.LPG0(%r13)
  371. xc __LC_STFL_FAC_LIST(8),__LC_STFL_FAC_LIST
  372. #ifndef CONFIG_MARCH_G5
  373. # check capabilities against MARCH_{G5,Z900,Z990,Z9_109,Z10}
  374. .insn s,0xb2b10000,__LC_STFL_FAC_LIST # store facility list
  375. tm __LC_STFL_FAC_LIST,0x01 # stfle available ?
  376. jz 0f
  377. la %r0,1
  378. .insn s,0xb2b00000,__LC_STFL_FAC_LIST # store facility list extended
  379. # verify if all required facilities are supported by the machine
  380. 0: la %r1,__LC_STFL_FAC_LIST
  381. la %r2,3f+8-.LPG0(%r13)
  382. l %r3,0(%r2)
  383. 1: l %r0,0(%r1)
  384. n %r0,4(%r2)
  385. cl %r0,4(%r2)
  386. jne 2f
  387. la %r1,4(%r1)
  388. la %r2,4(%r2)
  389. ahi %r3,-1
  390. jnz 1b
  391. j 4f
  392. 2: l %r15,.Lstack-.LPG0(%r13)
  393. ahi %r15,-96
  394. la %r2,.Lals_string-.LPG0(%r13)
  395. l %r3,.Lsclp_print-.LPG0(%r13)
  396. basr %r14,%r3
  397. lpsw 3f-.LPG0(%r13) # machine type not good enough, crash
  398. .Lals_string:
  399. .asciz "The Linux kernel requires more recent processor hardware"
  400. .Lsclp_print:
  401. .long _sclp_print_early
  402. .Lstack:
  403. .long 0x8000 + (1<<(PAGE_SHIFT+THREAD_ORDER))
  404. .align 16
  405. 3: .long 0x000a0000,0x8badcccc
  406. # List of facilities that are required. If not all facilities are present
  407. # the kernel will crash. Format is number of facility words with bits set,
  408. # followed by the facility words.
  409. #if defined(CONFIG_64BIT)
  410. #if defined(CONFIG_MARCH_ZEC12)
  411. .long 3, 0xc100efe3, 0xf46ce000, 0x00400000
  412. #elif defined(CONFIG_MARCH_Z196)
  413. .long 2, 0xc100efe3, 0xf46c0000
  414. #elif defined(CONFIG_MARCH_Z10)
  415. .long 2, 0xc100efe3, 0xf0680000
  416. #elif defined(CONFIG_MARCH_Z9_109)
  417. .long 1, 0xc100efc3
  418. #elif defined(CONFIG_MARCH_Z990)
  419. .long 1, 0xc0002000
  420. #elif defined(CONFIG_MARCH_Z900)
  421. .long 1, 0xc0000000
  422. #endif
  423. #else
  424. #if defined(CONFIG_MARCH_ZEC12)
  425. .long 1, 0x8100c880
  426. #elif defined(CONFIG_MARCH_Z196)
  427. .long 1, 0x8100c880
  428. #elif defined(CONFIG_MARCH_Z10)
  429. .long 1, 0x8100c880
  430. #elif defined(CONFIG_MARCH_Z9_109)
  431. .long 1, 0x8100c880
  432. #elif defined(CONFIG_MARCH_Z990)
  433. .long 1, 0x80002000
  434. #elif defined(CONFIG_MARCH_Z900)
  435. .long 1, 0x80000000
  436. #endif
  437. #endif
  438. 4:
  439. #endif
  440. #ifdef CONFIG_64BIT
  441. /* Continue with 64bit startup code in head64.S */
  442. sam64 # switch to 64 bit mode
  443. jg startup_continue
  444. #else
  445. /* Continue with 31bit startup code in head31.S */
  446. l %r13,5f-.LPG0(%r13)
  447. b 0(%r13)
  448. .align 8
  449. 5: .long startup_continue
  450. #endif
  451. .align 8
  452. 6: .long 0x7fffffff,0xffffffff
  453. #include "head_kdump.S"
  454. #
  455. # params at 10400 (setup.h)
  456. #
  457. .org PARMAREA
  458. .long 0,0 # IPL_DEVICE
  459. .long 0,0 # INITRD_START
  460. .long 0,0 # INITRD_SIZE
  461. .long 0,0 # OLDMEM_BASE
  462. .long 0,0 # OLDMEM_SIZE
  463. .org COMMAND_LINE
  464. .byte "root=/dev/ram0 ro"
  465. .byte 0
  466. .org 0x11000