smp.c 28 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190
  1. /* SMP support routines.
  2. *
  3. * Copyright (C) 2006-2008 Panasonic Corporation
  4. * All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/interrupt.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/init.h>
  18. #include <linux/jiffies.h>
  19. #include <linux/cpumask.h>
  20. #include <linux/err.h>
  21. #include <linux/kernel.h>
  22. #include <linux/delay.h>
  23. #include <linux/sched.h>
  24. #include <linux/profile.h>
  25. #include <linux/smp.h>
  26. #include <linux/cpu.h>
  27. #include <asm/tlbflush.h>
  28. #include <asm/bitops.h>
  29. #include <asm/processor.h>
  30. #include <asm/bug.h>
  31. #include <asm/exceptions.h>
  32. #include <asm/hardirq.h>
  33. #include <asm/fpu.h>
  34. #include <asm/mmu_context.h>
  35. #include <asm/thread_info.h>
  36. #include <asm/cpu-regs.h>
  37. #include <asm/intctl-regs.h>
  38. #include "internal.h"
  39. #ifdef CONFIG_HOTPLUG_CPU
  40. #include <asm/cacheflush.h>
  41. static unsigned long sleep_mode[NR_CPUS];
  42. static void run_sleep_cpu(unsigned int cpu);
  43. static void run_wakeup_cpu(unsigned int cpu);
  44. #endif /* CONFIG_HOTPLUG_CPU */
  45. /*
  46. * Debug Message function
  47. */
  48. #undef DEBUG_SMP
  49. #ifdef DEBUG_SMP
  50. #define Dprintk(fmt, ...) printk(KERN_DEBUG fmt, ##__VA_ARGS__)
  51. #else
  52. #define Dprintk(fmt, ...) no_printk(KERN_DEBUG fmt, ##__VA_ARGS__)
  53. #endif
  54. /* timeout value in msec for smp_nmi_call_function. zero is no timeout. */
  55. #define CALL_FUNCTION_NMI_IPI_TIMEOUT 0
  56. /*
  57. * Structure and data for smp_nmi_call_function().
  58. */
  59. struct nmi_call_data_struct {
  60. smp_call_func_t func;
  61. void *info;
  62. cpumask_t started;
  63. cpumask_t finished;
  64. int wait;
  65. char size_alignment[0]
  66. __attribute__ ((__aligned__(SMP_CACHE_BYTES)));
  67. } __attribute__ ((__aligned__(SMP_CACHE_BYTES)));
  68. static DEFINE_SPINLOCK(smp_nmi_call_lock);
  69. static struct nmi_call_data_struct *nmi_call_data;
  70. /*
  71. * Data structures and variables
  72. */
  73. static cpumask_t cpu_callin_map; /* Bitmask of callin CPUs */
  74. static cpumask_t cpu_callout_map; /* Bitmask of callout CPUs */
  75. cpumask_t cpu_boot_map; /* Bitmask of boot APs */
  76. unsigned long start_stack[NR_CPUS - 1];
  77. /*
  78. * Per CPU parameters
  79. */
  80. struct mn10300_cpuinfo cpu_data[NR_CPUS] __cacheline_aligned;
  81. static int cpucount; /* The count of boot CPUs */
  82. static cpumask_t smp_commenced_mask;
  83. cpumask_t cpu_initialized __initdata = CPU_MASK_NONE;
  84. /*
  85. * Function Prototypes
  86. */
  87. static int do_boot_cpu(int);
  88. static void smp_show_cpu_info(int cpu_id);
  89. static void smp_callin(void);
  90. static void smp_online(void);
  91. static void smp_store_cpu_info(int);
  92. static void smp_cpu_init(void);
  93. static void smp_tune_scheduling(void);
  94. static void send_IPI_mask(const cpumask_t *cpumask, int irq);
  95. static void init_ipi(void);
  96. /*
  97. * IPI Initialization interrupt definitions
  98. */
  99. static void mn10300_ipi_disable(unsigned int irq);
  100. static void mn10300_ipi_enable(unsigned int irq);
  101. static void mn10300_ipi_chip_disable(struct irq_data *d);
  102. static void mn10300_ipi_chip_enable(struct irq_data *d);
  103. static void mn10300_ipi_ack(struct irq_data *d);
  104. static void mn10300_ipi_nop(struct irq_data *d);
  105. static struct irq_chip mn10300_ipi_type = {
  106. .name = "cpu_ipi",
  107. .irq_disable = mn10300_ipi_chip_disable,
  108. .irq_enable = mn10300_ipi_chip_enable,
  109. .irq_ack = mn10300_ipi_ack,
  110. .irq_eoi = mn10300_ipi_nop
  111. };
  112. static irqreturn_t smp_reschedule_interrupt(int irq, void *dev_id);
  113. static irqreturn_t smp_call_function_interrupt(int irq, void *dev_id);
  114. static struct irqaction reschedule_ipi = {
  115. .handler = smp_reschedule_interrupt,
  116. .flags = IRQF_NOBALANCING,
  117. .name = "smp reschedule IPI"
  118. };
  119. static struct irqaction call_function_ipi = {
  120. .handler = smp_call_function_interrupt,
  121. .flags = IRQF_NOBALANCING,
  122. .name = "smp call function IPI"
  123. };
  124. #if !defined(CONFIG_GENERIC_CLOCKEVENTS) || defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
  125. static irqreturn_t smp_ipi_timer_interrupt(int irq, void *dev_id);
  126. static struct irqaction local_timer_ipi = {
  127. .handler = smp_ipi_timer_interrupt,
  128. .flags = IRQF_DISABLED | IRQF_NOBALANCING,
  129. .name = "smp local timer IPI"
  130. };
  131. #endif
  132. /**
  133. * init_ipi - Initialise the IPI mechanism
  134. */
  135. static void init_ipi(void)
  136. {
  137. unsigned long flags;
  138. u16 tmp16;
  139. /* set up the reschedule IPI */
  140. irq_set_chip_and_handler(RESCHEDULE_IPI, &mn10300_ipi_type,
  141. handle_percpu_irq);
  142. setup_irq(RESCHEDULE_IPI, &reschedule_ipi);
  143. set_intr_level(RESCHEDULE_IPI, RESCHEDULE_GxICR_LV);
  144. mn10300_ipi_enable(RESCHEDULE_IPI);
  145. /* set up the call function IPI */
  146. irq_set_chip_and_handler(CALL_FUNC_SINGLE_IPI, &mn10300_ipi_type,
  147. handle_percpu_irq);
  148. setup_irq(CALL_FUNC_SINGLE_IPI, &call_function_ipi);
  149. set_intr_level(CALL_FUNC_SINGLE_IPI, CALL_FUNCTION_GxICR_LV);
  150. mn10300_ipi_enable(CALL_FUNC_SINGLE_IPI);
  151. /* set up the local timer IPI */
  152. #if !defined(CONFIG_GENERIC_CLOCKEVENTS) || \
  153. defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
  154. irq_set_chip_and_handler(LOCAL_TIMER_IPI, &mn10300_ipi_type,
  155. handle_percpu_irq);
  156. setup_irq(LOCAL_TIMER_IPI, &local_timer_ipi);
  157. set_intr_level(LOCAL_TIMER_IPI, LOCAL_TIMER_GxICR_LV);
  158. mn10300_ipi_enable(LOCAL_TIMER_IPI);
  159. #endif
  160. #ifdef CONFIG_MN10300_CACHE_ENABLED
  161. /* set up the cache flush IPI */
  162. irq_set_chip(FLUSH_CACHE_IPI, &mn10300_ipi_type);
  163. flags = arch_local_cli_save();
  164. __set_intr_stub(NUM2EXCEP_IRQ_LEVEL(FLUSH_CACHE_GxICR_LV),
  165. mn10300_low_ipi_handler);
  166. GxICR(FLUSH_CACHE_IPI) = FLUSH_CACHE_GxICR_LV | GxICR_DETECT;
  167. mn10300_ipi_enable(FLUSH_CACHE_IPI);
  168. arch_local_irq_restore(flags);
  169. #endif
  170. /* set up the NMI call function IPI */
  171. irq_set_chip(CALL_FUNCTION_NMI_IPI, &mn10300_ipi_type);
  172. flags = arch_local_cli_save();
  173. GxICR(CALL_FUNCTION_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
  174. tmp16 = GxICR(CALL_FUNCTION_NMI_IPI);
  175. arch_local_irq_restore(flags);
  176. /* set up the SMP boot IPI */
  177. flags = arch_local_cli_save();
  178. __set_intr_stub(NUM2EXCEP_IRQ_LEVEL(SMP_BOOT_GxICR_LV),
  179. mn10300_low_ipi_handler);
  180. arch_local_irq_restore(flags);
  181. #ifdef CONFIG_KERNEL_DEBUGGER
  182. irq_set_chip(DEBUGGER_NMI_IPI, &mn10300_ipi_type);
  183. #endif
  184. }
  185. /**
  186. * mn10300_ipi_shutdown - Shut down handling of an IPI
  187. * @irq: The IPI to be shut down.
  188. */
  189. static void mn10300_ipi_shutdown(unsigned int irq)
  190. {
  191. unsigned long flags;
  192. u16 tmp;
  193. flags = arch_local_cli_save();
  194. tmp = GxICR(irq);
  195. GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_DETECT;
  196. tmp = GxICR(irq);
  197. arch_local_irq_restore(flags);
  198. }
  199. /**
  200. * mn10300_ipi_enable - Enable an IPI
  201. * @irq: The IPI to be enabled.
  202. */
  203. static void mn10300_ipi_enable(unsigned int irq)
  204. {
  205. unsigned long flags;
  206. u16 tmp;
  207. flags = arch_local_cli_save();
  208. tmp = GxICR(irq);
  209. GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE;
  210. tmp = GxICR(irq);
  211. arch_local_irq_restore(flags);
  212. }
  213. static void mn10300_ipi_chip_enable(struct irq_data *d)
  214. {
  215. mn10300_ipi_enable(d->irq);
  216. }
  217. /**
  218. * mn10300_ipi_disable - Disable an IPI
  219. * @irq: The IPI to be disabled.
  220. */
  221. static void mn10300_ipi_disable(unsigned int irq)
  222. {
  223. unsigned long flags;
  224. u16 tmp;
  225. flags = arch_local_cli_save();
  226. tmp = GxICR(irq);
  227. GxICR(irq) = tmp & GxICR_LEVEL;
  228. tmp = GxICR(irq);
  229. arch_local_irq_restore(flags);
  230. }
  231. static void mn10300_ipi_chip_disable(struct irq_data *d)
  232. {
  233. mn10300_ipi_disable(d->irq);
  234. }
  235. /**
  236. * mn10300_ipi_ack - Acknowledge an IPI interrupt in the PIC
  237. * @irq: The IPI to be acknowledged.
  238. *
  239. * Clear the interrupt detection flag for the IPI on the appropriate interrupt
  240. * channel in the PIC.
  241. */
  242. static void mn10300_ipi_ack(struct irq_data *d)
  243. {
  244. unsigned int irq = d->irq;
  245. unsigned long flags;
  246. u16 tmp;
  247. flags = arch_local_cli_save();
  248. GxICR_u8(irq) = GxICR_DETECT;
  249. tmp = GxICR(irq);
  250. arch_local_irq_restore(flags);
  251. }
  252. /**
  253. * mn10300_ipi_nop - Dummy IPI action
  254. * @irq: The IPI to be acted upon.
  255. */
  256. static void mn10300_ipi_nop(struct irq_data *d)
  257. {
  258. }
  259. /**
  260. * send_IPI_mask - Send IPIs to all CPUs in list
  261. * @cpumask: The list of CPUs to target.
  262. * @irq: The IPI request to be sent.
  263. *
  264. * Send the specified IPI to all the CPUs in the list, not waiting for them to
  265. * finish before returning. The caller is responsible for synchronisation if
  266. * that is needed.
  267. */
  268. static void send_IPI_mask(const cpumask_t *cpumask, int irq)
  269. {
  270. int i;
  271. u16 tmp;
  272. for (i = 0; i < NR_CPUS; i++) {
  273. if (cpumask_test_cpu(i, cpumask)) {
  274. /* send IPI */
  275. tmp = CROSS_GxICR(irq, i);
  276. CROSS_GxICR(irq, i) =
  277. tmp | GxICR_REQUEST | GxICR_DETECT;
  278. tmp = CROSS_GxICR(irq, i); /* flush write buffer */
  279. }
  280. }
  281. }
  282. /**
  283. * send_IPI_self - Send an IPI to this CPU.
  284. * @irq: The IPI request to be sent.
  285. *
  286. * Send the specified IPI to the current CPU.
  287. */
  288. void send_IPI_self(int irq)
  289. {
  290. send_IPI_mask(cpumask_of(smp_processor_id()), irq);
  291. }
  292. /**
  293. * send_IPI_allbutself - Send IPIs to all the other CPUs.
  294. * @irq: The IPI request to be sent.
  295. *
  296. * Send the specified IPI to all CPUs in the system barring the current one,
  297. * not waiting for them to finish before returning. The caller is responsible
  298. * for synchronisation if that is needed.
  299. */
  300. void send_IPI_allbutself(int irq)
  301. {
  302. cpumask_t cpumask;
  303. cpumask_copy(&cpumask, cpu_online_mask);
  304. cpumask_clear_cpu(smp_processor_id(), &cpumask);
  305. send_IPI_mask(&cpumask, irq);
  306. }
  307. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  308. {
  309. BUG();
  310. /*send_IPI_mask(mask, CALL_FUNCTION_IPI);*/
  311. }
  312. void arch_send_call_function_single_ipi(int cpu)
  313. {
  314. send_IPI_mask(cpumask_of(cpu), CALL_FUNC_SINGLE_IPI);
  315. }
  316. /**
  317. * smp_send_reschedule - Send reschedule IPI to a CPU
  318. * @cpu: The CPU to target.
  319. */
  320. void smp_send_reschedule(int cpu)
  321. {
  322. send_IPI_mask(cpumask_of(cpu), RESCHEDULE_IPI);
  323. }
  324. /**
  325. * smp_nmi_call_function - Send a call function NMI IPI to all CPUs
  326. * @func: The function to ask to be run.
  327. * @info: The context data to pass to that function.
  328. * @wait: If true, wait (atomically) until function is run on all CPUs.
  329. *
  330. * Send a non-maskable request to all CPUs in the system, requesting them to
  331. * run the specified function with the given context data, and, potentially, to
  332. * wait for completion of that function on all CPUs.
  333. *
  334. * Returns 0 if successful, -ETIMEDOUT if we were asked to wait, but hit the
  335. * timeout.
  336. */
  337. int smp_nmi_call_function(smp_call_func_t func, void *info, int wait)
  338. {
  339. struct nmi_call_data_struct data;
  340. unsigned long flags;
  341. unsigned int cnt;
  342. int cpus, ret = 0;
  343. cpus = num_online_cpus() - 1;
  344. if (cpus < 1)
  345. return 0;
  346. data.func = func;
  347. data.info = info;
  348. cpumask_copy(&data.started, cpu_online_mask);
  349. cpumask_clear_cpu(smp_processor_id(), &data.started);
  350. data.wait = wait;
  351. if (wait)
  352. data.finished = data.started;
  353. spin_lock_irqsave(&smp_nmi_call_lock, flags);
  354. nmi_call_data = &data;
  355. smp_mb();
  356. /* Send a message to all other CPUs and wait for them to respond */
  357. send_IPI_allbutself(CALL_FUNCTION_NMI_IPI);
  358. /* Wait for response */
  359. if (CALL_FUNCTION_NMI_IPI_TIMEOUT > 0) {
  360. for (cnt = 0;
  361. cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT &&
  362. !cpumask_empty(&data.started);
  363. cnt++)
  364. mdelay(1);
  365. if (wait && cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT) {
  366. for (cnt = 0;
  367. cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT &&
  368. !cpumask_empty(&data.finished);
  369. cnt++)
  370. mdelay(1);
  371. }
  372. if (cnt >= CALL_FUNCTION_NMI_IPI_TIMEOUT)
  373. ret = -ETIMEDOUT;
  374. } else {
  375. /* If timeout value is zero, wait until cpumask has been
  376. * cleared */
  377. while (!cpumask_empty(&data.started))
  378. barrier();
  379. if (wait)
  380. while (!cpumask_empty(&data.finished))
  381. barrier();
  382. }
  383. spin_unlock_irqrestore(&smp_nmi_call_lock, flags);
  384. return ret;
  385. }
  386. /**
  387. * smp_jump_to_debugger - Make other CPUs enter the debugger by sending an IPI
  388. *
  389. * Send a non-maskable request to all other CPUs in the system, instructing
  390. * them to jump into the debugger. The caller is responsible for checking that
  391. * the other CPUs responded to the instruction.
  392. *
  393. * The caller should make sure that this CPU's debugger IPI is disabled.
  394. */
  395. void smp_jump_to_debugger(void)
  396. {
  397. if (num_online_cpus() > 1)
  398. /* Send a message to all other CPUs */
  399. send_IPI_allbutself(DEBUGGER_NMI_IPI);
  400. }
  401. /**
  402. * stop_this_cpu - Callback to stop a CPU.
  403. * @unused: Callback context (ignored).
  404. */
  405. void stop_this_cpu(void *unused)
  406. {
  407. static volatile int stopflag;
  408. unsigned long flags;
  409. #ifdef CONFIG_GDBSTUB
  410. /* In case of single stepping smp_send_stop by other CPU,
  411. * clear procindebug to avoid deadlock.
  412. */
  413. atomic_set(&procindebug[smp_processor_id()], 0);
  414. #endif /* CONFIG_GDBSTUB */
  415. flags = arch_local_cli_save();
  416. set_cpu_online(smp_processor_id(), false);
  417. while (!stopflag)
  418. cpu_relax();
  419. set_cpu_online(smp_processor_id(), true);
  420. arch_local_irq_restore(flags);
  421. }
  422. /**
  423. * smp_send_stop - Send a stop request to all CPUs.
  424. */
  425. void smp_send_stop(void)
  426. {
  427. smp_nmi_call_function(stop_this_cpu, NULL, 0);
  428. }
  429. /**
  430. * smp_reschedule_interrupt - Reschedule IPI handler
  431. * @irq: The interrupt number.
  432. * @dev_id: The device ID.
  433. *
  434. * Returns IRQ_HANDLED to indicate we handled the interrupt successfully.
  435. */
  436. static irqreturn_t smp_reschedule_interrupt(int irq, void *dev_id)
  437. {
  438. scheduler_ipi();
  439. return IRQ_HANDLED;
  440. }
  441. /**
  442. * smp_call_function_interrupt - Call function IPI handler
  443. * @irq: The interrupt number.
  444. * @dev_id: The device ID.
  445. *
  446. * Returns IRQ_HANDLED to indicate we handled the interrupt successfully.
  447. */
  448. static irqreturn_t smp_call_function_interrupt(int irq, void *dev_id)
  449. {
  450. /* generic_smp_call_function_interrupt(); */
  451. generic_smp_call_function_single_interrupt();
  452. return IRQ_HANDLED;
  453. }
  454. /**
  455. * smp_nmi_call_function_interrupt - Non-maskable call function IPI handler
  456. */
  457. void smp_nmi_call_function_interrupt(void)
  458. {
  459. smp_call_func_t func = nmi_call_data->func;
  460. void *info = nmi_call_data->info;
  461. int wait = nmi_call_data->wait;
  462. /* Notify the initiating CPU that I've grabbed the data and am about to
  463. * execute the function
  464. */
  465. smp_mb();
  466. cpumask_clear_cpu(smp_processor_id(), &nmi_call_data->started);
  467. (*func)(info);
  468. if (wait) {
  469. smp_mb();
  470. cpumask_clear_cpu(smp_processor_id(),
  471. &nmi_call_data->finished);
  472. }
  473. }
  474. #if !defined(CONFIG_GENERIC_CLOCKEVENTS) || \
  475. defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
  476. /**
  477. * smp_ipi_timer_interrupt - Local timer IPI handler
  478. * @irq: The interrupt number.
  479. * @dev_id: The device ID.
  480. *
  481. * Returns IRQ_HANDLED to indicate we handled the interrupt successfully.
  482. */
  483. static irqreturn_t smp_ipi_timer_interrupt(int irq, void *dev_id)
  484. {
  485. return local_timer_interrupt();
  486. }
  487. #endif
  488. void __init smp_init_cpus(void)
  489. {
  490. int i;
  491. for (i = 0; i < NR_CPUS; i++) {
  492. set_cpu_possible(i, true);
  493. set_cpu_present(i, true);
  494. }
  495. }
  496. /**
  497. * smp_cpu_init - Initialise AP in start_secondary.
  498. *
  499. * For this Application Processor, set up init_mm, initialise FPU and set
  500. * interrupt level 0-6 setting.
  501. */
  502. static void __init smp_cpu_init(void)
  503. {
  504. unsigned long flags;
  505. int cpu_id = smp_processor_id();
  506. u16 tmp16;
  507. if (test_and_set_bit(cpu_id, &cpu_initialized)) {
  508. printk(KERN_WARNING "CPU#%d already initialized!\n", cpu_id);
  509. for (;;)
  510. local_irq_enable();
  511. }
  512. printk(KERN_INFO "Initializing CPU#%d\n", cpu_id);
  513. atomic_inc(&init_mm.mm_count);
  514. current->active_mm = &init_mm;
  515. BUG_ON(current->mm);
  516. enter_lazy_tlb(&init_mm, current);
  517. /* Force FPU initialization */
  518. clear_using_fpu(current);
  519. GxICR(CALL_FUNC_SINGLE_IPI) = CALL_FUNCTION_GxICR_LV | GxICR_DETECT;
  520. mn10300_ipi_enable(CALL_FUNC_SINGLE_IPI);
  521. GxICR(LOCAL_TIMER_IPI) = LOCAL_TIMER_GxICR_LV | GxICR_DETECT;
  522. mn10300_ipi_enable(LOCAL_TIMER_IPI);
  523. GxICR(RESCHEDULE_IPI) = RESCHEDULE_GxICR_LV | GxICR_DETECT;
  524. mn10300_ipi_enable(RESCHEDULE_IPI);
  525. #ifdef CONFIG_MN10300_CACHE_ENABLED
  526. GxICR(FLUSH_CACHE_IPI) = FLUSH_CACHE_GxICR_LV | GxICR_DETECT;
  527. mn10300_ipi_enable(FLUSH_CACHE_IPI);
  528. #endif
  529. mn10300_ipi_shutdown(SMP_BOOT_IRQ);
  530. /* Set up the non-maskable call function IPI */
  531. flags = arch_local_cli_save();
  532. GxICR(CALL_FUNCTION_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
  533. tmp16 = GxICR(CALL_FUNCTION_NMI_IPI);
  534. arch_local_irq_restore(flags);
  535. }
  536. /**
  537. * smp_prepare_cpu_init - Initialise CPU in startup_secondary
  538. *
  539. * Set interrupt level 0-6 setting and init ICR of the kernel debugger.
  540. */
  541. void smp_prepare_cpu_init(void)
  542. {
  543. int loop;
  544. /* Set the interrupt vector registers */
  545. IVAR0 = EXCEP_IRQ_LEVEL0;
  546. IVAR1 = EXCEP_IRQ_LEVEL1;
  547. IVAR2 = EXCEP_IRQ_LEVEL2;
  548. IVAR3 = EXCEP_IRQ_LEVEL3;
  549. IVAR4 = EXCEP_IRQ_LEVEL4;
  550. IVAR5 = EXCEP_IRQ_LEVEL5;
  551. IVAR6 = EXCEP_IRQ_LEVEL6;
  552. /* Disable all interrupts and set to priority 6 (lowest) */
  553. for (loop = 0; loop < GxICR_NUM_IRQS; loop++)
  554. GxICR(loop) = GxICR_LEVEL_6 | GxICR_DETECT;
  555. #ifdef CONFIG_KERNEL_DEBUGGER
  556. /* initialise the kernel debugger interrupt */
  557. do {
  558. unsigned long flags;
  559. u16 tmp16;
  560. flags = arch_local_cli_save();
  561. GxICR(DEBUGGER_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
  562. tmp16 = GxICR(DEBUGGER_NMI_IPI);
  563. arch_local_irq_restore(flags);
  564. } while (0);
  565. #endif
  566. }
  567. /**
  568. * start_secondary - Activate a secondary CPU (AP)
  569. * @unused: Thread parameter (ignored).
  570. */
  571. int __init start_secondary(void *unused)
  572. {
  573. smp_cpu_init();
  574. smp_callin();
  575. while (!cpumask_test_cpu(smp_processor_id(), &smp_commenced_mask))
  576. cpu_relax();
  577. local_flush_tlb();
  578. preempt_disable();
  579. smp_online();
  580. #ifdef CONFIG_GENERIC_CLOCKEVENTS
  581. init_clockevents();
  582. #endif
  583. cpu_idle();
  584. return 0;
  585. }
  586. /**
  587. * smp_prepare_cpus - Boot up secondary CPUs (APs)
  588. * @max_cpus: Maximum number of CPUs to boot.
  589. *
  590. * Call do_boot_cpu, and boot up APs.
  591. */
  592. void __init smp_prepare_cpus(unsigned int max_cpus)
  593. {
  594. int phy_id;
  595. /* Setup boot CPU information */
  596. smp_store_cpu_info(0);
  597. smp_tune_scheduling();
  598. init_ipi();
  599. /* If SMP should be disabled, then finish */
  600. if (max_cpus == 0) {
  601. printk(KERN_INFO "SMP mode deactivated.\n");
  602. goto smp_done;
  603. }
  604. /* Boot secondary CPUs (for which phy_id > 0) */
  605. for (phy_id = 0; phy_id < NR_CPUS; phy_id++) {
  606. /* Don't boot primary CPU */
  607. if (max_cpus <= cpucount + 1)
  608. continue;
  609. if (phy_id != 0)
  610. do_boot_cpu(phy_id);
  611. set_cpu_possible(phy_id, true);
  612. smp_show_cpu_info(phy_id);
  613. }
  614. smp_done:
  615. Dprintk("Boot done.\n");
  616. }
  617. /**
  618. * smp_store_cpu_info - Save a CPU's information
  619. * @cpu: The CPU to save for.
  620. *
  621. * Save boot_cpu_data and jiffy for the specified CPU.
  622. */
  623. static void __init smp_store_cpu_info(int cpu)
  624. {
  625. struct mn10300_cpuinfo *ci = &cpu_data[cpu];
  626. *ci = boot_cpu_data;
  627. ci->loops_per_jiffy = loops_per_jiffy;
  628. ci->type = CPUREV;
  629. }
  630. /**
  631. * smp_tune_scheduling - Set time slice value
  632. *
  633. * Nothing to do here.
  634. */
  635. static void __init smp_tune_scheduling(void)
  636. {
  637. }
  638. /**
  639. * do_boot_cpu: Boot up one CPU
  640. * @phy_id: Physical ID of CPU to boot.
  641. *
  642. * Send an IPI to a secondary CPU to boot it. Returns 0 on success, 1
  643. * otherwise.
  644. */
  645. static int __init do_boot_cpu(int phy_id)
  646. {
  647. struct task_struct *idle;
  648. unsigned long send_status, callin_status;
  649. int timeout, cpu_id;
  650. send_status = GxICR_REQUEST;
  651. callin_status = 0;
  652. timeout = 0;
  653. cpu_id = phy_id;
  654. cpucount++;
  655. /* Create idle thread for this CPU */
  656. idle = fork_idle(cpu_id);
  657. if (IS_ERR(idle))
  658. panic("Failed fork for CPU#%d.", cpu_id);
  659. idle->thread.pc = (unsigned long)start_secondary;
  660. printk(KERN_NOTICE "Booting CPU#%d\n", cpu_id);
  661. start_stack[cpu_id - 1] = idle->thread.sp;
  662. task_thread_info(idle)->cpu = cpu_id;
  663. /* Send boot IPI to AP */
  664. send_IPI_mask(cpumask_of(phy_id), SMP_BOOT_IRQ);
  665. Dprintk("Waiting for send to finish...\n");
  666. /* Wait for AP's IPI receive in 100[ms] */
  667. do {
  668. udelay(1000);
  669. send_status =
  670. CROSS_GxICR(SMP_BOOT_IRQ, phy_id) & GxICR_REQUEST;
  671. } while (send_status == GxICR_REQUEST && timeout++ < 100);
  672. Dprintk("Waiting for cpu_callin_map.\n");
  673. if (send_status == 0) {
  674. /* Allow AP to start initializing */
  675. cpumask_set_cpu(cpu_id, &cpu_callout_map);
  676. /* Wait for setting cpu_callin_map */
  677. timeout = 0;
  678. do {
  679. udelay(1000);
  680. callin_status = cpumask_test_cpu(cpu_id,
  681. &cpu_callin_map);
  682. } while (callin_status == 0 && timeout++ < 5000);
  683. if (callin_status == 0)
  684. Dprintk("Not responding.\n");
  685. } else {
  686. printk(KERN_WARNING "IPI not delivered.\n");
  687. }
  688. if (send_status == GxICR_REQUEST || callin_status == 0) {
  689. cpumask_clear_cpu(cpu_id, &cpu_callout_map);
  690. cpumask_clear_cpu(cpu_id, &cpu_callin_map);
  691. cpumask_clear_cpu(cpu_id, &cpu_initialized);
  692. cpucount--;
  693. return 1;
  694. }
  695. return 0;
  696. }
  697. /**
  698. * smp_show_cpu_info - Show SMP CPU information
  699. * @cpu: The CPU of interest.
  700. */
  701. static void __init smp_show_cpu_info(int cpu)
  702. {
  703. struct mn10300_cpuinfo *ci = &cpu_data[cpu];
  704. printk(KERN_INFO
  705. "CPU#%d : ioclk speed: %lu.%02luMHz : bogomips : %lu.%02lu\n",
  706. cpu,
  707. MN10300_IOCLK / 1000000,
  708. (MN10300_IOCLK / 10000) % 100,
  709. ci->loops_per_jiffy / (500000 / HZ),
  710. (ci->loops_per_jiffy / (5000 / HZ)) % 100);
  711. }
  712. /**
  713. * smp_callin - Set cpu_callin_map of the current CPU ID
  714. */
  715. static void __init smp_callin(void)
  716. {
  717. unsigned long timeout;
  718. int cpu;
  719. cpu = smp_processor_id();
  720. timeout = jiffies + (2 * HZ);
  721. if (cpumask_test_cpu(cpu, &cpu_callin_map)) {
  722. printk(KERN_ERR "CPU#%d already present.\n", cpu);
  723. BUG();
  724. }
  725. Dprintk("CPU#%d waiting for CALLOUT\n", cpu);
  726. /* Wait for AP startup 2s total */
  727. while (time_before(jiffies, timeout)) {
  728. if (cpumask_test_cpu(cpu, &cpu_callout_map))
  729. break;
  730. cpu_relax();
  731. }
  732. if (!time_before(jiffies, timeout)) {
  733. printk(KERN_ERR
  734. "BUG: CPU#%d started up but did not get a callout!\n",
  735. cpu);
  736. BUG();
  737. }
  738. #ifdef CONFIG_CALIBRATE_DELAY
  739. calibrate_delay(); /* Get our bogomips */
  740. #endif
  741. /* Save our processor parameters */
  742. smp_store_cpu_info(cpu);
  743. /* Allow the boot processor to continue */
  744. cpumask_set_cpu(cpu, &cpu_callin_map);
  745. }
  746. /**
  747. * smp_online - Set cpu_online_mask
  748. */
  749. static void __init smp_online(void)
  750. {
  751. int cpu;
  752. cpu = smp_processor_id();
  753. notify_cpu_starting(cpu);
  754. set_cpu_online(cpu, true);
  755. local_irq_enable();
  756. }
  757. /**
  758. * smp_cpus_done -
  759. * @max_cpus: Maximum CPU count.
  760. *
  761. * Do nothing.
  762. */
  763. void __init smp_cpus_done(unsigned int max_cpus)
  764. {
  765. }
  766. /*
  767. * smp_prepare_boot_cpu - Set up stuff for the boot processor.
  768. *
  769. * Set up the cpu_online_mask, cpu_callout_map and cpu_callin_map of the boot
  770. * processor (CPU 0).
  771. */
  772. void smp_prepare_boot_cpu(void)
  773. {
  774. cpumask_set_cpu(0, &cpu_callout_map);
  775. cpumask_set_cpu(0, &cpu_callin_map);
  776. current_thread_info()->cpu = 0;
  777. }
  778. /*
  779. * initialize_secondary - Initialise a secondary CPU (Application Processor).
  780. *
  781. * Set SP register and jump to thread's PC address.
  782. */
  783. void initialize_secondary(void)
  784. {
  785. asm volatile (
  786. "mov %0,sp \n"
  787. "jmp (%1) \n"
  788. :
  789. : "a"(current->thread.sp), "a"(current->thread.pc));
  790. }
  791. /**
  792. * __cpu_up - Set smp_commenced_mask for the nominated CPU
  793. * @cpu: The target CPU.
  794. */
  795. int __cpu_up(unsigned int cpu, struct task_struct *tidle)
  796. {
  797. int timeout;
  798. #ifdef CONFIG_HOTPLUG_CPU
  799. if (num_online_cpus() == 1)
  800. disable_hlt();
  801. if (sleep_mode[cpu])
  802. run_wakeup_cpu(cpu);
  803. #endif /* CONFIG_HOTPLUG_CPU */
  804. cpumask_set_cpu(cpu, &smp_commenced_mask);
  805. /* Wait 5s total for a response */
  806. for (timeout = 0 ; timeout < 5000 ; timeout++) {
  807. if (cpu_online(cpu))
  808. break;
  809. udelay(1000);
  810. }
  811. BUG_ON(!cpu_online(cpu));
  812. return 0;
  813. }
  814. /**
  815. * setup_profiling_timer - Set up the profiling timer
  816. * @multiplier - The frequency multiplier to use
  817. *
  818. * The frequency of the profiling timer can be changed by writing a multiplier
  819. * value into /proc/profile.
  820. */
  821. int setup_profiling_timer(unsigned int multiplier)
  822. {
  823. return -EINVAL;
  824. }
  825. /*
  826. * CPU hotplug routines
  827. */
  828. #ifdef CONFIG_HOTPLUG_CPU
  829. static DEFINE_PER_CPU(struct cpu, cpu_devices);
  830. static int __init topology_init(void)
  831. {
  832. int cpu, ret;
  833. for_each_cpu(cpu) {
  834. ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu, NULL);
  835. if (ret)
  836. printk(KERN_WARNING
  837. "topology_init: register_cpu %d failed (%d)\n",
  838. cpu, ret);
  839. }
  840. return 0;
  841. }
  842. subsys_initcall(topology_init);
  843. int __cpu_disable(void)
  844. {
  845. int cpu = smp_processor_id();
  846. if (cpu == 0)
  847. return -EBUSY;
  848. migrate_irqs();
  849. cpumask_clear_cpu(cpu, &mm_cpumask(current->active_mm));
  850. return 0;
  851. }
  852. void __cpu_die(unsigned int cpu)
  853. {
  854. run_sleep_cpu(cpu);
  855. if (num_online_cpus() == 1)
  856. enable_hlt();
  857. }
  858. #ifdef CONFIG_MN10300_CACHE_ENABLED
  859. static inline void hotplug_cpu_disable_cache(void)
  860. {
  861. int tmp;
  862. asm volatile(
  863. " movhu (%1),%0 \n"
  864. " and %2,%0 \n"
  865. " movhu %0,(%1) \n"
  866. "1: movhu (%1),%0 \n"
  867. " btst %3,%0 \n"
  868. " bne 1b \n"
  869. : "=&r"(tmp)
  870. : "a"(&CHCTR),
  871. "i"(~(CHCTR_ICEN | CHCTR_DCEN)),
  872. "i"(CHCTR_ICBUSY | CHCTR_DCBUSY)
  873. : "memory", "cc");
  874. }
  875. static inline void hotplug_cpu_enable_cache(void)
  876. {
  877. int tmp;
  878. asm volatile(
  879. "movhu (%1),%0 \n"
  880. "or %2,%0 \n"
  881. "movhu %0,(%1) \n"
  882. : "=&r"(tmp)
  883. : "a"(&CHCTR),
  884. "i"(CHCTR_ICEN | CHCTR_DCEN)
  885. : "memory", "cc");
  886. }
  887. static inline void hotplug_cpu_invalidate_cache(void)
  888. {
  889. int tmp;
  890. asm volatile (
  891. "movhu (%1),%0 \n"
  892. "or %2,%0 \n"
  893. "movhu %0,(%1) \n"
  894. : "=&r"(tmp)
  895. : "a"(&CHCTR),
  896. "i"(CHCTR_ICINV | CHCTR_DCINV)
  897. : "cc");
  898. }
  899. #else /* CONFIG_MN10300_CACHE_ENABLED */
  900. #define hotplug_cpu_disable_cache() do {} while (0)
  901. #define hotplug_cpu_enable_cache() do {} while (0)
  902. #define hotplug_cpu_invalidate_cache() do {} while (0)
  903. #endif /* CONFIG_MN10300_CACHE_ENABLED */
  904. /**
  905. * hotplug_cpu_nmi_call_function - Call a function on other CPUs for hotplug
  906. * @cpumask: List of target CPUs.
  907. * @func: The function to call on those CPUs.
  908. * @info: The context data for the function to be called.
  909. * @wait: Whether to wait for the calls to complete.
  910. *
  911. * Non-maskably call a function on another CPU for hotplug purposes.
  912. *
  913. * This function must be called with maskable interrupts disabled.
  914. */
  915. static int hotplug_cpu_nmi_call_function(cpumask_t cpumask,
  916. smp_call_func_t func, void *info,
  917. int wait)
  918. {
  919. /*
  920. * The address and the size of nmi_call_func_mask_data
  921. * need to be aligned on L1_CACHE_BYTES.
  922. */
  923. static struct nmi_call_data_struct nmi_call_func_mask_data
  924. __cacheline_aligned;
  925. unsigned long start, end;
  926. start = (unsigned long)&nmi_call_func_mask_data;
  927. end = start + sizeof(struct nmi_call_data_struct);
  928. nmi_call_func_mask_data.func = func;
  929. nmi_call_func_mask_data.info = info;
  930. nmi_call_func_mask_data.started = cpumask;
  931. nmi_call_func_mask_data.wait = wait;
  932. if (wait)
  933. nmi_call_func_mask_data.finished = cpumask;
  934. spin_lock(&smp_nmi_call_lock);
  935. nmi_call_data = &nmi_call_func_mask_data;
  936. mn10300_local_dcache_flush_range(start, end);
  937. smp_wmb();
  938. send_IPI_mask(cpumask, CALL_FUNCTION_NMI_IPI);
  939. do {
  940. mn10300_local_dcache_inv_range(start, end);
  941. barrier();
  942. } while (!cpumask_empty(&nmi_call_func_mask_data.started));
  943. if (wait) {
  944. do {
  945. mn10300_local_dcache_inv_range(start, end);
  946. barrier();
  947. } while (!cpumask_empty(&nmi_call_func_mask_data.finished));
  948. }
  949. spin_unlock(&smp_nmi_call_lock);
  950. return 0;
  951. }
  952. static void restart_wakeup_cpu(void)
  953. {
  954. unsigned int cpu = smp_processor_id();
  955. cpumask_set_cpu(cpu, &cpu_callin_map);
  956. local_flush_tlb();
  957. set_cpu_online(cpu, true);
  958. smp_wmb();
  959. }
  960. static void prepare_sleep_cpu(void *unused)
  961. {
  962. sleep_mode[smp_processor_id()] = 1;
  963. smp_mb();
  964. mn10300_local_dcache_flush_inv();
  965. hotplug_cpu_disable_cache();
  966. hotplug_cpu_invalidate_cache();
  967. }
  968. /* when this function called, IE=0, NMID=0. */
  969. static void sleep_cpu(void *unused)
  970. {
  971. unsigned int cpu_id = smp_processor_id();
  972. /*
  973. * CALL_FUNCTION_NMI_IPI for wakeup_cpu() shall not be requested,
  974. * before this cpu goes in SLEEP mode.
  975. */
  976. do {
  977. smp_mb();
  978. __sleep_cpu();
  979. } while (sleep_mode[cpu_id]);
  980. restart_wakeup_cpu();
  981. }
  982. static void run_sleep_cpu(unsigned int cpu)
  983. {
  984. unsigned long flags;
  985. cpumask_t cpumask;
  986. cpumask_copy(&cpumask, &cpumask_of(cpu));
  987. flags = arch_local_cli_save();
  988. hotplug_cpu_nmi_call_function(cpumask, prepare_sleep_cpu, NULL, 1);
  989. hotplug_cpu_nmi_call_function(cpumask, sleep_cpu, NULL, 0);
  990. udelay(1); /* delay for the cpu to sleep. */
  991. arch_local_irq_restore(flags);
  992. }
  993. static void wakeup_cpu(void)
  994. {
  995. hotplug_cpu_invalidate_cache();
  996. hotplug_cpu_enable_cache();
  997. smp_mb();
  998. sleep_mode[smp_processor_id()] = 0;
  999. }
  1000. static void run_wakeup_cpu(unsigned int cpu)
  1001. {
  1002. unsigned long flags;
  1003. flags = arch_local_cli_save();
  1004. #if NR_CPUS == 2
  1005. mn10300_local_dcache_flush_inv();
  1006. #else
  1007. /*
  1008. * Before waking up the cpu,
  1009. * all online cpus should stop and flush D-Cache for global data.
  1010. */
  1011. #error not support NR_CPUS > 2, when CONFIG_HOTPLUG_CPU=y.
  1012. #endif
  1013. hotplug_cpu_nmi_call_function(cpumask_of(cpu), wakeup_cpu, NULL, 1);
  1014. arch_local_irq_restore(flags);
  1015. }
  1016. #endif /* CONFIG_HOTPLUG_CPU */