sead3-pic32-bus.c 2.1 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
  7. */
  8. #include <linux/delay.h>
  9. #include <linux/kernel.h>
  10. #include <linux/spinlock.h>
  11. #include <linux/init.h>
  12. #include <linux/io.h>
  13. #include <linux/errno.h>
  14. #define PIC32_NULL 0x00
  15. #define PIC32_RD 0x01
  16. #define PIC32_SYSRD 0x02
  17. #define PIC32_WR 0x10
  18. #define PIC32_SYSWR 0x20
  19. #define PIC32_IRQ_CLR 0x40
  20. #define PIC32_STATUS 0x80
  21. #define DELAY() udelay(100) /* FIXME: needed? */
  22. /* spinlock to ensure atomic access to PIC32 */
  23. static DEFINE_SPINLOCK(pic32_bus_lock);
  24. /* FIXME: io_remap these */
  25. static void __iomem *bus_xfer = (void __iomem *)0xbf000600;
  26. static void __iomem *bus_status = (void __iomem *)0xbf000060;
  27. static inline unsigned int ioready(void)
  28. {
  29. return readl(bus_status) & 1;
  30. }
  31. static inline void wait_ioready(void)
  32. {
  33. do { } while (!ioready());
  34. }
  35. static inline void wait_ioclear(void)
  36. {
  37. do { } while (ioready());
  38. }
  39. static inline void check_ioclear(void)
  40. {
  41. if (ioready()) {
  42. pr_debug("ioclear: initially busy\n");
  43. do {
  44. (void) readl(bus_xfer);
  45. DELAY();
  46. } while (ioready());
  47. pr_debug("ioclear: cleared busy\n");
  48. }
  49. }
  50. u32 pic32_bus_readl(u32 reg)
  51. {
  52. unsigned long flags;
  53. u32 status, val;
  54. spin_lock_irqsave(&pic32_bus_lock, flags);
  55. check_ioclear();
  56. writel((PIC32_RD << 24) | (reg & 0x00ffffff), bus_xfer);
  57. DELAY();
  58. wait_ioready();
  59. status = readl(bus_xfer);
  60. DELAY();
  61. val = readl(bus_xfer);
  62. wait_ioclear();
  63. pr_debug("pic32_bus_readl: *%x -> %x (status=%x)\n", reg, val, status);
  64. spin_unlock_irqrestore(&pic32_bus_lock, flags);
  65. return val;
  66. }
  67. void pic32_bus_writel(u32 val, u32 reg)
  68. {
  69. unsigned long flags;
  70. u32 status;
  71. spin_lock_irqsave(&pic32_bus_lock, flags);
  72. check_ioclear();
  73. writel((PIC32_WR << 24) | (reg & 0x00ffffff), bus_xfer);
  74. DELAY();
  75. writel(val, bus_xfer);
  76. DELAY();
  77. wait_ioready();
  78. status = readl(bus_xfer);
  79. wait_ioclear();
  80. pr_debug("pic32_bus_writel: *%x <- %x (status=%x)\n", reg, val, status);
  81. spin_unlock_irqrestore(&pic32_bus_lock, flags);
  82. }