platform.c 12 KB

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  1. /*
  2. * Platform device support for Au1x00 SoCs.
  3. *
  4. * Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
  5. *
  6. * (C) Copyright Embedded Alley Solutions, Inc 2005
  7. * Author: Pantelis Antoniou <pantelis@embeddedalley.com>
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2. This program is licensed "as is" without any
  11. * warranty of any kind, whether express or implied.
  12. */
  13. #include <linux/dma-mapping.h>
  14. #include <linux/etherdevice.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/serial_8250.h>
  18. #include <linux/slab.h>
  19. #include <linux/usb/ehci_pdriver.h>
  20. #include <linux/usb/ohci_pdriver.h>
  21. #include <asm/mach-au1x00/au1000.h>
  22. #include <asm/mach-au1x00/au1xxx_dbdma.h>
  23. #include <asm/mach-au1x00/au1100_mmc.h>
  24. #include <asm/mach-au1x00/au1xxx_eth.h>
  25. #include <prom.h>
  26. static void alchemy_8250_pm(struct uart_port *port, unsigned int state,
  27. unsigned int old_state)
  28. {
  29. #ifdef CONFIG_SERIAL_8250
  30. switch (state) {
  31. case 0:
  32. alchemy_uart_enable(CPHYSADDR(port->membase));
  33. serial8250_do_pm(port, state, old_state);
  34. break;
  35. case 3: /* power off */
  36. serial8250_do_pm(port, state, old_state);
  37. alchemy_uart_disable(CPHYSADDR(port->membase));
  38. break;
  39. default:
  40. serial8250_do_pm(port, state, old_state);
  41. break;
  42. }
  43. #endif
  44. }
  45. #define PORT(_base, _irq) \
  46. { \
  47. .mapbase = _base, \
  48. .irq = _irq, \
  49. .regshift = 2, \
  50. .iotype = UPIO_AU, \
  51. .flags = UPF_SKIP_TEST | UPF_IOREMAP | \
  52. UPF_FIXED_TYPE, \
  53. .type = PORT_16550A, \
  54. .pm = alchemy_8250_pm, \
  55. }
  56. static struct plat_serial8250_port au1x00_uart_data[][4] __initdata = {
  57. [ALCHEMY_CPU_AU1000] = {
  58. PORT(AU1000_UART0_PHYS_ADDR, AU1000_UART0_INT),
  59. PORT(AU1000_UART1_PHYS_ADDR, AU1000_UART1_INT),
  60. PORT(AU1000_UART2_PHYS_ADDR, AU1000_UART2_INT),
  61. PORT(AU1000_UART3_PHYS_ADDR, AU1000_UART3_INT),
  62. },
  63. [ALCHEMY_CPU_AU1500] = {
  64. PORT(AU1000_UART0_PHYS_ADDR, AU1500_UART0_INT),
  65. PORT(AU1000_UART3_PHYS_ADDR, AU1500_UART3_INT),
  66. },
  67. [ALCHEMY_CPU_AU1100] = {
  68. PORT(AU1000_UART0_PHYS_ADDR, AU1100_UART0_INT),
  69. PORT(AU1000_UART1_PHYS_ADDR, AU1100_UART1_INT),
  70. PORT(AU1000_UART3_PHYS_ADDR, AU1100_UART3_INT),
  71. },
  72. [ALCHEMY_CPU_AU1550] = {
  73. PORT(AU1000_UART0_PHYS_ADDR, AU1550_UART0_INT),
  74. PORT(AU1000_UART1_PHYS_ADDR, AU1550_UART1_INT),
  75. PORT(AU1000_UART3_PHYS_ADDR, AU1550_UART3_INT),
  76. },
  77. [ALCHEMY_CPU_AU1200] = {
  78. PORT(AU1000_UART0_PHYS_ADDR, AU1200_UART0_INT),
  79. PORT(AU1000_UART1_PHYS_ADDR, AU1200_UART1_INT),
  80. },
  81. [ALCHEMY_CPU_AU1300] = {
  82. PORT(AU1300_UART0_PHYS_ADDR, AU1300_UART0_INT),
  83. PORT(AU1300_UART1_PHYS_ADDR, AU1300_UART1_INT),
  84. PORT(AU1300_UART2_PHYS_ADDR, AU1300_UART2_INT),
  85. PORT(AU1300_UART3_PHYS_ADDR, AU1300_UART3_INT),
  86. },
  87. };
  88. static struct platform_device au1xx0_uart_device = {
  89. .name = "serial8250",
  90. .id = PLAT8250_DEV_AU1X00,
  91. };
  92. static void __init alchemy_setup_uarts(int ctype)
  93. {
  94. unsigned int uartclk = get_au1x00_uart_baud_base() * 16;
  95. int s = sizeof(struct plat_serial8250_port);
  96. int c = alchemy_get_uarts(ctype);
  97. struct plat_serial8250_port *ports;
  98. ports = kzalloc(s * (c + 1), GFP_KERNEL);
  99. if (!ports) {
  100. printk(KERN_INFO "Alchemy: no memory for UART data\n");
  101. return;
  102. }
  103. memcpy(ports, au1x00_uart_data[ctype], s * c);
  104. au1xx0_uart_device.dev.platform_data = ports;
  105. /* Fill up uartclk. */
  106. for (s = 0; s < c; s++)
  107. ports[s].uartclk = uartclk;
  108. if (platform_device_register(&au1xx0_uart_device))
  109. printk(KERN_INFO "Alchemy: failed to register UARTs\n");
  110. }
  111. /* The dmamask must be set for OHCI/EHCI to work */
  112. static u64 alchemy_ohci_dmamask = DMA_BIT_MASK(32);
  113. static u64 __maybe_unused alchemy_ehci_dmamask = DMA_BIT_MASK(32);
  114. /* Power on callback for the ehci platform driver */
  115. static int alchemy_ehci_power_on(struct platform_device *pdev)
  116. {
  117. return alchemy_usb_control(ALCHEMY_USB_EHCI0, 1);
  118. }
  119. /* Power off/suspend callback for the ehci platform driver */
  120. static void alchemy_ehci_power_off(struct platform_device *pdev)
  121. {
  122. alchemy_usb_control(ALCHEMY_USB_EHCI0, 0);
  123. }
  124. static struct usb_ehci_pdata alchemy_ehci_pdata = {
  125. .no_io_watchdog = 1,
  126. .power_on = alchemy_ehci_power_on,
  127. .power_off = alchemy_ehci_power_off,
  128. .power_suspend = alchemy_ehci_power_off,
  129. };
  130. /* Power on callback for the ohci platform driver */
  131. static int alchemy_ohci_power_on(struct platform_device *pdev)
  132. {
  133. int unit;
  134. unit = (pdev->id == 1) ?
  135. ALCHEMY_USB_OHCI1 : ALCHEMY_USB_OHCI0;
  136. return alchemy_usb_control(unit, 1);
  137. }
  138. /* Power off/suspend callback for the ohci platform driver */
  139. static void alchemy_ohci_power_off(struct platform_device *pdev)
  140. {
  141. int unit;
  142. unit = (pdev->id == 1) ?
  143. ALCHEMY_USB_OHCI1 : ALCHEMY_USB_OHCI0;
  144. alchemy_usb_control(unit, 0);
  145. }
  146. static struct usb_ohci_pdata alchemy_ohci_pdata = {
  147. .power_on = alchemy_ohci_power_on,
  148. .power_off = alchemy_ohci_power_off,
  149. .power_suspend = alchemy_ohci_power_off,
  150. };
  151. static unsigned long alchemy_ohci_data[][2] __initdata = {
  152. [ALCHEMY_CPU_AU1000] = { AU1000_USB_OHCI_PHYS_ADDR, AU1000_USB_HOST_INT },
  153. [ALCHEMY_CPU_AU1500] = { AU1000_USB_OHCI_PHYS_ADDR, AU1500_USB_HOST_INT },
  154. [ALCHEMY_CPU_AU1100] = { AU1000_USB_OHCI_PHYS_ADDR, AU1100_USB_HOST_INT },
  155. [ALCHEMY_CPU_AU1550] = { AU1550_USB_OHCI_PHYS_ADDR, AU1550_USB_HOST_INT },
  156. [ALCHEMY_CPU_AU1200] = { AU1200_USB_OHCI_PHYS_ADDR, AU1200_USB_INT },
  157. [ALCHEMY_CPU_AU1300] = { AU1300_USB_OHCI0_PHYS_ADDR, AU1300_USB_INT },
  158. };
  159. static unsigned long alchemy_ehci_data[][2] __initdata = {
  160. [ALCHEMY_CPU_AU1200] = { AU1200_USB_EHCI_PHYS_ADDR, AU1200_USB_INT },
  161. [ALCHEMY_CPU_AU1300] = { AU1300_USB_EHCI_PHYS_ADDR, AU1300_USB_INT },
  162. };
  163. static int __init _new_usbres(struct resource **r, struct platform_device **d)
  164. {
  165. *r = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL);
  166. if (!*r)
  167. return -ENOMEM;
  168. *d = kzalloc(sizeof(struct platform_device), GFP_KERNEL);
  169. if (!*d) {
  170. kfree(*r);
  171. return -ENOMEM;
  172. }
  173. (*d)->dev.coherent_dma_mask = DMA_BIT_MASK(32);
  174. (*d)->num_resources = 2;
  175. (*d)->resource = *r;
  176. return 0;
  177. }
  178. static void __init alchemy_setup_usb(int ctype)
  179. {
  180. struct resource *res;
  181. struct platform_device *pdev;
  182. /* setup OHCI0. Every variant has one */
  183. if (_new_usbres(&res, &pdev))
  184. return;
  185. res[0].start = alchemy_ohci_data[ctype][0];
  186. res[0].end = res[0].start + 0x100 - 1;
  187. res[0].flags = IORESOURCE_MEM;
  188. res[1].start = alchemy_ohci_data[ctype][1];
  189. res[1].end = res[1].start;
  190. res[1].flags = IORESOURCE_IRQ;
  191. pdev->name = "ohci-platform";
  192. pdev->id = 0;
  193. pdev->dev.dma_mask = &alchemy_ohci_dmamask;
  194. pdev->dev.platform_data = &alchemy_ohci_pdata;
  195. if (platform_device_register(pdev))
  196. printk(KERN_INFO "Alchemy USB: cannot add OHCI0\n");
  197. /* setup EHCI0: Au1200/Au1300 */
  198. if ((ctype == ALCHEMY_CPU_AU1200) || (ctype == ALCHEMY_CPU_AU1300)) {
  199. if (_new_usbres(&res, &pdev))
  200. return;
  201. res[0].start = alchemy_ehci_data[ctype][0];
  202. res[0].end = res[0].start + 0x100 - 1;
  203. res[0].flags = IORESOURCE_MEM;
  204. res[1].start = alchemy_ehci_data[ctype][1];
  205. res[1].end = res[1].start;
  206. res[1].flags = IORESOURCE_IRQ;
  207. pdev->name = "ehci-platform";
  208. pdev->id = 0;
  209. pdev->dev.dma_mask = &alchemy_ehci_dmamask;
  210. pdev->dev.platform_data = &alchemy_ehci_pdata;
  211. if (platform_device_register(pdev))
  212. printk(KERN_INFO "Alchemy USB: cannot add EHCI0\n");
  213. }
  214. /* Au1300: OHCI1 */
  215. if (ctype == ALCHEMY_CPU_AU1300) {
  216. if (_new_usbres(&res, &pdev))
  217. return;
  218. res[0].start = AU1300_USB_OHCI1_PHYS_ADDR;
  219. res[0].end = res[0].start + 0x100 - 1;
  220. res[0].flags = IORESOURCE_MEM;
  221. res[1].start = AU1300_USB_INT;
  222. res[1].end = res[1].start;
  223. res[1].flags = IORESOURCE_IRQ;
  224. pdev->name = "ohci-platform";
  225. pdev->id = 1;
  226. pdev->dev.dma_mask = &alchemy_ohci_dmamask;
  227. pdev->dev.platform_data = &alchemy_ohci_pdata;
  228. if (platform_device_register(pdev))
  229. printk(KERN_INFO "Alchemy USB: cannot add OHCI1\n");
  230. }
  231. }
  232. /* Macro to help defining the Ethernet MAC resources */
  233. #define MAC_RES_COUNT 4 /* MAC regs, MAC en, MAC INT, MACDMA regs */
  234. #define MAC_RES(_base, _enable, _irq, _macdma) \
  235. { \
  236. .start = _base, \
  237. .end = _base + 0xffff, \
  238. .flags = IORESOURCE_MEM, \
  239. }, \
  240. { \
  241. .start = _enable, \
  242. .end = _enable + 0x3, \
  243. .flags = IORESOURCE_MEM, \
  244. }, \
  245. { \
  246. .start = _irq, \
  247. .end = _irq, \
  248. .flags = IORESOURCE_IRQ \
  249. }, \
  250. { \
  251. .start = _macdma, \
  252. .end = _macdma + 0x1ff, \
  253. .flags = IORESOURCE_MEM, \
  254. }
  255. static struct resource au1xxx_eth0_resources[][MAC_RES_COUNT] __initdata = {
  256. [ALCHEMY_CPU_AU1000] = {
  257. MAC_RES(AU1000_MAC0_PHYS_ADDR,
  258. AU1000_MACEN_PHYS_ADDR,
  259. AU1000_MAC0_DMA_INT,
  260. AU1000_MACDMA0_PHYS_ADDR)
  261. },
  262. [ALCHEMY_CPU_AU1500] = {
  263. MAC_RES(AU1500_MAC0_PHYS_ADDR,
  264. AU1500_MACEN_PHYS_ADDR,
  265. AU1500_MAC0_DMA_INT,
  266. AU1000_MACDMA0_PHYS_ADDR)
  267. },
  268. [ALCHEMY_CPU_AU1100] = {
  269. MAC_RES(AU1000_MAC0_PHYS_ADDR,
  270. AU1000_MACEN_PHYS_ADDR,
  271. AU1100_MAC0_DMA_INT,
  272. AU1000_MACDMA0_PHYS_ADDR)
  273. },
  274. [ALCHEMY_CPU_AU1550] = {
  275. MAC_RES(AU1000_MAC0_PHYS_ADDR,
  276. AU1000_MACEN_PHYS_ADDR,
  277. AU1550_MAC0_DMA_INT,
  278. AU1000_MACDMA0_PHYS_ADDR)
  279. },
  280. };
  281. static struct au1000_eth_platform_data au1xxx_eth0_platform_data = {
  282. .phy1_search_mac0 = 1,
  283. };
  284. static struct platform_device au1xxx_eth0_device = {
  285. .name = "au1000-eth",
  286. .id = 0,
  287. .num_resources = MAC_RES_COUNT,
  288. .dev.platform_data = &au1xxx_eth0_platform_data,
  289. };
  290. static struct resource au1xxx_eth1_resources[][MAC_RES_COUNT] __initdata = {
  291. [ALCHEMY_CPU_AU1000] = {
  292. MAC_RES(AU1000_MAC1_PHYS_ADDR,
  293. AU1000_MACEN_PHYS_ADDR + 4,
  294. AU1000_MAC1_DMA_INT,
  295. AU1000_MACDMA1_PHYS_ADDR)
  296. },
  297. [ALCHEMY_CPU_AU1500] = {
  298. MAC_RES(AU1500_MAC1_PHYS_ADDR,
  299. AU1500_MACEN_PHYS_ADDR + 4,
  300. AU1500_MAC1_DMA_INT,
  301. AU1000_MACDMA1_PHYS_ADDR)
  302. },
  303. [ALCHEMY_CPU_AU1550] = {
  304. MAC_RES(AU1000_MAC1_PHYS_ADDR,
  305. AU1000_MACEN_PHYS_ADDR + 4,
  306. AU1550_MAC1_DMA_INT,
  307. AU1000_MACDMA1_PHYS_ADDR)
  308. },
  309. };
  310. static struct au1000_eth_platform_data au1xxx_eth1_platform_data = {
  311. .phy1_search_mac0 = 1,
  312. };
  313. static struct platform_device au1xxx_eth1_device = {
  314. .name = "au1000-eth",
  315. .id = 1,
  316. .num_resources = MAC_RES_COUNT,
  317. .dev.platform_data = &au1xxx_eth1_platform_data,
  318. };
  319. void __init au1xxx_override_eth_cfg(unsigned int port,
  320. struct au1000_eth_platform_data *eth_data)
  321. {
  322. if (!eth_data || port > 1)
  323. return;
  324. if (port == 0)
  325. memcpy(&au1xxx_eth0_platform_data, eth_data,
  326. sizeof(struct au1000_eth_platform_data));
  327. else
  328. memcpy(&au1xxx_eth1_platform_data, eth_data,
  329. sizeof(struct au1000_eth_platform_data));
  330. }
  331. static void __init alchemy_setup_macs(int ctype)
  332. {
  333. int ret, i;
  334. unsigned char ethaddr[6];
  335. struct resource *macres;
  336. /* Handle 1st MAC */
  337. if (alchemy_get_macs(ctype) < 1)
  338. return;
  339. macres = kmemdup(au1xxx_eth0_resources[ctype],
  340. sizeof(struct resource) * MAC_RES_COUNT, GFP_KERNEL);
  341. if (!macres) {
  342. printk(KERN_INFO "Alchemy: no memory for MAC0 resources\n");
  343. return;
  344. }
  345. au1xxx_eth0_device.resource = macres;
  346. i = prom_get_ethernet_addr(ethaddr);
  347. if (!i && !is_valid_ether_addr(au1xxx_eth0_platform_data.mac))
  348. memcpy(au1xxx_eth0_platform_data.mac, ethaddr, 6);
  349. ret = platform_device_register(&au1xxx_eth0_device);
  350. if (ret)
  351. printk(KERN_INFO "Alchemy: failed to register MAC0\n");
  352. /* Handle 2nd MAC */
  353. if (alchemy_get_macs(ctype) < 2)
  354. return;
  355. macres = kmemdup(au1xxx_eth1_resources[ctype],
  356. sizeof(struct resource) * MAC_RES_COUNT, GFP_KERNEL);
  357. if (!macres) {
  358. printk(KERN_INFO "Alchemy: no memory for MAC1 resources\n");
  359. return;
  360. }
  361. au1xxx_eth1_device.resource = macres;
  362. ethaddr[5] += 1; /* next addr for 2nd MAC */
  363. if (!i && !is_valid_ether_addr(au1xxx_eth1_platform_data.mac))
  364. memcpy(au1xxx_eth1_platform_data.mac, ethaddr, 6);
  365. /* Register second MAC if enabled in pinfunc */
  366. if (!(au_readl(SYS_PINFUNC) & (u32)SYS_PF_NI2)) {
  367. ret = platform_device_register(&au1xxx_eth1_device);
  368. if (ret)
  369. printk(KERN_INFO "Alchemy: failed to register MAC1\n");
  370. }
  371. }
  372. static int __init au1xxx_platform_init(void)
  373. {
  374. int ctype = alchemy_get_cputype();
  375. alchemy_setup_uarts(ctype);
  376. alchemy_setup_macs(ctype);
  377. alchemy_setup_usb(ctype);
  378. return 0;
  379. }
  380. arch_initcall(au1xxx_platform_init);